Wireless communication apparatus and control physical layer packet reception method

Abstract

Embodiments of various systems, methods, and apparatus for group flipping and single pick-up tools are disclosed. Embodiments disclosed herein are useful, for example, in the fabrication of direct bonded devices.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Patent Application No. 17 / 662,180, filed May 5, 2023, the entire contents of which are incorporated herein by reference in their entirety for all purposes. Technical Field

[0003] The field relates to methods and tools for directly bonding semiconductor dies. In particular, some embodiments relate to systems and methods for flipping a die prior to bonding. Background Art

[0004] Direct bonding can be used in various types of electronic applications to form stacked structures, system-on-chip (SoC), microelectromechanical system (MEMS) devices, optical devices, memory and / or processing devices, etc. The costs associated with surface contamination are particularly significant when direct bonding is used. Because the direct bonding process joins components to a flat surface without an intervening adhesive, even a small amount of small particles can have an adverse effect. For example, particles on the bonding surface can cause voids, which can result in, for example, non-functional interconnects, resistive interconnects that limit performance, or fragility that shortens the life of the device. Summary of the invention

[0005] For purposes of this summary, certain aspects, advantages, and novel features are described herein. It should be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment.

[0006] In some embodiments, the technology described herein is directed to a method comprising: providing a first wafer and a second wafer; polishing the first wafer and the second wafer; cutting the first wafer on a dicing tape to form a cut wafer comprising a plurality of dies; activating at least one of the first wafer, the cut wafer, and the second wafer; flipping the cut wafer; securing the cut wafer to a chuck; removing the dicing tape from the cut wafer; and bonding at least some of the plurality of dies to the second wafer. In some embodiments, the activation comprises activating the second wafer and one of the first wafer and the cut wafer. In some embodiments, the activation comprises exposing at least one of the first wafer, the cut wafer, and the second wafer to a nitrogen plasma.

[0007] In some embodiments, the technology described herein relates to a method comprising: providing a plurality of semiconductor dies on a dicing tape, each of the plurality of semiconductor dies having a first bonding surface and a second surface opposite to the first bonding surface, the second faces of the plurality of semiconductor dies being attached to the dicing tape; and fixing the first bonding surfaces of the plurality of semiconductor dies to a chuck while the plurality of semiconductor dies are attached to the dicing tape. In some embodiments, the second surface of each of the plurality of semiconductor dies is a second bonding surface. In some embodiments, the method further comprises preparing the second bonding surface for bonding.

[0008] In some embodiments, a method further comprises activating the first bonding surface for direct bonding. In some embodiments, a method further comprises cleaning the first bonding surface.

[0009] In some embodiments, the technology described herein is directed to a method in which providing a plurality of semiconductor dies includes securing a wafer on a dicing tape and dicing the wafer into a plurality of semiconductor dies.

[0010] In some embodiments, the technology described herein is directed to a method further comprising: removing a dicing tape from a plurality of semiconductor dies; removing a semiconductor die from the plurality of semiconductor dies from a chuck; and directly bonding a first bonding surface of the semiconductor die to a carrier without an intervening adhesive.

[0011] In some embodiments, the technology described herein is directed to a method in which direct bonding includes directly bonding a non-conductive layer of a semiconductor die to a non-conductive layer of a carrier.

[0012] In some embodiments, the technology described herein relates to a method wherein directly bonding further comprises directly bonding the conductive contacts of the semiconductor die to the conductive contacts of the carrier.

[0013] In some embodiments, the technology described herein is directed to a method further comprising: cleaning the second surface of the semiconductor die after direct bonding.

[0014] In some embodiments, the technology described herein relates to a method wherein the second surface is a second bonding surface, further comprising: after the direct bonding, directly bonding a second semiconductor die to the second bonding surface of the semiconductor die.

[0015] In some embodiments, the technology described herein is directed to a method further comprising: removing a dicing tape from a plurality of semiconductor dies; and selectively releasing one or more of the plurality of semiconductor dies while remaining semiconductor dies of the plurality of semiconductor dies are secured to a chuck.

[0016] In some embodiments, the technology described herein relates to a method wherein the selective releasing includes selectively releasing only one semiconductor die.

[0017] In some embodiments, the technology described herein is directed to a method wherein the chuck is an electrostatic chuck, wherein securing comprises applying an electrostatic force to the plurality of semiconductor dies through the electrostatic chuck, wherein applying the electrostatic force comprises powering a plurality of electrodes embedded in the electrostatic chuck.

[0018] In some embodiments, the technology described herein relates to a method that also includes: removing a dicing tape from a plurality of semiconductor dies; and selectively releasing one or more of the plurality of semiconductor dies while remaining semiconductor dies of the plurality of semiconductor dies are secured to an electrostatic chuck, wherein the selectively releasing includes changing a power provided to one or more of the plurality of electrodes.

[0019] In some embodiments, the technology described herein is directed to a method in which varying the supplied power includes reversing the polarity of the power supplied to one or more electrodes.

[0020] In some embodiments, the technology described herein is directed to a method wherein the chuck is a vacuum chuck, wherein securing comprises applying a vacuum force to the plurality of semiconductor dies through a plurality of vacuum channels embedded in the vacuum chuck.

[0021] In some embodiments, the technology described herein is directed to a method further comprising: removing a dicing tape from a plurality of semiconductor dies; and selectively releasing one or more of the plurality of semiconductor dies while remaining semiconductor dies of the plurality of semiconductor dies are secured to a vacuum chuck.

[0022] In some embodiments, the technology described herein is directed to a method in which the selectively releasing includes reducing a vacuum force applied to one or more semiconductor dies.

[0023] In some embodiments, the technology described herein is directed to a method in which a plurality of porous inserts are disposed atop a plurality of vacuum channels.

[0024] In some embodiments, the technology described herein is directed to a method in which a plurality of semiconductor dies are disposed on top of a plurality of porous inserts.

[0025] In some embodiments, the technology described herein is directed to a method in which providing includes: applying a protective layer on a wafer; mounting the wafer on a dicing tape; and dicing the wafer into a plurality of semiconductor dies.

[0026] In some embodiments, the technology described herein is directed to a method where providing further comprises removing the protective layer from the plurality of semiconductor dies after dicing.

[0027] In some embodiments, the technology described herein is directed to a method further comprising, prior to securing, activating the first bonding surface while the die is attached to the dicing tape.

[0028] In some embodiments, the technology described herein relates to a method in which activation is performed after dicing a wafer to form a plurality of semiconductor dies.

[0029] In some embodiments, the technology described herein is directed to a method wherein activating includes exposing a first bonding surface to a nitrogen-containing plasma.

[0030] In some embodiments, the technology described herein is directed to a method further comprising planarizing at least one of the first bonding surface and the second surface before securing the wafer to the dicing tape.

[0031] In some embodiments, the technology described herein relates to a method further comprising picking up a die from a plurality of dies from a chuck by a vacuum bonding tool, wherein the vacuum bonding tool is conductive and electrically grounded, and wherein the picking up includes removing charge from the die by contacting the die with the conductive vacuum bonding tool.

[0032] In some embodiments, the technology described herein relates to a method comprising: fixing a wafer on a dicing tape; cutting the wafer into a plurality of semiconductor dies, each of the plurality of semiconductor dies having a first bonding surface and a second surface opposite to the first bonding surface, the second surface of the semiconductor die being attached to the dicing tape; fixing the first bonding surfaces of the plurality of semiconductor dies to a chuck while the plurality of semiconductor dies are attached to the dicing tape; removing the dicing tape from the plurality of semiconductor dies; and removing the dies from the chuck.

[0033] In some embodiments, the technology described herein is directed to a method further comprising flipping the plurality of semiconductor dies and the dicing tape.

[0034] In some embodiments, the technology described herein is directed to a method wherein the chuck is an electrostatic chuck, the method further comprising applying an electrostatic force to the plurality of semiconductor dies to secure the plurality of semiconductor dies to the electrostatic chuck.

[0035] In some embodiments, the technology described herein is directed to a method in which removing a die includes reducing an electrostatic force applied to the die by an electrostatic chuck.

[0036] In some embodiments, the technology described herein relates to a method in which removing a die includes terminating power to one or more electrodes of an electrostatic chuck associated with the die.

[0037] In some embodiments, the technology described herein is directed to a method in which removing a die includes reversing an electrostatic force applied to the die by an electrostatic chuck and reducing the electrostatic force applied to the die by the electrostatic chuck.

[0038] In some embodiments, the technology described herein relates to a vacuum chuck for supporting a plurality of semiconductor dies, the vacuum chuck comprising: a plate comprising a die support surface, the die support surface comprising a plurality of die support regions; and a plurality of vacuum channels extending through the plate, the plurality of vacuum channels being connectable to one or more vacuum sources, each vacuum channel of the plurality of vacuum channels being associated with a corresponding die support region. In some embodiments, only one vacuum channel is associated with each die support region.

[0039] In some embodiments, the technology described herein relates to a vacuum chuck further comprising a plurality of porous regions disposed at the tool support surface of the plate, each porous region disposed over a corresponding vacuum channel of the plurality of vacuum channels.

[0040] In some embodiments, the technology described herein relates to a vacuum chuck further comprising a controller configured to independently control each vacuum channel of a plurality of vacuum channels.

[0041] In some embodiments, the technology described herein relates to a vacuum chuck wherein the plurality of porous regions comprises a replaceable porous insert.

[0042] In some embodiments, the technology described herein relates to a vacuum chuck wherein the porous region is wider than the corresponding vacuum channel.

[0043] In some embodiments, the technology described herein relates to a vacuum chuck wherein the porous region comprises a polymer coating.

[0044] In some embodiments, the technology described herein relates to an electrostatic chuck for supporting a plurality of semiconductor dies using electrostatic forces, the electrostatic chuck comprising: a non-conductive body having a plurality of die supporting regions, each die supporting region being configured to support a die among the plurality of semiconductor dies; and a plurality of electrodes in the non-conductive body, each die supporting region having a first electrode having a first polarity and a second electrode associated therewith having a second polarity opposite to the first polarity.

[0045] In some embodiments, the technology described herein relates to an electrostatic chuck and also includes a controller configured to independently control each electrode of the plurality of electrodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] These and other features, aspects and advantages of the present disclosure are described with reference to the accompanying drawings of certain embodiments, which are intended to illustrate but not limit the present disclosure. It should be understood that the drawings incorporated into and constituting a part of this specification are for the purpose of illustrating the concepts disclosed herein and may not be drawn to scale.

[0047] Figure 1 Depicted is an example process for a separate pick and place tool in accordance with some embodiments.

[0048] Figure 2 An example process of group-flipping tools according to some embodiments is depicted.

[0049] Figure 3 An example vacuum chuck is depicted in accordance with some embodiments.

[0050] Figure 4a-4c Depicted are examples of porous inserts that may be used in a vacuum chuck according to some embodiments.

[0051] Figure 5 An example electrostatic chuck is depicted in accordance with some embodiments.

[0052] Figure 6a and 6b An example electrostatic chuck surface is depicted in accordance with some embodiments.

[0053] Figure 7 Depicted is an example process for batch flipping and individual pick up tools using an electrostatic chuck and a conductive vacuum bonding tool in accordance with some embodiments. DETAILED DESCRIPTION

[0054] Although several embodiments, examples, and illustrations are disclosed below, it will be understood by those of ordinary skill in the art that the disclosure described herein extends beyond the specifically disclosed embodiments, examples, and illustrations and includes other uses and obvious modifications and equivalents thereof. The embodiments are described with reference to the accompanying drawings, in which like numbers refer to like elements throughout. The terminology used in the description presented herein is not intended to be interpreted in any limited or restrictive manner merely because it is used in conjunction with the detailed description of certain specific embodiments of the invention. In addition, embodiments of the present invention may include several novel features, and no one feature is solely responsible for its desired attributes, nor is any one feature necessary to implement the invention described herein.

[0055] Various embodiments described herein relate to systems and methods for flipping and directly bonding dies. Embodiments described herein can be used, for example, in the manufacture of any suitable type of electronic device, such as a stacked structure, a system on a chip (SoC), a micro-electromechanical system (MEMS) device, an optical device, a memory and / or a processing device, etc.

[0056] In some embodiments, the direct bonding process may be performed according to at least the techniques disclosed in US Pat. No. 10,434,749, which is incorporated herein by reference in its entirety and for all purposes. Figure 1 is an example of a direct bonding process flow 100 in which a single die is picked up and placed on a carrier 138 to directly bond one or more dies to the carrier 138. At block 101, a device wafer 114 may have a device portion 116 (e.g., a semiconductor portion that may be patterned with a circuit), a first bonding layer including a first non-conductive layer 118 and a plurality of first contact features 120 at least partially embedded in the first non-conductive layer 118, a first bonding surface 122 located at an outer surface (e.g., an upper surface) of the first bonding layer, and in some embodiments, a second bonding layer including a second non-conductive layer 124 and a plurality of sub-second contact features 126 at least partially embedded in the second non-conductive layer 124, and a second surface 128 located at an outer surface (e.g., a lower surface) of the second bonding layer (which may include a second bonding surface for a multi-die stacking arrangement). As shown in block 101, a protective layer 130 (e.g., a polymer layer such as a photoresist layer) may be provided on the first bonding surface 122. The protective layer 130 can protect the wafer 114 during the dicing process. The wafer 114 can be placed on a dicing tape 110 attached to a frame 112. As described herein, the first bonding surface 122 and in some embodiments the second surface 128 can be polished to a high degree of smoothness in preparation for direct bonding.

[0057] At block 102, the wafer 114 may be cut into a plurality of dies 132a-e. The wafer 114 may be cut in any suitable manner, such as sawing, laser stealth cutting, reactive ion etching (RIE), or plasma cutting, among others. After cutting, the protective layer 130 may be removed by ashing (e.g., exposure to an oxygen plasma) and rinsing with deionized (DI) water, using a suitable solvent, or by any other suitable method. In some embodiments, the protective layer 130 may be a polymer that is responsive to ultraviolet light (e.g., a photoresist layer), and the protective layer 130 may be exposed to ultraviolet light prior to removing the protective layer 130. As described herein, the bonding surfaces 122 of the dies 132a-e may be further processed on the dicing tape 110 in preparation for bonding. For example, the dies 132a-e may be activated (e.g., exposed to a plasma, such as a nitrogen-containing plasma or an etchant) and / or cleaned in preparation for bonding.

[0058] At block 103, a flip tool 134 (e.g., a vacuum flip tool) can pick up the die 132a from the tape for bonding by contacting the first bonding surface 122 of the die 132b. At block 104, the flip tool 134 can flip the die 132b, and the die 132a can be transferred to a bonding tool 136 (e.g., a vacuum bonding tool). The bonding tool 136 can contact the second surface 128 of the die 132b. In some embodiments, the second surface 128 may include a second bonding surface prepared for direct bonding, including, for example, a polished non-conductive surface with at least partially embedded conductive contacts. In other embodiments, the second surface 128 may include a ground surface that is not bonded to another element. At block 105, the bonding tool 136 can be used to bond the die 132b to the carrier 138. The carrier may have a non-conductive carrier region and a carrier bonding surface 144, in which the carrier contact features 142 are at least partially embedded. The first bonding surface 122 of the die 132b may be bonded (ie, directly bonded) to the carrier bonding surface 144. The carrier 138 may be a wafer, a die, an interposer, or any other suitable element.

[0059] Figure 1 The process shown has several advantages, but also several limitations. For example, picking up and bonding the die individually allows only known good die (KGD) to be picked up. Similarly, if there is a known bad portion of the carrier 138, that portion can be avoided so that the KGD is not placed in the known bad portion of the carrier 138. In some cases, the flip tool 134 that contacts the first bonding surface 122 may become contaminated. In some cases, the flip tool 134 may be contaminated due to previous processing, wear or defects in the tool, or by picking up particles present on the surface of the tool and spreading the particles to other tools. For example, if the flip tool 134 picks up the tube core 132a first, any contaminants on the first bonding surface 122 of the tube core 132a may be transferred to the other tube cores 132b-e by the flip tool 134. In some cases, the transfer of contaminants to other tube cores may make the other tube cores unusable or cause other problems. In the case of large chip sizes, contamination problems are particularly evident. For example, for a 300mm wafer with a die size of 1cm by 1cm and a defect density of about 0.1 defects per square cm, about 10% of the die will be defective. In contrast, if the tool size is about 4cm by 4cm, about 75% of the tools will be defective at the same defect density.

[0060] In some cases, such as small batch test runs, it may be feasible to clean the surface of the flip tool frequently, such as after each tool, after every ten tools, etc. However, in high-volume production, flip tools typically process thousands of units per hour, which makes cleaning the flip tool between tools both impractical and expensive. Therefore, a method is needed to flip the die in preparation for bonding without contaminating the die surface.

[0061] In some cases, it may be feasible to eliminate the flip tool that contacts each die by using a collective bonding process. While collective bonding prevents contamination of the flip tool, if this collective bonding is performed, known defective dies cannot be screened out and, for example, KGDs may not be selected. Therefore, by including defective dies, collective bonding may result in lower device yields. Failure to identify and select KGDs may result in lower overall yields and increased costs. Screening out bad dies is particularly important when chip sizes are larger, so there are fewer chips per wafer. In general, manufacturing costs are largely independent of die size, so if there are fewer dies on each wafer, the cost of manufacturing each die will be higher. Therefore, it is important to ensure that known bad dies are not bonded with other good device components.

[0062] In addition to the problem of not being able to screen out bad chips, mass bonding can also pose other challenges. For example, some mass bonding processes include preparing a transfer wafer with a bonding layer, bonding the die to the transfer wafer to form a reconstituted wafer, and then performing a wafer-to-wafer bonding process to bond the transfer wafer and the carrier wafer. The process may include one or more cleaning and / or activation steps, after which the transfer wafer is removed.

[0063] Mass bonding can be particularly problematic when features on the die are close together (e.g., fine pitch electrical interconnects, optical paths, etc.). Alignment errors can come from the flexibility of the dicing tape, the placement of the die on the transfer wafer (if a transfer wafer is used), and the alignment of the dicing tape or transfer wafer to the carrier wafer. The compounding effect of alignment errors can result in reduced yield, reduced device performance, etc.

[0064] Therefore, it is beneficial to flip the die and bond it to another surface without contaminating the surface of the die, while still being able to pick and place the die individually, thereby allowing known bad dies to be rejected and reducing the likelihood of problems due to alignment errors.

[0065] Go to Figure 2, an example process 200 for flipping tools in groups and picking and placing the tools individually on a carrier 138 to directly bond one or more tools to the carrier 138 is shown in accordance with some embodiments. The process flow 200 may be similar to the process flow 100 in some aspects. For example, blocks 101 and 102 of the process flow 100 may be the same for the process flow 200. At block 101, a device wafer 114 (e.g., a silicon device wafer) may have a device portion 116 (e.g., a semiconductor portion that may be patterned with circuits), a first bonding layer including a first non-conductive layer 118, and a plurality of first contact features 120 at least partially embedded in the first non-conductive layer 118, a first bonding surface 122 located outside the first bonding layer (e.g., an upper surface), and optionally, a second bonding layer including a second non-conductive layer 124, and a plurality of sub-second contact features 126 at least partially embedded in the second non-conductive layer 124, and a second surface 128 located outside the second bonding layer (e.g., a lower surface). The first bonding layer and the second bonding layer can be disposed on opposite sides of the device portion 116. As shown in block 101, the first bonding surface 122 can be coated with a protective layer 130 (e.g., a polymer, such as a photoresist layer) that protects the wafer 114 during the dicing process. The device wafer 114 can be disposed on a dicing tape 110 attached to a frame 112. As described herein, the first bonding surface 122 and, in some embodiments, the second surface 128 can be polished to a high degree of smoothness in preparation for direct bonding.

[0066] At block 102 , the device wafer 114 may be diced into a plurality of individual device dies 120 and may undergo further processing in preparation for bonding as described above.

[0067] At block 203, the frame 112, the dicing tape 110, and the diced device wafer 114 (including a plurality of device dies 132a-e) are flipped together and placed on a chuck 210. The first bonding surfaces 122 of the device dies 132a-e are in contact with a surface of the chuck 210. The device dies may be fixed (e.g., temporarily or releasably fixed) to the chuck 210 by, for example, electrostatic forces or vacuum forces. In some embodiments, instead of flipping the frame 112, the dicing tape 110, and the device dies 132a-e, the orientation may remain unchanged, and the chuck 210 may be moved into position to contact the dies 132a-c. For example, the chuck 210 may be moved vertically downward to contact the dies 132a-e.

[0068] At block 204, the dicing tape 110 and the frame 112 can be pulled away from the tube core 132a-e, exposing the second surface 128. The force applied by the chuck 210 to the tube core 132a-e can be greater than the bonding force of the dicing tape 110, thereby allowing the dicing tape 110 to be removed while the tube core 132a-c remains attached to the chuck 210. In some embodiments, the dicing tape 110 can be a UV stripping tape so that it can be relatively easily removed after exposure to ultraviolet light. For example, after UV exposure, the bonding strength of commercially available UV stripping tapes may be reduced by about one order of magnitude or about two orders of magnitude. In some cases, the dicing tape 110 can be removed at an acute angle relative to the second surface 128, which second surface can optionally be a second bonding surface. This can reduce the downward electrostatic or vacuum force required to hold the tool 132a-e in place on the chuck 210.

[0069] At block 205, a bonding tool 136 (e.g., a vacuum bonding tool) may pick up a die (e.g., die 132d) from a chuck in preparation for bonding. In some embodiments, die 132d may include a known good die (KGD). Bonding tool 136 may contact second surface 128 of die 132d. At block 206, die 132b may be bonded (i.e., directly bonded) to a carrier 138 having a non-conductive carrier region 140 having carrier contact features 142 at least partially embedded in the non-conductive carrier region 140. The carrier may have a carrier bonding surface 144, and die 132b may be bonded (i.e., directly bonded) to carrier 138 via carrier bonding surface 44 and first bonding surface 122 of die 132a.

[0070] Method 200 has several advantages. As described above, because the flip tool is in continuous contact with multiple tools, a single pick and place process (e.g., Figure 1 ) may result in contamination. Process 200 eliminates the flip tool that contacts the first bonding surface of each die. Instead, the process includes collectively flipping multiple dies on a dicing tape and transferring them to a clean chuck, ensuring that the first bonding surface remains clean. In some embodiments, the chuck can be cleaned after each use. This may result in increased yield, improved device performance, etc. Advantageously, process 200 allows for picking up a single tool so that only the KGD can be selected, thereby increasing yield.

[0071] As described above, a vacuum chuck or an electrostatic chuck, for example, may be used to perform process 200. Preferably, the chuck allows a single tool or group of tools to be released while other tools or groups of tools remain attached to the surface of the chuck. Figure 3A vacuum chuck 304 is depicted according to some embodiments. The vacuum chuck 304 has a tool support surface 306 including a plurality of tool support areas 312 (indicated by dashed lines) sized and shaped to accommodate corresponding tools and a plurality of vacuum channels 308a-f for applying a vacuum force on each tool 132a-f. In some embodiments, the tool support areas may be delineated by markings or other indicia. In some embodiments, there may be more than one vacuum channel per die support area. In other embodiments, there may be exactly one vacuum channel per die support area. In one embodiment, the support surface is a single piece of material having a vacuum hole pattern to hold each die in place. In another embodiment, a plurality of porous inserts 310a-f are assembled to the ends of each vacuum channel 308a-f, each insert corresponding to one vacuum channel. The porous insert 310 may be, for example, a porous ceramic material, such as may be used in a grinding process. The porous insert 310 may shed particles. Therefore, in some embodiments, the surface of the porous insert 310 may be coated to prevent particle shedding. For example, in some embodiments, the surface can be coated with a polyimide material, such as a vacuum deposited polyimide membrane. In some embodiments, porous polymer materials can be used, such as various porous polymer media from Porex Filtration Group in Fairburn, Georgia and ultra-high molecular weight polyethylene porous membrane SUNMAP from Nitto Denko Corporation in Osaka, Japan. TM , rather than using a porous ceramic material that could scratch the surface of tools 132a-f.

[0072] The first bonding surfaces 122 of the dies 132a-f can be in contact with the vacuum chuck 304. The tools 132a-f can be in contact with the porous inserts 310a-f, which can be smaller (e.g., slightly smaller) than the size of the tools 132a-h. In other embodiments, the size of the inserts 310a-310f is approximately the same as the size of the tools 132a-132f.

[0073] Advantageously, the vacuum force applied to each die 132a-f can be independently controlled, allowing a single die to be picked up with a bonding tool while the other dies remain fixed in place. As just one example, die 132a can be removed for bonding while dies 132b-f remain on chuck 304. A controller (not shown) can be configured to selectively deactivate the vacuum force of channel 308a to allow release of die 132a (e.g., by operating a valve that prevents communication between a vacuum source (e.g., a vacuum pump) and channel 308a), while maintaining the vacuum force of channels 308b-f to keep dies 132b-f attached to the surface of vacuum chuck 304.

[0074] In some embodiments, the porous inserts 310a-f can be flush with the top surface of the vacuum chuck 304. In other embodiments, the porous inserts 310a-f can be recessed from the top surface of the vacuum chuck 304. For example, a slight recess can prevent the tool 132a-f from making physical contact with the porous insert 310.

[0075] In some embodiments, a purge gas may be used to limit the accumulation of particles on the surface of the vacuum chuck 304. For example, an inert gas may be flowed through the vacuum passages 308a-f and the porous inserts 310a-f after each of the plurality of dies 132a-f has been removed from the vacuum chuck 304, or before the dies 132a-b are placed on the vacuum chuck 304, or both.

[0076] In some embodiments, the porous inserts 310a-f can be selected so that the porous surfaces 402a-c are proportional to the size of the tools 132a-f. For example, in some embodiments, the size and / or shape of the porous surfaces 402a-c can be approximately the same as (e.g., slightly smaller than) the size and / or shape of the tools 132a-c. Beneficially, the porous inserts 310a~f can laterally distribute the vacuum force across the first bonding surface 122 of the tools 132a-f, which can reduce stress that may be applied by the narrowly applied vacuum force. For example, this can reduce stress on the tube core 132a-f that may cause cracking or other failures. In some cases, the porous inserts 310a-f are replaceable so that the chuck can be used with different tool sizes. Figure 4a-4c An example of a porous insert 310 having porous regions 402a-c of different sizes and shapes to accommodate different tools is depicted. Figure 4a As shown, the porous region 402a may be the same size as the porous insert, and the size and shape of the insert may be tailored to a particular tool geometry. Figure 4b An alternative arrangement is depicted in which the insert comprises a plurality of patterned porous regions 402b. In some cases, the porous regions 402c may be smaller than the insert, e.g. Figure 4c As shown, for example, for a gadget.

[0077] In some embodiments, large thin dies, such as DRAM dies, can benefit from the use of porous inserts, which can apply vacuum force more evenly across the die area. In some embodiments, the die can be strong enough so that the die can be placed directly on the surface of the chuck, for example, a graphics processing unit (GPU) or central processing unit (CPU) die can have sufficient thickness (e.g., 200um or thicker). In some embodiments, the vacuum chuck can have vacuum channels but may not have porous inserts. For example, in some embodiments, the vacuum channels can extend to the surface of the chuck instead of having a porous insert. In some embodiments, the surface of the chuck can have an array of vacuum holes. In other embodiments, the surface of the chuck can have vacuum channels, such as recesses in the surface of the chuck, to be able to apply vacuum force to a tool disposed on the chuck. In some embodiments, the surface of the chuck can be coated with an organic coating, such as polyimide, to prevent scratching and / or contamination of the bonding surface.

[0078] In some cases, an electrostatic chuck 504 may be used instead of a vacuum chuck (e.g., Figure 3 A vacuum chuck 304 is shown securing die 512a,b (eg, die 132a,b) in place. Figure 5 An example electrostatic chuck 504 is depicted in accordance with some embodiments. Figure 5 , the first bonding surface 122 of the tube core 512a, 512b is placed on the tube core support surface 506 of the electrostatic chuck 504. The electrostatic chuck 504 has electrodes 508a, b and 510a, b for the tube core 512a, b, and each pair of electrodes corresponds to a tube core (for example, the electrodes 508a and 510a can correspond to the tube core 512b). The electrodes 508a, b and 510a, b can be connected to a power supply (not shown) and a voltage of tens to thousands of volts can be applied, depending on the chuck structure and the force required to keep the tube core flat to remove the cutting tape. The electrostatic chuck 504 can be made of a non-conductive dielectric material with a metal electrode or the like, such as aluminum oxide, silicon oxide, polyimide, etc. In some cases, the surface of the electrostatic chuck may be coated with a coating that is not directly bonded to the tool. For example, the electrostatic chuck 504 can be coated with a polymer (such as polyimide) or other suitable coating. For example, a mobile electrostatic chuck available from Eshylon Scientific of Pleasanton, California, is built on a silicon substrate and coated with a polyimide surface layer.

[0079] In some embodiments, the surface may be textured or patterned to reduce the contact area between the die and the die supporting surface 506 of the electrostatic chuck 504 . Figure 6a and 6bAn example embodiment of a textured surface that reduces contact between the first bonding surface 122 and the electrostatic chuck 504 is depicted. For example, Figure 6a The feature 602a shown in may reduce the surface area of ​​the tool in contact with the chuck (i.e., the tool may only contact the chuck at the peak of the feature 602a). As another example, Figure 6b The feature 602b shown in FIG. 5 can limit the contact between the first bonding surface 122 and the electrostatic chuck 504. The flat surface of the feature 602b can reduce stress in the die relative to the small contact area of ​​the feature 602a. Figure 6a and 6b This is merely an example, and other patterns may be used. In some cases, the texture of the electrostatic chuck surface may be random or may be designed for a specific tool shape and size (e.g., designed to minimize contact with critical areas on the tool).

[0080] Although Figure 5 A bipolar configuration is shown with two electrodes per die 512a and 512b, but other configurations are possible. For example, a monopolar configuration may be used instead of a bipolar configuration, where each die has only one electrode associated with it. In some embodiments, rather than having an electrode per die, the same electrode or electrodes may be used for multiple dies. In some embodiments, there may be only one electrode (e.g., for a monopolar electrostatic chuck) or two electrodes (for a bipolar chuck) for all tools to be clamped to the chuck surface.

[0081] In some embodiments, electrodes 508a,b and 510a,b can communicate with a controller (not shown) that can selectively power or de-power the electrodes. For example, the controller can be configured to turn off power to electrodes 508a and 510a so that die 512a can be removed from electrostatic chuck 504 (e.g., by a bonding tool such as bonding tool 136), while maintaining power to electrodes 508b and 510b so that die 512b remains attached to electrostatic chuck 504. In some embodiments, the controller can reverse the power provided to electrodes 508a and 510a instead of (or in addition to) turning off power.

[0082] In some embodiments, the power supplied to the electrode may be significant during certain portions of the process (e.g., when removing the dicing tape from the die or performing a plasma cleaning process). At other times, the power supplied may be minimal so that only a small electrostatic force holds the die in place, such as during the process of picking a die from the tape for bonding. When power to the chuck electrode is terminated, the tool will typically remain bonded to the chuck for a period of time due to the residual charge in the tool and chuck dielectric materials. While the residual charge will eventually dissipate, the die can advantageously remain bound long enough to complete the pick process.

[0083] While the remaining residual charge can be used to hold the tool in place during further operations (such as picking), it also presents significant problems. For example, it can be difficult to remove a die from a chuck using a vacuum bonding tool without cracking or breaking the die. In some cases, lift pins or other mechanical devices can be used to lift the tool from the chuck, but this can also crack or break the tool. For example, the use of lift pins can also cause the tool to be accidentally ejected from the chuck. This can be particularly problematic because the electrostatic force holding the tool to the chuck can vary over time, making it difficult to determine the appropriate lifting force to remove the tool from the chuck. In some cases, the tool can be released by reversing the electrostatic force. However, this can also be problematic because it can be important to understand the electrostatic force holding the die to the chuck in order to determine the amount of force to apply (i.e., the voltage applied to the electrodes).

[0084] Figure 7 Depicted is a diagram of tools 512a, b (e.g., which may be Figure 1 The process 700 of collectively flipping the tools 132a, b) onto the electrostatic chuck 504 and removing the tools individually (or in selected subgroups) from the electrostatic chuck 504 is shown. Prior to block 701, the dies may be separated and prepared for bonding, such as Figure 1 As described in blocks 101 and 102.

[0085] At block 701, the dies 512a, b can be attached to a dicing tape 110 supported by a frame 112 and flipped together onto an electrostatic chuck 504, with the die 512b contacting the chuck via the first bonding surface 122. At block 702, power can be supplied to the electrodes 508a, b and 510a, b, and the dies 512a, b can be electrostatically held on the surface of the electrostatic chuck 504. The dicing tape 110 can be removed from the dies 512a, b. In some embodiments, removing the dicing tape 110 may include exposing the dicing tape to ultraviolet light before and / or while pulling the dicing tape away from the dies 512a, b. At block 703, the power of the electrodes 508a, b and 510a, b can be reduced, and the die 512b can be held in place using a smaller electrostatic force than that applied when removing the dicing tape 100. In some embodiments, the power to electrodes 508a,b and 510a,b may be reduced or completely turned off, and the residual charge in electrostatic chuck 504 (e.g., in a non-conductive area of ​​electrostatic chuck 504) and die 512a,b may be used to hold die 512b in place.

[0086] At block 704, a bonding tool 706 may be used to pick up a single die (e.g., die 512a) from the surface of the electrostatic chuck 504 by contacting the second surface 128 of the die 512b. In the illustrated embodiment, the bonding tool 706 may include a vacuum bonding tool having a vacuum channel 708. Advantageously, the bonding tool 706 may be conductive and connected to an electrical ground. Thus, by grounding the bonding tool 706, when the bonding tool contacts the die 512b, the charge in the die 512a may be dissipated, and the die 512c may be picked up from the surface of the electrostatic chuck 504 without damaging the die 512c. At block 705, the die 512b may be bonded (i.e., directly bonded) to the carrier 138 via the carrier bonding surface 144 and the first bonding surface 122 of the die 512a.

[0087] Examples of direct bonding methods and direct bonding structures

[0088] Various embodiments disclosed herein relate to direct bonding structures, in which two components can be directly bonded to each other without intervening adhesives. Two or more semiconductor components, such as integrated device dies, wafers, and other semiconductor components, can be stacked or bonded to each other to form a bonding structure. The conductive contact pads of one component can be electrically connected to the corresponding conductive contact pads of another component. Any suitable number of components can be stacked in a bonding structure.

[0089] In some embodiments, the elements are bonded directly to each other without a bonding agent. In various embodiments, the non-conductive or dielectric material of the first element can be directly bonded to the corresponding non-conductive or dielectric field area of ​​the second element without a bonding agent. The non-conductive material can be referred to as a non-conductive bonding area or bonding layer of the first element. In some embodiments, the non-conductive material of the first element can be directly bonded to the corresponding non-conductive material of the second element using a dielectric-to-dielectric bonding technique. For example, a dielectric-to-dielectric bond can be formed without an adhesive using direct bonding techniques disclosed in at least U.S. Patents Nos. 9,564,414, 9,391,143, and 10,434,749, the entire contents of each of which are incorporated herein by reference in their entirety for all purposes.

[0090] In various embodiments, hybrid direct bonding can be formed without an intervening adhesive. For example, the dielectric bonding surface can be polished to a high degree of smoothness. The bonding surface can be cleaned and exposed to a plasma and / or an etchant to activate the surface. In some embodiments, the surface can be terminated with a substance after or during activation (e.g., during a plasma and / or etching process). Without being limited by theory, in some embodiments, an activation process can be performed to break the chemical bonds of the bonding surface, and the termination process can provide additional chemicals at the bonding surface, thereby improving the bonding energy during the direct bonding process. In some embodiments, activation and termination are provided in the same step, such as using a plasma or a wet etchant to activate and terminate the surface. In other embodiments, the bonding surface can be terminated in a separate process to provide additional species for direct bonding. In various embodiments, the termination species can include nitrogen. In addition, in some embodiments, the bonding surface can be exposed to fluorine. For example, there may be one or more fluorine peaks near the layer and / or bonding interface / surface. Therefore, in some embodiments, in a directly bonded structure, the bonding interface between the two dielectric materials can include a very smooth interface with a higher nitrogen content and / or fluorine peaks at the bonding interface / surface. Other examples of activating and / or terminating therapy may be found in US Pat. Nos. 9,564,414, 9,391,143, and 10,434,749, each of which is incorporated herein by reference in its entirety and for all purposes.

[0091] In various embodiments, the conductive contact pads of the first element may also be directly bonded to corresponding conductive contact pads of the second element. For example, hybrid bonding techniques may be used to provide conductor-to-conductor direct bonding along a bonding interface / surface that includes a covalently directly bonded dielectric-to-dielectric surface prepared as described above. In various embodiments, conductor-to-conductor, such as contact pad-to-contact pad, direct bonding, and dielectric-to-dielectric hybrid bonding may be formed using direct bonding techniques disclosed in at least U.S. Patent Nos. 9,564,414 and 9,391,143, each of which is incorporated herein by reference in its entirety for all purposes.

[0092] For example, as described above, dielectric bonding surfaces can be prepared and bonded directly to each other without the need for an intermediate bonding agent. Conductive contact pads can be surrounded by non-conductive dielectric field regions or can be directly bonded to each other without the need for an intervening adhesive. In some embodiments, the individual contact pads can be recessed below the outer (e.g., upper) surface of the dielectric region or the non-conductive bonding region, for example, by less than 30 nm, less than 20 nm, less than 15 nm, or less than 10 nm, for example, in the range of 2 nm to 20 nm, or in the range of 4 nm to 10 nm. In some embodiments, the non-conductive bonding regions can be directly bonded to each other at room temperature without the need for a bonding agent, and the bonded structure can then be annealed. After annealing, the contact pads can expand and contact each other to form a direct metal-to-metal bond. Advantageously, hybrid bonding techniques are used, such as direct bonding interconnects or Commercially available from Xperi of San Jose, California, it can achieve high density pads connected across a direct bonding interface / surface, for example, a regular array of small pitch or fine pitch. In some embodiments, the pitch of the bonding pads or the conductive traces embedded in the bonding surface of one of the bonding elements can be less than 40μm, or less than 10μm, or even less than 2μm. For some applications, the ratio of the pitch of the pads to one dimension of the pad is less than 5, or less than 3, and sometimes ideally less than 2. In other applications, the width of the conductive trace embedded in the bonding surface of one of the bonding elements can be between 0.3 and 3μm. In various embodiments, the contact pads and / or traces can include copper, but other metals may also be suitable.

[0093] Therefore, in a direct bonding process, the first element can be directly bonded to the second element without the need for an intermediate bonding agent. In some arrangements, the first element can include a singulated element, such as a singulated integrated device die. In other arrangements, the first element can include a carrier or substrate (e.g., a wafer), which includes multiple (e.g., tens, hundreds, or more) device regions that form multiple integrated device dies when separated. Similarly, the second element can include a singulated element, such as a singulated integrated device die. In other arrangements, the second element can include a carrier or substrate (e.g., a wafer).

[0094] As described herein, the first and second elements can be directly bonded to each other without the need for a bonding agent, which is different from a deposition process. In one application, the width of the first element in the bonding structure can be similar to the width of the second element. In some other embodiments, the width of the first element in the bonding structure can be different from the width of the second element. The width or area of ​​the larger element in the bonding structure can be at least 10% larger than the width and area of ​​the smaller element. Therefore, the first and second elements can include non-deposited elements. In addition, unlike the deposition layer, the directly bonded structure can include defective areas along the bonding interface / surface, in which there are nm gaps. The nm gap may be formed due to the activation of the bonding surface / interface, such as exposure to plasma. As described above, the bonding interface / surface may include material concentrations from activation and / or the last chemical treatment process. For example, in an embodiment activated by nitrogen plasma, a nitrogen peak can be formed at the bond interface / surface. In an embodiment activated by oxygen plasma, an oxygen peak can be formed at the bond interface / surface. In some embodiments, the bonding interface / surface may include silicon oxynitride, carbon oxynitride, or silicon carbonitride. As described herein, a direct bond may include a covalent bond, which is stronger than a van der Waals bond. The bonding layer may also include a polished surface that is planarized to a high degree of smoothness.

[0095] In some embodiments, a metal-to-metal bond is formed between the contact pads. In some embodiments, the contact pads include copper or a copper alloy. In various embodiments, the metal-to-metal bonds between the contact pads may be connected so that copper grains grow on each other on the bonding interface / surface. In some embodiments, the copper may have grains along the 111 crystal plane to improve the diffusion of copper on the bonding interface. The bonding interface may extend substantially completely to at least a portion of the bonding contact pad so that there is substantially no gap between the non-conductive bonding areas at or near the bonding contact pad. In some embodiments, a barrier layer may be provided below the contact pad, for example, which may include copper. However, in other embodiments, there may be no barrier layer below the contact pad, for example, as described in US2019 / 0096741, the entire contents and all purposes of which are incorporated herein by reference.

[0096] Additional Embodiments

[0097] In the foregoing description, the systems and processes have been described with reference to specific embodiments thereof. However, it will be apparent that various modifications and changes may be made thereto without departing from the broader spirit and scope of the embodiments disclosed herein. Accordingly, the description and drawings should be regarded as illustrative rather than restrictive.

[0098] In fact, although the systems and processes are disclosed in the context of certain embodiments and examples, those skilled in the art will understand that the various embodiments of the systems and processes extend beyond the specifically disclosed embodiments to other alternative embodiments and / or uses of the systems and processes and their obvious modifications and equivalents. In addition, although several variations of the embodiments of the systems and processes have been shown and described in detail, based on this disclosure, those skilled in the art will readily understand other modifications within the scope of the present disclosure. It is also conceivable that various combinations or sub-combinations of the specific features and embodiments of the embodiments may be made and still fall within the scope of the present disclosure. It should be understood that the various features and embodiments of the disclosed embodiments may be combined or replaced with each other to form different modes of embodiments of the disclosed systems and processes. None of the methods disclosed herein need to be performed in the order described. Therefore, the scope of the systems and processes disclosed herein should not be limited by the specific embodiments described above.

[0099] It should be understood that the systems and methods of the present disclosure each have several innovative embodiments, none of which is solely responsible for or requires the desired properties disclosed herein. The various features and processes described above can be used independently of each other or combined in various ways. All possible combinations and sub-combinations are intended to fall within the scope of the present disclosure.

[0100] Certain features described in this specification in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented in multiple embodiments individually or in any suitable subcombination. In addition, although the above features may be described as functioning in certain combinations and even initially claimed as such, in some cases one or more features in the claimed combination may be deleted from the combination, and the claimed combination may point to a subcombination or a variation of a subcombination. No feature or group of features is essential or indispensable to every embodiment.

[0101] It should also be understood that, unless otherwise specifically stated or understood in the context of use, conditional language used herein, such as "may", "might", "could", "for example", etc., is generally intended to convey that certain embodiments include, while other embodiments do not include certain features, elements, and / or steps. Therefore, such conditional language generally does not mean that one or more embodiments require features, elements, and / or steps in any way, or that one or more embodiments must include logic for deciding whether to include or perform these features, elements, or steps in any particular embodiment with or without author input or prompting. The terms "include", "comprise", "have", etc. are synonymous and are used in an open manner to be inclusive and do not exclude other elements, features, behaviors, operations, etc. In addition, the use of the term "or" is inclusive (not exclusive), so when used to connect a series of elements, the word "or" refers to one, some, or all of the elements in the list. In addition, unless otherwise stated, the terms "a", "an", and "the" used in this application and the appended claims should be interpreted as "one or more" or "at least one". Similarly, although operations may be shown in a particular order in the drawings, it should be appreciated that in order to achieve the desired results, it is not necessary to perform the operations in the particular order or sequence shown, or to perform all of the operations shown. In addition, the drawings may schematically depict one or more example processes in the form of a flow chart. However, other operations not shown may be incorporated into the schematically shown example methods and processes. For example, one or more additional operations may be performed before, after, simultaneously, or between any of the shown operations. In addition, in other embodiments, the operations may be rearranged or reordered. In addition, other embodiments are within the scope of the following claims. In some cases, the actions described in the claims may be performed in a different order and still achieve the desired results.

[0102] In addition, while the methods and apparatus described herein may be susceptible to various modifications and alternative forms, specific examples thereof have been shown in the drawings and described in detail herein. However, it should be understood that the embodiments are not limited to the specific forms or methods disclosed, but rather, the embodiments will cover all modifications, equivalents and alternatives that fall within the spirit and scope of the various implementations described and the appended claims. In addition, the disclosure of any specific features, aspects, methods, attributes, characteristics, qualities, properties, elements, etc., related to implementations or embodiments herein can be used for all other implementations or implementations set forth herein. Any method disclosed herein does not need to be performed in the order described. The methods disclosed herein may include certain actions taken by practitioners; however, these methods may also include any third-party instructions for these operations, whether expressly or implicitly. The ranges disclosed herein also include any and all overlaps, sub-ranges and combinations thereof. Language such as "at most", "at least", "greater than", "less than", "between" and the like include the referenced numbers. Numbers preceded by terms such as "about" or "approximately" include the referenced numbers and should be interpreted as the case may be (e.g., as accurately as possible in this case, such as ±5%, ±10%, ±15%, etc.). For example, "about 3.5 mm" includes "3.5 mm". Phrases beginning with the term "substantially" include the referenced phrase and should be interpreted accordingly (e.g., as nearly as reasonably possible under the circumstances). For example, "substantially constant" includes "constant." Unless otherwise noted, all measurements are made under standard conditions, including temperature and pressure.

[0103] As used herein, a phrase referring to "at least one" of a list of items refers to any combination of those items, including single members. For example, "at least one of A, B, or C" is intended to cover: A, B, C, A and B, A and C, B and C, and A, B and C. Unless otherwise specifically stated, conjunctions such as phrases "at least one of X, Y, and Z" should be understood with the context that is typically used to convey that an item, term, etc. may be at least one of X, Y, or Z. Therefore, such conjunctions do not generally mean that certain embodiments require that at least one of X, Y, and Z be present in each. The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the apparatus and methods disclosed herein.

[0104] Thus, the claims are not intended to be limited to the embodiments shown herein, but are to be accorded the widest scope consistent with this disclosure, the principles and novel features disclosed herein.

Claims

1. A method comprising: providing a first wafer and a second wafer; polishing the first wafer and the second wafer; dicing the first wafer on a dicing tape to form diced wafers including a plurality of dies; activating at least one of the first wafer, the cut wafer, and the second wafer; turning over the cut wafer; securing the cut wafer to a chuck; removing the dicing tape from the diced wafer; and At least some of the plurality of dies are bonded to the second wafer. 2 . The method of claim 1 , wherein activating comprises activating the second wafer and one of the first wafer and the cut wafer. 3 . The method of claim 1 , wherein activating comprises exposing at least one of the first wafer, the diced wafer, and the second wafer to a nitrogen plasma.

4. A method comprising: providing a plurality of semiconductor dies on a dicing tape, each semiconductor die of the plurality of semiconductor dies having a first bonding surface and a second surface opposite the first bonding surface, the second surfaces of the plurality of semiconductor dies being attached to the dicing tape; and The first bonding surfaces of the plurality of semiconductor dies are secured to a chuck while the plurality of semiconductor dies are attached to the dicing tape. 5 . The method of claim 4 , wherein the second surface of each semiconductor die in the plurality of semiconductor dies is a second bonding surface.

6. The method according to claim 5, further comprising: Prior to said providing, said second bonding surface is prepared for bonding.

7. The method of claim 4, wherein providing the plurality of semiconductor dies comprises: A wafer is secured on the dicing tape and the wafer is diced into the plurality of semiconductor dies.

8. The method according to claim 4, further comprising: removing the dicing tape from the plurality of semiconductor dies; removing a semiconductor die from the plurality of semiconductor dies from the chuck; as well as The first bonding surface of the semiconductor die is directly bonded to a carrier without an intervening adhesive.

9. The method according to claim 4, further comprising: Prior to said fixing, said first bonding surface is activated for direct bonding.

10. The method according to claim 4, further comprising: Prior to said fixing, said first bonding surface is cleaned.

11. The method of claim 8, wherein the direct bonding comprises: The non-conductive layer of the semiconductor die is directly bonded to the non-conductive layer of the carrier.

12. The method according to claim 11, wherein the direct bonding further comprises: The conductive contacts of the semiconductor die are directly bonded to the conductive contacts of the carrier.

13. The method according to claim 8, further comprising: After the direct bonding, the second surface of the semiconductor die is cleaned.

14. The method of claim 8, wherein the second surface is a second bonding surface, further comprising: After the direct bonding, the second semiconductor die is directly bonded to the second bonding surface of the semiconductor die.

15. The method according to claim 4, further comprising: removing the dicing tape from the plurality of semiconductor dies; and One or more semiconductor chips of the plurality of semiconductor dies are selectively released while remaining semiconductor dies of the plurality of semiconductor dies are secured to the chuck.

16. The method of claim 15, wherein the selectively releasing comprises: Only one semiconductor die is selectively released.

17. The method of claim 4, wherein the chuck is an electrostatic chuck, and wherein securing comprises: An electrostatic force is applied to the plurality of semiconductor dies through the electrostatic chuck, wherein applying the electrostatic force includes supplying power to a plurality of electrodes embedded in the electrostatic chuck.

18. The method according to claim 17, further comprising: removing the dicing tape from the plurality of semiconductor dies; and One or more semiconductor chips of the plurality of semiconductor dies are selectively released while the remaining semiconductor dies of the plurality of semiconductor dies are secured to the electrostatic chuck, wherein the selectively releasing includes varying power provided to one or more electrodes of the plurality of electrodes.

19. The method of claim 18, wherein varying the power provided comprises: The polarity of power provided to the one or more electrodes is reversed.

20. The method of claim 4, wherein the chuck is a vacuum chuck, and wherein securing comprises: A vacuum force is applied to the plurality of semiconductor dies via a plurality of vacuum channels embedded in the vacuum chuck.

21. The method according to claim 20, further comprising: removing the dicing tape from the plurality of semiconductor dies; and One or more semiconductor chips of the plurality of semiconductor dies are selectively released while remaining semiconductor dies of the plurality of semiconductor dies are secured to the vacuum chuck.

22. The method of claim 21, wherein selectively releasing comprises reducing a vacuum force applied to the one or more semiconductor dies.

23. The method of claim 20, wherein a plurality of porous inserts are disposed on top of the plurality of vacuum channels.

24. The method of claim 23, wherein the plurality of semiconductor dies are disposed on top of the plurality of porous inserts.

25. The method of claim 4, wherein providing comprises: applying a protective layer on the wafer; mounting the wafer on the dicing tape; and The wafer is diced into a plurality of semiconductor dies.

26. The method of claim 25, wherein providing further comprises: After dicing, the protective layer is removed from the plurality of semiconductor dies.

27. The method of claim 4, further comprising: Prior to securing, the first bonding surface is activated while the die is attached to the dicing tape.

28. The method of claim 27, wherein the activating is performed after dicing the wafer to form the plurality of semiconductor dies.

29. The method of claim 27, wherein activating comprises: The first bonding surface is exposed to a nitrogen-containing plasma.

30. The method of claim 4, further comprising: At least one of the first bonding surface and the second surface is planarized before securing the wafer to the dicing tape.

31. The method of claim 4, further comprising: A die of the plurality of dies is picked from the chuck by a vacuum bonding tool, wherein the vacuum bonding tool is electrically conductive and electrically grounded, and wherein picking includes removing charge from the die by contacting the die with the electrically conductive vacuum bonding tool.

32. A method comprising: securing the wafer to the dicing tape; dicing the wafer into a plurality of semiconductor dies, each of the plurality of semiconductor dies having a first bonding surface and a second surface opposite the first bonding surface, the second surface of the semiconductor die being attached to the dicing tape; securing the first bonding surfaces of the plurality of semiconductor dies to the chuck while the plurality of semiconductor dies are attached to the dicing tape; removing the dicing tape from the plurality of semiconductor dies; and A die of the plurality of semiconductor die is removed from the chuck.

33. The method of claim 32, further comprising: The plurality of semiconductor dies and the dicing tape are flipped over.

34. The method of claim 32, wherein the chuck is an electrostatic chuck, the method further comprising: An electrostatic force is applied to the plurality of semiconductor dies to secure the plurality of semiconductor dies to the electrostatic chuck.

35. The method of claim 34, wherein removing the die comprises: The electrostatic force applied to the die by the electrostatic chuck is reduced.

36. The method of claim 34, wherein removing the die comprises: Power to one or more electrodes of the electrostatic chuck associated with the wafer is terminated.

37. The method of claim 34, wherein removing the die comprises: The electrostatic force applied to the die by the electrostatic chuck is reversed and the electrostatic force applied to the die by the electrostatic chuck is reduced.

38. A vacuum chuck for supporting a plurality of semiconductor dies, the vacuum chuck comprising: a plate comprising a die support surface, the die support surface comprising a plurality of die support areas; as well as A plurality of vacuum channels extend through the plate, the plurality of vacuum conduits being connectable to one or more vacuum sources, each vacuum conduit of the plurality of vacuum conduits being associated with a corresponding die supporting region.

39. The vacuum chuck of claim 38, wherein each die support area is associated with only one vacuum channel.

40. The vacuum chuck of claim 38, further comprising: A plurality of porous regions are disposed at the die supporting surface of the plate, each porous region being disposed over a corresponding vacuum channel of the plurality of vacuum channels.

41. The vacuum chuck of claim 38, further comprising: A controller is configured to independently control each of the plurality of vacuum channels.

42. The vacuum chuck of claim 40, wherein the plurality of porous regions comprises replaceable porous inserts.

43. The vacuum chuck of claim 40, wherein the porous region is wider than the corresponding vacuum channel.

44. The vacuum chuck of claim 40, wherein the porous region comprises: Polymer coating.

45. An electrostatic chuck for supporting a plurality of semiconductor dies using electrostatic forces, the electrostatic chuck comprising: a non-conductive body having a plurality of die support regions, each die support region being configured to support a die of the plurality of semiconductor dies; as well as A plurality of electrodes in the non-conductive body, each die support region having a first electrode and a second electrode, the first electrode having a first polarity and the second electrode having a second polarity associated with the first electrode and opposite to the first polarity.

46. ​​The electrostatic chuck of claim 45, further comprising a controller configured to independently control each electrode of the plurality of electrodes.

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