Chip packaging method and packaging structure

By using the same material plastic sealing substrate and plastic sealing adapter layer in the 2.5D fan-out package, the problems of complex process and inconsistent stress of silicon adapter boards are solved, and higher chip packaging reliability and cost savings are achieved.

CN119694902APending Publication Date: 2025-03-25TONGFU CHAOWEI (SUZHOU) MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202510130881.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-06
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

The silicon adapter plates in the existing 2.5D fan-out packages have complex processes and high costs. Due to the different materials of the substrate and silicon adapter plates, the stress is inconsistent, which affects the reliability of the chip package.

Method used

A plastic sealing substrate and a plastic sealing adapter layer are used to form a plastic sealing adapter layer electrically connected to the plastic sealing substrate, and a plastic sealing body covering the chip is formed on the side where the plastic sealing adapter layer is away from the plastic sealing substrate. The plastic seal substrate and the plastic seal adapter layer use materials with the same characteristics to simplify the process flow and reduce costs.

Benefits of technology

It effectively avoids the problem of stress inconsistency caused by different expansion coefficients, improves the reliability of chip packaging, especially when assembling highly trusted product groups, meets its reliability packaging requirements, simplifies the process flow, and saves costs.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

The embodiment of the invention provides a chip packaging method and a chip packaging structure. The method comprises the following steps: forming a plastic package substrate; forming a plastic package transfer layer on the plastic package substrate, wherein the plastic package transfer layer is electrically connected with the plastic package substrate; the chip module is fixed on the plastic package switching layer, so that the chip module is electrically connected with the plastic package switching layer; and forming a plastic package body wrapping the chip on one side, deviating from the plastic package substrate, of the plastic package transfer layer. The plastic package substrate and the plastic package adapter layer are made of materials with the same characteristics and have similar expansion coefficients, so that the problem of layering caused by inconsistent stress due to different expansion coefficients can be effectively avoided, the connection reliability between the plastic package substrate and the plastic package adapter plate is improved, and especially when a highly reliable product group is assembled, the production efficiency is improved. The reliable packaging requirement can be met; the plastic package transfer layer is formed by adopting a plastic package process, so that the process flow is simplified and the cost is saved; the plastic package substrate and the plastic package transfer layer are adopted, so that the fracture phenomenon caused by warping is weak, and the reliability is high; and the plastic package substrate and the plastic package transfer layer are both made of plastic package materials, so that the material cost is saved.
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