Reconfigurable radio frequency switch device and preparation method thereof

Abstract

The invention discloses a reconfigurable radio frequency switching device which mainly solves the problems that an existing radio frequency switching device is too long in switching response time and too slow in device heat dissipation. The memristor comprises a top electrode (6), a resistive layer material (5), a bottom electrode (4), a metal adhesion layer (3) and a high-resistance silicon substrate (2), wherein the top electrode (6), the resistive layer material (5) and the bottom electrode (4) are distributed from top to bottom to form the memristor. A diamond substrate (1) is arranged on the bottom surface of the high-resistance silicon substrate so as to improve the heat dissipation performance of the device and support the device; and the resistive layer material (5) grows on the Cu / sapphire substrate through CVD (Chemical Vapor Deposition), and is transferred to the bottom electrode (4) after being treated by a He + ion implantation process. The switch response time of the device can be reduced, the heat dissipation capability of the device is improved, and the device can be used in a microwave communication system.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a radio frequency switch device and a preparation method thereof, which can be used in a microwave communication system. Background Art

[0002] With the in-depth development of modern communication technology, communication equipment is moving towards miniaturization, reconfiguration and low energy consumption. This requires that each component in the communication equipment adopts a miniaturized design, controls the device size and thickness as much as possible, and also minimizes the number of components and component power consumption.

[0003] In the current microwave communication system, there are several common forms of RF switches: (1) using discrete silicon PIN diodes. This structure is implemented in a hybrid circuit manner, and its disadvantages are large size, narrow operating frequency and complex control circuit; (2) using gallium arsenide GaAs pseudo-high electron mobility transistor pHEMT monolithic switch. Although this structure is small in size and has a wide application frequency band, it is not easy to integrate with other RF circuits on a single chip; (3) using MOS device switches. This device has a price advantage and is suitable for on-chip integration with other communication circuits, but its disadvantage is that its voltage and high power resistance are limited. In addition, these commonly used RF switches also have the disadvantages of large insertion loss, unsatisfactory isolation, large input and output standing wave ratio and long switch response time. With the continuous development of modern communication technology and people's increasingly stringent requirements for communication quality, traditional RF switches can no longer meet the needs of actual use.

[0004] At present, memristors have been proven to be used as RF switches. Their advantages of high cutoff frequency, high operating frequency and small size can meet the requirements of modern communication technology. Their non-volatility can achieve low power consumption of RF systems without the need for energy to maintain the conductive state. These characteristics make RF switches based on memristors a strong competitor for future 6G communications.

[0005] At present, some studies have confirmed the feasibility of using two-dimensional material memristors for RF circuit applications. The research uses chemical vapor deposition (CVD) technology to grow wafer-level two-dimensional materials and transfer them to make RF switching devices, which are then matched with CMOS devices to form RF circuits. Figure 1 However, it still has the following two shortcomings:

[0006] First, due to the instability of the mechanism for forming conductive filaments, devices from the same batch cannot exhibit the same switching response time.

[0007] Second, because it performs multiple switching processes in a short period of time, it will generate a lot of heat, causing the device temperature to rise. These shortcomings prevent the existing memristor RF switch devices from being quickly commercialized. Summary of the invention

[0008] The purpose of the present invention is to address the deficiencies of the above-mentioned prior art and propose a reconfigurable RF switching device based on a fast-response memristor and a preparation method, so as to avoid the influence of the formation mechanism of conductive filaments when the memristor is used as a RF switching device, reduce the response time and turn-off parasitic capacitance of the device, and further improve the cut-off frequency of the RF device.

[0009] The technical solutions for achieving the purpose of the present invention include the following:

[0010] 1. A reconfigurable radio frequency switch device based on a fast response memristor, comprising: a top electrode 6, a resistive layer material 5, a bottom electrode 4, a metal adhesion layer 3, and a high resistance silicon substrate 2. The top electrode 6, the resistive layer material 5, and the bottom electrode 4 are distributed from top to bottom to form a memristor, characterized in that: a diamond substrate 1 is provided on the bottom surface of the high resistance silicon substrate 2 to improve the heat dissipation performance of the device and to support the device.

[0011] Furthermore, the diamond substrate 1 has a thickness of 100-200 μm.

[0012] Furthermore, the top electrode 6 is in the shape of a knife, with the knife body 61 located on the upper part of the high resistance silicon substrate 2, and the resistive layer 5, the bottom electrode 4, and the metal adhesion layer 3 are arranged between the knife handle 62 and the high resistance silicon substrate 2 in sequence.

[0013] Furthermore, the top electrode 6 is made of Au or Pt or Ag; the blade body 61 has a thickness of 70 to 110 nm; the handle 62 has a thickness of 20 to 40 nm; the resistive layer 5 is made of hBN or MoS2 or WS2, and has a thickness of 10 to 15 nm; the bottom electrode 4 is made of Au or Pt, and has a thickness of 30 to 40 nm; the metal adhesion layer 3 is made of Ti, and has a thickness of 10 to 15 nm.

[0014] Furthermore, the high resistance silicon substrate 2 has a thickness of 50-100 μm.

[0015] 2. A method for preparing a reconfigurable radio frequency switch device based on a fast response memristor, characterized in that it comprises the following steps:

[0016] §1) depositing a Ti layer of 10 to 15 nm as an adhesion layer 3 on a clean high-resistance silicon substrate 2 by physical vapor deposition;

[0017] §2) Depositing 30-40 nm of Au or Pt as the bottom electrode 4 on the adhesion layer 3 by photolithography, electron beam evaporation and lift-off and patterning for subsequent design of the GSG structure;

[0018] §3) growing a multilayer hBN or MoS2 or WS2 resistive switching layer 5 on a Cu foil or sapphire or sapphire substrate by a CVD process;

[0019] §4) Use He + Ion implantation is performed on the resistive layer to create defects, thereby accelerating the formation of conductive filaments and reducing the response time of the memristor.

[0020] §5) transferring the ion-implanted resistive layer onto the patterned bottom electrode 4 by wet method;

[0021] §6) Au, Pt or Ag is deposited on the resistive layer 5 and the high-resistance silicon substrate 2 by electron beam evaporation to form a top electrode 6 which is an integral shape consisting of a handle 62 with a thickness of 20 to 40 nm and a blade 61 with a thickness of 70 to 110 nm;

[0022] §7) Use Ar plasma to etch away the resistive switching layer material 5 that is not in contact with the top electrode handle 62 to ensure good electrical contact at the tip of the GSG structure designed subsequently;

[0023] §8) After the high-resistance silicon substrate 2 is subjected to a grinding and thinning process, it is connected to the diamond substrate 1 through a bonding process to complete the device manufacturing.

[0024] Compared with the existing invention, the present invention has the following advantages:

[0025] 1) Since the present invention adopts a memristor as a reconfigurable RF switch device, compared with a traditional RF switch, the device of the present invention can make the RF transceiver system more compact, with lower power consumption, and higher operating frequency and cutoff frequency.

[0026] 2) Since the present invention bonds a diamond substrate to the lower part of the high-resistance silicon substrate, the problem in the prior art that the heat generated by multiple rapid switches cannot be quickly dissipated, resulting in a rise in device temperature, is solved, thereby improving the heat dissipation performance of the device.

[0027] 3) Since the resistive layer material 5 of the present invention adopts nm-level hBN or MoS2 or WS2, the device volume is more miniaturized, and compared with the phase change memory PCM, its on-voltage is smaller, which can achieve lower power consumption, and compared with the resistive random access memory RRAM, its on-resistance is smaller, which can achieve a higher cut-off frequency.

[0028] 4) The present invention adopts He +Ion implantation is performed on the resistive layer material to form defects inside the resistive layer material. Compared with devices that have not been processed by this process, this process can significantly reduce the response time of the device. At the same time, when manufacturing large-scale array devices, it can effectively improve the instability of the formation of conductive filaments in the device and reduce the differences in devices in the same batch, making the RF switch based on the memristor more in line with industry requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a diagram of the structure of an existing RF switch based on a two-dimensional material memristor;

[0030] Figure 2 It is a structural schematic diagram of a reconfigurable radio frequency switch device of the present invention;

[0031] Figure 3 It is a schematic diagram of the manufacturing process flow of the reconfigurable radio frequency switch device of the present invention. DETAILED DESCRIPTION

[0032] The present invention is further described in detail below with reference to the accompanying drawings and embodiments.

[0033] Reference Figure 2 The reconfigurable radio frequency switch device of the present invention comprises a heat dissipation and support substrate 1, a substrate 2, an adhesion layer 3, a bottom electrode 4, a resistive switching layer 5, and a top electrode 6. Among them:

[0034] The substrate 2 is a high-resistance silicon substrate with a thickness of 50 to 100 μm;

[0035] The heat dissipation and support substrate 1 is a diamond substrate with a thickness of 100 to 200 μm, located at the bottom of the substrate 2, to improve the heat dissipation performance of the device and to support the device;

[0036] The adhesion layer 3 is made of Ti, has a thickness of 10-15 nm, and is located on the substrate 2 .

[0037] The bottom electrode 4 is made of Au or Pt, has a thickness of 30-40 nm, and is located on the adhesion layer 3 .

[0038] The resistive layer 5 is made of hBN or MoS2 or WS2, has a thickness of 10-15 nm, and is located on the bottom electrode 4 .

[0039] The top electrode 6 is made of Au, Pt or Ag, and has a knife shape, with the blade 61 located on the upper part of the high resistance silicon substrate 2, and a thickness of 70 to 110 nm; the thickness of the handle 62 is 20 to 40 nm, and between it and the high resistance silicon substrate 2 are the resistive layer 5, the bottom electrode 4, and the metal adhesion layer 3 in sequence.

[0040] Reference Figure 3The present invention provides the following three examples, but the embodiments of the present invention are not limited thereto. The methods described in the following examples are conventional methods unless otherwise specified; the reagents and materials described are commercially available unless otherwise specified.

[0041] In the first embodiment, a reconfigurable RF switch device is manufactured, wherein the resistive layer material is a multilayer hBN with a thickness of 10 nm, the bottom metal electrode is Au with a thickness of 30 nm, the top metal electrode is Au, the handle part is 20 nm thick, and the blade part is 70 nm thick.

[0042] Step 1: Clean the high-resistance silicon substrate 2.

[0043] 1.1) RCA-1 cleaning:

[0044] A high-resistance silicon substrate 2 with a size of 6 inches, a thickness of 600 μm, and a crystal orientation of

[111] is selected;

[0045] Prepare RCA-1 cleaning solution: ammonia (NH4OH): hydrogen peroxide (H2O2): deionized water = 1:1:5;

[0046] Place the silicon wafer in the RCA-1 cleaning solution, boil it at 75-80°C for 10 minutes, and rinse it repeatedly with deionized water until the RCA-1 cleaning solution remaining on the silicon wafer is rinsed away;

[0047] 1.2) RCA-2 cleaning:

[0048] Prepare RCA-2 cleaning solution: hydrochloric acid (HCl): hydrogen peroxide (H2O2): deionized water = 1:1:5;

[0049] Place the silicon wafer after the first cleaning in the RCA-2 cleaning solution, and boil it at 75-80°C for 10 minutes. Then rinse the silicon wafer repeatedly with deionized water until the RCA-2 cleaning solution remaining on the silicon wafer is rinsed away.

[0050] 1.3) Final cleaning and drying:

[0051] Use ultrapure water to perform a final cleaning on the silicon wafer after the above two cleanings by immersion or spraying to remove tiny particles and residual chemical reagents on the surface of the silicon wafer;

[0052] Use a nitrogen gun to blow dry the silicon wafer to ensure that there is no moisture left on the surface of the silicon wafer;

[0053] Place the cleaned silicon wafers properly to avoid re-contamination.

[0054] Step 2: sputtering an adhesion layer 3 on the surface of the high-resistance silicon substrate 2 by physical vapor deposition (PVD) technology.

[0055] 2.1) Vacuum the sputtering chamber:

[0056] Close the door of the sputtering chamber and start the vacuum pump to extract the gas in the sputtering chamber to achieve the required vacuum degree. The background vacuum degree is 10 -6 Pa;

[0057] 2.2) Filling sputtering gas and pre-sputtering:

[0058] When the sputtering chamber reaches the required vacuum degree, the flow rate is 40cm 3 / min, temperature of 50°C, pressure of 60Pa, RF power of 60W, and argon (Ar) as sputtering gas;

[0059] Before formal sputtering, pre-sputtering is performed for 10 minutes to remove oxides and other impurities on the surface of the target;

[0060] 2.3) Under the process conditions of sputtering voltage of 1 KV, sputtering current of 100 mA, target-substrate distance of 30 cm, and sputtering rate of 2 nm / min, a 10 nm thick Ti metal is deposited on the surface of the high-resistance silicon substrate 2 as an adhesion layer;

[0061] 2.3) After the adhesion layer is deposited, the sample is placed in an annealing furnace for annealing. The temperature in the furnace is set to 730°C and rapid annealing is performed in a N2 atmosphere for 30 seconds to eliminate stress and defects in the deposited layer and improve its density and adhesion.

[0062] Step 3: Deposit the bottom electrode 4 on the adhesion layer 3 and perform patterning for the GSG design.

[0063] 3.1) Photolithography is performed on the surface of the substrate 2, that is, a layer of photoresist is first coated on the surface of the substrate 2, and then alignment, exposure, development, and pattern detection are performed in sequence to form an area for depositing a metal electrode;

[0064] 3.2) Through electron beam evaporation E-Beam, the vacuum in the working room is evacuated to 2.5×10 -4 Under the process conditions of 100 nm Pa, 8 kV electron gun acceleration voltage, 1 A electron gun beam current, and 240 s evaporation time, Au with a thickness of 40 nm is deposited on the photolithographic area of ​​the adhesion layer 3 as the bottom metal electrode 4, and then the sample is placed in a photoresist stripping solution to remove the photoresist;

[0065] 3.3) After removing the photoresist, the silicon wafer is completely immersed in an acetone solution for 12 hours and subjected to ultrasonic treatment. The surface of the silicon wafer is then cleaned with deionized water to remove the residual acetone solution. Finally, the surface of the silicon wafer is blown dry with nitrogen.

[0066] Step 4: Prepare a multilayer hBN as the resistive switching layer 5 by chemical vapor deposition (CVD).

[0067] 4.1) Choose high-quality metal Cu foil substrate:

[0068] After ultrasonic cleaning and electrochemical polishing of the metal Cu foil substrate, the metal Cu foil substrate is placed in the center of the CVD tube furnace, and 250sccm of Ar and 50sccm of H2 are introduced to ensure that the Cu foil substrate will not be oxidized at high temperature. The temperature of the CVD tube furnace is raised to 1055-1070°C at a rate of 15°C / min and annealed for 8h, then naturally cooled to room temperature and taken out. After high-temperature annealing, the flatness of the Cu foil substrate surface will be further improved;

[0069] 4.2) The cavity pressure is stabilized at 350-450 Pa, and the borane-ammine complex precursor raw material is heated to 102-105°C in a fast-heating high-temperature tube furnace. Its decomposition products are transferred to the surface of the Cu foil substrate along with Ar, and an h-BN film is obtained through intermolecular collision. The number of layers of the h-BN film grown by CVD is observed by TEM images, and the number of layers is controlled to be 12-18 layers;

[0070] 4.3) The generated multilayer h-BN film was subjected to He + The injection energy is 200 keV and the injection dose is 10 15 cm -2 , the injection angle is 7°, and the He + After ion implantation, hBN will form controllable defects.

[0071] Step 5: wet-transfer the prepared multi-layer hBN resistive switching layer 5 onto the bottom electrode 4 .

[0072] 5.1) Spin coating liquid PMMA on the grown hBN-Cu sample under the process conditions of 500 rpm for 6 seconds and 3500 rpm for 30 seconds;

[0073] 5.2) The PMMA-hBN-Cu sample was heated at 100 °C for 3 min to improve its stability;

[0074] 5.3) The PMMA-hBN-Cu sample was floated in 0.1 g ml -1 The FeCl3 solution was placed on the surface for 5 hours to etch the Cu substrate;

[0075] 5.4) The PMA-hBN sample was transferred to the surface of a 2 wt % HCl solution and floated for 1-2 minutes for cleaning; the PMMA-hBN sample was then deposited on the surface of deionized water and floated for 1 hour for further cleaning;

[0076] 5.5) The PMMA-hBN sample was transferred onto the patterned bottom electrode (4) and heated at 60°C for 5 minutes to evaporate the residual water between the hBN and the bottom electrode 4, and then the entire sample was placed in ≥99% acetone for 12 hours to remove the PMMA.

[0077] Step 6: depositing a top electrode 6 on the resistive layer 5 and performing a patterning operation for a GSG design.

[0078] 6.1) Photolithography is performed on the surface of the resistive layer 5, that is, a layer of photoresist is first coated on the surface of the resistive layer 5, and then alignment, exposure, development, and pattern detection are performed in sequence to form a knife-shaped metal electrode area;

[0079] 6.2) Through electron beam evaporation E-Beam, the vacuum in the working room is evacuated to 2.5×10 -4 Under the process conditions of 100 nm, 8 kV electron gun acceleration voltage, 1 A electron gun beam current, and 240 s evaporation time, Au with a thickness of 20 nm for the handle and 70 nm for the blade is deposited on the photoetched area on the resistive layer 5 as the top metal electrode 6, and then the sample is placed in a photoresist stripping solution to remove the photoresist;

[0080] 6.3) After removing the photoresist, the silicon wafer was completely immersed in an acetone solution for 12 hours and subjected to ultrasonic treatment. The surface of the silicon wafer was then cleaned with deionized water to remove the residual acetone solution. Finally, the sample was heated at 60°C for 5 minutes to evaporate the residual water on the sample surface.

[0081] Step 7: Etch away the hBN from the bottom electrode 4 area that does not overlap with the top electrode 6.

[0082] Under the process conditions of argon gas flow rate of 45 sccm, RF generator forward power of 90 W, inductively coupled plasma ICP generator power of 500 W, chamber pressure of about 70 mTorr, and plate temperature of 30 ° C, etching was continued for 210 seconds from the bottom electrode 4 area to etch away the hBN that did not overlap with the top electrode 6, thereby ensuring good electrical contact performance of the sample;

[0083] The bottom electrode 4, the resistive switching layer material 5 and the top electrode 6 distributed sequentially on its upper part form a memristor with ultra-low standby power, ultra-low off-state leakage current, and a large switching resistance ratio. The formation of conductive filaments is accelerated by the internal defects of hBN under the top electrode 6, thereby achieving a fast response of the memristor.

[0084] Step 8: Bonding the diamond substrate 1 to the lower surface of the high-resistance silicon substrate 2.

[0085] 8.1) The surface of the device having the high-resistance silicon substrate 2, the adhesion layer 3, the bottom electrode 4, the resistance change layer 5, and the top electrode 6 is bonded to the sapphire carrier wafer by bonding glue, and pressure is applied to the lower surface of the high-resistance silicon substrate 2 for temporary bonding;

[0086] 8.2) The lower surface of the high-resistance silicon substrate 2 of the device temporarily bonded with the sapphire carrier wafer is thinned by grinding to reduce its thickness to 50 μm;

[0087] 8.3) Using polishing technology, the lower surface of the thinned high-resistance silicon substrate 2 is polished to improve the smoothness and flatness of the wafer surface;

[0088] 8.4) Bond the lower part of the high-resistance silicon substrate 2 to the diamond substrate 1 with a thickness of 100 μm, and use a debonding glue to remove the sapphire carrier temporarily bonded to the device surface to complete the preparation of the device.

[0089] In the second embodiment, a reconfigurable RF switch device is manufactured in which the resistive layer material is multi-layer MoS2 with a thickness of 10 nm, the bottom metal electrode is Pt with a thickness of 30 nm, the top metal electrode is Pt, the handle part is 20 nm thick, and the blade part is 70 nm thick.

[0090] Step 1: Cleaning the high-resistance silicon substrate 2.

[0091] The specific implementation of this step is the same as step 1 in Example 1.

[0092] Step 2: sputtering the adhesion layer 3 on the surface of the high-resistance silicon substrate 2 by physical vapor deposition (PVD) technology.

[0093] The specific implementation of this step is the same as step 2 of Example 1.

[0094] Step 3: Deposit the bottom electrode 4 on the adhesion layer 3 and perform patterning for the GSG design.

[0095] The surface of the substrate 2 is photolithographically processed, that is, a layer of photoresist is firstly coated on the surface of the substrate 2, and then alignment, exposure, development, and pattern detection are sequentially performed to form an area for depositing a metal electrode;

[0096] Set the working chamber to evacuate to 2.5 × 10 -4 Pa, the electron gun acceleration voltage is 8Kv, the electron gun beam current is 1A, and the evaporation time is 240s. Pt with a thickness of 40nm is deposited as the bottom metal electrode 4 in the photoetched area on the adhesion layer 3 by electron beam evaporation E-Beam, and then the sample is placed in a photoresist stripping solution to remove the photoresist;

[0097] The silicon wafer after removing the photoresist is completely immersed in an acetone solution for 12 hours and subjected to ultrasonic treatment. The surface of the silicon wafer is then cleaned with deionized water to remove the residual acetone solution, and then the surface of the silicon wafer is blown dry with nitrogen.

[0098] Step 4: Prepare a multi-layer MoS2 film as the resistive layer 5 by chemical vapor deposition (CVD).

[0099] First, a high-quality sapphire substrate was placed in a beaker, acetone was poured in until the substrate was completely covered, and then the substrate was placed in an ultrasonic cleaner for 20 minutes, and then rinsed with deionized water for 2 to 3 times, and then placed in immersible deionized water for 15 minutes for ultrasonic treatment, and then dried with nitrogen;

[0100] Next, the substrate, molybdenum trioxide, and sulfur powder were placed in a leak-checked CVD device, where the molybdenum source was placed in the high-temperature zone of the tube furnace, the sulfur powder was placed in the low-temperature zone, and the substrate was placed in the deposition area at the tail end. The argon flow meter was adjusted to 50 sccm, and the cavity pressure was stabilized to 400 Pa by adjusting the gas valve. After maintaining the stable state for 5 minutes, the temperature was raised to 800°C, and then cooled to room temperature to generate a MoS2 multilayer film layer, and the number of layers was controlled to 12 to 18 layers through TEM image observation;

[0101] Then, set the implantation energy to 200 keV and the implantation dose to 10 15 cm -2 The 12-18 layers of MoS2 thin films were injected with He at an injection angle of 7°. + Injection is performed to obtain a resistive switching layer 5 composed of multiple MoS2 resistive switching layers.

[0102] Step 5: wet transfer the prepared multi-layer MoS2 resistive switching layer 5 onto the bottom electrode 4.

[0103] First, 2.7 g of polystyrene PS powder was weighed as the solute using an electronic analytical balance, and 30 mL of toluene was measured as the solvent using a measuring cylinder, and a clear PS solution was obtained by magnetic stirring at 80 °C for 3 h.

[0104] Next, fix the prepared MoS2 thin film sample on the center of the coating machine with double-sided tape, set the parameters of the coating machine to 5000r / min, the rotation time to 50 seconds, and start the button. When the speed reaches the highest, drop a drop of the prepared PS mixed solution on the sample to ensure that the PS layer spin-coated on the sample is uniform. When the time is up, remove the sample;

[0105] Then, the spin-coated sample was placed in an electric oven and baked at 90°C for 15 min to remove toluene, allowing PS to precipitate and form a film, while strengthening the interaction between the MoS2 film and the PS layer;

[0106] Next, the sample was placed in deionized water, and the edge of the sample was gently poked with pointed tweezers to give an initial starting force to the peeling process. The different hydrophilicity of the sapphire substrate and the MoS2 film was then used to allow the PS / MoS2 layer to be naturally peeled off from the sapphire substrate under the action of surface energy.

[0107] Then, the PS / MoS2 sample was transferred onto the patterned bottom electrode 4, the water was absorbed with absorbent paper, and the film layer was pressed flat as evenly as possible to reduce bubbles between the PS / MoS2 film layers;

[0108] The film sample that was peeled and transferred to the device was placed in an electric heating box and baked for a second time at 90°C for 60 min to strengthen the bonding force between the MoS2 film and the metal electrode 4, evaporate the residual water, and take it out after cooling to room temperature;

[0109] The sample after the second baking was infiltrated with toluene starting from the edge of the MoS2 film to soak the entire sample surface, dissolving the PS layer closely connected to the MoS2 film. After the PS layer was completely dissolved by toluene and the toluene was completely volatilized, the sample was taken out to complete the transfer.

[0110] Step 6: depositing a top electrode 6 on the resistive layer 5 and performing a patterning operation for GSG design.

[0111] First, the surface of the resistive layer 5 is photolithographically processed, that is, a layer of photoresist is firstly coated on the surface of the resistive layer 5, and then alignment, exposure, development, and pattern detection are sequentially performed to form a knife-shaped metal electrode area;

[0112] Next, set the working chamber to a vacuum of 2.5 × 10 -4 Pa, the electron gun acceleration voltage is 8Kv, the electron gun beam current is 1A, and the evaporation time is 240s. Through electron beam evaporation E-Beam, Pt with a thickness of 20nm on the handle part and 70nm on the blade part is deposited on the photoetched area on the resistive layer 5 to form a top metal electrode 6, and then the sample is placed in a photoresist stripping solution to remove the photoresist;

[0113] Then, the silicon wafer after removing the photoresist was completely immersed in an acetone solution for 12 hours and subjected to ultrasonic treatment. The surface of the silicon wafer was then cleaned with deionized water to remove the residual acetone solution, and the sample was heated at 60°C for 5 minutes to evaporate the residual water on the sample surface.

[0114] Step 7: Etch away the MoS2 that does not overlap with the top electrode 6 from the bottom electrode 4 area.

[0115] The process conditions were set to 45 sccm of argon gas flow rate, 90 W of RF generator forward power, 600 W of inductively coupled plasma ICP generator power, about 60 mTorr of chamber pressure, and 35 °C of plate temperature. The etching was continued for 220 seconds from the bottom electrode 4 area to etch away the MoS2 that did not overlap with the top electrode 6 to ensure good electrical contact performance of the sample.

[0116] The top electrode 6, the resistive layer material 5 and the bottom electrode 4 distributed from top to bottom constitute a memristor, achieving the performance of ultra-low standby power, ultra-low off-state leakage current, and a large switching resistance ratio, and accelerating the formation of conductive filaments through defects inside the resistive layer material 5, thereby achieving a fast response of the memristor.

[0117] Step eight: bonding the diamond substrate 1 to the lower surface of the high-resistance silicon substrate 2.

[0118] The specific implementation of this step is the same as step 8 in Example 1.

[0119] Example 3: A reconfigurable RF switch device is manufactured with a resistive layer material of multilayer WS2 with a thickness of 10nm, a bottom metal electrode of Au with a thickness of 30nm, a top metal electrode of Ag, a handle portion with a thickness of 20nm, and a blade portion with a thickness of 60nm.

[0120] Step A: Cleaning the high-resistance silicon substrate 2.

[0121] The specific implementation of this step is the same as step 1 in Example 1.

[0122] Step B: sputtering an adhesion layer 3 on the surface of the high-resistance silicon substrate 2 by physical vapor deposition (PVD) technology.

[0123] The specific implementation of this step is the same as step 2 of Example 1.

[0124] Step C: Depositing the bottom electrode 4 on the adhesion layer 3 and performing a patterning operation for the GSG design.

[0125] C1) performing photolithography on the surface of the substrate 2, that is, first coating a layer of photoresist on the surface of the substrate 2, and then sequentially performing alignment, exposure, development, and pattern detection to form an area for depositing a metal electrode;

[0126] C2) By electron beam evaporation E-Beam, Au with a thickness of 30 nm is deposited on the photolithographic area on the adhesion layer 3 as the bottom metal electrode 4, and then the sample is placed in a photoresist stripping solution to remove the photoresist. The process conditions of the electron beam evaporation are: the working room is evacuated to 2.0×10 -4 Pa, the electron gun acceleration voltage is 7.5KV, the electron gun beam current is 1A, and the evaporation time is 200s;

[0127] C3) The silicon wafer is completely immersed in an acetone solution for 12 hours and subjected to ultrasonic treatment. The surface of the silicon wafer is then cleaned with deionized water to remove the residual acetone solution. Finally, the surface of the silicon wafer is dried with nitrogen gas.

[0128] Step D: preparing a multilayer WS2 as the resistive switching layer 5 by chemical vapor deposition (CVD).

[0129] D1) Place the sapphire substrate in a beaker, pour acetone into it until the substrate is completely covered, place it in an ultrasonic cleaner for 20 minutes, rinse it with deionized water 2 to 3 times, place it in immersible deionized water for 15 minutes, and then dry it with nitrogen;

[0130] D2) Place the substrate, tungsten trioxide and sulfur powder into the CVD device after leak detection, wherein the tungsten source is placed in the high temperature zone of the tube furnace, the sulfur powder is placed in the low temperature zone, and the substrate is placed in the deposition area at the tail end; then adjust the argon flow meter to 120sccm, and stabilize the cavity pressure to 400Pa by adjusting the gas valve; maintain the stable state for 5 minutes, then raise the temperature to 960℃, and then cool to room temperature to generate MoS2 multilayer thin film layers, and control the number of layers to 12 to 18 layers through TEM image observation;

[0131] D3) He + Injection, to obtain a resistive switching layer 5 composed of multiple WS2 resistive switching layers, the He + The implantation process conditions are: implantation energy 220keV, implantation dose 10 15 cm -2 , the injection angle is 9°.

[0132] Step E: wet-transferring the prepared multi-layer WS2 resistive switching layer 5 onto the bottom electrode 4 .

[0133] The specific implementation of this step is the same as step 5 of embodiment 2.

[0134] Step F: depositing a top electrode 6 on the resistive layer 5 and performing a patterning operation for a GSG design.

[0135] F1) performing photolithography on the surface of the resistive layer 5, that is, first coating a layer of photoresist on the surface of the resistive layer 5, and then sequentially performing alignment, exposure, development, and pattern detection to form a knife-shaped metal electrode area;

[0136] F2) Depositing Ag with a thickness of 20 nm for the handle and 60 nm for the blade on the photoetched area of ​​the resistive layer 5 by electron beam evaporation E-Beam to form a top metal electrode 6, and then placing the sample in a photoresist stripping solution to remove the photoresist;

[0137] The process conditions of the electron beam evaporation were set as follows: the vacuum degree of the working chamber was 2.5×10 -4 Pa, the electron gun acceleration voltage is 8Kv, the electron gun beam current is 1A, and the evaporation time is 240s;

[0138] F3) After removing the photoresist, the silicon wafer is completely immersed in an acetone solution for 12 hours and subjected to ultrasonic treatment. The surface of the silicon wafer is then cleaned with deionized water to remove the residual acetone solution. Finally, the sample is heated at 60°C for 5 minutes to evaporate the residual water on the sample surface.

[0139] Step G: Etch away the WS2 that does not overlap with the top electrode 6 from the bottom electrode 4 area.

[0140] Plasma etching is used to etch away WS2 from the bottom electrode 4 area to ensure good electrical contact performance of the sample. The top electrode 6, the resistive layer material 5 and the bottom electrode 4 distributed from top to bottom constitute a memristor, achieving ultra-low standby power, ultra-low off-state leakage current, and a large switch resistance ratio. The defects inside the resistive layer material 5 accelerate the formation of conductive filaments, thereby achieving a fast response of the memristor.

[0141] The process conditions of the plasma etching were set as follows: an argon gas flow rate of 65 sccm, an RF generator forward power of 90 W, an inductively coupled plasma ICP generator power of 650 W, a chamber pressure of about 60 mTorr, a plate temperature of 40° C., and a duration of 200 seconds.

[0142] Step H: bonding the diamond substrate 1 to the lower surface of the high-resistance silicon substrate 2.

[0143] The specific implementation of this step is the same as step 8 in Example 1.

[0144] The above descriptions are only three specific examples of the present invention and do not constitute any limitation to the present invention. Obviously, after understanding the content and principle of the present invention, professionals in this field may make various modifications and changes in form and details without departing from the principle and result of the present invention. For example, in addition to hBN, MoS2, and WS2, materials such as graphene can be used as the resistive layer; in addition to Au / Au, Pt / Pt, and Ag / Au, other metals that match the memristor can be used as the upper and lower metal electrode layers; in addition to He + For processing, you can also use H + However, these modifications and changes based on the concept of the present invention are still within the protection scope of the claims of the present invention.

Claims

1. A reconfigurable radio frequency switch device based on a fast response memristor, comprising: a top electrode (6), a resistive layer material (5), a bottom electrode (4), a metal adhesion layer (3), and a high resistance silicon substrate (2), wherein the top electrode (6), the resistive layer material (5) and the bottom electrode (4) are arranged from top to bottom to form a memristor, characterized in that: The bottom surface of the high-resistance silicon substrate (2) is provided with a diamond substrate (1) to improve the heat dissipation performance of the device and to support the device.

2. The device according to claim 1, characterized in that: The diamond substrate (1) has a thickness of 100 to 200 μm.

3. The device according to claim 1, characterized in that: The top electrode (6) is in the shape of a knife, with a knife body (61) located on the upper part of the high-resistance silicon substrate (2), and between the knife handle (62) and the high-resistance silicon substrate (2) are a resistive layer (5), a bottom electrode (4), and a metal adhesion layer (3) in sequence.

4. The device according to claim 3, characterized in that: The top electrode (6) is made of Au, Pt or Ag; The blade (61) has a thickness of 70 to 110 nm; The knife handle (62) has a thickness of 20 to 40 nm; The resistive switching layer (5) is made of hBN or MoS2 or WS2, and has a thickness of 10 to 15 nm; The bottom electrode (4) is made of Au or Pt and has a thickness of 30 to 40 nm; The metal adhesion layer (3) is made of Ti and has a thickness of 10 to 15 nm.

5. The device according to claim 1, characterized in that: The high resistance silicon substrate (2) has a thickness of 50 to 100 μm.

6. A method for preparing a reconfigurable radio frequency switch device based on a fast response memristor, characterized in that: The steps include: §1) depositing a Ti layer of 10 to 15 nm as an adhesion layer (3) on a clean high-resistance silicon substrate (2) by physical vapor deposition; §2) depositing 30-40 nm Au or Pt as the bottom electrode (4) on the adhesion layer (3) by photolithography, electron beam evaporation and lift-off and patterning for subsequent design of the GSG structure; §3) growing a multilayer hBN or MoS2 or WS2 resistive switching layer (5) on a Cu foil or sapphire or sapphire substrate by a CVD process; §4) Use He + Ion implantation is performed on the resistive layer to create defects, thereby accelerating the formation of conductive filaments and reducing the response time of the memristor. §5) transferring the ion-implanted resistive layer onto the patterned bottom electrode (4) by wet method; §6) depositing Au, Pt or Ag on the resistive layer (5) and the high-resistance silicon substrate (2) simultaneously by electron beam evaporation to form a top electrode (6) having an integral shape consisting of a handle (62) with a thickness of 20 to 40 nm and a blade (61) with a thickness of 70 to 110 nm; §7) Use Ar plasma to etch away the resistive switching layer material 5 that is not in contact with the top electrode handle 62 to ensure good electrical contact at the tip of the GSG structure designed subsequently; §8) After the high-resistance silicon substrate 2 is subjected to a grinding and thinning process, it is connected to the diamond substrate 1 through a bonding process to complete the device manufacturing.

7. The method according to claim 5, characterized in that The physical vapor deposition process used in step §1) has the following process conditions: The sputtering voltage is 0.9~1.1KV, The sputtering current is 90~110mA, The target-base distance is 25-35cm. The sputtering rate is 2-4 nm / min.

8. The method according to claim 5, characterized in that The process conditions of the electron beam evaporation used in steps §2) and §6) are as follows: The vacuum degree is 2.0×10 -4 ~3.0×10 -4 Pa, The electron gun acceleration voltage is 7~9KV, The electron gun beam current is 0.9~1.1A, The evaporation time is 220 to 260 seconds.

9. The method according to claim 5, characterized in that Step §3) growing a multilayer hBN\MoS2\WS2 resistive switching layer (5) by CVD process, the process conditions are as follows: For growing the hBN resistive layer, the raw material decomposition product is transferred to the substrate surface under the conditions of argon flow rate of 200-250sccm, H2 flow rate of 50-80sccm, stable chamber pressure of 350-450Pa, and raw material heating temperature of 102-105°C to obtain the hBN film; For the growth of MoS2 resistive switching layer, the argon flow rate is set to 40-60 sccm, the cavity pressure is stabilized at 350-450 Pa, and the temperature is raised to 800-850°C after maintaining the stable state for 5-10 minutes, and then directly cooled to room temperature; For growing the WS2 resistive switching layer, the argon flow rate is set to 100-120 sccm, the cavity pressure is stabilized at 350-450 Pa, and after maintaining the stable state for 5-10 minutes, the temperature is raised to 960-1000°C, and then directly cooled to room temperature.

10. The method according to claim 5, characterized in that Step §5) The ion-implanted resistive layer is transferred to the patterned bottom electrode (4) by wet method, and different conditions are set according to different materials of the resistive layer for transfer: For the transfer of hBN resistive switching layer: First, spin-coat the PMMA solution on the hBN-Cu sample and heat it at 100-110°C for 3-5 minutes. Then float the sample in a 0.1-0.2 g ml -1 FeCl3 solution on the surface for 5 to 6 hours to etch the Cu substrate; Then, the PMMA-hBN sample was deposited on the surface of deionized water and floated for 1 to 1.5 hours for cleaning; Pick up the PMMA-hBN sample and transfer it to the bottom electrode (4), and heat it at 60-70° C. for 5-7 minutes to evaporate the deionized water between the hBN and the bottom electrode (4); Finally, the entire device was placed in ≥99% acetone for 12 to 14 h to dissolve the PMMA layer that was closely connected to the hBN film and complete the transfer; For the transfer of MoS2 resistive switching layer: First, spin-coat the PS solution onto the MoS2 thin film sample and bake it at 90-100°C for 15-20 min; The sample was then placed in deionized water to allow the PS / MoS2 layer to be naturally peeled off from the sapphire substrate under the action of surface energy; Next, pick up the PS / MoS2 sample, transfer it to the bottom electrode (4), bake it at 90-100°C for 50-60min, and take it out after cooling to room temperature; Finally, toluene was used to wet the entire sample surface starting from the edge of the PS / MoS2 film to dissolve the PS layer that was closely connected to the MoS2 film and complete the transfer; For transferring the WS2 resistive switching layer, the transfer operation is the same as that of transferring the MoS2 resistive switching layer.

11. The method according to claim 5, characterized in that: In step §4), He + Ion implantation is performed on the resistive switching layer, and the process conditions are as follows: He + The injection energy is 200-220 keV. The injection dose is 10 14 ~10 15 cm -2 , The injection angle is 7° to 9°; In the step §8), Ar plasma is used to etch away the resistive switching layer material (5) that is not in contact with the top electrode handle (62), and the process conditions are as follows: The argon flow rate is 45-50 sccm, The forward power of the RF generator is 90~95W, The power of the inductively coupled plasma (ICP) generator is 500-550W. The room pressure is about 70-80mTorr. The plate temperature is 25-30°C. Lasts for 210 to 240 seconds.

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