Two-stage operating system architecture based on heterogeneous multi-core processor

By designing a two-level operating system architecture based on heterogeneous multi-core processors, the problem of inability to effectively manage heterogeneous multi-core processor resources and difficult to achieve different core layoffs in the existing technology is solved, efficient resource management and functional optimization are achieved, and data analysis efficiency is improved.

CN119759487APending Publication Date: 2025-04-04SHENZHEN ACAD OF AEROSPACE TECH
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Patent Information

Application Number
CN202411727100.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-28
Publication Date
2025-04-04

AI Technical Summary

Technical Problem

The prior art cannot effectively manage heterogeneous multi-core processor resources, and it is difficult to achieve different core cutting and functional optimization.

Method used

A two-level operating system architecture based on heterogeneous multi-core processors is designed, including the core hardware layer, the hardware interface layer, the operating system core layer and the container layer. Through these levels of collaborative work, efficient management of multi-core processor resources and flexible reduction of different core functions can be achieved.

Benefits of technology

It realizes efficient management of heterogeneous multi-core processor resources, flexibly cut different core functions, and improves data analysis efficiency.

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Abstract

The invention provides a two-stage operating system architecture based on a heterogeneous multi-core processor, and relates to the technical field of multi-core processors, the two-stage operating system architecture comprises a core hardware layer and a hardware interface layer, and the hardware interface layer is located on the core hardware layer and interacts with multiple pieces of physical hardware to complete an expected task. The operating system core layer is located on the hardware interface layer and composed of at least one master processor and at least one slave processor, expected operation is executed by performing logic abstraction and control on the system, and the container layer performs system resource configuration on a plurality of containers according to a predetermined resource allocation scheme. The technical problems that in the prior art, heterogeneous multi-core processor resources cannot be effectively managed, and cutting of different cores and function optimization are difficult to achieve are solved. The technical effects of efficiently managing heterogeneous multi-core processor resources, flexibly cutting different core functions and improving data analysis efficiency are achieved.
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Description

Technical Field

[0001] The present invention relates to the technical field of multi-core processors, and in particular to a two-level operating system architecture based on a heterogeneous multi-core processor. Background Art

[0002] Due to its structural characteristics, heterogeneous multi-core processors are widely used in embedded systems such as industrial control, instrumentation, automotive electronics, aerospace, military, medical instruments, environmental monitoring, network communications, etc. The application of heterogeneous multi-core processors is inseparable from multi-core operating systems. Without the support of operating systems, software programming of heterogeneous multi-core processors cannot be quickly implemented, and parallel execution of applications is also difficult to complete.

[0003] At the same time, faced with processor cores of different structures, multiple shared resources and private resources, how to design an operating system architecture that can effectively manage the various resources of multi-core processors, and can also be tailored according to the needs of different cores of multi-core processors to achieve different functions and reduce the difficulty of development is a problem that needs to be solved in operating system architecture design. Therefore, multi-core operating systems, especially the architecture and resource management of operating systems for heterogeneous multi-core processors, are the difficulties in multi-core operating system research.

[0004] The existing technology has the technical problems of being unable to effectively manage heterogeneous multi-core processor resources and being difficult to implement different core tailoring and function optimization. Summary of the invention

[0005] The present application provides a two-level operating system architecture based on a heterogeneous multi-core processor, which is used to solve the technical problems in the prior art that the heterogeneous multi-core processor resources cannot be effectively managed and it is difficult to achieve different core reduction and function optimization.

[0006] In view of the above problems, the present application provides a two-level operating system architecture based on a heterogeneous multi-core processor, including: a core hardware layer, which is located at the bottom layer of the system and includes multiple physical hardware; a hardware interface layer, which is located above the core hardware layer and completes the expected tasks by interacting with the multiple physical hardware; an operating system core layer, which is located above the hardware interface layer and consists of at least one master processor and at least one slave processor, and performs the expected operations by logically abstracting and controlling the system; a container layer, which is connected to the operating system core layer through an API interface, and includes a container manager and multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it, and the container manager performs system resource configuration for the multiple containers according to a predetermined resource allocation scheme.

[0007] Preferably, the core hardware layer includes multiple physical hardware, including: the core hardware layer includes multiple physical hardware, wherein the multiple physical hardware at least includes a multimedia communication unit, an interrupt controller, a memory management unit and a hardware clock.

[0008] Preferably, completing the expected task by interacting with the multiple physical hardware includes: the hardware interface layer completes the expected task by interacting with the multiple physical hardware, wherein the expected task includes at least memory management, context switching, inter-media communication management, device processing and hardware interrupt processing.

[0009] Preferably, the operating system core layer is composed of at least one main processor and at least one slave processor, including: the main processor is an ARM processor; the slave processor is a digital signal processor or a non-master micro control unit.

[0010] Preferably, the expected operation is performed by logically abstracting and controlling the system, including: the operating system core layer performs the expected operation by logically abstracting and controlling the system, wherein the expected operation includes at least logical communication, memory partitioning, task scheduling, exception handling, health monitoring and system data configuration.

[0011] Preferably, the container layer includes a container manager and multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it, and the container manager configures system resources for the multiple containers according to a predetermined resource allocation scheme, including: configuring the number of containers and the predetermined resource allocation scheme according to the system operation scenario; configuring containers according to the number of containers to obtain multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it, and calling system resources through an API interface to execute tasks to be processed; according to the predetermined resource allocation scheme, configuring system resources for the multiple containers through the container manager.

[0012] Preferably, the predetermined resource allocation scheme includes multiple resource allocation amounts for multiple containers, wherein the resources include at least the number of processor cores and memory.

[0013] Preferably, the processor inside each container supports multi-core parallel scheduling and execution environment configuration, and multiple tasks can interact through a soft bus communication mechanism.

[0014] One or more technical solutions provided in this application have at least the following technical effects or advantages:

[0015] Through the core hardware layer, which is located at the bottom of the system and includes multiple physical hardware; the hardware interface layer, which is located above the core hardware layer and completes the expected tasks by interacting with the multiple physical hardware; the operating system core layer, which is located above the hardware interface layer and consists of at least one main processor and at least one slave processor, and performs the expected operations by logically abstracting and controlling the system; and the container layer, which configures system resources for multiple containers according to a predetermined resource allocation plan. The technical effects of efficiently managing heterogeneous multi-core processor resources, flexibly tailoring different core functions, and improving data analysis efficiency are achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A schematic diagram of a two-level operating system architecture based on a heterogeneous multi-core processor provided in this application;

[0018] Figure 2 A schematic diagram of a workflow for system resource configuration in a two-level operating system architecture based on a heterogeneous multi-core processor provided in this application.

[0019] Explanation of the reference numerals: core hardware layer 11, hardware interface layer 12, operating system core layer 13, container layer 14. DETAILED DESCRIPTION

[0020] This application provides a two-level operating system architecture based on heterogeneous multi-core processors, which is used to solve the technical problems of the existing technology that cannot effectively manage heterogeneous multi-core processor resources and is difficult to achieve different core tailoring and function optimization. It achieves the technical effect of efficiently managing heterogeneous multi-core processor resources, flexibly tailoring different core functions, and improving data analysis efficiency.

[0021] Below, the technical solutions in the present invention will be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments of the present invention. It should be understood that the present invention is not limited to the example embodiments described herein. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. It should also be noted that, for the convenience of description, only the parts related to the present invention are shown in the accompanying drawings, rather than all of them.

[0022] like Figure 1 As shown, the present application provides a two-level operating system architecture based on a heterogeneous multi-core processor, including:

[0023] The core hardware layer is located at the bottom of the system and includes multiple physical hardware.

[0024] Furthermore, the core hardware layer includes multiple physical hardware, including: the core hardware layer includes multiple physical hardware, wherein the multiple physical hardware at least includes a multimedia communication unit, an interrupt controller, a memory management unit and a hardware clock.

[0025] Specifically, the core hardware layer is at the bottom of the entire system and is the physical component of the computer. It includes multiple physical hardware and is used to provide underlying computing resources and control functions. Multiple physical hardware at least includes core modules such as multimedia communication unit, interrupt controller, memory management unit and hardware clock. The multimedia communication unit is responsible for managing the input, output and processing of multimedia data to ensure that the system can exchange data and stream media in real time. The interrupt controller is used to receive and manage interrupt requests in the system so that the system can respond to external or internal events in a timely manner, improve response speed and system stability. The memory management unit (MMU) is responsible for the conversion and management of memory addresses, mapping virtual addresses to physical addresses, and ensuring the isolation and effective use of memory resources for different applications. The hardware clock provides the system's time base and provides support for task scheduling, time synchronization and system timing. The core hardware layer provides basic computing resources and control functions for the upper operating system core through these physical hardware, forming a solid underlying architecture to support complex multi-tasking system operations.

[0026] The hardware interface layer is located above the core hardware layer and completes the expected task by interacting with the multiple physical hardware.

[0027] Specifically, the hardware interface layer is above the core hardware layer and is responsible for implementing the abstract operations of the underlying hardware. It completes the system's intended tasks by interacting with multiple underlying physical hardware, making the upper-level operating system independent of changes in specific hardware and achieving resource control without direct interaction with the hardware.

[0028] Furthermore, the expected task is completed by interacting with the multiple physical hardware, including: the hardware interface layer completes the expected task by interacting with the multiple physical hardware, wherein the expected task at least includes memory management, context switching, inter-media communication management, device processing and hardware interrupt processing.

[0029] Specifically, the hardware interface layer completes the expected tasks by interacting with multiple physical hardware, which means that the hardware interface layer is responsible for coordinating and managing the underlying hardware resources so that the system can effectively perform key functional operations. The expected tasks include at least memory management, context switching, inter-media communication management, device processing, and hardware interrupt processing, that is, the hardware interface layer interacts with the underlying memory management unit to ensure the dynamic allocation and access of memory, support the system's memory management function, and optimize the utilization efficiency of memory resources. The hardware interface layer interacts with the interrupt controller to perform hardware interrupt processing, so that the system can quickly respond to external or internal events and enhance real-time performance and system stability. In addition, the hardware interface layer completes inter-media communication management by coordinating with the multimedia communication unit to ensure the smooth transmission of multiple data types between different modules. The hardware interface layer is also responsible for device processing, that is, interacting and controlling with peripheral devices so that the operating system can seamlessly connect and manage different devices. Finally, through the context switching function, the hardware interface layer efficiently switches the execution environment between different tasks to ensure the smooth parallel execution of the multi-task system. These interaction processes constitute the abstraction and control of the underlying physical resources by the hardware interface layer, forming an effective management of the underlying hardware, so that the upper-level operating system can more conveniently use hardware resources to complete various tasks.

[0030] The operating system core layer is located above the hardware interface layer, and is composed of at least one main processor and at least one slave processor. The operating system core layer performs expected operations by logically abstracting and controlling the system.

[0031] Specifically, the operating system core layer is located above the hardware interface layer and consists of at least one main processor and one or more slave processors. The main processor is usually an ARM processor, while the slave processor is usually a digital signal processor (DSP) or other microcontroller unit (MCU). It performs various expected operations by logically abstracting and controlling the system. The operating system core layer abstracts the underlying hardware, allowing the system to manage and call hardware resources in a unified logical manner, and realize the effective scheduling and allocation of different tasks.

[0032] Furthermore, the operating system core layer is composed of at least one main processor and at least one slave processor, including: the main processor is an ARM processor; the slave processor is a digital signal processor or a non-master micro control unit.

[0033] Specifically, the main processor in the core layer of the operating system is an ARM processor, which is a high-performance, low-power processor widely used in embedded systems. It is responsible for the overall management of the system, core task scheduling and resource allocation, and executes the main system logic. With its efficient instruction set and rich peripheral interface support, the ARM processor acts as a core control unit in a multi-core architecture and is suitable for processing computationally intensive and general-purpose tasks. The slave processor is a digital signal processor (DSP) or a non-master microcontroller unit (MCU). DSP is a processor specifically used to process and optimize digital signals, suitable for processing high-speed computing and signal processing tasks. As a slave processor, DSP focuses on tasks such as real-time processing, filtering and analysis of data in a multi-core system, which can reduce the workload of the main processor. MCU is a single-chip microcomputer that integrates modules such as a microprocessor, memory, and I / O interface, and is usually used for simple control of devices. As a slave processor, MCU is used to perform auxiliary tasks or peripheral control. Compared with ARM processors and DSPs, MCUs are more suitable for low-power and highly controllable tasks, and are usually used for real-time control tasks or peripheral interface management, such as communication interface control. In the system, these processors are divided into different parts. The ARM processor is responsible for core management, the DSP handles computationally intensive signal tasks, and the MCU handles simple control and interface management of peripheral devices. By statically dividing the physical resources of the multi-core processor into multiple independent spaces, each system occupies its own resources and runs independently. It is possible to effectively manage the multi-core processor resources and allocate and use the processor resources according to the characteristics of the application. Since the processor and memory resources in the container are statically allocated by the system planner in advance according to the characteristics of the application, the system planner can cut or plan the number of cores of the processor in each container and the memory and other resources of each container according to the characteristics of the application. This allows flexible resource allocation, reduces the difficulty of heterogeneous multi-core processor software development, hierarchically uses and manages related hardware resources, realizes the effective scheduling and allocation of different tasks, and jointly improves the processing efficiency and responsiveness of the system.

[0034] Furthermore, the expected operations are performed by logically abstracting and controlling the system, including: the operating system core layer performs the expected operations by logically abstracting and controlling the system, wherein the expected operations at least include logical communication, memory partitioning, task scheduling, exception handling, health monitoring and system data configuration.

[0035] Specifically, the core layer of the operating system performs a series of expected operations through logical abstraction and control of the system to ensure the stable and efficient operation of the system. The expected operations include at least logical communication, memory partitioning, task scheduling, exception handling, health monitoring and system data configuration. Logical communication refers to the establishment of an effective communication mechanism between tasks and hardware resources, so that the data transmission between modules is smooth and orderly, thereby realizing the collaborative work of various parts. Secondly, memory partitioning is used to reasonably divide and allocate memory resources to ensure that the memory usage between different tasks does not interfere with each other, thereby improving the security and stability of the system. The task scheduling function implements orderly switching and concurrent execution of tasks in a multi-tasking environment by allocating processor resources to ensure the efficiency and real-time performance of the system. Exception handling is responsible for monitoring and responding to abnormal situations in the system and executing recovery measures in a timely manner to prevent system failures from affecting the normal execution of other tasks. The health monitoring function continuously monitors the operating status of the system, including key parameters such as workload, temperature, and voltage of each module, to ensure that the system remains within a safe operating range. Finally, the system data configuration provides the ability to flexibly adjust and update system parameters, so that the operating system can optimize the system's operating performance according to actual needs. By performing these operations, the operating system core layer can efficiently control various resources in the multi-core processor system, ensuring the reliability and efficiency of the system in complex application scenarios.

[0036] The container layer is connected to the operating system core layer through an API interface, and includes a container manager and multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it. The container manager configures system resources for the multiple containers according to a predetermined resource allocation plan.

[0037] In one embodiment, Figure 2 As shown, the container layer includes a container manager and multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it, and the container manager performs system resource configuration for the multiple containers according to a predetermined resource allocation scheme, including: configuring the number of containers and the predetermined resource allocation scheme according to the system operation scenario; performing container configuration according to the number of containers to obtain multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it, and calling system resources through an API interface to execute tasks to be processed; according to the predetermined resource allocation scheme, performing system resource configuration for the multiple containers through the container manager.

[0038] Specifically, the container layer is located at the top layer of the operating system architecture and is used to configure and manage resources for multiple containers through a container manager. The container layer is connected to the API interface of the operating system core layer to ensure efficient interaction between the container and the operating system. The API interface provides a set of predefined functions, methods or protocols, so that the application in the container layer can access and control the functions of the operating system core layer by calling these interfaces. The container layer includes a container manager and multiple containers. The container manager is the core component of the container layer, which is used to manage and schedule the resources of all containers, ensure that each container allocates system resources on demand, and can dynamically adjust the container configuration. The container manager configures system resources for multiple containers according to a predetermined resource allocation scheme to ensure that each container can obtain the required computing, memory, storage and other resources. The resource allocation process is dynamically adjusted according to specific operating requirements and system resource conditions. Each of the multiple containers is encapsulated based on virtual machine technology, which can provide an isolated operating environment, and each container runs independent application software. These application software can be operating systems or specific functional modules, which are determined according to the operating scenario of the container. At the container layer, the container interacts with the operating system core layer through the API interface, and uses the resources and services provided by the operating system to complete specific computing tasks and data processing.

[0039] The container manager configures the number of containers and the predetermined resource allocation scheme according to the system operation scenario. The predetermined resource allocation scheme refers to the resource allocation strategy planned in advance according to the system requirements and operation scenarios, including the allocation scheme of various resources such as CPU, memory, and storage. In different application scenarios, the number of containers and the required resources may vary significantly. For example, in the scenario of high-concurrency computing or data processing, more containers may need to be configured and more processor cores and memory may be allocated. In light-load tasks, the number of containers can be appropriately reduced to save system resources. The resource allocation scheme is implemented through the container manager, in which each container obtains corresponding resources according to specific needs. The application software in the container communicates with the core layer of the operating system through the API interface, so that the container can efficiently utilize the underlying hardware resources and dynamically adjust the allocation of resources according to the system load. After determining the number of containers and the predetermined resource allocation scheme, the container is configured according to the number of containers, and virtual machine resources such as CPU cores, memory, storage space, etc. are allocated to each container. Different application software is embedded in each container, and the core functions of the operating system such as memory management, task scheduling, context switching, etc. are called through the API interface to execute the computing tasks required by the application software in the container. Then, according to the predetermined resource allocation scheme, the container manager configures system resources for the multiple containers. When the system load is high, the container manager can reallocate resources to multiple containers, give priority to the execution of key tasks, and ensure the stability and efficiency of system operation. In addition, when a container completes its task, the container manager can recycle its resources and reallocate resources to other containers according to new task requirements. The container layer ensures that the system can flexibly manage resources while maintaining efficient task execution and application isolation, effectively improving the system's scalability and concurrent task processing capabilities.

[0040] Furthermore, the predetermined resource allocation scheme includes multiple resource allocation amounts for multiple containers, wherein the resources include at least the number of processor cores and memory.

[0041] Specifically, the predetermined resource allocation scheme is one of the core functions of the container layer, which determines the resource allocation amount of multiple containers in the system, and is used to ensure that each container can obtain the required computing resources during the operation of the system to support the efficient operation of the application in the container. The predetermined resource allocation scheme includes multiple resource allocation amounts for multiple containers. The resource allocation amount refers to the number of hardware resources obtained by each container, including at least the number of processor cores and memory, and may also include other resources such as storage and bandwidth, but the core resources are the number of processor cores and memory. Each container will be allocated a certain number of processor cores to execute the computing tasks in the container. In a multi-core processor system, the container manager allocates the number of cores according to the computing requirements of the task, the workload of the container, and the overall load of the system, and since the system resources are limited, the allocation of the number of container cores is dynamically adjusted to ensure the stability of the system when the load changes. Each container resource also includes a certain amount of memory space to store the application and its runtime data. The allocation of memory is closely related to the application type, workload, and task requirements of the container. In high-memory consumption tasks, the container may need more memory allocation, while in tasks with less memory consumption, the memory allocation can be appropriately reduced. The container manager needs to be reasonably configured according to the resource requirements of different containers to ensure that each container can run efficiently and without interfering with each other. Since the processor and memory resources in the container are statically allocated by the system planner in advance according to the characteristics of the application, the system planner can cut or plan the number of cores of the processor in each container and the memory and other resources of each container according to the characteristics of the application. This can flexibly configure resources, reduce the difficulty of heterogeneous multi-core processor software development, use and manage related hardware resources in layers, maximize the resource utilization efficiency of the system, and ensure that each container can get reasonable resource support in different operating scenarios.

[0042] Furthermore, the processor inside each container supports multi-core parallel scheduling and execution environment configuration, and multiple tasks can interact through the soft bus communication mechanism.

[0043] Specifically, different containers contain different applications, which use the resources provided by the operating system through the operating system API interface to complete tasks such as container management and communication. The processor inside each container supports multi-core parallel scheduling, that is, the processor core in the container can execute multiple tasks at the same time to achieve efficient parallel processing. This scheduling method provides a flexible execution environment configuration for the container, so that each container can dynamically adjust resource allocation according to task requirements, thereby improving the resource utilization and response speed of the system. For example, if an SMP operating system is running in a container, multiple processor cores can run concurrently at the same time. Inside the container, its execution environment is similar to that of an ordinary multi-tasking environment. There are one or more concurrently executed tasks in each container, which share processor resources and do not interfere with each other. On this basis, different tasks interact with each other through a soft bus communication mechanism, which allows multiple tasks to transmit data and share information within or across containers, ensuring the collaborative work of tasks. The use of the soft bus communication mechanism enables tasks to maintain efficient communication in an isolated container environment without directly accessing the underlying hardware resources, thereby enhancing the stability and modularity of the system. Through multi-core parallel scheduling and soft bus communication, containers can maintain flexible task interaction while executing in parallel, achieving efficient and reliable resource management and task collaboration in complex systems.

[0044] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

[0045] This specification and the drawings are merely exemplary illustrations of the present application and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present application. Obviously, a person skilled in the art may make various modifications and variations to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the present application and its equivalents, the present application intends to include these modifications and variations.

Claims

1. A two-level operating system architecture based on a heterogeneous multi-core processor, characterized in that: include: The core hardware layer is located at the bottom of the system and includes multiple physical hardware; A hardware interface layer, which is located above the core hardware layer and completes the expected task by interacting with the multiple physical hardware; An operating system core layer, which is located above the hardware interface layer and is composed of at least one master processor and at least one slave processor, and performs expected operations by logically abstracting and controlling the system; The container layer is connected to the operating system core layer through an API interface, and includes a container manager and multiple containers, wherein each container is built based on a virtual machine and has different application software embedded in it. The container manager configures system resources for the multiple containers according to a predetermined resource allocation plan.

2. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 1, characterized in that: The core hardware layer includes multiple physical hardware, including: The core hardware layer includes a plurality of physical hardware, wherein the plurality of physical hardware at least includes a multimedia communication unit, an interrupt controller, a memory management unit and a hardware clock.

3. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 1, characterized in that: The expected tasks are completed by interacting with the multiple physical hardware, including: The hardware interface layer completes the expected tasks by interacting with the multiple physical hardware, wherein the expected tasks at least include memory management, context switching, inter-media communication management, device processing, and hardware interrupt processing.

4. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 1, characterized in that: The operating system core layer is composed of at least one main processor and at least one slave processor, including: The main processor is an ARM processor; The slave processor is a digital signal processor or a non-master micro control unit.

5. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 4, characterized in that: Execute expected operations by logically abstracting and controlling the system, including: The operating system core layer performs expected operations by logically abstracting and controlling the system, wherein the expected operations at least include logical communication, memory partitioning, task scheduling, exception handling, health monitoring and system data configuration.

6. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 1, characterized in that: The container layer includes a container manager and multiple containers, wherein each container is built based on a virtual machine and has different application software embedded therein. The container manager configures system resources for the multiple containers according to a predetermined resource allocation scheme, including: Configure the number of containers and pre-determine resource allocation plans based on the system operation scenario; Container configuration is performed according to the number of containers to obtain multiple containers, wherein each container is built based on a virtual machine, has different application software embedded in it, and calls system resources through an API interface to execute tasks to be processed; According to the predetermined resource allocation scheme, system resources are configured for the multiple containers through the container manager.

7. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 6, characterized in that: The predetermined resource allocation scheme includes multiple resource allocation amounts for multiple containers, wherein the resources include at least the number of processor cores and memory.

8. The two-level operating system architecture based on heterogeneous multi-core processor according to claim 6, characterized in that: The processor inside each container supports multi-core parallel scheduling and execution environment configuration, and multiple tasks can interact through the soft bus communication mechanism.