Heterogeneous device task migration optimization method, system, device, medium and product

Abstract

The invention discloses a heterogeneous device task migration optimization method and system, a device, a medium and a product, and relates to the technical field of artificial intelligence and heterogeneous computation.The method comprises the steps that mapping of task nodes in a preset directed acyclic graph and execution equipment is adjusted according to the resource state of the preset execution equipment, and a new directed acyclic graph is obtained; comparing the directed acyclic graph with the new directed acyclic graph to obtain a migration demand; the target device context of the target device is determined according to the migration requirement and the device context of the source device, the target device context is migrated to the target device, and the device context comprises a calculation unit, memory capacity and a data format of the execution device; mapping a task corresponding to the task node into an instruction task adaptive to a target equipment instruction set; and calling a device acceleration library of the target device to process the instruction task. The task migration strategy between heterogeneous devices is optimized, and the migration efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of artificial intelligence and heterogeneous computing technology, and in particular to heterogeneous device task migration optimization methods, systems, devices, media and products. Background Art

[0002] With the rapid development of artificial intelligence technology and the growing computing demand, AI tasks have become more and more complex and diverse. In order to meet these challenges, modern computing systems usually adopt a collaborative working method of multiple heterogeneous devices, such as GPU (Graphics Processing Unit), NPU (Neural Processing Unit) and CPU (Central Processing Unit). These heterogeneous devices each have unique hardware characteristics and advantages, and can jointly undertake different parts of AI tasks, thereby improving overall computing efficiency and performance. However, in practical applications, task migration between heterogeneous devices has become an urgent problem to be solved. Traditional task allocation methods usually adopt a static method, that is, before the task starts to execute, the task is allocated to each device according to preset rules or algorithms. The defect of this method is that it lacks flexibility and cannot dynamically adjust task allocation according to changes in device status and task requirements. Especially when dealing with complex AI tasks, static allocation often leads to the problem of low efficiency of task migration. Due to the differences in hardware characteristics and computing power of different heterogeneous devices, static allocation can hardly ensure that tasks can fully utilize the hardware advantages of the target device. In addition, when migrating tasks between devices, a lot of context switching and data transmission are required, which consumes a lot of time and resources, further reducing the efficiency of task migration. Therefore, how to optimize the task migration strategy between heterogeneous devices and improve the migration efficiency has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The main purpose of this application is to provide a heterogeneous device task migration optimization method, system, device, medium and product, aiming to optimize the task migration strategy between heterogeneous devices and improve migration efficiency.

[0004] To achieve the above objectives, the present application proposes a heterogeneous device task migration optimization method, comprising:

[0005] Adjusting the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph;

[0006] Compare the directed acyclic graph and the new directed acyclic graph to obtain migration requirements, wherein the migration requirements include migrating tasks corresponding to the task nodes from the source device to the target device;

[0007] Determine a target device context of a target device according to a migration requirement and a device context of a source device, and migrate the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of the execution device;

[0008] Mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set;

[0009] Call the device acceleration library of the target device to process the instruction task.

[0010] In one embodiment, the mapping between the task nodes and the execution devices in the preset directed acyclic graph is adjusted according to the resource status of the preset execution device, and the step of obtaining a new directed acyclic graph includes:

[0011] Vectorize resource status to generate resource vectors, and vectorize tasks corresponding to task nodes to generate task vectors;

[0012] Determine the matching degree between the execution device and the task according to the resource vector and the task vector;

[0013] Determine the mapping relationship between the execution device and the task node corresponding to the task according to the matching degree, wherein, for each task node, select the execution device with the highest matching degree with the task node to establish the mapping relationship;

[0014] Inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship;

[0015] The new directed acyclic graph is adjusted according to the optimized mapping relationship, and the step of comparing the directed acyclic graph with the new directed acyclic graph is performed according to the adjusted new directed acyclic graph.

[0016] In one embodiment, the step of inputting the mapping relationship into a preset migration cost optimization model to obtain the optimized mapping relationship includes:

[0017] If there are multiple mapping relationships, the mapping relationships are input into a preset migration cost optimization model, and the total migration cost of the multiple mapping relationships is output;

[0018] The mapping relationship is optimized by the strategy of minimizing the total migration cost to obtain the optimized mapping relationship.

[0019] In one embodiment, the step of calling the device acceleration library of the target device to process the instruction task includes:

[0020] Calculate the performance metrics of each device acceleration library of the target device;

[0021] Call the device acceleration library with the highest performance index to process the instruction task.

[0022] In one embodiment, before the step of mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set, the step includes:

[0023] Transmitting a source device context of the source device from a memory space of the source device to a shared memory space through a preset data channel, wherein the source device and the target device share the memory space;

[0024] Determine a target device context in the shared memory space according to the migration requirement and the source device context;

[0025] Transfers the target device context in the shared memory space to the target device's memory space.

[0026] In one embodiment, the step of obtaining the migration requirement includes:

[0027] Decompose the migration requirements and tasks of task nodes into foreground tasks and background tasks. Foreground tasks are critical tasks that need to be executed immediately to ensure real-time and continuity, while background tasks are auxiliary tasks that can be processed in asynchronous mode and do not affect the main process.

[0028] While the foreground task is executed on the target device, the background task is processed in the background of the target device by utilizing the idle resources of the target device.

[0029] In addition, to achieve the above purpose, the present application also proposes a heterogeneous device task migration optimization system, which includes:

[0030] A graph management module adjusts the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution devices to obtain a new directed acyclic graph;

[0031] A migration requirement management module compares the directed acyclic graph and the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating tasks corresponding to the task nodes from the source device to the target device;

[0032] A device context management module determines a target device context of a target device according to a migration requirement and a device context of a source device, and migrates the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of an execution device;

[0033] An instruction set mapping module maps the task corresponding to the task node to an instruction task adapted to the instruction set of the target device;

[0034] The device acceleration module calls the device acceleration library of the target device to process the instruction task.

[0035] In addition, to achieve the above-mentioned purpose, the present application also proposes a heterogeneous device task migration optimization device, the device including: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the heterogeneous device task migration optimization method as described above.

[0036] In addition, to achieve the above-mentioned purpose, the present application also proposes a medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the heterogeneous device task migration optimization method as described above are implemented.

[0037] In addition, to achieve the above-mentioned purpose, the present application also provides a product, which is a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, the steps of the heterogeneous device task migration optimization method as described above are implemented.

[0038] One or more technical solutions proposed in this application have at least the following technical effects:

[0039] The present application adjusts the mapping between the task nodes and the execution devices in a preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph, thereby dynamically optimizing task allocation, ensuring that tasks are scheduled to devices with more sufficient resources and higher execution efficiency, and improving overall system performance and resource utilization; comparing the directed acyclic graph with the new directed acyclic graph to obtain migration requirements, wherein the migration requirements include migrating the tasks corresponding to the task nodes from the source device to the target device, and determining the priority and order of migration to ensure that key tasks can obtain the required resources first and reduce the system overhead and delay caused by the migration; determining the target device context of the target device according to the migration requirements and the device context of the source device, and moving the target device to the target device. The context is migrated to the target device, where the device context includes the computing unit, memory capacity, data format of the execution device, and the environment configuration and dependencies required for task execution, ensuring that the task can run seamlessly on the target device and avoiding errors caused by context mismatch; mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set, further improving the execution efficiency of the task on the target device through instruction-level optimization, and reducing the performance loss caused by instruction translation and simulation; calling the device acceleration library of the target device to process the instruction task, making full use of the hardware acceleration capabilities of the target device, such as GPU parallel computing, dedicated hardware accelerators, etc., to achieve rapid processing of tasks and improve the overall performance of the system. Through the above steps, this application not only solves the problem of resource waste and low execution efficiency caused by unreasonable task allocation, but also achieves efficient execution of tasks and maximum utilization of resources through refined migration strategies and task adaptation. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0041] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0042] Figure 1 This is a flow chart of the first embodiment of the heterogeneous device task migration optimization method of the present application;

[0043] Figure 2 A schematic diagram of a scenario for a heterogeneous device task migration optimization method of this application;

[0044] Figure 3 This is a flow chart of the second embodiment of the heterogeneous device task migration optimization method of the present application;

[0045] Figure 4 This is a schematic diagram of the module structure of the heterogeneous device task migration optimization system according to an embodiment of the present application;

[0046] Figure 5 Schematic diagram of the device structure of the hardware operating environment involved in the heterogeneous device task migration optimization method in the embodiment of the present application.

[0047] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0048] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0049] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0050] It should be noted that the execution subject of this embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, a terminal system, etc. The following takes the system as an example to illustrate this embodiment and the following embodiments.

[0051] Based on this, this embodiment provides a heterogeneous device task migration optimization method, referring to Figure 1 , Figure 1This is a flow chart of the heterogeneous device task migration optimization method of the present application. The heterogeneous device task migration optimization method includes steps S10 to S50:

[0052] Step S10, adjusting the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph;

[0053] It should be noted that the preset execution device refers to the hardware device that is pre-set to execute the task, such as a server, computer, etc. The resource status is the current resource usage of the execution device, including computing power, memory usage, etc. A directed acyclic graph is a data structure consisting of nodes and directed edges without cycles, which is used to represent the dependency relationship between tasks. A task node is a node in a directed acyclic graph, representing a specific task or operation.

[0054] The system will adjust the predefined directed acyclic graph according to the resource status of each preset execution device (such as memory usage, etc.). Each task node in the directed acyclic graph originally has a mapping relationship with a certain execution device, indicating that the task should be executed on this device. Now, according to the resource status, these mapping relationships will be readjusted to obtain a new directed acyclic graph. The mapping relationship between task nodes and execution devices in the new directed acyclic graph reflects the task allocation after resource optimization.

[0055] Exemplarily, the directed acyclic graph can be represented by formula (1):

[0056] G=(V,E), V={task node}, E={dependency} Formula (I)

[0057] Among them, G is a directed acyclic graph, V represents the set of task nodes, and E represents the dependency set of task nodes.

[0058] Adjusting the directed acyclic graph according to the resource status of the execution device can be expressed by formula (II):

[0059] G 迁移后 =f(G 迁移前 ,S d ) Formula (II)

[0060] Among them, G 迁移前 represents the original directed acyclic graph, S d Indicates the resource status of the target device, G 迁移后 represents a new directed acyclic graph, f(G 迁移前 ,S d ) represents a function that adjusts the directed acyclic graph according to the resource status.

[0061] Step S20, comparing the directed acyclic graph and the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating the task corresponding to the task node from the source device to the target device;

[0062] It should be noted that the migration requirement is the requirement to transfer a task from the current execution device to another execution device. The source device is the execution device where the task is currently located. The target device is the execution device to which the task will be migrated.

[0063] The system compares the original DAG and the newly generated DAG to find out which task nodes have been migrated. This is usually achieved by comparing the positions of the same task nodes in the two DAGs. If a task node is found to be in a different position in the two DAGs, it means that the task needs to be migrated. The migration requirement will clearly indicate that the task is migrated from the source device to the target device.

[0064] For example, refer to Figure 2 , migrate tasks from the source device to the target device according to migration requirements.

[0065] Step S30, determining a target device context of the target device according to the migration requirement and the device context of the source device, and migrating the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of the execution device;

[0066] It should be noted that the device context is the current configuration and status information of the execution device, such as the computing unit status, memory capacity, data format, etc.

[0067] The system determines the target device context of the target device based on the migration requirements and the device context of the source device. The device context contains the current configuration and status information of the execution device. This information is necessary for task migration to ensure that the task can be executed correctly on the target device. Therefore, the system needs to migrate the device context of the source device to the target device. This usually involves copying and converting data to ensure that the target device can understand and process this data.

[0068] Exemplarily, the device context is expressed as formula (III)

[0069] C d =(c1,c2,…,c n ) Formula (III)

[0070] Among them, C d Indicates the device context, c1 to c n Indicates the computing unit, memory capacity, data format, etc. of device 1 to device n.

[0071] The migration process of device context is expressed as formula (IV)

[0072] C t =f(C s ,T) Formula (IV)

[0073] Among them, C s Indicates the source device context, C t represents the target device context, T represents the migration task requirement, f(C s ,T) indicates that C s ,T is a function of the variable.

[0074] Step S40, mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set;

[0075] It should be noted that an instruction set is a set of instructions that can be understood and executed by an execution device.

[0076] The system maps the tasks corresponding to the task nodes to instruction tasks that are adapted to the target device instruction set. Since different execution devices may use different instruction sets, the tasks need to be converted into instruction formats that the target device can understand and execute. This process usually involves steps such as compilation and linking to ensure that the generated instruction tasks are compatible with the hardware and software environment of the target device.

[0077] Exemplarily, the rule of the task mapping instruction is expressed as formula (V)

[0078] O v → d Formula (V)

[0079] Among them, O v is the task of the task node, τ d To adapt the instruction set to the target device.

[0080] Step S50, calling the device acceleration library of the target device to process the instruction task.

[0081] It should be noted that the device acceleration library is a library that comes with the execution device and is used to accelerate the processing of specific types of tasks.

[0082] The system will call the device acceleration library of the target device to process the instruction task. The device acceleration library is a library that comes with the execution device and is used to accelerate the processing of specific types of tasks. It contains algorithms and data structures optimized for device hardware, which can significantly improve the processing speed of tasks. By calling these libraries, the system can fully utilize the performance advantages of the target device and quickly complete task processing.

[0083] This embodiment adjusts the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph, thereby dynamically optimizing task allocation, ensuring that tasks are scheduled to devices with more sufficient resources and higher execution efficiency, and improving overall system performance and resource utilization; comparing the directed acyclic graph with the new directed acyclic graph to obtain migration requirements, wherein the migration requirements include migrating the tasks corresponding to the task nodes from the source device to the target device, and determining the priority and order of migration, ensuring that key tasks can obtain the required resources first, and reducing the system overhead and delay caused by the migration; determining the target device context of the target device according to the migration requirements and the device context of the source device, and moving the target device to the target device; The context is migrated to the target device, wherein the device context includes the computing unit, memory capacity, data format of the execution device, and the environment configuration and dependencies required for task execution, to ensure that the task can run seamlessly on the target device and avoid errors caused by context mismatch; the task corresponding to the task node is mapped to an instruction task adapted to the target device instruction set, and through instruction-level optimization, the execution efficiency of the task on the target device is further improved, and the performance loss caused by instruction translation and simulation is reduced; the device acceleration library of the target device is called to process the instruction task, and the hardware acceleration capabilities of the target device are fully utilized, such as GPU parallel computing, dedicated hardware accelerators, etc., to achieve fast processing of tasks and improve the overall performance of the system. Through the above steps, this embodiment not only solves the problem of resource waste and low execution efficiency caused by unreasonable task allocation, but also achieves efficient execution of tasks and maximum utilization of resources through refined migration strategies and task adaptation.

[0084] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the first embodiment can be referred to the above introduction, and will not be repeated in the following. Figure 3 , after step S10, steps A10 to A50 are also included:

[0085] Step A10, vectorizing the resource status to generate a resource vector, and vectorizing the task corresponding to the task node to generate a task vector;

[0086] It should be noted that the resource vector quantifies the resource status and expresses it in vector form, and each component represents the status of a resource, such as CPU usage, memory usage, etc. The tasks corresponding to the task nodes are quantified and expressed in vector form to obtain the task vector, and each component can represent the specific attributes and task volume of the task.

[0087] Step A20, determining the matching degree between the execution device and the task according to the resource vector and the task vector;

[0088] It should be noted that the matching degree refers to the degree of matching between the execution device and the task, which is used to evaluate whether the execution device is suitable for processing a specific task.

[0089] The system uses resource vectors and task vectors to calculate the match between the execution device and the task requirements. This match is an evaluation indicator used to measure whether the execution device is suitable for processing a specific task. The calculation of the match may involve multiple factors, such as resource availability, task demand for resources, task priority, etc.

[0090] Exemplarily, the matching degree calculation formula is expressed as formula (VI)

[0091]

[0092] Among them, S d is the resource vector, T t is the demand vector, S d ·T t is the dot product of two vectors, ‖S d ‖·‖T t ‖ is the product of the moduli of two vectors. The value range of formula (VI) is between [-1,1]. When S d and T t When the directions are exactly the same, the matching degree is 1, indicating that the equipment resources fully meet the task requirements. d and T t When the direction is completely opposite, the matching degree is -1, indicating that the equipment resources do not match the task requirements at all. d and T t When completely vertical, the matching degree is 0, indicating that the equipment resources have no correlation with the task requirements.

[0093] Step A30, determining a mapping relationship between an execution device and a task node according to the matching degree, wherein, for each task node, selecting an execution device with the highest matching degree with the task node to establish a mapping relationship;

[0094] Based on the matching degree of the tasks corresponding to the execution devices and task nodes, the system will determine the mapping relationship between the execution devices and task nodes. This mapping relationship indicates which tasks should be migrated to which execution devices for execution. This step is the core of task migration, which determines the efficiency and effect of migration.

[0095] For example, assume there is a distributed computing system with three execution devices (A, B, C) and five task nodes (T1, T2, T3, T4, T5). Device A: A high-performance computing server that is good at processing compute-intensive tasks and currently has a low load. Device B: A memory-optimized server with a large amount of memory, suitable for processing data-intensive tasks, and currently has a medium load. Device C: An I / O-optimized server with fast network bandwidth and storage speed, suitable for processing I / O-intensive tasks, and currently has a high load. Task T1: A compute-intensive task that requires a large amount of computing resources. Task T2: A data-intensive task that requires processing a large amount of data. Task T3: An I / O-intensive task that requires frequent reading and writing of disks. Task T4: Similar to T1, but with a slightly smaller amount of computing. Task T5: Similar to T2, but with a slightly smaller amount of data processing.

[0096] The system calculates the match based on the resource capabilities of each device and the requirements of each task. For example: Device A is a good match for task T1 because A is good at processing compute-intensive tasks and is currently underloaded. Device B is also a good match for task T2 because B has a large amount of memory and is suitable for processing data-intensive tasks. Device C may be a poor match for task T3 because C is currently underloaded and is not suitable for processing I / O-intensive tasks (although it is optimized in this regard).

[0097] Based on these matches, the system might decide to: Map task T1 to device A. Map task T2 to device B. Map task T3 to another device that is better suited for I / O-intensive tasks (if such a device exists in the system), or if it has to choose, it might choose A or B, which has a lower load, although this is not the best choice. Map tasks T4 and T5 to A and B, respectively, because they are similar to T1 and T2, but have slightly smaller resource requirements. With such mappings, the system can ensure that tasks are scheduled to execute on the devices that are most suitable for them, thereby improving overall system performance and efficiency.

[0098] Step A40, inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship;

[0099] It should be noted that the migration cost optimization model is a mathematical model used to calculate the optimal task migration plan based on the migration requirements and the resource status of the execution device to minimize the migration cost.

[0100] After obtaining the preliminary mapping relationship, the system will input it into the preset migration cost optimization model. This model will calculate the optimal task migration plan based on the migration requirements and the resource status of the execution device to minimize the migration cost. The migration cost may include data transmission cost, device startup cost, task interruption cost, etc.

[0101] Step A50, adjusting the new directed acyclic graph according to the optimized mapping relationship, and performing a step of comparing the directed acyclic graph with the new directed acyclic graph according to the adjusted new directed acyclic graph.

[0102] Based on the optimized mapping relationship, the system adjusts the new directed acyclic graph (DAG) to reflect the new state of the task after migration. Then, the system continues to compare the directed acyclic graph with the new directed acyclic graph to ensure that the task allocation after migration is reasonable and there are no missed or duplicated tasks. This process may be iterated multiple times until the optimal task migration solution is found.

[0103] This embodiment embodies the idea of ​​determining the task migration optimization plan based on the resource vector and the demand vector, by quantifying the resource status and migration demand, calculating the matching degree, and using the migration cost optimization model to obtain the optimal migration plan. This method can significantly improve the efficiency and effect of task migration and optimize resource utilization.

[0104] In a feasible implementation manner, step A40 further includes steps B10 to B20:

[0105] Step B10: if there are multiple mapping relationships, input the mapping relationships into a preset migration cost optimization model, and output a total migration cost of the multiple mapping relationships;

[0106] It should be noted that the total migration cost is the total cost required to perform task migration, which is calculated based on the migration cost optimization model, including but not limited to the costs caused by factors such as data transmission volume, device resource consumption, and task interruption time.

[0107] The system will calculate the migration cost of the current mapping relationship based on the preset migration cost optimization model. This migration cost is the total cost after comprehensively considering multiple factors such as the data transmission cost of multiple mapping relationships, device startup cost, task interruption time cost, etc. The migration cost optimization model will calculate the corresponding migration cost based on different migration plans (a migration plan includes multiple mapping relationships) and output the cost value.

[0108] Step B20, optimizing the mapping relationship by a strategy of minimizing the total migration cost to obtain an optimized mapping relationship.

[0109] The system will adopt a strategy to optimize the mapping relationship to minimize the migration cost. This strategy may include a variety of methods, such as greedy algorithms, dynamic programming, heuristic search, etc. The specific strategy to be adopted depends on the specific form of the migration cost optimization model, the constraints of task migration, and the optimization goal of the system. During the optimization process, the system will continuously adjust the mapping relationship, try different task migration schemes, and calculate the migration cost of each scheme. By comparing these cost values, the system can find the scheme with the lowest migration cost, that is, the optimal mapping relationship. Finally, the system will apply the optimized mapping relationship to the actual task migration process. In this way, the task can be migrated to the appropriate execution device according to the optimal mapping relationship, thereby minimizing the cost of task migration.

[0110] Exemplarily, the strategy of minimizing migration cost is expressed as formula (VII)

[0111]

[0112] Among them, C ij represents the migration cost of migrating a task from source device i to target device j, x ij It represents the allocation of tasks from source device i to target device j, where n is the number of source devices and m is the number of target devices.

[0113] For example, suppose we have a distributed computing system with four execution devices (D1, D2, D3, D4) and five task nodes to be executed (T1, T2, T3, T4, T5). There are multiple possible mapping relationships between these task nodes and execution devices, that is, different tasks can be executed on different devices. The initial mapping relationship is as follows: Mapping relationship 1: T1→D1, T2→D2, T3→D3, T4→D4, T5→D1; Mapping relationship 2: T1→D2, T2→D3, T3→D4, T4→D1, T5→D2.

[0114] For each mapping relationship, input it into the migration cost optimization model, and the model will output the total migration cost of the mapping relationship. For example, the total migration cost of mapping relationship 1 may be 100 units (assuming a comprehensive calculation based on the above factors). The total migration cost of mapping relationship 2 may be 120 units.

[0115] Because the goal is to find a mapping relationship that minimizes the total migration cost. Therefore, the system will compare the total migration costs of all mapping relationships and select the one with the lowest cost as the optimized mapping relationship. For example, if the total migration cost of mapping relationship 1 is the lowest, the system will select T1→D1, T2→D2, T3→D3, T4→D4, and T5→D1 as the optimized mapping relationships.

[0116] This embodiment embodies the idea of ​​calculating and optimizing the task migration plan through the migration cost optimization model. By comprehensively considering multiple migration cost factors and using the strategy optimization method to adjust the mapping relationship, the system can find a migration plan with the lowest cost, thereby improving the efficiency and effect of task migration.

[0117] Based on the first or second embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those in the first or second embodiment can be referred to the above introduction, and will not be described in detail later. Step S50 also includes steps C10 to C20:

[0118] Step C10, calculating the performance index of each device acceleration library of the target device;

[0119] It should be noted that the device acceleration library is a software library optimized for a specific target device and used to accelerate the execution of instruction tasks. These libraries may contain efficient algorithm implementations, hardware-specific optimization codes, etc. Performance indicators are quantitative indicators that measure the performance of the device acceleration library when processing specific instruction tasks, such as execution speed, resource utilization, power consumption, etc.

[0120] The system will evaluate the performance of each device acceleration library of the target device and calculate its performance indicators. This process may involve running a series of benchmark tests or simulation tasks to measure the performance of each device acceleration library when processing these tasks. Performance indicators can be multifaceted, including but not limited to execution speed (i.e., how fast the task is processed), resource utilization (such as the occupation of resources such as the central processing unit, memory, bandwidth, etc.), power consumption (i.e., the power consumed when executing tasks), etc. These performance indicators will serve as the basis for the subsequent selection of device acceleration libraries.

[0121] Step C20, calling the device acceleration library with the highest performance index to process the instruction task.

[0122] Based on the calculated performance indicators, the system will select the device acceleration library with the highest performance indicator to process the instruction task. This process may involve weighing and comparing multiple performance indicators to determine which device acceleration library has the best overall performance. For example, if execution speed is the most important performance indicator, the system may select the device acceleration library with the fastest execution speed; if power consumption is a key factor, the system may select the device acceleration library with the lowest power consumption while considering other performance indicators to ensure the acceptability of overall performance. Finally, the system calls the selected device acceleration library to process the instruction task. This calling process may involve passing the instruction task to the device acceleration library and waiting for it to return the processing result. Since the device acceleration library has been optimized for the target device, it can be expected to have higher efficiency and performance when processing instruction tasks.

[0123] Exemplarily, the device acceleration library selection rule is expressed as formula (eight)

[0124] M(O v )=argmax k {P k Formula (8)

[0125] Among them, M(O v ) is the optimal device acceleration library, each k (k is a positive integer greater than 1) corresponds to a different device acceleration library, P k For the performance of the device acceleration library, the device acceleration library with the highest performance index can be determined as the optimal device acceleration library through formula (8).

[0126] This embodiment embodies the idea of ​​calculating the performance index of the device acceleration library and selecting the optimal device acceleration library to process the instruction task. This method can ensure that the performance and resources of the target device can be fully utilized when processing the instruction task, thereby improving the efficiency and performance of the overall system.

[0127] In a feasible implementation manner, the heterogeneous device task migration optimization method further includes steps D10 to D20:

[0128] Step D10, transferring the source device context of the source device from the memory space of the source device to the shared memory space through a preset data channel, wherein the source device and the target device share the memory space;

[0129] It should be noted that in this embodiment, different devices (such as CPU, GPU, etc.) share the same memory space, and the source device and the target device can access the same memory address without data copying, thereby simplifying memory management and optimizing data transmission.

[0130] It should be noted that the preset data channel is a path or mechanism for transmitting data between a source device and a target device. This channel may be physical (such as a bus, a network cable) or logical (such as a software-defined communication protocol).

[0131] Step D20, determining a target device context in the shared memory space according to the migration requirement and the source device context;

[0132] Step D30, transferring the target device context in the shared memory space to the memory space of the target device.

[0133] The system applies a unified memory management model to adjust the memory space of the source device and the target device. This process involves configuring a memory management unit (MMU) or similar hardware / software component to ensure that the source device and the target device can access the same memory space. In this embodiment, the source device and the target device can share the memory address space, which means that they can directly access and modify the same memory area without data copying or additional memory allocation.

[0134] Combining data prefetching and caching mechanisms can further optimize memory access efficiency and reduce data transmission latency. For example, based on the historical access pattern and prediction model of the task, intelligently determine which data should be prefetched. Introduce machine learning algorithms to analyze the data access pattern of the task and dynamically adjust the prefetch strategy. Build a cache system with multiple levels (such as L1, L2, and L3 caches) to fully utilize the speed and capacity advantages of storage devices at different levels. Optimize cache replacement algorithms (such as LRU, LFU, etc.) for different types of data and tasks to improve cache hit rates. Improve data locality (i.e., the continuity and compactness of data in memory) by optimizing data structures and algorithms to reduce the probability of cache misses. Use loop unrolling, array transposition and other technologies to improve data access patterns to make them more consistent with cache access characteristics. Implement cache synchronization mechanisms between heterogeneous devices to ensure data consistency between multiple devices. Use high-speed network interfaces and protocols (such as PCIe, NVLink, etc.) to accelerate data transmission between devices.

[0135] The system transfers data between the source device and the target device in the memory space through a preset data channel. Since the source device and the target device have been configured with a unified memory space, they can directly read and write data in this shared memory space. The preset data channel can be a high-speed, low-latency communication path, such as a PCIe bus (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) or a DMA (Direct Memory Access) controller. This channel is responsible for transferring data from the memory space of the source device to the memory space of the target device without copying the data through the central processor or other intermediate devices.

[0136] Exemplarily, the transmission time model is expressed as formula (IX)

[0137]

[0138] Among them, T 传输 is the transmission time, D is the data volume, B is the transmission bandwidth, and L is the transmission delay.

[0139] The transmission time model after optimizing the transmission through the data channel is expressed as formula (X)

[0140]

[0141] Among them, T 数据通道 Optimize the transmission time after transmission for the data channel, B 数据通道 Optimize the transmission bandwidth after transmission for the data channel.

[0142] This embodiment takes advantage of the unified memory management model, simplifies memory management and optimizes data transmission. By allowing the source device and the target device to directly access the same memory space, the system reduces the need for data replication and reduces the latency and overhead of data transmission. In addition, the preset data channel provides an efficient and reliable data transmission mechanism to ensure the integrity and consistency of the data.

[0143] In a feasible implementation manner, the heterogeneous device task migration optimization method further includes steps E10 to E20:

[0144] Step E10, decomposing the migration requirements and the tasks of the task nodes into foreground tasks and background tasks, wherein the foreground tasks are key tasks that need to be executed immediately to ensure real-time and continuity, and the background tasks are auxiliary tasks that can be processed in an asynchronous mode and do not affect the main process;

[0145] It should be noted that the asynchronous mode is a mode in which tasks can be executed independently and in parallel without blocking the main thread or the foreground task execution. Asynchronous tasks in the asynchronous mode are generally used to process operations that take a long time and do not need to be completed immediately. The background tasks of this embodiment can also be referred to as asynchronous tasks relative to the foreground tasks. In this embodiment, the background tasks refer to tasks that handle data transmission and context switching to ensure that the migration process has no blocking effect on the foreground tasks. The foreground tasks refer to other tasks except data transmission and context switching.

[0146] The system will decompose the migration requirements and tasks of the task nodes. This decomposition process involves detailed analysis and division of tasks to determine which tasks can be executed asynchronously and can be used as background tasks, and which tasks need to be completed immediately and need to be used as foreground tasks.

[0147] Step E20, while the foreground task is being executed on the target device, the background task is processed in the background of the target device by utilizing the idle resources of the target device.

[0148] After the foreground tasks and background tasks are determined, the system will process these background tasks in parallel in the background while the foreground tasks are executed. Foreground tasks are usually closely related to user interaction and require high real-time performance and response speed. Background tasks are completed independently and in parallel without blocking the execution of foreground tasks. This processing method can significantly improve the overall performance and user experience of the system. Specifically, foreground tasks may involve interface operations and data display for interaction with users. These tasks require immediate response to maintain a good user experience. Background tasks may involve time-consuming operations such as data calculation, storage, and transmission. These operations can be performed asynchronously to avoid blocking the execution of foreground tasks.

[0149] Exemplarily, the task time model is expressed as formula (XI)

[0150] T 总 =max(T 迁移 ,T 执行 ) Formula (XI)

[0151] Among them, T 迁移 is the time required for the migration task, T 执行 The time required to perform the task, T 总 is the total time required.

[0152] The event flow is expressed as formula (XII)

[0153] ε={e1,e2,…,e n}Formula (12)

[0154] Among them, ε represents a migration task, e1 to e n Represents a step of a migration task.

[0155] Furthermore, message queues and event-driven architectures can be introduced to better manage the execution and communication of asynchronous tasks. For example, according to the requirements of the task and the characteristics of the system, select appropriate message queue middleware (such as RabbitMQ, Kafka, etc.). Configure the persistence, load balancing and fault tolerance mechanisms of the message queue to ensure the reliability of the message and the stability of the system. Design an event-driven task scheduler to trigger the execution of tasks based on events. Use technologies such as priority queues and work-stealing algorithms to optimize the scheduling and execution efficiency of tasks. Introduce monitoring tools to track the execution status and progress of asynchronous tasks in real time. Design retry mechanisms, timeout handling and error recovery strategies to deal with abnormal situations in task execution. Implement event communication mechanisms between heterogeneous devices to ensure the consistency and synchronization of events between multiple devices. Use the distributed characteristics of message queues to implement event broadcasting and subscription across devices.

[0156] Through this embodiment, the system can more effectively utilize resources and improve the efficiency of task execution. At the same time, since the asynchronous task is executed in the background, it will not interfere with the normal progress of the foreground task, thereby ensuring the stability of the system and user experience.

[0157] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the heterogeneous device task migration optimization method of the present application. More forms of simple transformations based on this technical concept are all within the scope of protection of the present application.

[0158] This application also provides a heterogeneous device task migration optimization system, please refer to Figure 4 , the heterogeneous device task migration optimization system includes:

[0159] The graph management module 10 adjusts the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution devices to obtain a new directed acyclic graph;

[0160] The migration requirement management module 20 compares the directed acyclic graph and the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating the task corresponding to the task node from the source device to the target device;

[0161] The device context management module 30 determines the target device context of the target device according to the migration requirement and the device context of the source device, and migrates the target device context to the target device, wherein the device context includes the computing unit, memory capacity, and data format of the execution device;

[0162] The instruction set mapping module 40 maps the task corresponding to the task node to an instruction task adapted to the instruction set of the target device;

[0163] The device acceleration module 50 calls the device acceleration library of the target device to process the instruction task.

[0164] The heterogeneous device task migration optimization system provided by the present application adopts the heterogeneous device task migration optimization method in the above embodiment, which can optimize the task migration strategy between heterogeneous devices and improve the migration efficiency. Compared with the prior art, the beneficial effects of the heterogeneous device task migration optimization system provided by the present application are the same as the beneficial effects of the heterogeneous device task migration optimization method provided by the above embodiment, and other technical features in the heterogeneous device task migration optimization system are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0165] The present application provides a heterogeneous device task migration optimization device, which includes: at least one processor; and a memory that is communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the heterogeneous device task migration optimization method in the above-mentioned embodiment one.

[0166] Reference below Figure 5 , which shows a schematic diagram of the structure of a heterogeneous device task migration optimization device suitable for implementing the embodiment of the present application. The heterogeneous device task migration optimization device in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 5 The heterogeneous device task migration optimization device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0167] like Figure 5As shown, the heterogeneous device task migration optimization device may include a processing device 1001 (such as a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. Various programs and data required for the operation of the heterogeneous device task migration optimization device are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems may be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 1003 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 1009. The communication device 1009 may allow the heterogeneous device task migration optimization device to communicate wirelessly or wired with other devices to exchange data. Although the figure shows a heterogeneous device task migration optimization device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.

[0168] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0169] The heterogeneous device task migration optimization device provided by the present application adopts the heterogeneous device task migration optimization method in the above embodiment, which can optimize the task migration strategy between heterogeneous devices and improve the migration efficiency. Compared with the prior art, the beneficial effects of the heterogeneous device task migration optimization device provided by the present application are the same as the beneficial effects of the heterogeneous device task migration optimization method provided by the above embodiment, and the other technical features in the heterogeneous device task migration optimization device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0170] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0171] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0172] The present application provides a medium, which is a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the heterogeneous device task migration optimization method in the above-mentioned embodiment.

[0173] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0174] The computer-readable storage medium may be included in the heterogeneous device task migration optimization device; or may exist independently without being assembled into the heterogeneous device task migration optimization device.

[0175] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by the heterogeneous device task migration optimization device, the heterogeneous device task migration optimization device:

[0176] Adjusting the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph;

[0177] Compare the directed acyclic graph and the new directed acyclic graph to obtain migration requirements, wherein the migration requirements include migrating tasks corresponding to the task nodes from the source device to the target device;

[0178] Determine a target device context of a target device according to a migration requirement and a device context of a source device, and migrate the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of the execution device;

[0179] Mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set;

[0180] Call the device acceleration library of the target device to process the instruction task.

[0181] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0182] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0183] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0184] The readable storage medium provided in this application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned heterogeneous device task migration optimization method, and can optimize the task migration strategy between heterogeneous devices and improve migration efficiency. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as the beneficial effects of the heterogeneous device task migration optimization method provided in the above-mentioned embodiment, and will not be repeated here.

[0185] The present application also provides a product, which is a computer program product, including a computer program, and when the computer program is executed by a processor, the steps of the heterogeneous device task migration optimization method as described above are implemented.

[0186] The computer program product provided by the present application can optimize the task migration strategy between heterogeneous devices and improve the migration efficiency. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the heterogeneous device task migration optimization method provided by the above embodiment, which will not be repeated here.

[0187] The above are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect application in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A heterogeneous device task migration optimization method, characterized in that: The heterogeneous device task migration optimization method comprises: Adjusting the mapping between the task nodes in the preset directed acyclic graph and the execution device according to the resource status of the preset execution device to obtain a new directed acyclic graph; Comparing the directed acyclic graph with the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating the task corresponding to the task node from the source device to the target device; Determine a target device context of the target device according to the migration requirement and the device context of the source device, and migrate the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of the execution device; Mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set; The device acceleration library of the target device is called to process the instruction task.

2. The heterogeneous device task migration optimization method according to claim 1, characterized in that: The step of adjusting the mapping between the task nodes in the preset directed acyclic graph and the execution device according to the resource status of the preset execution device to obtain a new directed acyclic graph includes: Vectorizing the resource status to generate a resource vector, and vectorizing the task corresponding to the task node to generate a task vector; Determining a matching degree between the execution device and the task according to the resource vector and the task vector; Determine the mapping relationship between the execution device and the task node corresponding to the task according to the matching degree, wherein, for each of the task nodes, select the execution device with the highest matching degree with the task node to establish a mapping relationship; Inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship; The new directed acyclic graph is adjusted according to the optimized mapping relationship, and the step of comparing the directed acyclic graph with the new directed acyclic graph is performed based on the adjusted new directed acyclic graph.

3. The heterogeneous device task migration optimization method according to claim 2, characterized in that: The step of inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship includes: If there are multiple mapping relationships, input the mapping relationships into a preset migration cost optimization model, and output a total migration cost of the multiple mapping relationships; The mapping relationship is optimized by a strategy of minimizing the total migration cost to obtain an optimized mapping relationship.

4. The heterogeneous device task migration optimization method according to claim 1, characterized in that: The step of calling the device acceleration library of the target device to process the instruction task comprises: Calculate the performance index of each device acceleration library of the target device; The device acceleration library with the highest performance index is called to process the instruction task.

5. The heterogeneous device task migration optimization method according to claims 1 to 4, characterized in that: The step of mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set includes: Transmitting the source device context of the source device from the memory space of the source device to the shared memory space through a preset data channel, wherein the source device and the target device share the shared memory space; Determining the target device context in the shared memory space according to the migration requirement and the source device context; The target device context in the shared memory space is transferred to the memory space of the target device.

6. The heterogeneous device task migration optimization method according to any one of claims 1 to 5, characterized in that: The step of obtaining the migration requirement includes: Decomposing the migration requirements and the tasks of the task nodes into foreground tasks and background tasks, wherein the foreground tasks are key tasks that need to be executed immediately to ensure real-time and continuity, and the background tasks are auxiliary tasks that can be processed in asynchronous mode and do not affect the main process; While the foreground task is executed on the target device, the background task is processed in the background of the target device by utilizing the idle resources of the target device.

7. A heterogeneous device task migration optimization system, characterized in that: The heterogeneous device task migration optimization system includes: A graph management module, which adjusts the mapping between the task nodes in the preset directed acyclic graph and the execution device according to the resource status of the preset execution device to obtain a new directed acyclic graph; A migration requirement management module compares the directed acyclic graph and the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating the task corresponding to the task node from the source device to the target device; a device context management module, which determines a target device context of the target device according to the migration requirement and the device context of the source device, and migrates the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of the execution device; An instruction set mapping module maps the task corresponding to the task node to an instruction task adapted to the instruction set of the target device; The device acceleration module calls the device acceleration library of the target device to process the instruction task.

8. A heterogeneous device task migration optimization device, characterized in that: The heterogeneous device task migration optimization device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the heterogeneous device task migration optimization method as described in any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the heterogeneous device task migration optimization method according to any one of claims 1 to 6.

10. A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the steps of the heterogeneous device task migration optimization method according to any one of claims 1 to 6 are implemented.

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