Test method and device applied to Nand Flash controller cache reading and medium

By setting cache read time standards and constructing multiple test scenarios, the problem that the existing technology is difficult to cover complex application scenarios is solved, and detailed verification and testing of the cache read function of the NAND Flash controller is realized, improving the accuracy and flexibility of the test.

CN119782062AActive Publication Date: 2025-04-08SHANDONG SINOCHIP SEMICON CO LTD
6 Cites 0 Cited by

Patent Information

Application Number
CN202411850243.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-16
Publication Date
2025-04-08
Estimated Expiration
2044-12-16

AI Technical Summary

Technical Problem

The existing cache read test method is difficult to cover complex practical application scenarios, such as the random read and write concurrency of multi-plan and tests across different luns and pages, and lacks flexibility.

Method used

By setting cache read time standards, including single plane and multi-plane read time standards, multiple test scenarios are constructed, such as mixed read and write of the same lun, different lun reads, different plane reads, and different page reads, and the correctness of the cache read function is ensured through result verification.

Benefits of technology

This method can more accurately test the cache read function of the NAND Flash controller, covers a variety of practical application scenarios, improves the accuracy and flexibility of testing, and ensures data accuracy and performance improvement in cache hits and misses.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

The invention relates to the field of storage, in particular to a test method and device applied to Nand Flash controller cache reading and a medium. According to the method, a cache reading time standard is set, a test scene is constructed, a result is returned, and the result is verified. In the stage of setting the cache reading time standard, the time reference for reading data from the cache is obtained through multiple times of reading of the same lumn. In the test scene construction stage, different read-write operations are sent according to actual application scenes. And in a result returning stage, processing the data returned by the NFC so as to carry out next analysis. And in a result verification stage, judging whether the returned data is read from the cache or not, and generating a visual report. According to the method, whether the flash memory controller can effectively read data from the cache or not can be verified, and the reading performance and the data access speed of the NAND Flash storage system are improved.
Need to check novelty before this filing date? Find Prior Art