A method, device, equipment and medium for DDR dynamic frequency switching in an SSD service scenario

Abstract

The application discloses a DDR dynamic frequency switching method and device in an SSD service scene, equipment and a medium, relates to the technical field of DDR frequency switching, and comprises the following steps: enabling a frequency switching mode, wherein the DDR SDRAM ensures that instructions before the frequency switching mode is enabled are normally completed, and the instructions after the frequency switching mode is enabled are introduced into a system public RAM; obtaining configuration parameters of a target frequency point and configuring the configuration parameters of the target frequency point into the DDR SDRAM; after the DDR SDRAM is started, the frequency switching mode is configured to exit the enabling, wherein the system public RAM ensures that the instructions before the frequency switching mode exits the enabling can be normally completed, and the instructions after the frequency switching mode exits the enabling are all sent to the DDR SDRAM; in the embodiment of the application, the access to the DDR SDRAM does not need to be turned off throughout the process, and the DDR SDRAM does not need to be reinitialized, so that the efficiency of frequency switching is greatly improved, the DDR SDRAM fast frequency switching operation is realized, and the power consumption is reduced while the part access requirements of the system are ensured.

Description

Technical Field

[0001] This invention relates to the field of DDR frequency switching technology, and in particular to a method, apparatus, device and medium for dynamic DDR frequency switching in SSD business scenarios. Background Technology

[0002] DDR SDRAM (Double Data Rate Synchronous Dynamic Random-Access Memory) reduces power consumption through dynamic frequency switching. A typical strategy is that when an SoC system determines that reducing the DDR SDRAM operating frequency is necessary to lower system power consumption, the system controller first disables access to the DDR SDRAM. After all system access to the DDR SDRAM is complete, the entire system enters an IDLE state. At this point, the system controller begins frequency switching and initialization at the new DDR SDRAM operating frequency. Only after initialization at the new frequency is complete can the system controller release access restrictions on the DDR SDRAM from each module, allowing the system to access the DDR SDRAM afterward.

[0003] This method requires disabling access to DDR SDRAM and re-initializing DDR SDRAM. Such a complete frequency switching process typically takes milliseconds or even seconds. During this time, the entire system cannot access DRAM at all, otherwise the system may deadlock. This method will cause the system to be disconnected for a long time, which cannot meet the requirements of dynamic frequency switching. Summary of the Invention

[0004] This invention provides a method, apparatus, device, and medium for dynamic DDR frequency switching in SSD business scenarios, aiming to solve at least one of the technical problems mentioned in the background art.

[0005] In a first aspect, embodiments of the present invention provide a method for dynamic DDR frequency switching in an SSD business scenario, comprising:

[0006] Enable frequency switching mode, where DDR SDRAM ensures that instructions before frequency switching mode is enabled are completed normally, and instructions after frequency switching mode is enabled are loaded into the system common RAM;

[0007] Obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0008] After the DDR SDRAM is booted up, the frequency switching mode is configured to be de-enabled. The system common RAM ensures that instructions before the frequency switching mode is de-enabled can be completed normally, and instructions after the frequency switching mode is de-enabled are sent to the DDR SDRAM.

[0009] A further technical solution is that the method further includes:

[0010] Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0011] If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, the step of enabling the frequency switching mode is executed.

[0012] A further technical solution is that, before enabling the frequency switching mode, the method includes:

[0013] The DDR SDRAM is initialized based on each frequency point to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0014] The configuration parameters for each frequency point of the DDR SDRAM are stored in a preset storage location.

[0015] A further technical solution is that obtaining the configuration parameters of the target frequency point includes:

[0016] The configuration parameters of the target frequency point are read from the preset storage location.

[0017] A further technical solution is that after the instruction is loaded into the system common RAM after the frequency switching mode is enabled, the system common RAM can only respond to the system instruction after the DDR SDRAM interaction is completed.

[0018] A further technical solution is that after all instructions after the frequency switching mode is de-enabled are sent to the DDR SDRAM, the DDR SDRAM can only respond to the system's instructions after ensuring that the system's common RAM completes the instructions before the frequency switching mode is de-enabled and that the data in the system's common RAM is transferred to the DDR SDRAM.

[0019] A further technical solution is that when the configuration parameters of the target frequency point are configured into the DDR SDRAM, the external PLL is switched to the output clock corresponding to the target frequency point.

[0020] Secondly, embodiments of the present invention also provide a DDR dynamic frequency switching device for SSD business scenarios, which includes a unit for performing the above-described method.

[0021] Thirdly, embodiments of the present invention also provide a computer device, which includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the above-described method.

[0022] Fourthly, embodiments of the present invention also provide a computer-readable storage medium storing a computer program that, when executed by a processor, can implement the above-described method.

[0023] This invention provides a method, apparatus, device, and medium for dynamic DDR frequency switching in SSD business scenarios. The method includes: enabling a frequency switching mode, wherein the DDR SDRAM ensures that instructions before the frequency switching mode is enabled complete normally, and instructions after the frequency switching mode is enabled are imported into the system common RAM; obtaining configuration parameters for a target frequency point and configuring these parameters into the DDR SDRAM; after the DDR SDRAM starts up, configuring the frequency switching mode to exit the enabled state, wherein the system common RAM ensures that instructions before the frequency switching mode exits the enabled state complete normally, and instructions after the frequency switching mode exits the enabled state are all sent to the DDR SDRAM; by importing instructions into the system common RAM and having it take over, and directly configuring the DDR SDRAM based on the configuration parameters of the target frequency point, the entire process does not require disabling access to the DDR SDRAM or re-initializing it, thereby greatly improving the efficiency of frequency switching, achieving fast frequency switching operation for the DDR SDRAM, reducing power consumption while ensuring some system access needs are met. Attached Figure Description

[0024] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 A flowchart illustrating a dynamic frequency switching method for DDR in an SSD business scenario provided by an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram illustrating an application scenario of a DDR dynamic frequency switching method in an SSD business scenario provided by an embodiment of the present invention.

[0027] Figure 3 This is a schematic block diagram of a computer device provided in an embodiment of the present invention. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0030] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0031] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0032] As used in this specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrases "if determined" or "if [described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [described condition or event] is detected," or "in response to detection of [described condition or event]."

[0033] Please see Figure 1 and Figure 2 , Figure 1 This is a schematic flowchart illustrating the DDR dynamic frequency switching method in an SSD business scenario provided by an embodiment of the present invention. Figure 2 This is a schematic diagram illustrating the application scenario of the DDR dynamic frequency switching method in the SSD business scenario provided in this embodiment of the invention. Figure 2 The modules in the document are described below:

[0034] 1. MASTER0~MASTERn: Access the source module of DDR SDRAM;

[0035] 2. DATA MUX: Access path selection unit, which realizes path selection and data takeover for access from MASTER to DDR SDRAM;

[0036] 3. PLL: Clock generation module, supplying the clock required for DDR SDRAM operation;

[0037] 4. PLL DMUX: A module for selecting the input clock of DDR SDRAM, selecting the required frequency point to DDR SDRAM to achieve a fast frequency switching process;

[0038] 5. DDR SDRAM CONTROLLER: The controller unit for accessing DDR SDRAM;

[0039] 6. DDR SDRAM: DDR cache unit, used to cache external data;

[0040] 7. SYSTEM RAM: System common RAM, which enables the takeover of system access data during dynamic frequency switching.

[0041] In this embodiment of the invention, in addition to being compatible with the traditional frequency switching mode, a takeover operation for bandwidth access is added to achieve fast frequency switching during bandwidth access. Since the capacity of SYSTEM RAM is generally not large, prolonged access to this module may lead to insufficient performance. Therefore, a MUX selection is also implemented at the output of the PLL to achieve fast switching of the input clock, reducing the time for fast frequency switching and meeting the requirement for dynamic frequency switching and power reduction of DDR SDRAM during bandwidth access. Figure 2 In this context, vld is the data validity flag; FREQ1 / FREQ2 corresponds to two different operating frequencies; Fast_freq_mode is the frequency selection signal for FREQ1 / FREQ2; and path1 / 2 / 3 represents three different access paths.

[0042] Accordingly, this invention provides a method for dynamic DDR frequency switching in SSD business scenarios. See also... Figure 1 and combined Figure 2 The method includes the following steps:

[0043] S1 enables frequency switching mode. DDR SDRAM ensures that instructions before frequency switching mode is enabled are completed normally, and instructions after frequency switching mode is enabled are loaded into the system common RAM.

[0044] In practice, when dynamic screen switching is required, the screen switching mode is enabled (achieved by configuring the Fast_freq_mode signal). At this time, the DDR SDRAM ensures that the instructions before the frequency switching mode is enabled can be completed normally. The instructions after the frequency switching mode is enabled will be imported into the system common RAM (Path2), but the system common RAM cannot return any response at this time.

[0045] Specifically, after the instructions are loaded into the system common RAM after the frequency switching mode is enabled, the system common RAM can only respond to the system instructions after the DDR SDRAM interaction is completed, thereby avoiding data access errors. After all instructions have been interacted with in the DDR SDRAM, the entire system access is taken over by the system common RAM (Path 2).

[0046] In some embodiments, before step S1, the method further includes the following steps: determining whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold; if the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, executing the step of enabling the frequency switching mode.

[0047] In specific implementation, the power consumption threshold can be configured by those skilled in the art, and this invention does not specifically limit it. If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, it indicates that the power consumption is too high, and DDR dynamic frequency switching is required to reduce system power consumption. In this case, step S1 above is executed.

[0048] S2, obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM.

[0049] In specific implementation, the target frequency point refers to the frequency point to which the device needs to switch. For example, in this embodiment, the target frequency point is frequency point 2. In this invention, the configuration parameters of each frequency point are pre-acquired and stored in a preset storage location. Therefore, during dynamic frequency switching, the configuration parameters of the target frequency point can be read from the preset storage location, thereby improving efficiency. The preset storage location can be the system's common RAM.

[0050] Accordingly, when the configuration parameters of the target frequency point are configured into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency point. For example, in this embodiment, it switches to FREQ2. With this configuration, the PLL does not need to be locked again, reducing the system's dynamic frequency switching time.

[0051] In some embodiments, before step S2, the method further includes the following steps: initializing the DDR SDRAM based on each frequency point of the DDR SDRAM to obtain the configuration parameters of each frequency point of the DDR SDRAM; and storing the configuration parameters of each frequency point of the DDR SDRAM in a preset storage location.

[0052] Specifically, the DDR SDRAM includes frequency point 1 and frequency point 2. Upon system startup, the DDR SDRAM is initialized according to the required frequency point 1 (FREQ1, the high-speed frequency required for operation), and the initialization result (configuration parameters for frequency point 1) is placed in the system's common RAM. Then, the DDR SDRAM is initialized according to the required frequency point 2 (FREQ2, the low-frequency point set for power saving), and the initialization result (configuration parameters for frequency point 2) is placed in the system's common RAM. This allows for direct reading of the initialization result from the system's common RAM for later frequency point switching to achieve power saving, without requiring re-initialization of the DDR SDRAM.

[0053] Furthermore, the initialization result of frequency point 1 is configured into the DDR SDRAM and the system is started. After the startup is complete, the system is supported to access the DDR SDRAM (Path 1).

[0054] S3 configures the frequency switching mode to exit after the DDR SDRAM is started. The system common RAM ensures that the instructions before the frequency switching mode is exited can be completed normally, and the instructions after the frequency switching mode is exited are sent to the DDR SDRAM.

[0055] In practice, after the DDR SDRAM is started, the frequency switching mode is configured to be de-enabled. Similarly, after all the instructions after the frequency switching mode is de-enabled are sent to the DDR SDRAM, the DDR SDRAM can only respond to the system's instructions after ensuring that the system's common RAM has completed the instructions before the frequency switching mode was de-enabled and that the data in the system's common RAM has been transferred to the DDR SDRAM.

[0056] Specifically, the system's common RAM ensures that instructions before the frequency switching mode is disabled can be completed normally. Instructions after the frequency switching mode is disabled are sent to the DDR SDRAM, but the DDR SDRAM's response pin is suppressed, preventing it from returning any access results. This ensures that the system's common RAM completes all instructions before the frequency switching mode is disabled. At this point, depending on business needs, Path 3 can be selected to transfer data from the system's common RAM to the DDR SDRAM. After ensuring all data is in the DDR, the backpressure on the DDR SDRAM is released, allowing it to respond to system instructions and enabling the system to operate normally.

[0057] This invention proposes a dynamic DDR frequency switching method for SD service scenarios, comprising: enabling a frequency switching mode, wherein the DDR SDRAM ensures that instructions before the frequency switching mode is enabled complete normally, and instructions after the frequency switching mode is enabled are imported into the system common RAM; obtaining the configuration parameters of the target frequency point and configuring the configuration parameters of the target frequency point into the DDR SDRAM; configuring the frequency switching mode to exit after the DDR SDRAM starts up, wherein the system common RAM ensures that instructions before the frequency switching mode is exited complete normally, and instructions after the frequency switching mode is exited are all sent to the DDR SDRAM; by importing the instructions into the system common RAM and having the system common RAM take over, and directly configuring the DDR SDRAM based on the configuration parameters of the target frequency point, the entire process does not require shutting down access to the DDR SDRAM, nor does it require re-initializing the DDR SDRAM, thereby greatly improving the efficiency of frequency switching, realizing fast frequency switching operation of DDR SDRAM, reducing power consumption while ensuring some access needs of the system.

[0058] Corresponding to the above-described DDR dynamic frequency switching method for SSD business scenarios, this invention also provides a DDR dynamic frequency switching device for SSD business scenarios. This DDR dynamic frequency switching device for SSD business scenarios includes a unit for executing the above-described DDR dynamic frequency switching method for SSD business scenarios, and can be configured in a terminal. Specifically, the DDR dynamic frequency switching device for SSD business scenarios includes:

[0059] The enable unit is used to enable the frequency switching mode. The DDR SDRAM ensures that the instructions before the frequency switching mode is enabled are completed normally, and the instructions after the frequency switching mode is enabled are loaded into the system common RAM.

[0060] A configuration unit is used to obtain the configuration parameters of the target frequency point and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0061] The exit unit is used to configure the frequency switching mode exit enable after the DDR SDRAM has been started. The system common RAM ensures that the instructions before the frequency switching mode exit enable can be completed normally, and the instructions after the frequency switching mode exit enable are sent to the DDR SDRAM.

[0062] A further technical solution is that the DDR dynamic frequency switching device in the SSD business scenario also includes:

[0063] The judgment unit is used to determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold.

[0064] A jump unit is used to jump to the step of executing the enable frequency switching mode if the power consumption of the DDR SDRAM is greater than a preset power consumption threshold.

[0065] A further technical solution is that the DDR dynamic frequency switching device in the SSD business scenario also includes:

[0066] An initialization unit is used to initialize the DDR SDRAM based on each frequency point of the DDR SDRAM to obtain the configuration parameters of each frequency point of the DDR SDRAM.

[0067] The storage unit is used to store the configuration parameters of each frequency point of the DDR SDRAM into a preset storage location.

[0068] In some embodiments, such as this embodiment, obtaining the configuration parameters of the target frequency point includes:

[0069] The configuration parameters of the target frequency point are read from the preset storage location.

[0070] In some embodiments, such as this one, after the instructions are loaded into the system common RAM after the frequency switching mode is enabled, the system common RAM can only respond to the system instructions after ensuring that the DDR SDRAM interaction is completed.

[0071] In some embodiments, such as this one, after all instructions following the ex-enable frequency switching mode are sent to the DDR SDRAM, the DDR SDRAM can only respond to system instructions after ensuring that the system common RAM has completed the instructions before the ex-enable frequency switching mode and that the data in the system common RAM has been transferred to the DDR SDRAM.

[0072] In some embodiments, such as this one, when the configuration parameters of the target frequency are configured into the DDRSDRAM, the external PLL is switched to the output clock corresponding to the target frequency.

[0073] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the DDR dynamic frequency switching device and each unit in the above SSD business scenario can be referred to the corresponding description in the foregoing method embodiments. For the sake of convenience and brevity, it will not be repeated here.

[0074] The DDR dynamic frequency switching device in the aforementioned SSD business scenario can be implemented as a computer program, which can, for example... Figure 3 It runs on the computer device shown.

[0075] Please see Figure 3 , Figure 3 This is a schematic block diagram of a computer device 500 provided in an embodiment of this application. The computer device 500 can be a terminal or a server.

[0076] The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a system bus 501. The memory may include a non-volatile storage medium 503 and internal memory 504.

[0077] The non-volatile storage medium 503 can store an operating system 5031 and a computer program 5032. When the computer program 5032 is executed, it can cause the processor 502 to execute a DDR dynamic frequency switching method in an SSD business scenario.

[0078] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.

[0079] The internal memory 504 provides an environment for the execution of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a DDR dynamic frequency switching method in an SSD business scenario.

[0080] The network interface 505 is used for network communication with other devices. Those skilled in the art will understand that the above structure is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 500 to which the present application is applied. A specific computer device 500 may include more or fewer components than shown in the figures, or combine certain components, or have different component arrangements.

[0081] The processor 502 is used to run a computer program 5032 stored in the memory to implement the steps of the above-mentioned DDR dynamic frequency switching method in an SSD business scenario, specifically including the following steps:

[0082] Enable frequency switching mode, where DDR SDRAM ensures that instructions before frequency switching mode is enabled are completed normally, and instructions after frequency switching mode is enabled are loaded into the system common RAM;

[0083] Obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0084] After the DDR SDRAM is booted up, the frequency switching mode is configured to be de-enabled. The system common RAM ensures that instructions before the frequency switching mode is de-enabled can be completed normally, and instructions after the frequency switching mode is de-enabled are sent to the DDR SDRAM.

[0085] In some embodiments, such as this embodiment, the method further includes:

[0086] Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0087] If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, the step of enabling the frequency switching mode is executed.

[0088] In some embodiments, such as this one, the method includes the following steps before enabling the frequency switching mode:

[0089] The DDR SDRAM is initialized based on each frequency point to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0090] The configuration parameters for each frequency point of the DDR SDRAM are stored in a preset storage location.

[0091] In some embodiments, such as this embodiment, obtaining the configuration parameters of the target frequency point includes:

[0092] The configuration parameters of the target frequency point are read from the preset storage location.

[0093] In some embodiments, such as this one, after the instructions are loaded into the system common RAM after the frequency switching mode is enabled, the system common RAM can only respond to the system instructions after ensuring that the DDR SDRAM interaction is completed.

[0094] In some embodiments, such as this one, after all instructions following the ex-enable frequency switching mode are sent to the DDR SDRAM, the DDR SDRAM can only respond to system instructions after ensuring that the system common RAM has completed the instructions before the ex-enable frequency switching mode and that the data in the system common RAM has been transferred to the DDR SDRAM.

[0095] In some embodiments, such as this one, when the configuration parameters of the target frequency are configured into the DDRSDRAM, the external PLL is switched to the output clock corresponding to the target frequency.

[0096] It should be understood that in the embodiments of this application, the processor 502 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0097] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program may be stored in a storage medium, which is a computer-readable storage medium. The computer program is executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.

[0098] Therefore, the present invention also provides a storage medium. This storage medium can be a computer-readable storage medium. The storage medium stores a computer program. When executed by a processor, the computer program causes the processor to perform the steps of the above-described DDR dynamic frequency switching method in an SSD business scenario, specifically including the following steps:

[0099] Enable frequency switching mode, where DDR SDRAM ensures that instructions before frequency switching mode is enabled are completed normally, and instructions after frequency switching mode is enabled are loaded into the system common RAM;

[0100] Obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0101] After the DDR SDRAM is booted up, the frequency switching mode is configured to be de-enabled. The system common RAM ensures that instructions before the frequency switching mode is de-enabled can be completed normally, and instructions after the frequency switching mode is de-enabled are sent to the DDR SDRAM.

[0102] In some embodiments, such as this embodiment, the method further includes:

[0103] Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0104] If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, the step of enabling the frequency switching mode is executed.

[0105] In some embodiments, such as this one, the method includes the following steps before enabling the frequency switching mode:

[0106] The DDR SDRAM is initialized based on each frequency point to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0107] The configuration parameters for each frequency point of the DDR SDRAM are stored in a preset storage location.

[0108] In some embodiments, such as this embodiment, obtaining the configuration parameters of the target frequency point includes:

[0109] The configuration parameters of the target frequency point are read from the preset storage location.

[0110] In some embodiments, such as this one, after the instructions are loaded into the system common RAM after the frequency switching mode is enabled, the system common RAM can only respond to the system instructions after ensuring that the DDR SDRAM interaction is completed.

[0111] In some embodiments, such as this one, after all instructions following the ex-enable frequency switching mode are sent to the DDR SDRAM, the DDR SDRAM can only respond to system instructions after ensuring that the system common RAM has completed the instructions before the ex-enable frequency switching mode and that the data in the system common RAM has been transferred to the DDR SDRAM.

[0112] In some embodiments, such as this one, when the configuration parameters of the target frequency are configured into the DDRSDRAM, the external PLL is switched to the output clock corresponding to the target frequency.

[0113] The storage medium is a physical, non-transient storage medium, such as a USB flash drive, external hard drive, read-only memory (ROM), magnetic disk, or optical disk, or any other physical storage medium capable of storing program code. The computer-readable storage medium can be non-volatile or volatile.

[0114] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0115] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of each unit is merely a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0116] The steps in the method of this invention can be adjusted, merged, or reduced in order according to actual needs. The units in the device of this invention can be merged, divided, or reduced according to actual needs. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0117] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0118] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0119] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Since these modifications and variations fall within the scope of the claims and their equivalents, this invention also intends to include these modifications and variations.

[0120] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for dynamic DDR frequency switching in SSD business scenarios, characterized in that, include: Enable frequency switching mode. In this mode, DDR SDRAM ensures that instructions before frequency switching mode is enabled are completed normally. Instructions after frequency switching mode is enabled are loaded into the system common RAM. The system common RAM can only respond to system instructions after ensuring that the DDR SDRAM interaction is completed. After the DDR SDRAM has completed all instruction interaction, the access to the entire system is taken over by the system common RAM. Obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM; After the DDR SDRAM is booted up, the frequency switching mode is configured to be de-enabled. The system common RAM ensures that instructions before the frequency switching mode is de-enabled can be completed normally, and instructions after the frequency switching mode is de-enabled are sent to the DDR SDRAM.

2. The DDR dynamic frequency switching method in SSD business scenarios according to claim 1, characterized in that, The method further includes: Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold; If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, the step of enabling the frequency switching mode is executed.

3. The DDR dynamic frequency switching method in SSD business scenarios according to claim 1, characterized in that, Prior to enabling the frequency switching mode, the method includes: The DDR SDRAM is initialized based on each frequency point to obtain the configuration parameters of each frequency point of the DDR SDRAM; The configuration parameters for each frequency point of the DDR SDRAM are stored in a preset storage location.

4. The DDR dynamic frequency switching method in SSD business scenarios according to claim 3, characterized in that, The configuration parameters for obtaining the target frequency point include: The configuration parameters of the target frequency point are read from the preset storage location.

5. The DDR dynamic frequency switching method in SSD business scenarios according to claim 1, characterized in that, After the instructions are loaded into the system common RAM after the frequency switching mode is enabled, the system common RAM can only respond to the system instructions after the DDR SDRAM interaction is completed.

6. The DDR dynamic frequency switching method in SSD business scenarios according to claim 1, characterized in that, After all instructions following the expulsion of the frequency switching mode are sent to the DDR SDRAM, the DDR SDRAM can only respond to system instructions after ensuring that the system common RAM has completed the instructions before the expulsion of the frequency switching mode and that the data in the system common RAM has been transferred to the DDR SDRAM.

7. The DDR dynamic frequency switching method in SSD business scenarios according to claim 1, characterized in that, When the configuration parameters of the target frequency are configured into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency.

8. A DDR dynamic frequency switching device for SSD business scenarios, characterized in that, Includes a unit for performing the method as described in any one of claims 1-7.

9. A computer device, characterized in that, The computer device includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program that, when executed by a processor, can implement the method as described in any one of claims 1-7.

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