Display device

Abstract

A display device according to an embodiment of the present disclosure may include: a substrate including a display area capable of displaying an image and a non-display area outside the display area; a plurality of sub-pixels included in the display area, each of the plurality of sub-pixels including a plurality of light emitting devices; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels. The display area may include a light-transmissive first area and a second area outside the first area. The second region may include an upper region located at an upper portion of the first region and a lower region located at a lower portion of the first region. The plurality of data lines may include: a first data line passing through all of the upper region, the first region, and the lower region; an upper data line disposed in the upper region; a lower data line disposed in the lower region, and a bypass line configured to electrically connect the upper data line and the lower data line and bypass the first region.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority of Korean Patent Application No. 10 - 2023 - 0196884, filed on December 29, 2023, which is incorporated herein by reference in its entirety for all purposes as if fully set forth herein. Technical field

[0003] Embodiments of the present disclosure relate to a display device. Background art

[0004] With technological advancements, display devices can provide not only an image display function but also a photographing function and various sensing functions. Therefore, display devices need to be equipped with electronic devices such as cameras and detection sensors (which may also be referred to as light - receiving devices or sensors).

[0005] Since electronic devices can receive light from the front of the display device, the electronic devices need to be installed in positions where they can receive light. Therefore, in general display devices, cameras (i.e., camera lenses) and detection sensors are exposed to the front. As a result, the bezel of the display device may become larger or there may be significant limitations on the design of the display device. Summary of the invention

[0006] Embodiments of the present disclosure may provide a display device having a light - transmissive structure that enables electronic devices to normally receive light (e.g., visible light, infrared light, or ultraviolet light) without exposing the light - receiving electronic devices to the front.

[0007] Embodiments of the present disclosure may provide a display device capable of increasing the transmittance of an optical region (i.e., the first region) through which light can pass.

[0008] Embodiments of the present disclosure may provide a display device having a structure with a reduced metal ratio in an optical region (i.e., the first region) that can transmit light.

[0009] Embodiments of the present disclosure may provide a display device having a panel structure that can improve the detection performance of a detection sensor using light passing through an optical region (i.e., the first region).

[0010] Embodiments of the present disclosure may provide a display device having a panel structure that can improve the performance of a camera using light passing through an optical region (i.e., the first region).

[0011] A display device according to an embodiment of the present disclosure may include: a substrate including a display area capable of displaying an image and a non-display area outside the display area; a plurality of sub-pixels included in the display area, each of the plurality of sub-pixels including a plurality of light-emitting devices; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels.

[0012] The display area may include a first area capable of transmitting light and a second area located outside the first area.

[0013] The second area may include an upper area located above the first area and a lower area located below the first area.

[0014] The plurality of data lines may include: upper data lines disposed in the upper area, lower data lines disposed in the lower area, and bypass lines configured to electrically connect the upper data lines and the lower data lines and bypass the first area.

[0015] The bypass lines may include a first bypass line connected to the upper data line, a second bypass line connected to the lower data line, and a third bypass line for connecting the first bypass line and the second bypass line.

[0016] The bypass lines may include a horizontally extending horizontal bypass line and a vertically extending vertical bypass line, wherein the first bypass line and the second bypass line are horizontal bypass lines and the third bypass line is a vertical bypass line.

[0017] The horizontal bypass line may be disposed in a first metal layer, and the vertical bypass line may be disposed in a second metal layer different from the first metal layer.

[0018] Each of the plurality of light-emitting devices may include a plurality of pixel electrodes.

[0019] The plurality of pixel electrodes may include a first pixel electrode disposed in the upper area and included in a first sub-pixel, a second pixel electrode disposed in the upper area and included in a second sub-pixel, a third pixel electrode disposed in the first area and included in a third sub-pixel, a fourth pixel electrode disposed in the first area and included in a fourth sub-pixel, a fifth pixel electrode disposed in the lower area and included in a fifth sub-pixel, and a sixth pixel electrode disposed in the lower area and included in a sixth sub-pixel.

[0020] The first data line may be connected to the first sub-pixel, the third sub-pixel, and the fifth sub-pixel.

[0021] The upper data line may be connected to the second sub-pixel.

[0022] The lower data line may be connected to the sixth sub-pixel.

[0023] In a display device according to an embodiment of the present disclosure, a third pixel electrode and a fourth pixel electrode may be electrically connected to each other.

[0024] The emission colors of each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel may be the same.

[0025] Each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fifth sub-pixel, and the sixth sub-pixel may include a light-emitting device and a sub-pixel circuit for driving the light-emitting device. The sub-pixel circuit may include more than two transistors.

[0026] The fourth sub-pixel may include a light-emitting device but may not include a sub-pixel circuit. In this case, the light-emitting device of the fourth sub-pixel may be driven by the sub-pixel circuit of the third sub-pixel.

[0027] The driving current output from the sub-pixel circuit of the third sub-pixel may be supplied to the third pixel electrode and the fourth pixel electrode.

[0028] The display device according to an embodiment of the present disclosure may further include a connection line disposed in the first region and electrically connecting the third pixel electrode and the fourth pixel electrode.

[0029] The third pixel electrode, the connection line, and the fourth pixel electrode may be integrated.

[0030] The plurality of pixel electrodes may further include a seventh pixel electrode disposed in the upper region and included in the seventh sub-pixel, an eighth pixel electrode disposed in the second region and included in the eighth sub-pixel, and a ninth pixel electrode disposed in the lower region and included in the ninth sub-pixel.

[0031] The plurality of data lines may include a second data line connected to the seventh sub-pixel, the eighth sub-pixel, and the ninth sub-pixel.

[0032] The emission color of each of the seventh sub-pixel, the eighth sub-pixel, and the ninth sub-pixel may be different from the emission color of each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel.

[0033] The second data line may cross and overlap a portion (i.e., the connection line) where the second data line is connected to the third pixel electrode and the fourth pixel electrode.

[0034] For example, in the first region and the second region, the first data line and the second data line may be disposed in the same metal layer and spaced apart from each other on the same plane.

[0035] As another example, the first data line and the second data line may be disposed in the same metal layer in the second region. The first data line and the second data line may be disposed on different metal layers in at least a part of the first region.

[0036] As an example, in the second region, the first data line and the second data line may be disposed in the same metal layer and spaced apart from each other on the same plane. The first region may include a transmissive region and a non-transmissive region. The first data line and the second data line may be disposed in different metal layers and may overlap in the vertical direction in the transmissive region. The first data line and the second data line may be disposed in the same metal layer and spaced apart from each other on the same plane in the non-transmissive region.

[0037] The display device according to an embodiment of the present disclosure may further include an electronic device, which is located below the substrate, overlaps with the first region, and performs a predetermined operation using light passing through the first region.

[0038] Embodiments of the present disclosure may provide a display device including: a substrate including a display region capable of displaying an image and a non-display region outside the display region; a plurality of sub-pixels included in the display region, each of the plurality of sub-pixels including a plurality of pixel electrodes; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels.

[0039] The display region may include a first region capable of transmitting light and a second region located outside the first region.

[0040] The second region may include an upper region located above the first region and a lower region located below the first region.

[0041] The plurality of pixel electrodes may include a first pixel electrode disposed in the upper region and included in the first sub-pixel, a second pixel electrode disposed in the upper region and included in the second sub-pixel, a third pixel electrode disposed in the first region and included in the third sub-pixel, a fourth pixel electrode disposed in the first region and included in the fourth sub-pixel, a fifth pixel electrode disposed in the lower region and included in the fifth sub-pixel, and a sixth pixel electrode disposed in the lower region and included in the sixth sub-pixel.

[0042] The plurality of data lines may include: a first data line extending from the upper region through the first region to the lower region and connected to the first sub-pixel, the third sub-pixel, and the fifth sub-pixel; an upper data line disposed in the upper region and connected to the second sub-pixel; and a lower data line disposed in the lower region and connected to the sixth sub-pixel.

[0043] The third pixel electrode and the fourth pixel electrode may be electrically connected to each other.

[0044] The display device according to an embodiment of the present disclosure may further include a connection line disposed in the first region and electrically connecting the third pixel electrode and the fourth pixel electrode.

[0045] According to an embodiment of the present disclosure, a display device having a light-transmitting structure may be provided, and the light-transmitting structure enables an electronic device to normally receive light (e.g., visible light, infrared light, or ultraviolet light) without exposing the electronic device receiving the light to the front.

[0046] According to an embodiment of the present disclosure, a display device capable of increasing the transmittance of an optical region (i.e., the first region) through which light can pass may be provided.

[0047] According to an embodiment of the present disclosure, a display device having a structure with a reduced metal ratio in an optical region (i.e., the first region) capable of transmitting light may be provided.

[0048] According to an embodiment of the present disclosure, a display device having a panel structure capable of improving the detection performance of a detection sensor by using light passing through an optical region (i.e., the first region) may be provided.

[0049] According to an embodiment of the present disclosure, a display device having a panel structure capable of improving the performance of a camera by using light passing through an optical region (i.e., the first region) may be provided.

[0050] The effects of the present disclosure are not limited to the above effects, and other effects not described will be clearly understood by those skilled in the art from the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1A 、 Figure 1B and Figure 1C illustrate a display device according to an embodiment of the present disclosure.

[0052] Figure 2 illustrate a system configuration diagram of a display device according to an embodiment of the present disclosure.

[0053] Figure 3 illustrate a display panel according to an embodiment of the present disclosure.

[0054] Figure 4 illustrate a general region, a first optical region, and a second optical region in a display panel according to an embodiment of the present disclosure.

[0055] Figure 5 illustrate signal lines disposed on a display panel according to an embodiment of the present disclosure.

[0056] Figure 6 and Figure 7It is a plan view of an optical region of a display panel according to an embodiment of the present disclosure.

[0057] Figure 8 and Figure 9 is a cross-sectional view of a partial region within the optical region of a display panel according to an embodiment of the present disclosure.

[0058] Figure 10 Shows the signal intensity when receiving and processing light passing through the optical region of the display panel according to an embodiment of the present disclosure.

[0059] Figure 11 is a plan view of a display panel according to an embodiment of the present disclosure.

[0060] Figure 12 and Figure 13 is a plan view of a partial region within the optical region of a display panel according to an embodiment of the present disclosure.

[0061] Figures 14 to 18 is Figure 12 and Figure 13 a cross-sectional view of a partial region of

[0062] Figure 19 is a cross-sectional view of a connection region between a vertical bypass line and a horizontal bypass line in a display panel according to an embodiment of the present disclosure. Detailed Description of the Embodiments

[0063] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. When assigning reference numerals to components of each drawing, even when the same component is shown in different drawings, the same reference numeral may be assigned to the same component. When details of known technologies or functions make the subject matter of the present disclosure unclear, details of the known technologies or functions may be omitted. As used herein, when a component "includes", "has" another component or "consists of" another component, other components may be added to the component, unless the component "only" includes, has another component or only consists of another component. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0064] Expressions such as "first", "second", "A", "B", "(a)" and "(b)" may be used to describe components of the present disclosure. These expressions are provided only to distinguish one component from another, and the nature, order or number of the components are not limited by these expressions.

[0065] When describing the positional relationship between components, when two or more components are described as being "connected," "combined," or "engaged," the two or more components may be directly "connected," "combined," or "engaged," or another component may be interposed therebetween. Here, the other component may be included in one or more of the two or more components that are "connected," "combined," or "engaged" to each other.

[0066] When such terms such as “after,” “next,” “subsequently,” and “before” are used to describe a time flow relationship associated with components, methods of operation, and methods of manufacture, they may include non-continuous relationships unless the terms “immediately” or “directly” are used.

[0067] When a component is assigned a value or its corresponding information (eg, a grade), the value or corresponding information may be interpreted as including tolerances due to various factors (eg, process factors, internal or external influences, or noise).

[0068] Hereinafter, various embodiments of the present disclosure are described in detail with reference to the accompanying drawings.

[0069] Figure 1A , Figure 1B and Figure 1C A display device 100 according to an embodiment of the present disclosure is shown.

[0070] Reference Figure 1A , Figure 1B and Figure 1C , a display apparatus 100 according to an embodiment of the present disclosure may include a display panel 110 that displays an image and one or more electronic devices 11 and 12 .

[0071] The display panel 110 may include a display area DA that displays an image and a non-display area NDA that does not display an image. A plurality of sub-pixels and a plurality of signal lines for driving the plurality of sub-pixels may be provided in the display area DA. The non-display area NDA may be an area outside the display area DA. Various signal lines may be provided in the non-display area NDA, and various driving circuits may be connected to the non-display area NDA. The non-display area NDA may be bent so that it is not visible from the front or may be covered by a housing (not shown). The non-display area NDA may also be referred to as a frame or a frame area.

[0072] The display device 100 according to an embodiment of the present disclosure may include one or more electronic devices 11 and 12 located below the display panel 110 (ie, opposite to the viewing surface). Here, the one or more electronic devices 11 and 12 may be provided separately from the display panel 110.

[0073] One or more electronic devices 11 and 12 may be devices that receive light passing through the display panel 110 and perform a predetermined operation using the received light.

[0074] For example, one or more electronic devices 11 and 12 may include one or more of a photographing device such as a camera (i.e., an image sensor) and detection sensors such as a proximity sensor and an illuminance sensor. Here, for example, the detection sensor may be an infrared sensor.

[0075] Light required for the operation of one or more electronic devices 11 and 12 may enter the front side (i.e., the viewing side) of the display panel 110, pass through the display panel 110, and may be transmitted to one or more electronic devices 11 and 12 located below the display panel 110 (i.e., opposite to the viewing surface). For example, the light passing through the display panel 110 and required for the operation of one or more electronic devices 11 and 12 may include one or more of visible light, infrared light, and ultraviolet light.

[0076] Refer to Figure 1A 、 Figure 1B and Figure 1C , in the display panel 110 according to an embodiment of the present disclosure, the display area DA may include a general area NA and one or more optical areas OA1 and OA2. One or more optical areas OA1 and OA2 may be areas overlapping with one or more electronic devices 11 and 12.

[0077] According to Figure 1A 's example, the display area DA may include a general area NA and a first optical area OA1. Here, at least a part of the first optical area OA1 may overlap with the first electronic device 11.

[0078] According to Figure 1B 's example, the display area DA may include a general area NA, a first optical area OA1, and a second optical area OA2. In Figure 1B 's example, the general area NA may exist between the first optical area OA1 and the second optical area OA2. Here, at least a part of the first optical area OA1 may overlap with the first electronic device 11, and at least a part of the second optical area OA2 may overlap with the second electronic device 12.

[0079] According to Figure 1C 's example, the display area DA may include a general area NA, a first optical area OA1, and a second optical area OA2. In Figure 1CIn the example, the general area NA may not exist between the first optical area OA1 and the second optical area OA2. That is, the first optical area OA1 and the second optical area OA2 may be in contact with each other. Here, at least a part of the first optical area OA1 may overlap with the first electronic device 11, and at least a part of the second optical area OA2 may overlap with the second electronic device 12.

[0080] One or more optical areas OA1 and OA2 need to include both an image display structure and a light-transmitting structure. That is, since one or more optical areas OA1 and OA2 are part of the display area DA, a light-emitting area for sub-pixels for image display needs to be provided in one or more optical areas OA1 and OA2. In addition, a light-transmitting structure needs to be formed in one or more optical areas OAl and OA2 to transmit light to one or more electronic devices 11 and 12.

[0081] One or more electronic devices 11 and 12 may be located behind the display panel 110 (i.e., below the viewing surface or opposite to the viewing surface) and receive light passing through the display panel 110.

[0082] One or more electronic devices 11 and 12 may not be exposed to the front (i.e., the viewing side) of the display panel 110. Therefore, when a user views the front of the display device 110, the electronic devices 11 and 12 may be invisible to the user.

[0083] For example, the first electronic device 11 may be a camera that receives light in the visible light wavelength band (e.g., visible light), and the second electronic device 12 may be a detection sensor, such as a proximity sensor or an illuminance sensor. For example, the detection sensor may be an infrared sensor for detecting light in the infrared wavelength band (e.g., infrared rays). Alternatively, the first electronic device 11 may be a detection sensor, and the second electronic device 12 may be a camera.

[0084] Hereinafter, for the sake of convenience of explanation, a case where the first electronic device 11 is a camera and the second electronic device 12 is an infrared-based detection sensor will be exemplified. Here, the camera may be a camera lens or an image sensor.

[0085] When the first electronic device 11 is a camera, the camera may be located behind (i.e., below) the display panel 110, but may be a front camera for photographing the front direction of the display panel 110. Therefore, the user can view the viewing surface of the display panel 110 and take a photo (selfie) using a camera that is invisible to the viewing surface.

[0086] The general area NA and one or more optical areas OA1 and OA2 included in the display area DA can be areas capable of displaying images. However, the general area NA can be an area where it is not necessary to form a light-transmitting structure, and one or more optical areas OA1 and OA2 can be areas where it is necessary to form a light-transmitting structure.

[0087] Therefore, one or more optical areas OAl and OA2 need to have a light transmittance higher than a specific level, while the general area NA may not have a light transmittance or may have a low light transmittance lower than the specific level.

[0088] For example, one or more optical areas OA1 and OA2 and the general area NA can have different resolutions, sub-pixel arrangement structures, number of sub-pixels per unit area, electrode structures, line structures, electrode arrangement structures, or line arrangement structures, etc.

[0089] For example, the number of sub-pixels per unit area in one or more optical areas OA1 and OA2 can be less than the number of sub-pixels per unit area in the general area NA. That is, the resolution of one or more optical areas OA1 and OA2 can be lower than the resolution of the general area NA. Here, the meaning of the number of sub-pixels per unit area can be the same as the meaning of resolution, pixel density, or pixel integration. For example, the unit of the number of sub-pixels per unit area can be PPI (Pixels Per Inch, pixels per inch), indicating the number of pixels within 1 inch.

[0090] For example, the number of sub-pixels per unit area in the first optical area OA1 can be less than the number of sub-pixels per unit area in the general area NA. The number of sub-pixels per unit area in the second optical area OA2 can be greater than or equal to the number of sub-pixels per unit area in the first optical area OA1, and can be less than the number of sub-pixels per unit area in the general area NA.

[0091] Meanwhile, as a method of increasing the transmittance of at least one of the first optical area OA1 and the second optical area OA2, the differential pixel density design method described above can be applied. According to the differential pixel density design method, the display panel 110 can be designed such that the number of sub-pixels per unit area of at least one of the first optical area OA1 and the second optical area OA2 is less than the number of sub-pixels per unit area of the general area NA.

[0092] However, in some cases, a differential pixel size design method can be applied as another method for increasing the transmittance in at least one of the first optical region OA1 and the second optical region OA2. According to the differential pixel size design method, the display panel 110 can be designed such that the number of sub-pixels per unit area in at least one of the first optical region OA1 and the second optical region OA2 is the same as or similar to the number of sub-pixels per unit area in the general region NA, but such that the size of each sub-pixel SP (i.e., the size of the light-emitting region) provided in at least one of the first optical region OA1 and the second optical region OA2 is smaller than the size of each sub-pixel SP (i.e., the size of the light-emitting region) arranged in the general region NA.

[0093] Hereinafter, for convenience of explanation, a description will be made by assuming that the differential pixel density design method is applied among two methods (differential pixel density design method, differential pixel size design method) for increasing the transmittance in at least one of the first optical region OA1 and the second optical region OA2. Therefore, hereinafter, a small number of sub-pixels per unit area may be an expression corresponding to a small sub-pixel size, and a large number of sub-pixels per unit area may be an expression corresponding to a large sub-pixel size.

[0094] The first optical region OA1 may have various shapes, such as circular, oval, square, hexagonal, or octagonal. The second optical region OA2 may have various shapes, such as circular, oval, square, hexagonal, or octagonal. The first optical region OA1 and the second optical region OA2 may have the same shape or different shapes.

[0095] Referring to Figure 1C , in the case where the first optical region OA1 is in contact with the second optical region OA2, the entire optical region including the first optical region OA1 and the second optical region OA2 may also have various shapes, such as circular, oval, square, hexagonal, or octagonal. Hereinafter, for convenience of explanation, the case where each of the first optical region OA1 and the second optical region OA2 has a circular shape will be taken as an example.

[0096] In the display device 100 according to an embodiment of the present disclosure, if the first electronic device 11 that is not exposed to the outside and hidden at the bottom of the display panel 100 is a camera, the display device 100 according to an embodiment of the present disclosure may be referred to as a display device applying UDC (Under Display Camera) technology.

[0097] Therefore, in the display device 100 according to an embodiment of the present disclosure, it is possible to form neither a notch nor a camera hole for camera exposure in the display panel 110, so that the area of the display area DA does not decrease. Therefore, since it is not necessary to form a notch or a camera hole for camera exposure in the display panel 110, the size of the bezel area can be reduced, design limitations can be eliminated, and the degree of freedom in design can be increased.

[0098] In the display device 100 according to an embodiment of the present disclosure, although one or more electronic devices 11 and 12 are hidden behind the display panel 110, one or more electronic devices 11 and 12 need to be able to receive light normally and perform their designated functions normally.

[0099] In addition, in the display device 100 according to an embodiment of the present disclosure, although one or more electronic devices 11 and 12 are hidden behind the display panel 110 and are arranged to overlap with the display area DA, one or more optical areas OA1 and OA2 in the display area DA that overlap with one or more electronic devices 11 and 12 need to have a normal image display function.

[0100] Since the above-mentioned first optical area OA1 is designed as a transmissive area, the image display characteristics in the first optical area OA1 may be different from those in the general area NA.

[0101] In addition, when the first optical area OA1 is designed to improve the image display characteristics, there is a possibility that the transmittance of the first optical area OA1 may decrease.

[0102] Therefore, an embodiment of the present disclosure can provide a structure of the first optical area OA1 that can increase the transmittance in the first optical area OA1 while preventing image quality deviation between the first optical area OA1 and the general area NA.

[0103] In addition, in addition to the first optical area OA1, an embodiment of the present disclosure can also provide a structure of the second optical area OA2 that can improve the image quality and transmittance in the second optical area OA2.

[0104] In addition, in the display device 100 according to an embodiment of the present disclosure, the similarity between the first optical area OA1 and the second optical area OA2 is that they are both light-transmissive areas, but their usage examples may be different from each other.

[0105] Therefore, in the display device 100 according to an embodiment of the present disclosure, the structure of the first optical region OA1 is substantially similar to or the same as that of the second optical region OA2, but their resolutions, sub-pixel arrangement structures, the number of sub-pixels per unit area, electrode structures, line structures, electrode arrangement structures, or line arrangement structures may be different from each other.

[0106] Figure 2 FIG. shows a system configuration diagram of a display device 100 according to an embodiment of the present disclosure.

[0107] Referring to Figure 2 , the display device 100 may include: a display panel 110; and a display driving circuit, which is a component for displaying an image. The display driving circuit may be a circuit for driving the display panel 110, and may include a data driving circuit 220, a gate driving circuit 230, and a display controller 240.

[0108] The display panel 110 may include a display area DA for displaying an image and a non-display area NDA for not displaying an image. The non-display area NDA may be an area outside the display area DA, and may also be referred to as a border area. All or part of the non-display area NDA may be an area visible from the front of the display device 100, or may be curved and invisible from the front of the display device 100.

[0109] The display panel 110 may include a substrate SUB and a plurality of sub-pixels SP provided on the substrate SUB. In addition, the display panel 110 may further include various types of signal lines for driving the plurality of sub-pixels SP.

[0110] The display device 100 according to an embodiment of the present disclosure may be a liquid crystal display device or the like, or may be a self-luminous display device in which the display panel 110 emits light by itself. When the display device 100 according to an embodiment of the present disclosure is a self-luminous display device, each of the plurality of sub-pixels SP may include a light-emitting device. For example, the display device 100 according to an embodiment of the present disclosure may be an organic light-emitting display device in which the light-emitting device is implemented as an organic light-emitting diode (OLED). Another example is that the display device 100 according to an embodiment of the present disclosure may be an inorganic light-emitting display device in which the light-emitting device is implemented as an inorganic light-emitting diode. Still another example is that the display device 100 according to an embodiment of the present disclosure may be a quantum dot display device in which the light-emitting device is implemented using quantum dots as self-luminous semiconductor crystals.

[0111] Depending on the type of the display device 100, the structure of each of the plurality of sub-pixels SP may be different. For example, if the display device 100 is a self-emitting display device in which the sub-pixels SP emit light by themselves, each sub-pixel SP may include a light-emitting device that emits light by itself, one or more transistors, and one or more capacitors.

[0112] For example, various types of signal lines may include a plurality of data lines DL that transmit data signals (also referred to as data voltages or image signals) and a plurality of gate lines GL that transmit gate signals (also referred to as scan signals).

[0113] The plurality of data lines DL and the plurality of gate lines GL may cross each other. Each of the plurality of data lines DL may be arranged to extend in a first direction. Each of the plurality of gate lines GL may be arranged to extend in a second direction. Here, the first direction may be a column direction, and the second direction may be a row direction. Alternatively, the first direction may be a row direction, and the second direction may be a column direction. Hereinafter, for the sake of convenience of description, the case where each of the plurality of data lines DL is arranged in the column direction and each of the plurality of gate lines GL is arranged in the row direction will be taken as an example.

[0114] The data driving circuit 220 is a circuit for driving the plurality of data lines DL and connected to the plurality of data lines DL, and may output data signals to the plurality of data lines DL. The gate driving circuit 230 is a circuit for driving the plurality of gate lines GL, and may output gate signals to the plurality of gate lines GL.

[0115] The display controller 240 may be a device for controlling the data driving circuit 220 and the gate driving circuit 230, and may control the driving timings of the plurality of data lines DL and the driving timings of the plurality of gate lines GL.

[0116] The display controller 240 may supply a data driving control signal DCS to the data driving circuit 220 to control the data driving circuit 220, and may supply a gate driving control signal GCS to the gate driving circuit 230 to control the gate driving circuit 230.

[0117] The display controller 240 may receive input image data from the host system 250, and supply the image data to the data driving circuit 220 based on the input image data.

[0118] The data driving circuit 220 may receive the image data in digital form from the display controller 240, and convert the received image data into analog data signals to output to the plurality of data lines DL.

[0119] The gate driving circuit 230 may receive a first gate voltage corresponding to a conduction level voltage, a second gate voltage corresponding to a cut-off level voltage, and various gate driving control signals GCS, and may generate a gate signal and supply the generated gate signal to a plurality of gate lines GL.

[0120] For example, the data driving circuit 220 may be connected to the display panel 110 using a tape automated bonding (TAB) method, or may be connected to bonding pads of the display panel 110 using a chip on glass (COG) or chip on panel (COP) method, or may be implemented and connected to the display panel 110 using a chip on film (COF) method.

[0121] The gate driving circuit 230 may be connected to the display panel 110 using a tape automated bonding (TAB) method, or may be connected to bonding pads of the display panel 110 using a chip on glass (COG) or chip on panel (COP) method, or may be implemented and connected to the display panel 110 using a chip on film (COF) method. Alternatively, the gate driving circuit 230 may be of an in-panel gate (GIP) type and may be formed in a non-display area NDA of the display panel 110. The gate driving circuit 230 may be disposed on a substrate or connected to a substrate. That is, if the gate driving circuit 230 is of the GIP type, the gate driving circuit 230 may be disposed in the non-display area NDA of the substrate. If the gate driving circuit 230 is of the chip on glass (COG) type, chip on film (COF) type, etc., the gate driving circuit 230 may be connected to the substrate.

[0122] Meanwhile, at least one of the data driving circuit 220 and the gate driving circuit 230 may be disposed in a display area DA of the display panel 110. For example, at least one of the data driving circuit 220 and the gate driving circuit 230 may be arranged not to overlap with the sub-pixels SP, or may be arranged to partially overlap or completely overlap with the sub-pixels SP.

[0123] The data driving circuit 220 may be connected to one side (e.g., the upper side or the lower side) of the display panel 110. Depending on the driving method, panel design method, etc., the data driving circuit 220 may be connected to both sides (e.g., the upper side and the lower side) of the display panel 110, or may be connected to more than two sides among the four sides of the display panel 110.

[0124] The gate driving circuit 230 may be connected to one side (e.g., the left side or the right side) of the display panel 110. Depending on the driving method, panel design method, etc., the gate driving circuit 230 may be connected to both sides (e.g., the left side and the right side) of the display panel 110, or may be connected to more than two sides among the four sides of the display panel 110.

[0125] The display controller 240 may be implemented as a component separate from the data driving circuit 220, or may be integrated with the data driving circuit 220 and implemented as an integrated circuit.

[0126] The display controller 240 may be a timing controller used in common display technologies, or may be a control device capable of further performing other control functions including a timing controller, or may be a control device different from a timing controller, or may be a control device other than a timing controller, or may also be a circuit within a control device. The display controller 240 may be implemented using various circuits or electronic components such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a processor.

[0127] The display controller 240 may be mounted on a printed circuit board, a flexible printed circuit, etc., and may be electrically connected to the data driving circuit 220 and the gate driving circuit 230 through the printed circuit board, the flexible printed circuit.

[0128] The display controller 240 may receive signals from the data driving circuit 220 or send signals to the data driving circuit 220 according to one or more predetermined interfaces. For example, the interface may include a low voltage differential signal (LVDS) interface, an embedded clock point-to-point interface (EPI), or a serial peripheral interface (SPI).

[0129] In order to provide not only an image display function but also a touch sensing function, the display device 100 according to an embodiment of the present disclosure may include a touch sensor and a touch sensing circuit for detecting a touch by a touch object such as a finger or a pen or detecting a touch position by sensing a touch sensor.

[0130] The touch sensing circuit may include: a touch driving circuit 260 for driving and sensing a touch sensor to generate and output touch sensing data; and a touch controller 270 for detecting the occurrence of a touch or detecting a touch position using the touch sensing data.

[0131] The touch sensor may include a plurality of touch electrodes. The touch sensor may also include a plurality of touch lines for electrically connecting the plurality of touch electrodes and the touch driving circuit 260.

[0132] The touch sensor may exist in the form of a touch panel outside the display panel 110 or may exist inside the display panel 110. If the touch sensor exists in the form of a touch panel outside the display panel 110, the touch sensor may be referred to as an external type. If the touch sensor is of the external type, the touch panel and the display panel 110 may be manufactured separately and combined during the assembly process. The external touch panel may include a touch panel substrate and a plurality of touch electrodes located on the touch panel substrate.

[0133] If a touch sensor is present inside the display panel 110, the touch sensor may be formed on the substrate SUB together with signal lines and electrodes related to display driving during the manufacturing process of the display panel 110.

[0134] The touch driving circuit 260 may supply a touch driving signal to at least one of the plurality of touch electrodes and generate touch sensing data by sensing at least one of the plurality of touch electrodes.

[0135] The touch sensing circuit may perform touch sensing using a self - capacitance sensing method or a mutual - capacitance sensing method.

[0136] If the touch sensing circuit performs touch sensing using the self - capacitance sensing method, the touch sensing circuit may perform touch sensing based on the capacitance between each touch electrode and a touch object (e.g., a finger, a pen, etc.). According to the self - capacitance sensing method, each of the plurality of touch electrodes may be used as a driving touch electrode and a sensing touch electrode. The touch driving circuit 260 may drive all or part of the plurality of touch electrodes and sense all or part of the plurality of touch electrodes.

[0137] If the touch sensing circuit performs touch sensing using the mutual - capacitance sensing method, the touch sensing circuit may perform touch sensing based on the capacitance between touch electrodes. According to the mutual - capacitance sensing method, the plurality of touch electrodes may be divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit 260 may drive the driving touch electrodes and sense the sensing touch electrodes.

[0138] The touch driving circuit 260 and the touch controller 270 included in the touch sensing circuit may be implemented as separate devices or as one device. In addition, the touch driving circuit 260 and the data driving circuit 220 may be implemented as separate devices or as one device.

[0139] The display device 100 may further include a power supply circuit that supplies various types of power to the display driving circuit and / or the touch sensing circuit.

[0140] The display device 100 according to an embodiment of the present disclosure may be a mobile terminal such as a smart phone or a tablet computer, or monitors or TVs of various sizes, but is not limited thereto, and may be various types and sizes of displays capable of displaying information or images.

[0141] As described above, in the display panel 110, the display area DA may include a general area NA and one or more optical areas OA1 and OA2. The general area NA and the one or more optical areas OA1 and OA2 may be areas capable of displaying images. However, the general area NA may be an area where it is not necessary to form a light-transmitting structure, and the one or more optical areas OA1 and OA2 may be areas where it is necessary to form a light-transmitting structure.

[0142] As described above, the display area DA in the display panel 110 may include one or more optical areas OA1 and OA2 and a general area NA. However, for ease of explanation, it is assumed that the display area DA includes both a first optical area OA1 and a second optical area OA2 ( Figure 1B and Figure 1C ).

[0143] Figure 3 FIG. 110 shows a display panel according to an embodiment of the present disclosure.

[0144] Referring to Figure 3 , a plurality of sub-pixels SP may be provided in the display area DA of the display panel 110. The plurality of sub-pixels SP may be provided in the general area NA, the first optical area OA1, and the second optical area OA2 included in the display area DA.

[0145] Referring to Figure 3 , each of the plurality of sub-pixels SP may include a light-emitting device ED and a sub-pixel circuit SPC configured to drive the light-emitting device ED.

[0146] Referring to Figure 3 , the sub-pixel circuit SPC may include a driving transistor DT for driving the light-emitting device ED, a scanning transistor ST for transmitting a data voltage VDATA to the driving transistor DT, and a storage capacitor Cst for maintaining a constant voltage during one frame.

[0147] The driving transistor DT may include a first node N1, a second node N2, and a third node N3.

[0148] The first node N1 may be electrically connected to the light-emitting device ED. The second node N2 may be connected to the scanning transistor ST. The third node N3 may be connected to the driving voltage line VDDL.

[0149] The first node N1 may be electrically connected to the pixel electrode PE of the light-emitting device ED. The data voltage VDATA may be applied to the second node N2. The driving voltage VDD may be applied to the third node N3.

[0150] The first node N1 can be a source node or a drain node, the second node N2 can be a gate node, and the third node N3 can be a drain node or a source node. Hereinafter, for ease of explanation, in the driving transistor DT, the case where the first node N1 is the source node, the second node N2 is the gate node, and the third node N3 is the drain node will be taken as an example.

[0151] The light-emitting device ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE.

[0152] The pixel electrode PE can be an electrode provided in each sub-pixel SP. For example, the pixel electrode PE can be directly or indirectly (via another transistor) electrically connected to the first node N1 of the driving transistor DT of each sub-pixel SP.

[0153] The common electrode CE can be an electrode commonly provided in a plurality of sub-pixels SP. For example, the common electrode CE can be electrically connected to the base voltage line VSSL. The base voltage VSS, as a type of common driving voltage, can be applied to the common electrode CE through the base voltage line VSSL.

[0154] For example, the pixel electrode PE can be an anode, and the common electrode CE can be a cathode. Alternatively, the pixel electrode PE can be a cathode, and the common electrode CE can be an anode. Hereinafter, for ease of explanation, it is assumed that the pixel electrode PE is an anode and the common electrode CE is a cathode.

[0155] The intermediate layer EL can include a light-emitting layer EML and a common intermediate layer EL COM.

[0156] For example, the light-emitting layer EML can be provided in each of the plurality of sub-pixels SP, or in another example, can be commonly provided in the plurality of sub-pixels SP. The common intermediate layer EL COM can be commonly provided in the plurality of sub-pixels SP.

[0157] The light-emitting layer EML can be provided in each light-emitting region EA, and the common intermediate layer EL COM can be commonly provided in the plurality of light-emitting regions EA and non-light-emitting regions.

[0158] The common intermediate layer EL COM can include a first common intermediate layer COM1 and a second common intermediate layer COM2. The first common intermediate layer COM1 can be provided between the pixel electrode PE and the light-emitting layer EML, and can include at least one layer (e.g., an organic layer). The second common intermediate layer COM2 can be provided between the light-emitting layer EML and the common electrode CE, and can include at least one layer (e.g., an organic layer).

[0159] For example, the first common intermediate layer COM1 may include a hole injection layer HIL and a hole transport layer HTL. The second common intermediate layer COM2 may include an electron transport layer ETL, an electron injection layer EIL, etc.

[0160] The hole injection layer may inject holes from the pixel electrode PE into the hole transport layer, the hole transport layer may transport the holes to the light-emitting layer EML, and the electron injection layer may inject electrons from the common electrode CE into the electron transport layer, and the electron transport layer may transport the electrons to the light-emitting layer EML.

[0161] Each light-emitting device ED may include an overlapping portion of the pixel electrode PE, the light-emitting layer EML in the intermediate layer EL, and the common electrode CE. A predetermined light-emitting region EA may be formed by each light-emitting device ED. For example, the light-emitting region EA may be defined as the region where the pixel electrode PE, the light-emitting layer EML in the intermediate layer EL, and the common electrode CE overlap.

[0162] For example, the light-emitting device ED may be an organic light-emitting diode (OLED) based on organic materials, an inorganic light-emitting diode based on inorganic materials, or a quantum dot light-emitting device. In the case where the light-emitting device ED is an organic light-emitting diode, the intermediate layer EL in the light-emitting device ED may include an organic layer containing organic materials.

[0163] The on and off states of the scanning transistor ST can be controlled by a scanning signal SC (which is a kind of gate signal) applied via a scanning signal line SCL (which is a kind of gate line GL), and it can be electrically connected between the second node N2 of the driving transistor DT and the data line DL.

[0164] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DT.

[0165] As Figure 3 shown, the sub-pixel circuit SPC may have a 2T (transistor)-1C (capacitor) structure including two transistors DT and ST and one capacitor Cst, and may also include one or more transistors or one or more capacitors in some cases.

[0166] The storage capacitor Cst may be an external capacitor intentionally designed outside the driving transistor DT, rather than a parasitic capacitor (such as Cgs, Cgd) of an internal capacitor that may exist between the first node N1 and the second node N2 of the driving transistor DT. Each of the driving transistor DT and the scanning transistor ST may be an n-type transistor or a p-type transistor.

[0167] Circuit elements within each sub-pixel SP (in particular, a light-emitting device ED implemented using an organic light-emitting diode (OLED) containing an organic material) may be vulnerable to external moisture or oxygen. Therefore, an encapsulation layer ENCAP may be provided on the display panel 110 to prevent oxygen from penetrating into the circuit elements (specifically, the light-emitting device ED). The encapsulation layer ENCAP may be provided to cover the light-emitting device ED.

[0168] Referring to Figure 3 , to sense a user's touch, a display device 100 according to an embodiment of the present disclosure may include: a touch sensor layer TSL including a plurality of sensor electrodes; a touch driving circuit 260 configured to sense the plurality of sensor electrodes; and a touch controller 270 configured to use the sensing result (i.e., touch sensing data) of the touch driving circuit 260 to determine whether a touch exists or the touch coordinates.

[0169] The touch sensor layer TSL may be embedded in the display panel 110. For example, the touch sensor layer TSL may be disposed on the encapsulation layer ENCAP within the display panel 110.

[0170] The display panel 110 may further include: a plurality of touch pads TP electrically connected to the touch driving circuit 260; and a plurality of touch routing lines TL for electrically connecting the plurality of sensor electrodes included in the touch sensor layer TSL to the plurality of touch pads TP connected to the touch driving circuit 260.

[0171] Figure 4 Shows a general area NA, a first optical area OA1, and a second optical area OA2 in a display panel 110 according to an embodiment of the present disclosure.

[0172] Referring to Figure 4 , a display panel 110 according to an embodiment of the present disclosure may include a display area DA for displaying an image and a non-display area NDA for not displaying an image. The display area DA may include a first optical area OA1, a second optical area OA2, and a general area NA.

[0173] Since the first optical area OA1, the second optical area OA2, and the general area NA are included in the display area DA, they may have a display structure. For example, each of the first optical area OA1, the second optical area OA2, and the general area NA may include a plurality of light-emitting areas EA.

[0174] In addition, the first optical region OA1 and the second optical region OA2 can be regions capable of transmitting light, and the general region NA can be a region that cannot transmit light or a region with extremely low light transmittance. The general region NA can refer to the region that cannot transmit light except for the first optical region OA1 and the second optical region OA2. Here, transmitting light can mean that light passes between the front and the back of the display panel 110.

[0175] The first optical region OA1 can be a region overlapping with the first electronic device 11. The second optical region OA2 can be a region overlapping with the second electronic device 12.

[0176] Each of the first optical region OA1 and the second optical region OA2 can have a light transmission structure. However, the first optical region OA1 and the second optical region OA2 can have different structural characteristics. For example, the transmittance of the first optical region OA1 can be higher than that of the second optical region OA2. The resolution or the number of sub-pixels per unit area of the first optical region OA1 can be lower or less than the resolution or the number of sub-pixels per unit area of the second optical region OA2.

[0177] The first electronic device 11 can use the light in the first wavelength band among the light passing through the first optical region OA1 to perform a predetermined operation. The second electronic device 12 can use the light in the second wavelength band different from the first wavelength band among the light transmitted through the second optical region OA2 to perform a predetermined operation.

[0178] The first wavelength band can include one or more of the visible light wavelength band, the infrared wavelength band, and the ultraviolet wavelength band. The second wavelength band includes one or more of the visible light wavelength band, the infrared wavelength band, and the ultraviolet wavelength band, but can be different from the first wavelength band.

[0179] For example, the first electronic device 11 can be a camera, and the second electronic device 12 can be a detection sensor. The first electronic device 11 can use the light in the visible light wavelength band corresponding to the first wavelength band among the light passing through the first optical region OA1 to perform a camera operation. The second electronic device 12 can use the light in the infrared wavelength band corresponding to the second wavelength band among the light transmitted through the second optical region OA2 to perform a sensing operation.

[0180] Referring to Figure 4 , each of the first optical region OA1 and the second optical region OA2 can be circular or octagonal. However, the present disclosure is not limited thereto, and each of the first optical region OA1 and the second optical region OA2 can have various shapes, such as oval or egg-shaped, polygonal or irregular shapes.

[0181] The first optical region OA1 and the second optical region OA2 may have the same shape. Alternatively, the first optical region OA1 and the second optical region OA2 may have different shapes.

[0182] Referring to Figure 4 , the display region DA may include a plurality of light-emitting regions EA. Since the general region NA, the first optical region OA1, and the second optical region OA2 are regions included in the display region DA, each of the general region NA, the first optical region OA1, and the second optical region OA2 may include a plurality of light-emitting regions EA.

[0183] The plurality of light-emitting regions EA may include light-emitting regions that emit three or more colors of light. For example, the plurality of light-emitting regions EA may include a first-color light-emitting region that emits first-color light, a second-color light-emitting region that emits second-color light, and a third-color light-emitting region that emits third-color light.

[0184] For example, if the first color light is red light, the second color light is green light, and the third color light is blue light, the first-color light-emitting region may be referred to as a red light-emitting region EA R, the second-color light-emitting region may be referred to as a green light-emitting region EA G, and the third-color light-emitting region may be referred to as a blue light-emitting region EA B.

[0185] The red light-emitting region EA R, the green light-emitting region EA G, and the blue light-emitting region EA B may have the same size (i.e., light-emitting region size). Alternatively, at least one of the red light-emitting region EA R, the green light-emitting region EA G, and the blue light-emitting region EA B may have a size different from that of the others (i.e., light-emitting region size).

[0186] As described above, the first color, the second color, and the third color may be different colors and may be various colors. For example, the first color, the second color, and the third color may be red, green, and blue, respectively. Hereinafter, for the sake of convenience of explanation, the case where the first color is red, the second color is green, and the third color is blue will be taken as an example, however, it is not limited thereto.

[0187] In the case where the first color is red, the second color is green, and the third color is blue, among the sizes of the red light-emitting region EA R (i.e., light-emitting region size), the green light-emitting region EA G (i.e., light-emitting region size), and the blue light-emitting region EA B (i.e., light-emitting region size), the size of the blue light-emitting region EA B (i.e., light-emitting region size) may be the largest.

[0188] The light-emitting device ED provided in the red light-emitting region EAR may include a light-emitting layer EML that emits red light. The light-emitting device ED provided in the green light-emitting region EAG may include a light-emitting layer EML that emits green light. The light-emitting device ED provided in the blue light-emitting region EAB may include a light-emitting layer EML that emits blue light.

[0189] Among the light-emitting layer EML that emits red light, the light-emitting layer EML that emits green light, and the light-emitting layer EML that emits blue light, the organic materials contained in the light-emitting layer EML that emits blue light may be most susceptible to material degradation. Therefore, by designing the size of the blue light-emitting region EAB to be the largest, the current density supplied to the light-emitting device ED provided in the blue light-emitting region EAB can be minimized. Accordingly, the degree of degradation of the light-emitting device ED provided in the blue light-emitting region EAB may become close to the degree of degradation of the light-emitting device ED provided in the red light-emitting region EAR and the light-emitting device ED provided in the green light-emitting region EAG.

[0190] Accordingly, the degradation variation among the light-emitting device ED provided in the red light-emitting region EAR, the light-emitting device ED provided in the green light-emitting region EAG, and the light-emitting device ED provided in the blue light-emitting region EAB can be eliminated or reduced, thereby improving the image quality.

[0191] Referring to Figure 4 , each of the plurality of first transmission regions TA1 included in the first optical region OA1 may have various shapes, such as circular, elliptical, polygonal, or irregular shapes. Each of the plurality of second transmission regions TA2 included in the second optical region OA2 may have various shapes, such as circular, elliptical, polygonal, or irregular shapes.

[0192] The plurality of first transmission regions TA1 may have the same shape. Alternatively, a part of the plurality of first transmission regions TA1 may have a shape different from that of other first transmission regions. The plurality of second transmission regions TA2 may have the same shape. Alternatively, a part of the plurality of second transmission regions TA2 may have a shape different from that of other second transmission regions.

[0193] The first transmission region TA1 and the second transmission region TA2 may have the same shape. Alternatively, the first transmission region TA1 and the second transmission region TA2 may have different shapes.

[0194] Referring to Figure 4, the general area NA can entirely correspond to the non-transmissive area. That is, the general area NA can include the non-transmissive area NTA, and the non-transmissive area NTA includes a plurality of light-emitting areas EA. That is to say, the entire general area NA can be the non-transmissive area NTA, and the general area NA may not include the transmissive area TA.

[0195] The first optical area OA1 can also include the non-transmissive area NTA and a plurality of first transmissive areas TA1, and the non-transmissive area NTA includes a plurality of light-emitting areas EA. The non-transmissive area NTA included in the first optical area OA1 can be an area that does not transmit light, or can be an area that transmits light at a transmittance lower than that of the first transmissive area TA1.

[0196] The second optical area OA2 can also include the non-transmissive area NTA and a plurality of second transmissive areas TA2, and the non-transmissive area NTA includes a plurality of light-emitting areas EA. The non-transmissive area NTA included in the second optical area OA2 can be an area that does not transmit light, or can be an area that transmits light at a transmittance lower than that of the second transmissive area TA2.

[0197] Meanwhile, the common electrode CE can include a plurality of common electrode holes CH corresponding to a plurality of openings. The plurality of common electrode holes CH can be formed in the first optical area OA1 and the second optical area OA2. That is, the positions where the plurality of common electrode holes CH are formed can be the first optical area OA1 and the second optical area OA2.

[0198] Refer to Figure 4 , the positions where the plurality of common electrode holes CH are formed in the common electrode CE can respectively correspond to the plurality of first transmissive areas TA1 included in the first optical area OA1. Additionally, the positions where the plurality of common electrode holes CH are formed in the common electrode CE can respectively correspond to the plurality of second transmissive areas TA2 included in the second optical area OA2. Therefore, the transmittance of each of the first optical area OA1 and the second optical area OA2 can be improved.

[0199] Figure 5 Shows the signal line SL arranged on the display panel 110 according to an embodiment of the present disclosure.

[0200] Refer to Figure 5 , the display panel 110 according to an embodiment of the present disclosure can include a plurality of sub-pixels SP and a plurality of signal lines SL for driving the plurality of sub-pixels SP.

[0201] Refer to Figure 5 , each of the plurality of sub-pixels SP can include a light-emitting device ED and a sub-pixel circuit SPC for driving the light-emitting device ED. The light-emitting area EA can be formed by the light-emitting device ED.

[0202] Refer toFigure 5 , a plurality of signal lines SL can supply various driving signals required to drive a plurality of sub-pixels SP to the plurality of sub-pixels SP.

[0203] For example, the various driving signals may include a data signal VDATA for driving the data line DL and a scan signal SC for driving the gate line GL. The various driving signals may further include a driving voltage VDD for driving the driving voltage line VDDL and a base voltage VSS for driving the base voltage line VSSL connected to the common electrode CE.

[0204] Therefore, the plurality of signal lines may include a plurality of data lines DL for supplying the data signal VDATA and a plurality of gate lines GL for supplying gate signals such as the scan signal SC. The plurality of signal lines may further include a driving voltage line VDDL for supplying the driving voltage VDD and a base voltage line VSSL for supplying the base voltage VSS.

[0205] Referring to Figure 5 , the display area DA may include a general area NA, a first optical area OA1, and a second optical area OA2.

[0206] Referring to Figure 5 , each of the general area NA, the first optical area OA1, and the second optical area OA2 may include a plurality of light-emitting areas EA. Each of the general area NA, the first optical area OA1, and the second optical area OA2 may be provided with a plurality of light-emitting devices ED and a plurality of sub-pixel circuits SPC.

[0207] Referring to Figure 5 , the plurality of signal lines SL may include a plurality of general signal lines SL NA and a plurality of specific signal lines SL OA.

[0208] The plurality of general signal lines SL NA may be signal lines that are only provided in the general area NA and do not pass through the first optical area OA1 and the second optical area OA2.

[0209] The plurality of specific signal lines SL OA may be signal lines that pass through at least one of the first optical area OA1 and the second optical area OA2.

[0210] For example, the plurality of general signal lines SL NA may include a plurality of data lines DL NA and a plurality of gate lines GL NA that do not pass through the first optical area OA1 and the second optical area OA2.

[0211] For example, the plurality of specific signal lines SL OA may include a plurality of data lines DL OA and a plurality of gate lines DL OA that pass through at least one of the first optical area OA1 and the second optical area OA2.

[0212] As described above, since multiple specific signal lines SLOA pass through at least one of the first optical region OA1 and the second optical region OA2, the transmission characteristics of the first optical region OA1 and the second optical region OA2 may be affected by the multiple specific signal lines SLOA.

[0213] Meanwhile, the positions where multiple common electrode holes CH are formed in the common electrode CE may respectively correspond to the multiple first transmission regions TA1 included in the first optical region OA1. Additionally, the positions where multiple common electrode holes CH are formed in the common electrode CE may respectively correspond to the multiple second transmission regions TA2 included in the second optical region OA2. Therefore, the transmittance of each of the first optical region OA1 and the second optical region OA2 can be improved.

[0214] To further improve the transmittance of the first optical region OA1, when multiple specific signal lines SLOA pass through the first optical region OA1, the multiple specific signal lines SLOA can be arranged to bypass the multiple common electrode holes CH corresponding to the multiple first transmission regions TA1. Similarly, to further improve the transmittance of the second optical region OA2, when multiple specific signal lines SLOA pass through the second optical region OA2, the multiple specific signal lines SLOA can be arranged to bypass the multiple common electrode holes CH corresponding to the multiple second transmission regions TA2.

[0215] In this case, the multiple specific signal lines SLOA passing through at least one of the first optical region OA1 and the second optical region OA2 may have a longer line length than the multiple general signal lines SLNA that do not pass through the first optical region OA1 and the second optical region OA2.

[0216] Therefore, the multiple specific signal lines SLOA and the multiple general signal lines SLNA may have different electrical characteristics (e.g., different line resistances, different signal transmission delays, etc.). As a result, the driving characteristics between the sub-pixels SP connected to the multiple specific signal lines SLOA and the sub-pixels SP connected to the multiple general signal lines SLNA may become different, which may lead to image quality degradation.

[0217] Meanwhile, when manufacturing the display panel 110, a process for patterning the common electrode CE having multiple common electrode holes CH can be performed. In this case, if the patterning process of the common electrode CE changes, the transmittance of the multiple common electrode holes CH of the common electrode CE may change, and a transmittance difference may occur between the multiple common electrode holes CH.

[0218] Therefore, the display panel 110 according to an embodiment of the present disclosure can have a structure with reduced line characteristic deviation.

[0219] Based on the line characteristic deviation reduction structure according to an embodiment of the present disclosure, it is possible to reduce the electrical characteristic deviation (e.g., deviation of line resistance, deviation of signal transmission delay, etc.) between a plurality of specific signal lines SLOA passing through at least one of the first optical region OA1 and the second optical region OA2 and a plurality of general signal lines SLNA not passing through the first optical region OA1 and the second optical region OA2.

[0220] In addition, the display panel 110 according to an embodiment of the present disclosure may have a structure for reducing the range of transmittance change.

[0221] Based on the structure for reducing the range of transmittance change according to an embodiment of the present disclosure, even if a process change occurs, it is possible to reduce the range of transmittance change between a plurality of common electrode holes CH. Here, the plurality of common electrode holes CH may respectively correspond to a plurality of first transmission regions TA1 in the first optical region OA1 or a plurality of second transmission regions TA2 in the second optical region OA2.

[0222] Hereinafter, for convenience of explanation, the first optical region OA1 and the second optical region OA2 are referred to as the optical region OA, and the first transmission region TA1 in the first optical region OA1 and the second transmission region TA2 in the second optical region OA2 are referred to as the transmission region TA.

[0223] Hereinafter, a structure for improving the transmittance characteristics of the optical region OA of the display panel 110 according to an embodiment of the present disclosure will be described with reference to a plurality of exemplary drawings.

[0224] Figure 6 and Figure 7 are a plan view of the optical region OA of the display panel 110 according to an embodiment of the present disclosure.

[0225] The display panel 110 according to an embodiment of the present disclosure may include: a substrate SUB including a display region DA for displaying an image; a plurality of signal lines SL provided on the substrate SUB; and a common electrode CE provided on the substrate SUB.

[0226] The display region DA may include a light-transmitting optical region OA and a general region NA located outside the optical region OA. The general region NA may include a plurality of light-emitting regions EA.

[0227] The optical region OA may include a plurality of transmission regions TA and a non-transmission region NTA other than the plurality of transmission regions TA.

[0228] The non-transmission region NTA included in the optical region OA may include a plurality of light-emitting regions EA formed by a plurality of light-emitting devices ED. In addition, a plurality of sub-pixel circuits SPC may be provided in the non-transmission region NTA included in the optical region OA.

[0229] The common electrode CE may include a plurality of common electrode holes CH. The positions where the plurality of common electrode holes CH are formed may be the optical region OA. That is, the plurality of common electrode holes CH may be present in the optical region OA.

[0230] The positions of the plurality of common electrode holes CH may respectively correspond to the positions of the plurality of transmissive regions TA.

[0231] As described above, the plurality of signal lines SL may include a plurality of general signal lines SL that do not pass through the optical region OA and a plurality of specific signal lines SL_OA that pass through the optical region OA.

[0232] For example, the plurality of specific signal lines SL_OA that pass through the optical region OA may include a plurality of data lines DL. The plurality of specific signal lines SL_OA that pass through the optical region OA may include a plurality of gate lines GL.

[0233] Referring to Figure 6 , the plurality of data lines DL that pass through the optical region OA may be arranged to bypass the plurality of transmissive regions TA.

[0234] Therefore, the transmittance of the optical region OA can be improved.

[0235] Referring to Figure 7 , the plurality of data lines DL that pass through the optical region OA may be provided in at least one of the plurality of transmissive regions TA without bypassing the plurality of transmissive regions TA.

[0236] Therefore, the length deviation between the plurality of data lines DL that pass through the optical region OA and the plurality of data lines DL that do not pass through the optical region OA can be reduced, and thus the signal transmission characteristic deviation (i.e., the line characteristic deviation) can be reduced.

[0237] Referring to Figure 7 , each of the plurality of common electrode holes CH may overlap with the plurality of data lines DL that pass through the optical region OA.

[0238] Figure 6 and Figure 7 each of the plurality of common electrode holes CH shown may be triangular. However, this is only an example, and the common electrode hole CH may have various shapes.

[0239] Figure 8 and Figure 9 are cross-sectional views of partial regions within the optical region of a display panel according to an embodiment of the present disclosure. Figure 8 is a cross-sectional view taken along line A - B of Figure 6 , Figure 9 is a cross-sectional view taken along line C - D of Figure 7 .

[0240] Reference Figure 8 and Figure 9 According to embodiments of the present disclosure, the display panel 110 may include: a substrate SUB including a display area DA for displaying an image; a plurality of signal lines SL provided on the substrate SUB; and a common electrode CE provided on the substrate SUB.

[0241] Reference Figure 8 and Figure 9 The optical area OA may include a plurality of light-emitting areas EA and a plurality of transmissive areas TA.

[0242] Reference Figure 8 and Figure 9 The common electrode CE may include a plurality of common electrode holes CH. The positions of the plurality of common electrode holes CH may respectively correspond to the positions of the plurality of transmissive areas TA.

[0243] Reference Figure 8 and Figure 9 According to embodiments of the present disclosure, the display panel 110 may include: a pixel electrode PE provided in one of the plurality of light-emitting areas EA included in the optical area OA; a driving transistor DT provided in the optical area for supplying a driving current to the pixel electrode PE; a capacitor Cst provided in the optical area OA; a bank 833 provided on the pixel electrode PE and having an opening; and an intermediate layer EL provided between the bank 833 and the common electrode CE and located on a part of the pixel electrode PE through the opening of the bank 833.

[0244] The region where the pixel electrode PE, the intermediate layer EL, and the common electrode CE overlap may constitute a light-emitting device ED and may correspond to one light-emitting area EA.

[0245] The driving transistor DT and the capacitor Cst may be provided in a non-transmissive area NTA in the optical area OA other than the plurality of transmissive areas TA.

[0246] Reference Figure 8 and Figure 9 According to embodiments of the present disclosure, the display panel 110 may further include a scanning transistor ST provided in a region in the optical area OA other than the plurality of transmissive areas TA.

[0247] Reference Figure 8 and Figure 9 The scanning transistor ST may be connected to a data line DL, which is one of the plurality of specific signal lines SL OA.

[0248] Reference Figure 8 and Figure 9, the data line DL is a specific signal line SLOA among multiple specific signal lines SLOA that is connected to the scanning transistor ST, and the data line DL can be disposed within a metal layer located between the source and drain of the driving transistor DT and the pixel electrode PE.

[0249] Referring to Figure 8 and Figure 9 , the display panel 110 according to an embodiment of the present disclosure may further include: an encapsulation layer ENCAP disposed on the common electrode CE; and a touch sensor metal TSM disposed on the encapsulation layer ENCAP and located in the general area NA and the optical area OA.

[0250] Referring to Figure 8 and Figure 9 , the touch sensor metal TSM may overlap with the bank 833. Among the touch sensor metal TSM, the touch sensor metal TSM disposed in the optical area OA may be located in a non-transmissive area NTA within the optical area OA except for the plurality of light-emitting areas EA and the plurality of transmissive areas TA.

[0251] Hereinafter, the vertical structure of the display panel 110 will be described in more detail with reference to Figure 8 and Figure 9 .

[0252] Referring to Figure 8 and Figure 9 , when viewed from the vertical structure, the display panel 110 according to an embodiment of the present disclosure may include a transistor forming portion, a light-emitting device forming portion, and a packaging portion, and may further include a touch sensor portion.

[0253] Referring to Figure 8 and Figure 9 , the display panel 110 according to an embodiment of the present disclosure may include a substrate SUB, a first buffer layer 811 on the substrate SUB, a first gate insulating layer 812 on the first buffer layer 811, a first interlayer insulating layer 813 on the first gate insulating layer 812, a second buffer layer 821 on the first interlayer insulating layer 813, a second gate insulating layer 822 on the second buffer layer 821, a second interlayer insulating layer 823 on the second gate insulating layer 822, a first planarization layer 831 on the second interlayer insulating layer 823, and a second planarization layer 832 on the first planarization layer 831.

[0254] The display panel 110 according to an embodiment of the present disclosure may further include a first gate metal layer located between the first gate insulating layer 812 and the first interlayer insulating layer 813, a first source-drain metal layer located between the second interlayer insulating layer 823 and the first planarization layer 831, and a second source-drain metal layer located between the first planarization layer 831 and the second planarization layer 832.

[0255] The display panel 110 according to an embodiment of the present disclosure may further include a second gate metal layer between the first interlayer insulating layer 813 and the second buffer layer 821, and a third gate metal layer between the second gate insulating layer 822 and the second interlayer insulating layer 823.

[0256] The display panel 110 according to an embodiment of the present disclosure may further include a first active layer ACT1 between the first buffer layer 811 and the first gate insulating layer 812, and a second active layer ACT2 between the second buffer layer 821 and the second gate insulating layer 822.

[0257] Referring to Figure 8 and Figure 9 , the transistor forming portion may include a substrate SUB, a first buffer layer 811 on the substrate SUB, various transistors DT and ST, a storage capacitor Cst, and various electrodes or signal lines.

[0258] Referring to Figure 8 and Figure 9 , the substrate SUB may include a first substrate SUB1 and a second substrate SUB2, and may include an intermediate substrate layer IPD between the first substrate SUB1 and the second substrate SUB2. For example, each of the first substrate SUB1 and the second substrate SUB2 may include polyimide PI. For example, the intermediate substrate layer IPD may be an inorganic layer and may prevent moisture penetration.

[0259] Referring to Figure 8 and Figure 9 , the first buffer layer 811 may be a single layer or a multi-layer. If the first buffer layer 811 is a multi-layer, the first buffer layer 811 may include a multi-buffer layer 811a and an active buffer layer 811b.

[0260] The transistors DT and ST, the storage capacitor Cst, and various electrodes or signal lines may be formed on the first buffer layer 811.

[0261] For example, the transistors DT and ST formed on the first buffer layer 811 may be made of the same material and may be located in the same layer. Alternatively, as Figure 8 and Figure 9 shown, the driving transistor DT and the scanning transistor ST may be made of different materials and located in different layers.

[0262] Referring to Figure 8 and Figure 9 , the driving transistor DT, the scanning transistor ST, and the storage capacitor Cst may be included in a sub-pixel circuit SPC for driving a light-emitting device ED included in an optical region OA.

[0263] The scan transistor ST may include an active layer ACT1, a gate GE1, a source SE1, and a drain DE1.

[0264] The driving transistor DT may include an active layer ACT2, a gate GE2, a source SE2, and a second drain DE2.

[0265] The active layer ACT2 of the driving transistor DT may be located at a position higher than the active layer ACT1 of the scan transistor ST. According to the height of the active layer, the upper transistor and the lower transistor can be distinguished. The driving transistor DT may also be referred to as the upper transistor, and the scan transistor ST may also be referred to as the lower transistor.

[0266] The source SE1 and the drain DE1 of the scan transistor ST as the lower transistor may be located in the "first source-drain metal layer". The gate GE1 of the scan transistor ST as the lower transistor may be located in the "first gate metal layer".

[0267] The source SE2 and the drain DE2 of the driving transistor DT as the upper transistor may be located in the "first source-drain metal layer". The gate GE2 of the driving transistor DT as the upper transistor may be located in another "third gate metal layer" higher than the first gate metal layer and the second gate metal layer.

[0268] The first buffer layer 811 may be disposed under the active layer ACT1 of the scan transistor ST, and the second buffer layer 821 may be disposed under the active layer ACT2 of the driving transistor DT. That is, the active layer ACT1 of the scan transistor ST may be located on the first buffer layer 811, and the active layer ACT2 of the driving transistor DT may be located on the second buffer layer 821. Here, the second buffer layer 821 may be disposed to be higher than the first buffer layer 811.

[0269] The active layer ACT1 of the scan transistor ST may be disposed on the first buffer layer 811, and the first gate insulating layer 812 may be disposed on the active layer ACT1 of the scan transistor ST. The gate GE1 of the scan transistor ST may be disposed on the first gate insulating layer 812, and the first interlayer insulating layer 813 may be disposed on the gate GE1 of the scan transistor ST.

[0270] Here, the active layer ACT1 of the scan transistor ST may include a channel region overlapping with the gate GE1, a source connection region located on one side of the channel region, and a drain connection region located on the other side of the channel region.

[0271] The second buffer layer 821 may be disposed on the first interlayer insulating layer 813.

[0272] The active layer ACT2 of the driving transistor DT may be disposed on the second buffer layer 821, and the second gate insulating layer 822 may be disposed on the active layer ACT2 of the driving transistor DT. The gate GE2 of the driving transistor DT may be disposed on the second gate insulating layer 822, and the second interlayer insulating layer 823 may be disposed on the gate GE2 of the driving transistor DT.

[0273] Here, the active layer ACT2 of the driving transistor DT may include a channel region overlapping with the gate GE2, a source connection region on one side of the channel region, and a drain connection region on the other side of the channel region.

[0274] The source SE2 and the drain DE2 of the driving transistor DT may be disposed on the second interlayer insulating layer 823. Additionally, the source SE1 and the drain DE1 of the scanning transistor ST may be disposed on the second interlayer insulating layer 823.

[0275] The source SE1 and the drain DE1 of the scanning transistor ST may be respectively connected to the source connection region and the drain connection region of the active layer ACT1 of the scanning transistor ST through vias in the second interlayer insulating layer 823, the second gate insulating layer 822, the second buffer layer 821, the first interlayer insulating layer 813, and the first gate insulating layer 812.

[0276] The source SE2 and the drain DE2 of the driving transistor DT may be respectively connected to the source connection region and the drain connection region of the active layer ACT2 of the driving transistor DT through vias in the second interlayer insulating layer 823 and the second gate insulating layer 822.

[0277] The storage capacitor Cst may include a first capacitor electrode PLT1 and a second capacitor electrode PLT2.

[0278] The first capacitor electrode PLT1 of the storage capacitor Cst may be directly or indirectly electrically connected to the gate GE2 of the driving transistor DT, and the second capacitor electrode PLT2 of the storage capacitor Cst may be directly or indirectly electrically connected to the source SE2 of the driving transistor DT.

[0279] The first capacitor electrode PLT1 of the storage capacitor Cst may be located within a first gate metal layer made of a first gate metal. The second capacitor electrode PLT2 of the storage capacitor Cst may be located within a second gate metal layer made of a second gate metal.

[0280] Meanwhile, the lower metal BML may be disposed under the active layer ACT2 of the driving transistor DT. The lower metal BML may overlap with all or a part of the active layer ACT2 of the driving transistor DT. The lower metal BML may include the second gate metal of the second gate metal layer.

[0281] For example, the lower metal BML can be electrically connected to the gate GE2 of the driving transistor DT. As another example, the lower metal BML can be used as a light-shielding portion that blocks light from below. In this case, the lower metal BML can be electrically connected to the source SE2 of the driving transistor DT.

[0282] Referring to Figure 8 and Figure 9 , the first planarization layer 831 can be disposed on the driving transistor DT and the scanning transistor ST. That is, the first planarization layer 831 can be disposed on the source SE2 and drain DE2 of the driving transistor DT and the source SE1 and drain DE1 of the scanning transistor ST.

[0283] Referring to Figure 8 and Figure 9 , the second source-drain metal layer can be present between the first planarization layer 831 and the second planarization layer 832.

[0284] The source SE2 of the driving transistor DT and the pixel electrode PE of the light-emitting device ED can be electrically connected through a relay pattern formed in the second source-drain metal layer.

[0285] Referring to Figure 8 and Figure 9 , the data line DL passing through the transmissive region TA can be formed within the second source-drain metal layer. That is, the data line DL passing through the transmissive region TA can include the second source-drain metal.

[0286] Referring to Figure 8 and Figure 9 , the active layer ACT2 of the driving transistor DT as the upper transistor and the active layer ACT1 of the scanning transistor ST as the lower transistor can include different semiconductor materials.

[0287] For example, the active layer ACT2 of the driving transistor DT as the upper transistor can include an oxide semiconductor material. For example, the oxide semiconductor material can include indium gallium zinc oxide (IGZO), indium gallium zinc tin oxide (IGZTO), zinc oxide (ZnO), cadmium oxide (CdO), indium oxide (InO), zinc tin oxide (ZTO), or zinc indium tin oxide (ZITO), etc.

[0288] For example, the active layer ACT1 of the scanning transistor ST as the lower transistor can include a semiconductor material different from the active layer ACT2 of the driving transistor DT as the upper transistor.

[0289] For example, the active layer ACT1 of the scanning transistor ST as the lower transistor can include a silicon-based semiconductor material. For example, the silicon-based semiconductor material can include low-temperature polycrystalline silicon (LTPS).

[0290] Reference Figure 8 and Figure 9 The light-emitting device forming part may be located on the second planarization layer PNL2.

[0291] The light-emitting device forming part may include a light-emitting device ED formed on the second planarization layer PNL2. The light-emitting device ED may be disposed in the optical region OA.

[0292] Reference Figure 8 and Figure 9 The light-emitting device ED may be formed by overlapping the pixel electrode PE, the intermediate layer EL, and the common electrode CE. That is, the light-emitting device ED may be the overlapping part of the pixel electrode PE, the intermediate layer EL, and the common electrode CE.

[0293] The pixel electrode PE may be disposed on the second planarization layer 832.

[0294] The bank 833 may be disposed on the pixel electrode PE.

[0295] The bank 833 may include a plurality of bank holes, and a part of the pixel electrode PE may be exposed through the plurality of bank holes. That is, the plurality of bank holes formed in the bank 833 may overlap with a part of the pixel electrode PE.

[0296] The intermediate layer EL may be disposed on the bank 833. The intermediate layer EL may contact a part of the pixel electrode PE through the bank holes.

[0297] At least one spacer may be present between the intermediate layer EL and the bank 833. The spacer may include the same material as the bank 833.

[0298] The common electrode CE may be disposed on the intermediate layer EL. The common electrode CE may include a plurality of common electrode holes CH. A plurality of common electrode holes CH formed in the common electrode CE may be disposed in the optical region OA.

[0299] The position of the common electrode hole CH may correspond to the position of the transmission region TA.

[0300] Reference Figure 8 The position of the data line DL may avoid the position of the transmission region TA. Therefore, the data line DL does not exist in the transmission region TA.

[0301] Reference Figure 9 The data line DL may be disposed to pass through the transmission region TA. Therefore, the data line DL may exist in the transmission region TA. For example, the data line DL may be a transparent line including a transparent material.

[0302] Reference Figure 8 and Figure 9, the encapsulation part may be located on the cathode CE. The encapsulation part may include an encapsulation layer ENCAP formed on the common electrode CE.

[0303] The encapsulation layer ENCAP may be a layer capable of preventing moisture or oxygen from penetrating into the light-emitting device ED disposed below the encapsulation layer ENCAP. Specifically, the encapsulation layer ENCAP may prevent moisture or oxygen from penetrating into the intermediate layer EL that may include an organic layer. Here, the encapsulation layer ENCAP may be formed of a single layer or multiple layers.

[0304] The encapsulation layer ENCAP may include a first encapsulation layer 841, a second encapsulation layer 842, and a third encapsulation layer 843.

[0305] For example, the encapsulation layer ENCAP may include alternating inorganic layers and organic layers. In this case, for example, the first encapsulation layer 841 and the third encapsulation layer 843 may be inorganic layers, and the second encapsulation layer 842 may be an organic layer. In the case where the second encapsulation layer 842 includes an organic layer, the second encapsulation layer 842 may serve as a planarization layer.

[0306] Meanwhile, the display panel 110 according to an embodiment of the present disclosure may have a built-in touch sensor or an embedded touch sensor. In this case, the display panel 110 according to an embodiment of the present disclosure may include a touch sensor layer TSL on the encapsulation layer ENCAP.

[0307] The touch sensor layer TSL may include a touch sensor metal TSM and a bridge metal BRG, and may also include an insulation layer configuration, such as a sensor buffer layer 851, a sensor interlayer insulation layer 852, and a sensor protection layer 853.

[0308] The sensor buffer layer 851 may be disposed on the encapsulation layer ENCAP.

[0309] The bridge metal BRG may be disposed on the sensor buffer layer 851, and the sensor interlayer insulation layer 852 may be disposed on the bridge metal BRG.

[0310] The touch sensor metal TSM may be disposed on the sensor interlayer insulation layer 852. A part of the touch sensor metal TSM in the touch sensor metal TSM may be connected to the corresponding bridge metal BRG through a hole in the sensor interlayer insulation layer 852.

[0311] The touch sensor metal TSM and the bridge metal BRG may be disposed in the general area NA and the non-transmissive area NTA in the optical area OA.

[0312] When the display panel 110 has a top-emitting structure, when the touch sensor metal TSM and the bridge metal BRG are placed in the non-transmissive area NTA in the optical area OA, the touch sensor metal TSM and the bridge metal BRG can be arranged not to overlap with the light-emitting area EA of the non-transmissive area NTA.

[0313] A plurality of touch sensor metals TSM can form a touch electrode (or a touch electrode line), and can be arranged in a mesh and electrically connected. A part of the touch sensor metal TSM and another part of the touch sensor metal TSM can be electrically connected through the bridge metal BRG to form a touch electrode (or a touch electrode line).

[0314] The sensor protection layer 853 can be provided to cover the touch sensor metal TSM and the bridge metal BRG.

[0315] Meanwhile, if the display panel 110 is of a type including a built-in touch sensor, at least a part of the touch sensor metal TSM located on the encapsulation layer ENCAP in the display area DA can extend and be provided along the outer inclined surface of the encapsulation layer ENCAP, and can be electrically connected to a pad located more outside than the outer inclined surface of the encapsulation layer ENCAP. Here, the pad can be provided in the non-display area NDA and can be a metal pattern electrically connected to the touch driving circuit 260.

[0316] Refer to Figure 8 and Figure 9 , the display device 100 according to an embodiment of the present disclosure may include an electronic device 800 located below the substrate SUB and overlapping with the optical area OA. The electronic device 800 can be one of the first electronic device 11 and the second electronic device 12 (as Figure 1A , Figure 1B and Figure 1C shown).

[0317] The electronic device 800 can perform a determined operation according to the first light in the first wavelength band among the light transmitted and received through the optical area OA. For example, the first wavelength band can correspond to the visible light wavelength band or the infrared wavelength band.

[0318] Figure 10 Shows the signal intensity when receiving and processing the light passing through the optical area OA of the display panel 110 according to an embodiment of the present disclosure.

[0319] Refer to Figure 10 , the light incident on the upper surface of the display panel 110 can be transmitted (i.e., pass through) the optical area OA of the display panel 110, and can be received by the electronic device 800 located below the display panel 110 and overlapping with the optical area OA.

[0320] The electronic device 800 may perform a predetermined operation using the received light.

[0321] According to the amount of light received by the electronic device 800, the performance and quality of the operation performed by the electronic device 800 may vary.

[0322] As an example, if the electronic device 800 is an infrared sensor for detecting nearby objects, the performance and quality of the sensing operation performed using infrared rays may vary according to the amount of infrared rays penetrating the optical region OA of the display panel 110.

[0323] The amount of infrared rays penetrating the optical region OA of the display panel 110 may correspond to the intensity or value of the point spread function (PSF). Here, the intensity of the point spread function may correspond to the signal intensity of the infrared rays during the reception process of the electronic device 800. The intensity of the point spread function may be an index of the detection performance of the infrared sensor.

[0324] If the metal ratio in the optical region OA increases, that is, if the transmittance of the optical region OA decreases, the intensity of the point spread function (as an index of the detection performance of the infrared sensor) may also decrease.

[0325] If the metal ratio in the optical region OA decreases, that is, if the transmittance of the optical region OA increases, the intensity of the point spread function (as an index of the detection performance of the infrared sensor) may also increase.

[0326] As another example, in the case where the electronic device 800 is an image sensor or a camera, the performance and quality of the camera operation performed using visible light may vary according to the amount of visible light penetrating the optical region OA of the display panel 110.

[0327] The amount of visible light penetrating the optical region OA of the display panel 110 may correspond to the intensity or value of the modulation transfer function (MTF). Here, the value of the modulation transfer function may correspond to the signal intensity of the visible light during the reception process of the electronic device 800. Here, the value of the modulation transfer function may be an index of the camera performance and may represent the level of sharpness.

[0328] If the metal ratio in the optical region OA increases, that is, if the transmittance of the optical region OA decreases, the value of the modulation transfer function (as an index of the camera performance) may also decrease.

[0329] If the metal ratio in the optical region OA decreases, that is, if the transmittance of the optical region OA increases, the value of the modulation transfer function (as an index of the camera performance) may increase.

[0330] Hereinafter, a transmittance improvement structure of the optical region OA of the display panel 110 according to an embodiment of the present disclosure will be described. The transmittance improvement structure of the optical region OA may include a structure capable of reducing the metal ratio in the optical region OA.

[0331] Hereinafter, for convenience of description, the optical region OA will be referred to as the first region OA, and the general region NA will be referred to as the second region NA.

[0332] Figure 11 is a plan view of the display panel 110 according to an embodiment of the present disclosure.

[0333] Referring to Figure 11 , the display panel 110 according to an embodiment of the present disclosure may include: a substrate SUB including a display area DA capable of displaying an image and a non-display area NDA outside the display area DA; a plurality of sub-pixels SP included in the display area DA and each including a plurality of light-emitting devices ED; and a plurality of data lines DL for supplying data signals for image display to the plurality of sub-pixels SP.

[0334] Referring to Figure 11 , the display area DA may include a first region OA capable of transmitting light and a second region NA located outside the first region OA. The second region NA may include an upper region NA1 adjacent to the upper edge of the first region OA and a lower region NA2 adjacent to the lower edge of the first region OA.

[0335] In Figure 11 , as an example, the first region OA is indicated by a dashed circle, and the region outside the dashed circle may be the second region NA. The upper region NA1 of the second region NA may be the region located at the top of the first region OA in the outer region of the first region OA. The lower region NA2 of the second region NA may be the region located at the bottom of the first region OA in the outer region of the first region OA.

[0336] Referring to Figure 11 , the plurality of sub-pixels SP provided in the display area DA may include a first sub-pixel SP1 to a twelfth sub-pixel SP12.

[0337] Referring to Figure 11 , the plurality of sub-pixels SP provided in the upper region NA1 of the second region NA may include a first sub-pixel SP1, a second sub-pixel SP2, a seventh sub-pixel SP7, and a tenth sub-pixel SP10.

[0338] Referring to Figure 11 , the plurality of sub-pixels SP provided in the lower region NA2 of the second region NA may include a fifth sub-pixel SP5, a sixth sub-pixel SP6, a ninth sub-pixel SP9, and a twelfth sub-pixel SP12.

[0339] Refer to Figure 11 , the multiple sub-pixels SP provided in the first region OA may include a third sub-pixel SP3, a fourth sub-pixel SP4, an eighth sub-pixel SP8, and an eleventh sub-pixel SP11.

[0340] Refer to Figure 11 , for example, the multiple sub-pixels SP provided in the display region DA may include a red sub-pixel that emits red light, a green sub-pixel that emits green light, and a blue sub-pixel that emits blue light.

[0341] Refer to Figure 11 , each of the multiple sub-pixels SP provided in the display region DA may include multiple pixel electrodes PE. For example, the multiple pixel electrodes PE may include a red pixel electrode PE(R) included in the red sub-pixel, a green pixel electrode PE(G) included in the green sub-pixel, and a blue pixel electrode PE(B) included in the blue sub-pixel.

[0342] Refer to Figure 11 , the multiple data lines DL provided in the display region DA may include a red data line DL(R) for supplying a data signal to the red sub-pixel, green data lines DL(G), DL(G)U, and DL(G)D for supplying a data signal to the green sub-pixel, and a blue data line DL(B) for supplying a data signal to the blue sub-pixel.

[0343] Refer to Figure 11 , the multiple data lines DL provided in the display region DA may be arranged in a second region NA that is a general region NA.

[0344] Refer to Figure 11 , a part of the multiple data lines DL provided in the second region NA (for example, DL(R), DL(G), DL(B)) may pass through the first region OA that is an optical region OA.

[0345] However, other part of the multiple data lines DL provided in the second region NA (for example, DL(G)U and DL(G)D) may be arranged to bypass the first region OA that is an optical region OA without passing through the first region OA.

[0346] For example, the upper data line DL(G)U may be disposed in the upper region NA1 of the second region NA, and the lower data line DL(G)D may be disposed in the lower region NA2 of the second region NA. The upper data line DL(G)U and the lower data line DL(G)D may be electrically connected through a bypass line BW that bypasses the first region OA. The upper data line DL(G)U, the lower data line DL(G)D, and the bypass line BW may be electrically connected to correspond to a single data line, and the single data line may bypass the first region OA without passing through the first region OA.

[0347] For example, referring to Figure 11 , the plurality of data lines DL may include a first data line DL1 that passes through all of the upper region NAl, the first region OA, and the lower region NA2.

[0348] In Figure 11 's example, the first data line DL1 may be a green data line DL(G) for supplying a data signal to green sub-pixels disposed in each of the upper region NA1, the first region OA, and the lower region NA2. However, this is only an example and is not limited thereto.

[0349] The plurality of data lines DL may further include an upper data line DL(G)U disposed in the upper region NA1 of the second region NA, a lower data line DL(G)D disposed in the lower region NA2 of the second region NA, and a bypass line that electrically connects the upper data line DL(G)U and the lower data line DL(G)D and bypasses the first region OA. In this case, the upper data line DL(G)U, the lower data line DL(G)D, and the bypass line BW may be electrically connected to serve as a single data line.

[0350] In Figure 11 's example, the upper data line DL(G)U may be a green data line DL(G)U for supplying a data signal to green sub-pixels located in the upper region NA1. Additionally, the lower data line DL(G)D may be a green data line DL(G)D for supplying a data signal to green sub-pixels disposed in the lower region NA2. However, this is only an example and is not limited thereto.

[0351] Referring to Figure 11 , the bypass line BW may include a first bypass line BW1 connected to the upper data line DL(G)U, a second bypass line BW2 connected to the lower data line DL(G)D, and a third bypass line BW3 that connects the first bypass line BW1 and the second bypass line BW2.

[0352] Referring to Figure 11 , the bypass line BW may include a horizontal bypass line H BW that extends in the horizontal direction and a vertical bypass line V BW that extends in the vertical direction and is connected to the data driving circuit 220. Referring toFigure 11 , the horizontal bypass line H BW and the upper data line DL(G)U and the lower data line DL(G)D can form a grid shape.

[0353] Referring to Figure 11 , the intersections between the bypass line BW and the upper data line DL(G)U and the lower data line DL(G)D can have connection points. For example, a first connection point is formed at the intersection of the upper data line DL(G)U and the first bypass line BW1 (which is the horizontal bypass line H BW), a second connection point is formed at the intersection of the lower data line DL(G)D and the second bypass line BW2 (which is the horizontal bypass line H BW), a third connection point is formed at the intersection of the first bypass line BW1 (which is the horizontal bypass line H BW) and the third bypass line BW3 (which is the vertical bypass line V BW), and a fourth connection point is formed at the intersection of the second bypass line BW2 (which is the horizontal bypass line H BW) and the third bypass line BW3 (which is the vertical bypass line V BW).

[0354] Referring to Figure 11 , the horizontal bypass line H BW can include the first bypass line BW1 and the second bypass line BW2, and the vertical bypass line V BW can include the third bypass line BW3.

[0355] The horizontal bypass line H BW and the vertical bypass line V BW can cross each other and can overlap each other in the vertical direction.

[0356] Therefore, the horizontal bypass line H BW and the vertical bypass line V BW can be disposed in different metal layers. For example, the horizontal bypass line H BW can be disposed in the first metal layer, and the vertical bypass line V BW can be disposed in a second metal layer different from the first metal layer. For example, the first metal layer can be the first source-drain metal layer, and the second metal layer can be the second source-drain metal layer.

[0357] Referring to Figure 11 , the plurality of pixel electrodes PE included in each of the plurality of light-emitting devices ED can include a first pixel electrode PE1 disposed in the upper region NA1 and included in the first sub-pixel SP1, a second pixel electrode PE2 disposed in the upper region NA1 and included in the second sub-pixel SP2, a third pixel electrode PE3 disposed in the first region OA and included in the third sub-pixel SP3, a fourth pixel electrode PE4 disposed in the first region OA and included in the fourth sub-pixel SP4, a fifth pixel electrode PE5 disposed in the lower region NA2 and included in the fifth sub-pixel SP5, and a sixth pixel electrode PE6 disposed in the lower region NA2 and included in the sixth sub-pixel SP6.

[0358] Referring to Figure 11, the first data line DL1 can be connected to the first sub-pixel SP1 in the upper region NA1, the third sub-pixel SP3 in the first region OA, and the fifth sub-pixel SP5 in the lower region NA2.

[0359] The first data line DL1 can supply data signals to the first sub-pixel SP1 in the upper region NA1, the third sub-pixel SP3 in the first region OA, and the fifth sub-pixel SP5 in the lower region NA2.

[0360] Referring to Figure 11 , the upper data line DL(G)U can be connected to the second sub-pixel SP2 provided in the upper region NA1, and the lower data line DL(G)D can be connected to the sixth sub-pixel SP6 provided in the lower region NA2.

[0361] Referring to Figure 11 , the display panel 110 according to an embodiment of the present disclosure may further include a connection wire CW electrically connected to the third pixel electrode PE3 and the fourth pixel electrode PE4.

[0362] The connection wire CW may be provided in the first region OA which is the optical region OA.

[0363] Referring to Figure 11 , the emission colors of each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4, the fifth sub-pixel SP5, and the sixth sub-pixel SP6 may be the same.

[0364] In Figure 11 the example of, the emission colors of each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4, the fifth sub-pixel SP5, and the sixth sub-pixel SP6 may be green, but is not limited thereto.

[0365] Referring to Figure 11 , a part of the plurality of sub-pixels SP3 and SP4 provided in the first region OA (for example, the third sub-pixel SP3) may include a light-emitting device ED and a sub-pixel circuit SPC.

[0366] The sub-pixel circuit SPC included in a part of the sub-pixels (for example, the third sub-pixel SP3) among the plurality of sub-pixels SP3 and SP4 provided in the first region OA may include a driving transistor DT, a scanning transistor ST, and a storage capacitor Cst (as Figure 3 shown).

[0367] Referring to Figure 11, a sub-pixel circuit SPC included in a part of a plurality of sub-pixels SP3 and SP4 (e.g., the third sub-pixel SP3) provided in the first region OA may include a red sub-pixel circuit SPC(R) included in a red sub-pixel, a green sub-pixel circuit SPC(G) included in a green sub-pixel circuit, and a blue sub-pixel circuit SPC(B) included in a blue sub-pixel.

[0368] Refer to Figure 11 , another part of the plurality of sub-pixels SP3 and SP4 provided in the first region OA (e.g., the fourth sub-pixel SP4) may include a light-emitting device ED, but may not include the sub-pixel circuit SPC.

[0369] Refer to Figure 11 For an example of , each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fifth sub-pixel SP5, and the sixth sub-pixel SP6 may include a light-emitting device ED and a sub-pixel circuit PC(G) for driving the light-emitting device ED. Here, the sub-pixel circuit SPC(G) may include two or more transistors DT and ST.

[0370] Refer to Figure 11 For an example of , the fourth sub-pixel SP4 may include a light-emitting device ED, but may not include the sub-pixel circuit SPC(G). The light-emitting device ED of the fourth sub-pixel SP4 may be driven by the sub-pixel circuit SPC(G) of the third sub-pixel SP3.

[0371] Therefore, the drive current output from the sub-pixel circuit SPC(G) of the third sub-pixel SP3 may be supplied to the third pixel electrode PE3, and may also be supplied to the fourth pixel electrode PE4 through the connection wire CW.

[0372] Refer to Figure 11 , the plurality of pixel electrodes PE may further include a seventh pixel electrode PE7 provided in the upper region NA1 and included in the seventh sub-pixel SP7, an eighth pixel electrode PE8 provided in the first region OA and included in the eighth sub-pixel SP8, and a ninth pixel electrode PE9 provided in the lower region NA2 and included in the ninth sub-pixel SP9.

[0373] The plurality of data lines DL may further include a second data line DL2, and the second data line DL2 is connected to the seventh sub-pixel SP7 in the upper region NA1, the eighth sub-pixel SP8 in the first region OA, and the ninth sub-pixel SP9 in the lower region NA2.

[0374] In Figure 11In the example, the second data line DL2 may be a blue data line DL(B) for supplying a data signal to blue sub-pixels provided in each of the upper region NA1, the first region OA, and the lower region NA2, but is not limited thereto.

[0375] The emission color of each of the seventh sub-pixel SP7 in the upper region NA1, the eighth sub-pixel SP8 in the first region OA, and the ninth sub-pixel SP9 in the lower region NA2 may be different from the emission color of each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4, the fifth sub-pixel SP5, and the sixth sub-pixel SP6.

[0376] For example, the emission color of each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4, the fifth sub-pixel SP5, and the sixth sub-pixel SP6 may be green, and the emission colors of the seventh sub-pixel SP7 in the upper region NA1, the eighth sub-pixel SP8 in the first region OA, and the ninth sub-pixel SP9 in the lower region NA2 may be blue, but are not limited thereto.

[0377] Referring to Figure 11 , the second data line DL2 may cross and overlap with the connection wire CW. The first data line DL1 may also cross and overlap with the connection wire CW.

[0378] Referring to Figure 11 , the plurality of pixel electrodes PE may further include a tenth pixel electrode PE10 provided in the upper region NA1 and included in the tenth sub-pixel SP10, an eleventh pixel electrode PE11 provided in the first region OA and included in the eleventh sub-pixel SP11, and a twelfth pixel electrode PE12 provided in the lower region NA2 and included in the twelfth sub-pixel SP12.

[0379] Referring to Figure 11 , the plurality of data lines DL may further include a third data line DL3, and the third data line DL3 is connected to the tenth sub-pixel SP10 in the upper region NA1, the eleventh sub-pixel SP11 in the first region OA, and the twelfth sub-pixel SP12 in the lower region NA2.

[0380] In Figure 11 the example, the third data line DL3 may be a red data line DL(R) for supplying a data signal to red sub-pixels provided in each of the upper region NA1, the first region OA, and the lower region NA2, but is not limited thereto.

[0381] Referring to Figure 11, the emission color of each of the tenth sub-pixel SP10, the eleventh sub-pixel SP11, and the twelfth sub-pixel SP12 may be different from the emission color of each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4, the fifth sub-pixel SP5, and the sixth sub-pixel SP6.

[0382] For example, the emission color of each of the first sub-pixel SPl, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4, the fifth sub-pixel SP5, and the sixth sub-pixel SP6 may be green, and the emission color of each of the tenth sub-pixel SP10, the eleventh sub-pixel SP11, and the twelfth sub-pixel SP12 may be red, but it is not limited thereto.

[0383] Referring to Figure 11 , the display panel 110 according to an embodiment of the present disclosure may further include a common electrode CE disposed on the plurality of pixel electrodes PE.

[0384] Referring to Figure 11 , within the first region OA, the common electrode CE may have a plurality of common electrode holes CH. For example, within the first region OA, the common electrode CE may have a common electrode hole CH located between the first data line DL1 and the third data line DL3.

[0385] The display panel 110 according to an embodiment of the present disclosure may include: a substrate SUB including a display region DA capable of displaying an image and a non-display region NDA outside the display region DA; a plurality of sub-pixels SP included in the display region DA and each including a plurality of light-emitting devices ED; and a plurality of data lines DL for supplying data signals for image display to the plurality of sub-pixels SP.

[0386] The display region DA may include a first region OA and a second region NA. The first region OA is an optical region capable of transmitting light, and the second region NA is a general region located outside the first region OA.

[0387] The second region NA may include an upper region NA1 adjacent to the upper edge of the first region OA and a lower region NA2 adjacent to the lower edge of the first region OA.

[0388] The plurality of light-emitting devices ED may each include a plurality of pixel electrodes PE.

[0389] The plurality of pixel electrodes PE may be disposed in the first region OA and may include two pixel electrodes PE3 and PE4 electrically connected to each other.

[0390] The display panel 110 according to an embodiment of the present disclosure may be disposed in the first region OA, and may further include a connection wire CW that electrically connects two pixel electrodes PE3 and PE4.

[0391] A plurality of data lines DL may include a first data line DL1 connected to one of two sub-pixels including two pixel electrodes PE3 and PE4 (e.g., the sub-pixel including PE3). Among the two sub-pixels including two pixel electrodes PE3 and PE4, the remaining one (e.g., the sub-pixel including PE4) may not be connected to the data line.

[0392] Figure 12 and Figure 13 is a plan view of a part of the first region OA1 (which is the optical region OA) of the display panel 110 according to an embodiment of the present disclosure.

[0393] Referring to Figure 12 and Figure 13 , the first region OA1 (which is the optical region OA of the display panel 110) may include a transmissive region TA and a non-transmissive region NTA.

[0394] Referring to Figure 12 and Figure 13 , the non-transmissive region NTA may include a circuit region CA, in which a plurality of sub-pixel circuits included in a plurality of sub-pixels are provided. For example, the plurality of sub-pixel circuits may include a red sub-pixel circuit included in a red sub-pixel, a green sub-pixel circuit included in a green sub-pixel, and a blue sub-pixel circuit included in a blue sub-pixel.

[0395] Referring to Figure 12 and Figure 13 , the non-transmissive region NTA may include a plurality of light-emitting regions corresponding to a plurality of sub-pixels respectively. Accordingly, a plurality of pixel electrodes PE(R), PE(G), and PE(B) may be disposed in the non-transmissive region NTA.

[0396] Referring to Figure 12 and Figure 13 , a plurality of contact holes CNT(R), CNT(G), and CNT(B) may be disposed in the non-transmissive region NTA for connecting the plurality of pixel electrodes PE(R), PE(G), and PE(B) to the plurality of sub-pixel circuits respectively.

[0397] For example, the plurality of pixel electrodes PE(R), PE(G), and PE(B) may include a red pixel electrode PE(R) included in a red sub-pixel, a green pixel electrode PE(G) included in a green sub-pixel, and a blue pixel electrode PE(B) included in a blue sub-pixel. As a reference, Figure 12 and Figure 13The arrangements of the red pixel electrode PE(R), green pixel electrode PE(G), and blue pixel electrode PE(B) therein are different from Figure 11 the arrangements of the red pixel electrode PE(R), green pixel electrode PE(G), and blue pixel electrode PE(B) of

[0398] For example, the multiple contact holes CNT(R), CNT(G), and CNT(B) may include a contact hole CNT(R) between the red pixel electrode PE(R) and the red sub-pixel circuit, a contact hole CNT(G) between the green pixel electrode PE(G) and the green sub-pixel circuit, and a contact hole CNT(B) between the blue pixel electrode PE(B) and the blue sub-pixel circuit.

[0399] Referring to Figure 12 and Figure 13 , two green pixel electrodes PE(G) may be connected by a connection wire CW. The two green pixel electrodes PE(G) connected by the connection wire CW may correspond to Figure 11 the third pixel electrode PE3 and the fourth pixel electrode PE4 of

[0400] Referring to Figure 12 and Figure 13 , the blue pixel electrode PE(B) may correspond to Figure 11 the eighth pixel electrode PE8 of

[0401] Referring to Figure 11 , in the second region NA which is a general region NA, four data lines (e.g., a red data line, a green data line, a blue data line, a green data line) may be repeatedly arranged.

[0402] In the upper region NA1 of the second region NA which is a general region NA, a red data line DL(R), a green data line DL(G)U (which is an upper data line), a blue data line DL(B), and a green data line DL(G) may be arranged in sequence.

[0403] Referring to Figure 11 , in the lower region NA2 of the second region NA which is a general region NA, a red data line DL(R), a green data line DL(G)D (which is a lower data line), a blue data line DL(B), and a green data line DL(G) may be arranged in sequence.

[0404] Referring to Figure 12 and Figure 13 , in the first region OA which is an optical region OA, three data lines (e.g., a red data line DL(R), a blue data line DL(B), a green data line DL(G)) may be repeatedly arranged.

[0405] Referring to Figure 12 andFigure 13 In the first region OA, in the region 1200 between the red data line DL(R) and the blue data line DL(B), the green data line is omitted. Therefore, the metal can be reduced within the first region OA which is the optical region OA. As a result, the metal ratio in the first region OA which is the optical region OA can be decreased and the transmittance can be increased.

[0406] In Figure 12 and Figure 13 the green data line DL(G) can correspond to the first data line DL1 in Figure 11 the blue data line DL(B) can correspond to the second data line DL2 in Figure 11 and the red data line DL(R) can correspond to the third data line DL3 in Figure 11 .

[0407] Referring to Figure 12 and Figure 13 the red data line DL(R) which is the third data line DL3 can overlap with the red pixel electrode PE(R).

[0408] The region 1200 where the green data line is omitted can be the region adjacent to the red data line DL(R) (which is the third data line DL3) and can overlap with the red pixel electrode PE(R).

[0409] In the upper region NA1 of the second region NA which is the general region NA, the red pixel electrode PE(R) can overlap with two data lines DL(R) and DL(G)U. Additionally, in the lower region NA2 of the second region NA which is the general region NA, the red pixel electrode PE(R) can overlap with two data lines DL(R) and DL(G)D.

[0410] However, as described above, in the first region OA which is the optical region OA, the red pixel electrode PE(R) only overlaps with one data line DL(R). Therefore, the light-emitting characteristics of the red sub-pixels in the first region OA can be different from those of the red sub-pixels in the second region NA.

[0411] To reduce this deviation in the light-emitting characteristics, as shown in Figure 12 and Figure 13 the red data line DL(R) which is the third data line DL3 can include a protrusion 1210. The protrusion 1210 can overlap with the red pixel electrode PE(R) in the first region OA.

[0412] That is, referring to Figure 12 and Figure 13 the red data line DL(R) which is the third data line DL3 can overlap with the red sub-pixel PE(R) which is Figure 11overlaps with the eleventh sub-pixel PE11). The red data line DL(R) of the third data line DL3 may include a protrusion 1210 protruding into the region 1200 where the green data line is omitted.

[0413] The protrusion 1210 may overlap with the red sub-pixel PE(R) (which is the eleventh sub-pixel PE11) in the data line length direction (i.e., the column direction, the data line extension direction). Figure 11 overlaps with the eleventh sub-pixel PE11).

[0414] Referring to Figure 12 and Figure 13 , the third pixel electrode PE3, the connection wire CW, and the fourth pixel electrode PE4 may be integrally formed. That is, the connection wire CW may be made of the pixel electrode material.

[0415] Referring to Figure 12 , in the first region OA, the first data line DL1 and the second data line DL2 may be disposed in the same metal layer (e.g., the second metal layer) and spaced apart from each other on the same plane. Similarly, in the second region NA, the first data line DL1 and the second data line DL2 may be disposed in the same metal layer (e.g., the second metal layer) and spaced apart from each other on the same plane.

[0416] Referring to Figure 13 , in at least a part of the first region OA, the first data line DL1 and the second data line DL2 may be disposed in different metal layers (e.g., the first metal layer and the second metal layer). Alternatively, in the second region NA, the first data line DL1 and the second data line DL2 may be disposed in the same metal layer (e.g., the second metal layer).

[0417] That is, in the second region NA, the first data line DL1 and the second data line DL2 may be disposed in the same metal layer and spaced apart from each other on the same plane. In the transmission region TA among the transmission region TA and the non-transmission region NTA included in the first region OA, the first data line DL1 and the second data line DL2 may be disposed in different metal layers (e.g., the first metal layer, the second metal layer), and may overlap in the vertical direction. In the non-transmission region NTA among the transmission region TA and the non-transmission region NTA included in the first region OA, the first data line DL1 and the second data line DL2 may be disposed within the same metal layer (e.g., the second metal layer) and spaced apart from each other on the same plane.

[0418] Referring to Figure 13, for example, the first metal layer may be the metal layer between the second interlayer insulating layer 823 and the first planarization layer 831, and may be the first source-drain metal layer. The second metal layer may be the metal layer between the first planarization layer 831 and the second planarization layer 832, and may be the second source-drain metal layer. For example, the blue data line DL(B) serving as the second data line DL2 may be disposed in the first metal layer, and the green data line DL(G) serving as the first data line DL1 may be disposed in the second metal layer.

[0419] Figures 14 to 18 is a cross-sectional view of the display panel 110 having a transmittance improving structure according to an embodiment of the present disclosure. However, in Figures 14 to 18 the cross-sectional view, the stacked structure is the same as that in Figure 8 and Figure 9 . Therefore, the description of the stacked structure will be omitted. Additionally, in the following description, reference is also made to Figures 11 to 13 .

[0420] Figure 14 is a cross-sectional view taken along the line X1-X2 of Figure 12 and Figure 13 , Figure 15 is a cross-sectional view taken along the line X3-X4 of Figure 12 and Figure 13 , Figure 16 is a cross-sectional view taken along the line X5-X6 of Figure 13 , Figure 17 is a cross-sectional view taken along the line X7-X8 of Figure 13 , Figure 18 is a cross-sectional view taken along the line X9-X10 of Figure 13 .

[0421] Referring to Figure 14 , in the region represented by the line X1-X2 of Figure 12 and Figure 13 , there may be a blue light-emitting region EA B of the blue sub-pixel and a red light-emitting region EA R of the red sub-pixel. That is, the blue pixel electrode PE(B) and the red pixel electrode PE(R) may be disposed in the region represented by the line X1-X2 of Figure 12 and Figure 13 .

[0422] Referring to Figure 14 , in the region represented by the line X1-X2 of Figure 12 and Figure 13 , the transistors TFT included in the green sub-pixel circuit SPC(G), the transistors TFT included in the blue sub-pixel circuit SPC(B), and the transistors TFT included in the red sub-pixel circuit SPC(R) may be disposed.

[0423] These transistors TFT may include a first active layer ACT1 and a first gate GE1 on the first active layer ACT1. The first active layer ACT1 is the active layer of the lower transistor and may include a silicon-based semiconductor material. For example, the silicon-based semiconductor material may include low-temperature polycrystalline silicon (LTPS).

[0424] A shielding metal SM overlapping with the first active layer ACT1 may be disposed under the transistor TFT. The shielding metal SM may be disposed between the multi-buffer layer 811a and the active buffer layer 811b.

[0425] A first upper metal TM1 overlapping with the first gate GE1 may be disposed on the transistor TFT. The first upper metal TM1 may be disposed between the first interlayer insulating layer 813 and the second buffer layer 821.

[0426] Referring to Figure 14 , the metal layer between the second interlayer insulating layer 823 and the first planarization layer 831 may be referred to as the first metal layer, and the metal layer between the first planarization layer 831 and the second planarization layer 832 may be referred to as the second metal layer. As Figure 14 shown, the second metal layer is above the first metal layer.

[0427] A plurality of horizontal lines extending in the horizontal direction may be disposed in the first metal layer, and a plurality of vertical lines extending in the vertical direction may be disposed in the second metal layer.

[0428] Referring to Figure 14 , data lines DL(R), DL(G), and DL(B) as a type of vertical lines may be disposed in the second metal layer. In addition, a power supply line PWL as another type of vertical line may also be disposed in the second metal layer.

[0429] Referring to Figure 14 , different from the data lines DL(R), DL(G), and DL(B), the power supply line PWL may be a line for applying a power supply voltage whose voltage level does not change according to the frame. For example, the power supply line PWL may include at least one of a drive voltage line VDDL and a base voltage line VSSL.

[0430] As described above, the power supply line PWL may be disposed in the same metal layer (e.g., the second metal layer) as the vertical bypass line V BW.

[0431] Referring to Figure 14 , one of the two red data lines DL(R) overlapping with the red pixel electrode PE(R) may correspond to a protrusion 1210 protruding from the red data line DL(R) (which is the Figure 12 and Figure 13 third data line DL3 in).

[0432] Referring to Figure 15 , the third pixel electrode PE3 and the fourth pixel electrode PE4, which are two green pixel electrodes PE(G), can be connected to each other through a connection wire CW.

[0433] Referring to Figure 15 , the third pixel electrode PE3 and the fourth pixel electrode PE4 can be integrally formed with the connection wire CW.

[0434] Referring to Figure 15 , below the fourth pixel electrode PE4, a second gate metal GM2 can be provided, and the second gate metal GM2 corresponds to a second active layer ACT2 on the second buffer layer 821 and a second gate GE2 on the second active layer ACT2.

[0435] Referring to Figure 15 , a first upper metal TM1 can be provided between the first interlayer insulating layer 813 and the second buffer layer 821, and a first gate metal GM1 can be provided between the first gate insulating layer 812 and the first interlayer insulating layer 813.

[0436] Referring to Figure 16 , the area marked by the line X5-X6 can be a boundary area between the transmissive area TA and the non-transmissive area NTA.

[0437] Referring to Figure 16 , in the area represented by the line X5-X6, the second data line DL2 can include: an upper layer portion provided on the same second metal layer as the first data line DL1; a lower layer portion provided on a first metal layer lower than the second metal layer; a connection portion connecting the upper layer and the lower layer; and an extension portion extending below the first data line DL1.

[0438] Referring to Figure 16 , in the area represented by the line X5-X6, the second data line DL2 can be offset downward in the vertical direction and horizontally to overlap with the first data line DL1. Here, the first data line DL1 can be a green data line DL(G), and the second data line DL2 can be a blue data line DL(B).

[0439] Referring to Figure 16 , in the area represented by the line X5-X6, the first data line DL1 can be a first upper data line DL(G)ML2 provided on the second metal layer. The second data line DL2 can include a second lower data line DL(B)ML1 provided on the first metal layer and a second upper data line DL(B)ML2 provided on the second metal layer.

[0440] Referring to Figure 16, the upper blue data line DL(B)ML2, which is the second upper data line, can be connected to the lower blue data line DL(B)ML1 through a hole in the first planarization layer 831. The lower blue data line DL(B)ML1, which is the second lower data line, can extend slightly in the horizontal direction and overlap with the upper green data line DL(G)ML2.

[0441] Referring to Figure 17 , the area represented by the line X7-X8 is an area included in the transmissive area TA. In the area represented by the line X7-X8, the first data line DL1 and the second data line DL2 can overlap in the vertical direction.

[0442] Referring to Figure 17 , in the area represented by the line X7-X8, the first data line DL1 can be the first upper data line DL(G)ML2 provided on the second metal layer, and the second data line DL2 can be the second lower data line DL(B)ML1 provided on the first metal layer.

[0443] Referring to Figure 17 , the area represented by the line X7-X8 is an area included in the transmissive area TA. In the area represented by the line X7-X8, the first data line DL1 and the second data line DL2 can overlap in the vertical direction, thereby greatly improving the transmittance of the transmissive area TA.

[0444] Referring to Figure 18 , the area represented by the line X9-X10 is included in the non-transmissive area NTA and can be a sub-pixel circuit area.

[0445] Referring to Figure 18 , in the non-transmissive area NTA, the first data line DL1 can include the first lower data line DL(G)ML1 provided in the first metal layer and the first upper data line DL(G)ML2 provided in a second metal layer different from the first metal layer.

[0446] The first lower data line DL(G)ML1 and the first upper data line DL(G)ML2 can be electrically connected to each other through a hole in the first planarization layer 831, which is an insulating layer between the first metal layer and the second metal layer.

[0447] Referring to Figure 18 , in the non-transmissive area NTA, the second data line DL2 can include the second lower data line DL(B)ML1 provided in the first metal layer and the second upper data line DL(B)ML2 provided in the second metal layer.

[0448] The second lower data line DL(B)ML1 and the second upper data line DL(B)ML2 can be electrically connected to each other through different holes in the first planarization layer 831 serving as an insulating layer.

[0449] Figure 19 is a cross-sectional view of a connection area between the vertical bypass line V BW and the horizontal bypass line HBW in the display panel 110 according to an embodiment of the present disclosure. However, in Figure 19 in the cross-sectional view, the stacked structure is the same as that in Figure 8 and Figure 9 . Therefore, the description of the stacked structure will be omitted. Additionally, in the following description, reference is also made to Figures 11 to 13 .

[0450] Referring to Figure 19 , the horizontal bypass line H BW can be provided on the first metal layer, and the vertical bypass line V BW can be provided on a second metal layer different from the first metal layer.

[0451] Referring to Figure 19 , the vertical bypass line V BW can be connected to the horizontal bypass line HBW through a hole in the first planarization layer 831, which is an insulating layer provided between the first metal layer and the second metal layer.

[0452] Referring to Figure 19 , the area where the horizontal bypass line H BW and the vertical bypass line V BW are arranged can be a second area NA serving as a general area NA.

[0453] Referring to Figure 19 , the light-emitting area EA of the sub-pixel can exist in the second area NA, and a pixel electrode can be provided for it. Additionally, transistors TFT included in the sub-pixel circuit of the sub-pixel can be provided in the second area NA.

[0454] For example, Figure 11 each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fifth sub-pixel SP5, and the sixth sub-pixel SP6 shown can include a light-emitting device ED and a sub-pixel circuit SPC(G), and the sub-pixel circuit SPC(G) can include two or more transistors DT and ST.

[0455] The fourth sub-pixel SP4 can include a light-emitting device ED, but may not include the sub-pixel circuit SPC(G). The source and drain of each of the two or more transistors can be provided in the same first metal layer as the horizontal bypass line H BW.

[0456] The first data line DL1, the upper data line DL(G)U, and the lower data line DL(G)D can be provided in the same second metal layer as the vertical bypass line V BW.

[0457] Refer to Figures 14 to 19 According to an embodiment of the present disclosure, the display device 100 may further include an electronic device 800, which is located below the substrate SUB, overlaps with the first region OA, and performs a specific operation by using the light passing through the first region OA.

[0458] A brief description of the above embodiments of the present disclosure will be given below.

[0459] A display device according to an embodiment of the present disclosure may include: a substrate including a display region capable of displaying an image and a non-display region outside the display region; a plurality of sub-pixels included in the display region, each of the plurality of sub-pixels including a plurality of light-emitting devices; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels.

[0460] The display region may include a first region capable of transmitting light and a second region located outside the first region. The second region may include an upper region located above the first region and a lower region located below the first region.

[0461] The plurality of data lines may include: a first data line extending from the upper region through the first region to the lower region; upper data lines provided in the upper region; lower data lines provided in the lower region; and bypass lines electrically connecting the upper data lines and the lower data lines and bypassing the first region.

[0462] The bypass lines may include a first bypass line connected to the upper data line, a second bypass line connected to the lower data line, and a third bypass line for connecting the first bypass line and the second bypass line.

[0463] The bypass lines may include a horizontally extending horizontal bypass line and a vertically extending vertical bypass line, wherein the first bypass line and the second bypass line are horizontal bypass lines, and the third bypass line is a vertical bypass line.

[0464] The horizontal bypass line may be provided in a first metal layer, and the vertical bypass line may be provided in a second metal layer different from the first metal layer.

[0465] A display device according to an embodiment of the present disclosure may further include a power line for applying a power supply voltage whose voltage level does not change according to a frame, wherein the power line is provided in the second metal layer.

[0466] The power line may be provided in the same metal layer as the vertical bypass line.

[0467] Each of the plurality of light-emitting devices may include a plurality of pixel electrodes.

[0468] The plurality of pixel electrodes may include a first pixel electrode disposed in the upper region and included in the first sub-pixel, a second pixel electrode disposed in the upper region and included in the second sub-pixel, a third pixel electrode disposed in the first region and included in the third sub-pixel, a fourth pixel electrode disposed in the first region and included in the fourth sub-pixel, a fifth pixel electrode disposed in the lower region and included in the fifth sub-pixel, and a sixth pixel electrode disposed in the lower region and included in the sixth sub-pixel.

[0469] The first data line may be connected to the first sub-pixel, the third sub-pixel, and the fifth sub-pixel.

[0470] The upper data line may be connected to the second sub-pixel.

[0471] The lower data line may be connected to the sixth sub-pixel.

[0472] In a display device according to an embodiment of the present disclosure, the third pixel electrode and the fourth pixel electrode may be electrically connected to each other.

[0473] The light-emitting colors of each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel may be the same.

[0474] Each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fifth sub-pixel, and the sixth sub-pixel may include a light-emitting device and a sub-pixel circuit for driving the light-emitting device. The sub-pixel circuit may include two or more transistors.

[0475] The fourth sub-pixel may include a light-emitting device but may not include a sub-pixel circuit. In this case, the light-emitting device of the fourth sub-pixel may be driven by the sub-pixel circuit of the third sub-pixel.

[0476] The driving current output from the sub-pixel circuit of the third sub-pixel may be supplied to the third pixel electrode and the fourth pixel electrode.

[0477] The display device according to an embodiment of the present disclosure may further include a connection line disposed in the first region and electrically connecting the third pixel electrode and the fourth pixel electrode.

[0478] The third pixel electrode, the connection line, and the fourth pixel electrode may be integrally formed.

[0479] The plurality of pixel electrodes may further include a seventh pixel electrode disposed in the upper region and included in the seventh sub-pixel, an eighth pixel electrode disposed in the second region and included in the eighth sub-pixel, and a ninth pixel electrode disposed in the lower region and included in the ninth sub-pixel.

[0480] The plurality of data lines may include a second data line connected to the seventh sub-pixel, the eighth sub-pixel, and the ninth sub-pixel.

[0481] The emission color of each of the seventh sub-pixel, the eighth sub-pixel, and the ninth sub-pixel may be different from the emission color of each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel.

[0482] The second data line may cross and overlap a portion (i.e., a connection line) connected to the third pixel electrode and the fourth pixel electrode.

[0483] For example, in the first region and the second region, the first data line and the second data line may be disposed in the same metal layer and spaced apart from each other on the same plane.

[0484] As another example, the first data line and the second data line may be disposed in the same metal layer in the second region. The first data line and the second data line may be disposed on different metal layers in at least a part of the first region.

[0485] For example, in the second region, the first data line and the second data line may be disposed in the same metal layer and spaced apart from each other on the same plane. The first region may include a transmissive region and a non-transmissive region. The first data line and the second data line may be disposed in different metal layers and overlap in the vertical direction in the transmissive region. The first data line and the second data line may be disposed in the same metal layer and spaced apart from each other on the same plane in the non-transmissive region.

[0486] The plurality of pixel electrodes may further include a tenth pixel electrode disposed in the upper region and included in the tenth sub-pixel, an eleventh pixel electrode disposed in the first region and included in the eleventh sub-pixel, and a twelfth pixel electrode disposed in the lower region and included in the twelfth sub-pixel.

[0487] The plurality of data lines may further include a third data line connected to the tenth sub-pixel, the eleventh sub-pixel, and the twelfth sub-pixel.

[0488] The third data line may overlap with the tenth pixel electrode.

[0489] The third data line may include a protrusion, and the protrusion may overlap with the eleventh pixel electrode in the length direction of the data line, wherein the emission color of each of the tenth sub-pixel, the eleventh sub-pixel, and the twelfth sub-pixel is different from the emission color of each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel.

[0490] The display device according to an embodiment of the present disclosure may further include a common electrode disposed on the plurality of pixel electrodes.

[0491] The common electrode may include a plurality of common electrode holes in the first region.

[0492] The display device according to an embodiment of the present disclosure may further include an electronic device that is located under the substrate, overlaps with the first region, and performs a predetermined operation using light passing through the first region.

[0493] The display device according to an embodiment of the present disclosure may further include a second interlayer insulating layer located on the substrate; a first planarization layer located above the second interlayer insulating layer; and a second planarization layer located above the first planarization layer, wherein a first metal layer is located between the second interlayer insulating layer and the first planarization layer, and a second metal layer is located between the first planarization layer and the second planarization layer.

[0494] The display device according to an embodiment of the present disclosure may include: a substrate including a display region capable of displaying an image and a non-display region outside the display region; a plurality of sub-pixels included in the display region, each of the plurality of sub-pixels including a plurality of pixel electrodes; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels.

[0495] The display region may include a first region capable of transmitting light and a second region located outside the first region.

[0496] The second region may include an upper region located above the first region and a lower region located below the first region.

[0497] The plurality of pixel electrodes may include a first pixel electrode disposed in the upper region and included in a first sub-pixel, a second pixel electrode disposed in the upper region and included in a second sub-pixel, a third pixel electrode disposed in the first region and included in a third sub-pixel, a fourth pixel electrode disposed in the first region and included in a fourth sub-pixel, a fifth pixel electrode disposed in the lower region and included in a fifth sub-pixel, and a sixth pixel electrode disposed in the lower region and included in a sixth sub-pixel.

[0498] The plurality of data lines may include: a first data line extending from the upper region through the first region to the lower region and connected to the first sub-pixel, the third sub-pixel, and the fifth sub-pixel; an upper data line disposed in the upper region and connected to the second sub-pixel; and a lower data line disposed in the lower region and connected to the sixth sub-pixel.

[0499] The third pixel electrode and the fourth pixel electrode may be electrically connected to each other.

[0500] A display device according to an embodiment of the present disclosure may include: a substrate including a display area capable of displaying an image and a non-display area outside the display area; a plurality of sub-pixels included in the display area; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels, wherein the display area includes a first area capable of transmitting light and a second area located outside the first area, wherein a part of the plurality of data lines passes through the first area and the other data lines of the plurality of data lines bypass the first area.

[0501] The display device according to an embodiment of the present disclosure may further include a connection line disposed in the first area and electrically connecting the third pixel electrode and the fourth pixel electrode.

[0502] According to an embodiment of the present disclosure as described above, a display device having a light-transmitting structure can be provided, and the light-transmitting structure enables an electronic device to normally receive light (e.g., visible light, infrared light, or ultraviolet light) without exposing the electronic device receiving the light to the front.

[0503] According to an embodiment of the present disclosure, a display device capable of increasing the transmittance of an optical area (i.e., the first area) through which light can pass can be provided.

[0504] According to an embodiment of the present disclosure, a display device having a structure with a reduced metal ratio in an optical area (i.e., the first area) capable of transmitting light can be provided.

[0505] According to an embodiment of the present disclosure, a display device having a panel structure can be provided, and the panel structure can improve the detection performance of a detection sensor by using the light passing through the optical area (i.e., the first area).

[0506] According to an embodiment of the present disclosure, a display device having a panel structure can be provided, and the panel structure can improve the performance of a camera by using the light passing through the optical area (i.e., the first area).

[0507] The above description and the drawings provide examples of the technical concept of the present disclosure for illustrative purposes only. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art without departing from the spirit and scope of the present disclosure. Additionally, the disclosed embodiments are intended to illustrate the scope of the technical concept of the present disclosure. Therefore, the scope of the present disclosure is not limited to the illustrated embodiments.

Claims

1. A display device, comprising: A substrate, comprising a display area capable of displaying an image and a non-display area outside the display area; a plurality of sub-pixels, the plurality of sub-pixels being included in the display area, each of the plurality of sub-pixels including a plurality of light emitting devices; and a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels; The display area includes a first area that is light-transmissive and a second area outside the first area. The second region includes an upper region located above the first region and a lower region located below the first region. Wherein, the plurality of data lines include: an upper data line, disposed in the upper region; a lower data line disposed in the lower region; and A bypass line is configured to electrically connect the upper data line and the lower data line and bypass the first region.

2. The display device according to claim 1, wherein: The plurality of data lines further include: A first data line extends from the upper region to the lower region.

3. The display device according to claim 1, wherein: The bypass route includes: a first bypass line connected to the upper data line; a second bypass line connected to the lower data line; and The third bypass line is used to connect the first bypass line and the second bypass line.

4. The display device according to claim 1, wherein: The bypass line has a connection point at an intersection between the upper data line and the lower data line.

5. The display device according to claim 3, wherein: A first connection point is formed at the intersection of the upper data line and the first bypass line, a second connection point is formed at the intersection of the lower data line and the second bypass line, a third connection point is formed at the intersection of the first bypass line and the third bypass line, and a fourth connection point is formed at the intersection of the second bypass line and the third bypass line.

6. The display device according to claim 1, wherein: The bypass line includes a horizontal bypass line extending horizontally and a vertical bypass line extending vertically.

7. The display device according to claim 6, wherein: A first connection point is formed at the intersection of the upper data line and the horizontal bypass line, a second connection point is formed at the intersection of the lower data line and the horizontal bypass line, and a third connection point and a fourth connection point are formed at the intersection of the horizontal bypass line and the vertical bypass line, respectively.

8. The display device according to claim 6, wherein: The horizontal bypass line is disposed in a first metal layer, and the vertical bypass line is disposed in a second metal layer different from the first metal layer.

9. The display device according to claim 8, wherein: The second metal layer is above the first metal layer.

10. The display device according to claim 6, wherein: The horizontal bypass lines form a grid shape with the upper data lines and the lower data lines.

11. The display device according to claim 8, further comprising a power supply line for applying a power supply voltage whose voltage level does not change according to a frame change, in, The power line is disposed in the second metal layer.

12. The display device according to claim 1, wherein: Each of the plurality of light emitting devices comprises a plurality of pixel electrodes, Wherein, the plurality of pixel electrodes include: a first pixel electrode disposed in the upper region and included in a first sub-pixel; a second pixel electrode disposed in the upper region and included in a second sub-pixel; a third pixel electrode disposed in the first region and included in a third sub-pixel; a fourth pixel electrode disposed in the first region and included in a fourth sub-pixel; a fifth pixel electrode disposed in the lower region and included in a fifth sub-pixel; and a sixth pixel electrode, disposed in the lower region and included in a sixth sub-pixel, wherein the upper data line is connected to the second sub-pixel, wherein the lower data line is connected to the sixth sub-pixel, and Wherein, the third pixel electrode and the fourth pixel electrode are electrically connected to each other.

13. The display device according to claim 12, wherein: The plurality of data lines further include: a first data line extending from the upper region to the lower region, The first data line is connected to the first sub-pixel, the third sub-pixel and the fifth sub-pixel.

14. The display device according to claim 13, wherein: Each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, the fifth sub-pixel, and the sixth sub-pixel emits the same light color.

15. The display device according to claim 13, wherein: Each of the first sub-pixel, the second sub-pixel, the third sub-pixel, the fifth sub-pixel and the sixth sub-pixel includes a light emitting device and a sub-pixel circuit for driving the light emitting device, and the sub-pixel circuit includes two or more transistors, The fourth sub-pixel includes a light-emitting device but does not include a sub-pixel circuit, and the light-emitting device of the fourth sub-pixel is driven by the sub-pixel circuit of the third sub-pixel.

16. The display device according to claim 15, wherein: A driving current output from the sub-pixel circuit of the third sub-pixel is supplied to the third pixel electrode and the fourth pixel electrode. 17 . The display device according to claim 12 , further comprising a connection line disposed in the first region and electrically connecting the third pixel electrode and the fourth pixel electrode.

18. The display device according to claim 12, wherein: The plurality of pixel electrodes include: a seventh pixel electrode disposed in the upper region and included in a seventh sub-pixel; an eighth pixel electrode disposed in the second region and included in an eighth sub-pixel; and a ninth pixel electrode disposed in the lower region and included in a ninth sub-pixel, Among them, the luminous color of each of the seventh subpixel, the eighth subpixel and the ninth subpixel is different from the luminous color of each of the first subpixel, the second subpixel, the third subpixel, the fourth subpixel, the fifth subpixel and the sixth subpixel.

19. The display device according to claim 18, wherein: The plurality of data lines include a second data line connected to the seventh sub-pixel, the eighth sub-pixel, and the ninth sub-pixel.

20. The display device according to claim 19, wherein: The second data line crosses and overlaps with a portion where the third pixel electrode and the fourth pixel electrode are connected.

21. The display device according to claim 19, wherein: The plurality of data lines further include: a first data line extending from the upper region to the lower region, Wherein, in the first region and the second region, the first data line and the second data line are disposed in the same metal layer and are spaced apart from each other on the same plane.

22. The display device according to claim 19, wherein: The plurality of data lines further include: a first data line extending from the upper region to the lower region, The first data line and the second data line are arranged in the same metal layer in the second region. The first data line and the second data line are arranged in different metal layers in at least a portion of the first region.

23. The display device according to claim 22, wherein: In the second area, the first data line and the second data line are disposed in the same metal layer and are spaced apart from each other on the same plane, Wherein, the first area includes a transmission area and a non-transmission area, Wherein, in the transmission area, the first data line and the second data line are arranged in different metal layers and overlap in a vertical direction, The first data line and the second data line are disposed in the same metal layer in the non-transmission region and are spaced apart from each other on the same plane.

24. The display device according to claim 12, wherein: The plurality of pixel electrodes include: a tenth pixel electrode disposed in the upper region and included in a tenth sub-pixel; an eleventh pixel electrode disposed in the first region and included in an eleventh sub-pixel; and a twelfth pixel electrode disposed in the lower region and included in a twelfth sub-pixel, The luminous color of each of the tenth subpixel, the eleventh subpixel and the twelfth subpixel is different from the luminous color of each of the first subpixel, the second subpixel, the third subpixel, the fourth subpixel, the fifth subpixel and the sixth subpixel.

25. The display device according to claim 24, wherein: The plurality of data lines further include a third data line connected to the tenth sub-pixel, the eleventh sub-pixel, and the twelfth sub-pixel, Wherein, the third data line overlaps with the tenth pixel electrode, The third data line includes a protrusion, and the protrusion overlaps the eleventh pixel electrode in a length direction of the data line.

26. The display device according to claim 1, further comprising a common electrode disposed on the plurality of pixel electrodes, in, The common electrode includes a plurality of common electrode holes located in the first area. 27 . The display device according to claim 1 , further comprising an electronic device that is located below the substrate, overlaps the first region, and performs a predetermined operation using light passing through the first region.

28. The display device according to claim 8, further comprising: A second interlayer insulating layer, located on the substrate; A first planarization layer, located above the second interlayer insulating layer; as well as a second planarization layer, located above the first planarization layer, The first metal layer is located between the second interlayer insulating layer and the first planarization layer, and the second metal layer is located between the first planarization layer and the second planarization layer.

29. A display device comprising: A substrate, comprising a display area capable of displaying an image and a non-display area outside the display area; a plurality of sub-pixels, the plurality of sub-pixels being included in the display area, each of the plurality of sub-pixels comprising a plurality of pixel electrodes; as well as a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels; The display area includes a first area capable of transmitting light and a second area outside the first area. The second region includes an upper region located above the first region and a lower region located below the first region. Wherein, the plurality of pixel electrodes include: a first pixel electrode disposed in the upper region and included in a first sub-pixel; a second pixel electrode disposed in the upper region and included in a second sub-pixel; a third pixel electrode disposed in the first region and included in a third sub-pixel; a fourth pixel electrode disposed in the first region and included in a fourth sub-pixel; a fifth pixel electrode disposed in the lower region and included in a fifth sub-pixel; and a sixth pixel electrode, disposed in the lower region and included in a sixth sub-pixel, Wherein, the plurality of data lines include: an upper data line disposed in the upper region and connected to the second sub-pixel; and a lower data line disposed in the lower region and connected to the sixth sub-pixel, Wherein, the third pixel electrode and the fourth pixel electrode are electrically connected to each other.

30. The display device according to claim 29, wherein: The plurality of data lines further include: A first data line extends from the upper region to the lower region and is connected to the first sub-pixel, the third sub-pixel, and the fifth sub-pixel. 31 . The display device according to claim 29 , further comprising a connection line which is disposed in the first region and electrically connects the third pixel electrode with the fourth pixel electrode.

32. A display device comprising: A substrate, comprising a display area capable of displaying an image and a non-display area outside the display area; a plurality of sub-pixels, the plurality of sub-pixels being included in the display area; as well as a plurality of data lines for supplying data signals for image display to the plurality of sub-pixels; The display area includes a first area that is light-transmissive and a second area outside the first area. Wherein, the plurality of data lines bypass the first area.

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