A CAN communication component

Abstract

This specification provides a CAN communication component that splits the original CAN bus topology, connecting one end of the CAN bus to an optical fiber via a first photoelectric conversion module. The first photoelectric conversion module switches between optical and electrical signals, with the optical fiber serving as the primary data transmission medium. By replacing the electrical signal in the transmission path with an optical signal, the signal transmission in the optical fiber is unaffected by electromagnetic interference. Therefore, the CAN communication component provided in this application can avoid electromagnetic interference, significantly improving signal transmission quality. Simultaneously, the speed and distance of optical signal transmission in optical fiber are far superior to those of bus transmission of electrical signals, and the transmission performance is stable. Therefore, the CAN communication device can guarantee high-speed signal transmission over long distances. Furthermore, the CAN communication device provided in this application reduces the technical implementation difficulty and space occupation caused by physical winding, achieving low-cost, high-performance, and stable transmission.

Description

Technical Field

[0001] This specification relates to the field of CAN (Controller Area Network) communication technology, and particularly to a CAN communication component. Background Technology

[0002] CAN (Controller Area Network) is a serial communication protocol widely used in automotive electronics, industrial control, and other fields. CAN has significant advantages in communication performance, network architecture, reliability, and scalability. As CAN bus devices become increasingly integrated, the number of electrically powered components within these devices is increasing. For example, vehicles integrate numerous high-voltage components, low-voltage components, drive motors, generators, power batteries, and range extenders. This leads to a growing number of interference sources within the devices, placing higher demands on the anti-interference performance of CAN communication. Simultaneously, various electronic control functions are becoming more complex, such as hybrid, range-extended, and AI (Artificial Intelligence) intelligent driving systems, requiring larger data transmission volumes and faster speeds, while also ensuring that transmission speeds are not limited by distance and maintain stability over long distances.

[0003] Currently, CAN bus devices typically use shielded twisted-pair cables with an internal metal separator at the physical layer to reflect electromagnetic interference. This requires all connectors and accessories within the device to be shielded and grounded. While this method can reduce electromagnetic interference to some extent, it still cannot guarantee the effectiveness and accuracy of signal transmission in the face of strong interference, such as in remote laser or electromagnetic pulse transmitters, or in situations involving lightning strikes.

[0004] Therefore, how to reduce the impact of electromagnetic interference on the signal transmission of CAN bus devices, and improve the signal transmission quality while ensuring transmission speed and transmission distance, is an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0005] In view of this, the embodiments of this specification provide a CAN communication component to solve the technical defects existing in the prior art.

[0006] According to a first aspect of the embodiments of this specification, a CAN communication component is provided, including: a first CAN bus, an optical fiber, and a first photoelectric conversion module;

[0007] The first CAN bus is used to transmit electrical signals, and the optical fiber is used to transmit optical signals;

[0008] The first photoelectric conversion module is connected to the CAN bus and the optical fiber, and is used to realize the conversion between the electrical signal and the optical signal.

[0009] In one embodiment, the first photoelectric conversion module includes: a CAN transceiver, an FPGA chip, and an optical module;

[0010] One set of ports of the CAN transceiver is connected to the first CAN bus, and the other set of ports is connected to the FPGA chip, which is used to realize the conversion between the differential level signal transmitted by the CAN bus and the logic level signal transmitted by the FPGA chip;

[0011] Another set of ports of the FPGA chip is connected to the optical module, which is used to encapsulate or parse the received data according to the optical fiber communication protocol.

[0012] Another set of ports of the optical module is connected to the optical fiber, which is used to realize the conversion between the optical signal transmitted by the optical fiber and the logic level signal transmitted by the FPGA chip.

[0013] In one embodiment, the FPGA chip includes: a CAN controller and an HDLC module;

[0014] One set of ports of the CAN controller is connected to the CAN transceiver, and another set of ports is connected to the HDLC module. The controller is used to: if a differential level signal is detected from the CAN transceiver, convert the differential level signal into a logic level signal and transmit it to the HDLC module; if a logic level signal is detected from the HDLC module, convert the logic level signal into a differential level signal and transmit it to the CAN transceiver.

[0015] One set of ports of the HDLC module is connected to the CAN controller, and the other set of ports is connected to the optical module. The HDLC module is used to: encapsulate the differential level signal according to the HDLC communication protocol and transmit the encapsulated data to the optical module if a differential level signal is detected from the CAN controller; and parse the optical signal according to the HDLC communication protocol and transmit the parsed data to the CAN controller if an optical signal is detected from the optical module.

[0016] In one embodiment, the optical module includes: a first processor and a second processor;

[0017] The first processor is used to receive the optical signal transmitted by the optical fiber, convert the optical signal into a logic level signal, and then transmit the logic level signal to the FPGA chip.

[0018] The second processor is used to receive the logic level signal transmitted by the FPGA chip, convert the logic level signal into an optical signal, and then transmit the optical signal to the optical fiber.

[0019] In one embodiment, the CAN controller includes: a program control module, a register control module, a bit timing logic module, and a bit data stream processing module.

[0020] In one embodiment, the CAN communication component further includes a phase-locked loop power supply circuit connected to the FPGA chip for supplying power to the FPGA chip.

[0021] In one embodiment, the CAN communication component further includes an LED driving circuit connected to the FPGA chip, used to output status according to different operating states of the FPGA chip.

[0022] In one embodiment, the CAN communication component further includes a JTAG interface circuit connected to the FPGA chip for simulating and debugging the FPGA chip.

[0023] In one embodiment, the CAN communication component further includes a FLASH chip connected to the FPGA chip for storing data output by the FPGA chip.

[0024] In one embodiment, the CAN communication component further includes: a second photoelectric conversion module connected to the end of the optical fiber, and a second CAN bus connected to the other end of the second photoelectric conversion module.

[0025] This application splits the original CAN bus topology, connecting one end of the CAN bus to an optical fiber via a first optoelectronic conversion module. The first optoelectronic conversion module switches between optical and electrical signals, with the optical fiber serving as the primary data transmission medium for transmitting data via optical signals. By replacing the electrical signals in the transmission path with optical signals, the signal transmission in the optical fiber is unaffected by electromagnetic interference. Therefore, the CAN communication component provided in this application can avoid electromagnetic interference, significantly improving signal transmission quality. Simultaneously, the speed and distance of optical signal transmission in optical fiber are far superior to that of bus transmission of electrical signals, and the transmission performance is stable. Therefore, the CAN communication device can guarantee high-speed signal transmission over long distances. Furthermore, the CAN communication device provided in this application avoids the traditional method of wrapping all transmission lines with metal separators, reducing separator resource consumption, lowering the technical implementation difficulty and space occupation caused by physical wrapping, and reducing the shielding requirements for all connectors and accessories, achieving low-cost, high-performance, and stable transmission. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of a CAN communication component provided in one embodiment of this specification;

[0027] Figure 2 This is a circuit design diagram of a CAN transceiver provided in one embodiment of this specification;

[0028] Figure 3 This is a circuit design diagram of a first processor provided in one embodiment of this specification;

[0029] Figure 4 This is a circuit design diagram of a second processor provided in one embodiment of this specification;

[0030] Figure 5 This is a flowchart illustrating the functional implementation of an HDLC_Rx functional module according to one embodiment of this specification;

[0031] Figure 6 This is a flowchart illustrating the functional implementation of an HDLC_Tx functional module according to one embodiment of this specification.

[0032] Figure 7 This is a schematic diagram illustrating the hardware resource definition and allocation of an FPGA chip according to one embodiment of this specification;

[0033] Figure 8 This is a schematic diagram illustrating the hardware resource definition and allocation of another FPGA chip provided in one embodiment of this specification;

[0034] Figure 9 This is a schematic diagram illustrating the hardware resource definition and allocation of another FPGA chip provided in one embodiment of this specification;

[0035] Figure 10 This is a schematic diagram illustrating the hardware resource definition and allocation of another FPGA chip provided in one embodiment of this specification;

[0036] Figure 11 This is a schematic diagram illustrating the hardware resource definition and allocation of another FPGA chip provided in one embodiment of this specification;

[0037] Figure 12 This is a schematic diagram illustrating the hardware resource definition and allocation of another FPGA chip provided in one embodiment of this specification;

[0038] Figure 13 This is a schematic diagram illustrating the hardware resource definition and allocation of another FPGA chip provided in one embodiment of this specification;

[0039] Figure 14 This is a schematic diagram of the functional module architecture of a CAN controller provided in one embodiment of this specification;

[0040] Figure 15 This is a circuit design diagram of a phase-locked loop power supply circuit provided in one embodiment of this specification;

[0041] Figure 16 This is a circuit design diagram of an LED driver circuit provided in one embodiment of this specification;

[0042] Figure 17 This is a circuit design diagram of a JTAG interface circuit provided in one embodiment of this specification.

[0043] Figure 18 This is a circuit design diagram of a 2MByte serial FLASH provided in one embodiment of this specification;

[0044] Figure 19 This is a circuit design diagram of a 50MHz crystal oscillator provided in one embodiment of this specification;

[0045] Figure 20 This is a schematic diagram of the structure of another CAN communication component provided in one embodiment of this specification;

[0046] Figure 21 This is a schematic diagram of the structure of a first photoelectric conversion module provided in one embodiment of this specification. Detailed Implementation

[0047] Many specific details are set forth in the following description to provide a full understanding of this specification. However, this specification can be implemented in many other ways than those described herein, and those skilled in the art can make similar extensions without departing from the spirit of this specification. Therefore, this specification is not limited to the specific implementations disclosed below.

[0048] The terminology used in one or more embodiments of this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the one or more embodiments of this specification. The singular forms “a” and “the” as used in one or more embodiments of this specification and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in one or more embodiments of this specification refers to and includes any or all possible combinations of one or more associated listed items.

[0049] It should be understood that although the terms first, second, etc., may be used to describe various information in one or more embodiments of this specification, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first may also be referred to as second without departing from the scope of one or more embodiments of this specification, and similarly, second may also be referred to as first. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to a determination."

[0050] Example 1:

[0051] This specification provides a CAN communication component, see [link to documentation]. Figure 1 , Figure 1 A schematic diagram of a CAN communication component provided according to one embodiment of this specification is shown.

[0052] The CAN communication component provided in this embodiment mainly includes: a first CAN bus, an optical fiber, and a first photoelectric conversion module. For connection methods, please refer to [link / reference]. Figure 1 One end of the first CAN bus is connected to the first photoelectric conversion module, which can convert the electrical signals transmitted by the CAN bus to the optical signals transmitted by the optical fiber. That is, it converts the received electrical signals into optical signals and vice versa. At the same time, the other set of ports of the first photoelectric conversion module is connected to the optical fiber. In this way, the optical fiber serves as the main data transmission carrier in the entire data transmission process, undertaking the function of long-distance, high-speed, and low-loss data transmission, thereby overcoming the limitations of the CAN bus in long-distance transmission.

[0053] The CAN communication component provided in this embodiment offers an innovative data transmission scheme, establishing a connection architecture between the CAN bus and optical fiber. By organically combining the CAN bus and optical fiber, and using optical fiber as the primary data transmission channel, this connection method fully leverages the advantages of optical fiber transmission, such as strong anti-interference capability, high transmission rate, and long transmission distance, compared to simply using the CAN bus for data transmission. This effectively improves the efficiency and stability of data transmission. Furthermore, since optical fiber is unaffected by electromagnetic interference during signal transmission, the CAN communication component provided in this embodiment can effectively avoid electromagnetic interference, thereby significantly improving the quality of signal transmission. Therefore, this CAN communication component can be widely used in various scenarios with high requirements for data transmission quality.

[0054] Example 2:

[0055] The specific structure of the first photoelectric conversion module is not limited in the above embodiments. It can be configured according to different power and signal transmission requirements by setting up a photodetector, a transimpedance amplifier and a driving circuit.

[0056] In response to this, this embodiment provides a specific structural diagram of a first photoelectric conversion module, which decomposes the complexity of signal conversion into different functional modules, utilizes the programmability of FPGA to fill the "flexible intermediate layer" for protocol adaptation, and reduces costs by using commercially standardized devices.

[0057] Specifically, the first photoelectric conversion module mainly includes: a CAN transceiver, an FPGA chip, and an optical module.

[0058] One set of ports on the CAN transceiver connects to the first CAN bus, and the other set connects to the FPGA chip. The CAN transceiver focuses on physical layer signal conversion, primarily used to achieve bidirectional conversion between the differential level signals of the CAN bus and the logic level signals (such as 3.3V / 5VTTL levels) that the FPGA can recognize. Specifically, if CAN bus data is received, the differential level signals received on the CAN bus are converted into logic level signals, with the data flow direction being: CAN high, CAN low → CAN transceiver → Rx (receiver); if data is sent to the CAN bus, the logic level signals are converted into the differential level signals required by the CAN bus, with the data flow direction being: Tx (transmitter) → CAN transceiver → CAN high, CAN low, etc. Figure 2 The diagram shown is a circuit design of a CAN transceiver. This dedicated chip design ensures signal integrity and avoids noise interference or insufficient drive capability problems that may occur when differential signals are directly processed by an FPGA.

[0059] The FPGA chip, serving as the core of protocol processing, connects to the CAN transceiver on one end and the optical module on the other. Its primary function is to encapsulate or parse data according to fiber optic communication protocols (such as custom protocols, TCP / IP, or dedicated optical communication protocols). The programmable nature of the FPGA allows it to flexibly adapt to different communication protocols, supporting new protocols through firmware upgrades without hardware modifications, significantly improving system compatibility.

[0060] Another set of ports on the optical module connects to the optical fiber. The optical module focuses on the physical conversion between optical and electrical signals, modulating the logic-level signals output by the FPGA into optical signals, or converting the optical signals from the optical fiber into logic-level signals. Specifically, if receiving optical signals from a remote optical module, the module converts the optical signals transmitted from the remote optical module into logic-level signals, with the data flow direction being: remote optical module → optical module → Rx (receiver); if sending optical signals to a remote optical module, the module converts the logic-level signals into optical signals and transmits them to the remote optical module, with the data flow direction being: Tx (transmitter) → optical module → remote optical module. This modular design allows for the direct reuse of standard optical modules, reducing development costs. To achieve functional decoupling, the optical module can be specifically designed to include a first processor (optical module R-end) and a second processor (optical module T-end). The first processor receives the optical signals transmitted through the optical fiber, converts the optical signals into logic-level signals, and then transmits the logic-level signals to the FPGA chip, such as... Figure 3 The diagram shown is a circuit design of a first processor; the second processor receives logic level signals transmitted by the FPGA chip, converts the logic level signals into optical signals, and then transmits the optical signals to an optical fiber, such as... Figure 4 The diagram shown is a circuit design diagram of a second processor.

[0061] In this structural design, the strong electromagnetic environment of the CAN bus and the pure optical transmission environment of the optical fiber are electrically isolated through the FPGA chip, avoiding the impact of common-mode interference, surge and other noise of the CAN bus on the optical signal transmission, while preventing the high-speed signal of the optical module from causing crosstalk to the CAN bus.

[0062] Example 3:

[0063] This embodiment provides a specific structural form of an FPGA chip, which improves system flexibility and scalability through functional decoupling design.

[0064] Specifically, the FPGA chip mainly includes a CAN controller and an HDLC module.

[0065] One set of ports on the CAN controller connects to the CAN transceiver, and the other set connects to the HDLC module. The CAN controller continuously monitors the CAN transceiver for incoming data. If a differential level signal is detected from the CAN transceiver, it converts the differential level signal into a logic level signal and transmits it to the HDLC module. Conversely, if a logic level signal is detected from the HDLC module, it converts the logic level signal into a differential level signal and transmits it to the CAN transceiver. The CAN controller has a built-in independent CAN protocol engine that can directly handle the physical layer signal timing and data link layer protocol of the CAN bus. Compared to pure FPGA logic implementation, the hardware-level controller can more accurately meet the stringent timing requirements of the CAN protocol and avoid protocol compatibility issues that may arise from software simulation.

[0066] One set of ports on the HDLC module is connected to the CAN controller, and the other set is connected to the optical module. Its main functions are: if a differential level signal is detected from the CAN controller, the differential level signal is encapsulated according to the HDLC communication protocol, and the encapsulated data is transmitted to the optical module; if an optical signal is detected from the optical module, the optical signal is parsed according to the HDLC communication protocol, and the parsed data is transmitted to the CAN controller. Specifically, the HDLC module can employ mechanisms such as flag field delimitation, cyclic redundancy check error detection, and transparent transmission to encapsulate the raw data output from the CAN controller into a frame structure suitable for fiber optic transmission. Furthermore, multiple CAN frames can be merged into a single HDLC frame for transmission to reduce optical signal start-stop losses and improve transmission efficiency. The HDLC module can be further divided into HDLC_Rx and HDLC_Tx functional modules, such as... Figure 5 The diagram shows the functional implementation flowchart of the HDLC_Rx module. After initialization, it receives data and determines whether it is a frame header. If it is identified as a frame header, it receives the data and simultaneously checks whether it is a frame trailer. If the frame trailer is detected after data reception, the frame data reception is complete. Figure 6 The diagram shows the functional implementation flowchart of the HDLC_Tx module. After initialization, it automatically enters the idle state. If a data frame to be sent is detected, the data header, data address, data control, and data are sent in sequence. If the data frame is sent, CRC1 and CRC2 checks are performed, and then the data tail is sent. This completes one data transmission process.

[0067] like Figures 7 to 13 The diagram shows the hardware resource definition and allocation of an FPGA chip under this configuration. It should be noted that... Figures 7 to 13 This is a schematic diagram showing the block layout of the entire chip.

[0068] This architecture combines the real-time performance of the CAN bus with the reliability of the HDLC protocol through a design approach that uses a dedicated controller to handle the underlying protocol and standardized modules to manage the upper-layer links. It leverages the hardware programmability of the FPGA to achieve "software-hardware collaboration" for protocol adaptation.

[0069] Example 4:

[0070] To achieve standardized protocol processing, hardware decoupling, and reliable data transmission, this embodiment provides a specific module structure for a CAN controller.

[0071] like Figure 14 The diagram shows a functional module architecture of a CAN controller. The CAN controller mainly includes: a program control module, a register control module, a bit timing logic module, and a bit data stream processing module.

[0072] The program control module, as the top-level unit, coordinates the runtime sequence of each module and responds to external instructions. The register control module is responsible for reading, writing, and resetting all registers in the program, implementing address decoding and data latching. The bit timing logic module, for the CAN bus protocol, completes bit synchronization control, generates bit timing signals containing synchronization segments and propagation time periods, and compensates for phase errors. The bit data stream processing module handles data operations, converting CAN bus differential signals to serial data bit streams, and performing data bit stuffing / destuffing and encoding / decoding. These modules work collaboratively through signal interaction, forming a complete parsing and execution system for the CAN bus protocol, ensuring the orderliness of the system control logic and the accuracy of data processing.

[0073] With this configuration, the CAN controller's built-in hardware logic circuitry can automatically complete the low-level processing of the CAN protocol.

[0074] Example 5:

[0075] To ensure the performance stability of the FPGA chip, in one embodiment, the CAN communication component can be further configured with a phase-locked loop power supply circuit connected to the FPGA chip for powering the FPGA chip. Figure 15 The diagram shown is a circuit design diagram of a phase-locked loop power supply circuit to ensure normal power supply to the FPGA chip.

[0076] In one embodiment, the CAN communication component can be further configured with an LED driver circuit connected to the FPGA chip to output status based on different operating states of the FPGA chip, providing status and fault displays. Figure 16 The diagram shown is a circuit design diagram of an LED driver circuit.

[0077] In one embodiment, the CAN communication component can be further configured with a JTAG interface circuit connected to the FPGA chip for simulating and debugging the FPGA chip. Figure 17 The diagram shown is a circuit design diagram of a JTAG interface circuit.

[0078] In one embodiment, the CAN communication component can be further configured with a FLASH chip connected to the FPGA chip, such as a 2MByte serial FLASH (EPCS16), to store the data output by the FPGA chip, providing sufficient memory space for the FPGA chip to perform data conversion and transmission. Figure 18 The diagram shown is a circuit design diagram of a 2MByte serial FLASH.

[0079] In one embodiment, the CAN communication component can be further configured to connect to a crystal oscillator, such as a 50MHz crystal oscillator, connected to the FPGA chip to provide a clock source for the FPGA. Figure 19 The diagram shown is a circuit design diagram for a 50MHz crystal oscillator.

[0080] Example 6:

[0081] The above embodiments describe the structure of a single-sided CAN communication component. This embodiment describes a double-sided CAN communication component, which breaks through the transmission distance limitation of the traditional CAN bus and realizes seamless interconnection of heterogeneous networks.

[0082] like Figure 20 The schematic diagram of another CAN communication component shown mainly includes: a first CAN bus, an optical fiber, a first photoelectric conversion module, a second photoelectric conversion module, and a second CAN bus.

[0083] One end of the optical fiber is connected to the first photoelectric conversion module, and the other end is connected to the second photoelectric conversion module. The other end of the first photoelectric conversion module is connected to the first CAN bus, and the other end of the second photoelectric conversion module is connected to the second CAN bus.

[0084] It should be noted that the first photoelectric conversion module and the second photoelectric conversion module have the same structure and function, such as... Figure 21 The diagram shows a schematic of a first photoelectric conversion module. The second photoelectric conversion module can be referred to in the same figure. The first CAN bus and the second CAN bus have the same structure and function. The second photoelectric conversion module can be referred to in the introduction of the first photoelectric conversion module, and the second CAN bus can be referred to in the introduction of the first CAN bus. They will not be described again here.

[0085] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments in this specification are not limited to the described order of actions, because according to the embodiments in this specification, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the embodiments in this specification.

[0086] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0087] The preferred embodiments disclosed above are merely illustrative of this specification. The optional embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the embodiments described herein. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the embodiments, thereby enabling those skilled in the art to better understand and utilize this specification. This specification is limited only by the claims and their full scope and equivalents.

Claims

1. A CAN communication component, characterized in that, include: The first CAN bus, optical fiber, and first photoelectric conversion module; The first CAN bus is used to transmit electrical signals, and the optical fiber is used to transmit optical signals; The first photoelectric conversion module is connected to the CAN bus and the optical fiber, and is used to realize the conversion between the electrical signal and the optical signal; The first photoelectric conversion module includes: a CAN transceiver, an FPGA chip, and an optical module; One set of ports of the CAN transceiver is connected to the first CAN bus, and the other set of ports is connected to the FPGA chip, which is used to realize the conversion between the differential level signal transmitted by the CAN bus and the logic level signal transmitted by the FPGA chip; Another set of ports of the FPGA chip is connected to the optical module, which is used to encapsulate or parse the received data according to the optical fiber communication protocol. Another set of ports of the optical module is connected to the optical fiber, which is used to realize the conversion between the optical signal transmitted by the optical fiber and the logic level signal transmitted by the FPGA chip; The FPGA chip includes: a CAN controller and an HDLC module; One set of ports of the CAN controller is connected to the CAN transceiver, and another set of ports is connected to the HDLC module. The controller is used to: if a differential level signal is detected from the CAN transceiver, convert the differential level signal into a logic level signal and transmit it to the HDLC module; if a logic level signal is detected from the HDLC module, convert the logic level signal into a differential level signal and transmit it to the CAN transceiver. One set of ports of the HDLC module is connected to the CAN controller, and the other set of ports is connected to the optical module. The HDLC module is used to: encapsulate the differential level signal according to the HDLC communication protocol and transmit the encapsulated data to the optical module if a differential level signal is detected from the CAN controller; and parse the optical signal according to the HDLC communication protocol and transmit the parsed data to the CAN controller if an optical signal is detected from the optical module.

2. The CAN communication component according to claim 1, characterized in that, The optical module includes: a first processor and a second processor; The first processor is used to receive the optical signal transmitted by the optical fiber, convert the optical signal into a logic level signal, and then transmit the logic level signal to the FPGA chip. The second processor is used to receive the logic level signal transmitted by the FPGA chip, convert the logic level signal into an optical signal, and then transmit the optical signal to the optical fiber.

3. The CAN communication component according to claim 1, characterized in that, The CAN controller includes: a program control module, a register control module, a bit timing logic module, and a bit data stream processing module.

4. The CAN communication component according to claim 1, characterized in that, Also includes: A phase-locked loop power supply circuit connected to the FPGA chip is used to supply power to the FPGA chip.

5. The CAN communication component according to claim 1, characterized in that, Also includes: An LED driver circuit connected to the FPGA chip is used to output status according to different operating states of the FPGA chip.

6. The CAN communication component according to claim 1, characterized in that, Also includes: The JTAG interface circuit connected to the FPGA chip is used for simulating and debugging the FPGA chip.

7. The CAN communication component according to claim 1, characterized in that, Also includes: A FLASH chip connected to the FPGA chip is used to store the data output by the FPGA chip.

8. The CAN communication component according to any one of claims 1 to 7, characterized in that, Also includes: A second photoelectric conversion module connected to the end of the optical fiber, and a second CAN bus connected to the other end of the second photoelectric conversion module.

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