Constant current driving circuit, LED display driving chip and display device
By introducing feedback modules and clock signal control into the constant current driving circuit, the current unevenness caused by operational amplifier offset is solved, and the consistency of the output current and the brightness uniformity of the display panel are achieved.
Patent Information
- Application Number
- CN202510926063.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-04
- Publication Date
- 2025-08-01
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing constant current driving circuits cause uneven output currents of different channels due to the offset of the operational amplifier, resulting in uneven brightness of the display panel.
Add a feedback module to the constant current driving circuit, and control the operational amplifier to switch to the operating mode and sampling mode through the clock signal. The offset voltage is obtained in the sampling mode and the offset of the bias voltage is eliminated in the operating mode to ensure that the voltage difference between the front and back input terminals of the operational amplifier approaches zero.
Improves the consistency of output current between channels and improves the brightness uniformity of the display panel.
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Figure CN120412468A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of LED display driving, and particularly to a constant current driving circuit, an LED display driving chip, and a display device. Background Art
[0002] An LED (Light Emitting Diode in full English) display screen is a dot matrix module or pixel unit composed of light emitting diodes, which has been widely used in the field of information display due to its high reliability, long service life, strong environmental adaptability, low usage cost, and other characteristics.
[0003] A constant current (also known as a constant current source) driving chip plays a crucial and decisive role in the quality of an LED display screen, enabling the LED display screen to operate stably. Specifically, the constant current driving circuit in the constant current driving chip is, for example, a traditional pulse width modulation (i.e., Pulse Width Modulation, PWM) dimming device, which can output a stable current to enable the entire circuit of the LED display screen to operate stably.
[0004] Such as Figure 1a and Figure 1b As shown, common constant current driving circuits include a common cathode constant current driving circuit and a common anode constant current driving circuit. However, such common constant current driving circuits will cause a change in the output current relative to the ideal value due to the asymmetry of the operational amplifier itself and the offset voltage at the input end of the operational amplifier caused by Mismatch (offset).
[0005] Considering that there are several channel outputs in a chip, and each channel has a Figure 1a or Figure 1b constant current driving circuit as shown. These channels have the same reference voltage VCRES. However, due to the influence of different mismatches (the influence of Mismatch is random and follows a normal distribution) on the operational amplifiers of different channels, their bias voltages VD have different values, which will cause different output currents in different channels within a chip, and further lead to the problem of uneven display brightness in the display array of the display panel in columns. Summary of the Invention
[0006] In view of the above problems, the purpose of the present invention is to provide a constant current driving circuit, an LED display driving chip, and a display device. By adding a feedback module, the constant current driving circuit is divided into a working mode and a sampling mode. The offset voltage is obtained in the sampling mode, and the bias voltage is adjusted in the working mode to eliminate the offset voltage in the bias voltage, so that the voltage difference between the positive and negative input ends of the operational amplifier approaches zero.
[0007] According to an aspect of the present invention, a constant current driving circuit is provided, including: an operational amplifier, including a non-inverting input terminal, an inverting input terminal, and an output terminal, the non-inverting input terminal receiving a reference voltage; a feedback module, connected to the non-inverting input terminal, the inverting input terminal, and the output terminal of the operational amplifier, the inverting input terminal of the operational amplifier receiving a bias voltage via the feedback module, wherein the feedback module controls the operational amplifier to switch between a working mode and a sampling mode according to a clock signal; in the sampling mode, the feedback module acquires an offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier; in the working mode, the feedback module applies the offset voltage acquired in the sampling mode to the bias voltage, so that the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier approaches zero.
[0008] Optionally, the feedback module includes: a first switch, a first end of the first switch being connected to the non-inverting input terminal of the operational amplifier; a second switch, a first end of the second switch being connected to a second end of the first switch; a third switch, a first end of the third switch being connected to the inverting input terminal of the operational amplifier, and a second end being connected to the output terminal of the operational amplifier; a fourth switch, a first end of the fourth switch being connected to the output terminal of the operational amplifier; a capacitor, a first end of the capacitor being connected to the second end of the first switch, and a second end being connected to the inverting input terminal of the operational amplifier.
[0009] Optionally, in the sampling mode, the first switch and the third switch are turned on, and the second switch and the fourth switch are turned off.
[0010] Optionally, in the sampling mode, the capacitor acquires and stores the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier.
[0011] Optionally, in the working mode, the first switch and the third switch are turned off, and the second switch and the fourth switch are turned on.
[0012] Optionally, when the clock signal is at a high level, the operational amplifier is in the working mode, and when the clock signal is at a low level, the operational amplifier is in the sampling mode; or when the clock signal is at a low level, the operational amplifier is in the working mode, and when the clock signal is at a high level, the operational amplifier is in the sampling mode.
[0013] Optionally, further including: a power transistor, a first end of the power transistor being connected to an LED string, and a control end being connected to a second end of the fourth switch; a switch transistor array, including a plurality of switch transistors, first ends of the plurality of switch transistors being connected to a second end of the second switch, and control ends receiving a plurality of control voltages in one-to-one correspondence.
[0014] Optionally, the second ends of multiple switching tubes in the switching tube array are all connected to the ground terminal; or the second ends of multiple switching tubes in the switching tube array are all connected to the power supply voltage.
[0015] According to another aspect of the present invention, there is provided an LED display driving chip, wherein the LED display driving chip includes a plurality of the above constant current driving circuits.
[0016] According to another aspect of the present invention, there is provided a display device, wherein the display device includes a display panel and the above LED display driving chip.
[0017] In the constant current driving circuit, LED display driving chip, and display device provided by the present invention, a feedback module is added to the constant current driving circuit. The feedback module is controlled by a clock signal, so that the operational amplifier in the constant current driving circuit is divided into a working mode and a sampling mode according to the clock signal. In the sampling mode, the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier is obtained. In the working mode, the bias voltage received by the inverting input terminal of the operational amplifier is adjusted (the offset voltage obtained in the sampling mode is superimposed on the bias voltage) to eliminate the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier, so that the voltage difference between the positive and negative input terminals of the operational amplifier approaches zero, the output current of the constant current driving circuit is closer to the desired ideal value, and at the same time, the consistency of the output current between channels is greatly improved.
[0018] Furthermore, in the constant current driving circuit, LED display driving chip, and display device provided by the present application, the feedback module in the constant current driving circuit includes four switches and a capacitor, and the on-off of the four switches is controlled by a clock signal. The structure of this feedback module is simple, and the consistency of the output current between multiple constant current driving circuits can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features, and advantages of the present invention will become clearer. In the drawings: Figure 1a The circuit structure schematic diagram of a common anode constant current driving circuit according to the prior art is shown; Figure 1b The circuit structure schematic diagram of a common cathode constant current driving circuit according to the prior art is shown; Figure 2 The circuit structure schematic diagram of a constant current driving circuit according to the first embodiment of the present invention is shown; Figure 3 The circuit structure schematic diagram of the feedback module in the constant current driving circuit according to the first embodiment of the present invention is shown; Figure 4Shows the timing diagram of the clock signal and the PWM signal of the constant current driving circuit according to the first embodiment of the present invention; Figure 5a Shows the schematic circuit diagram of the sampling mode of the constant current driving circuit according to the first embodiment of the present invention; Figure 5b Shows the schematic circuit diagram of the working mode of the constant current driving circuit according to the first embodiment of the present invention; Figure 6 Shows the schematic circuit diagram of the constant current driving circuit according to the second embodiment of the present invention. Detailed Description of the Invention
[0020] The various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the drawings, the same or similar reference numerals are used for the same elements. For clarity, the various parts in the drawings are not drawn to scale.
[0021] The specific embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
[0022] Figure 2 Shows the schematic circuit diagram of the constant current driving circuit according to the first embodiment of the present invention; Figure 3 Shows the schematic circuit diagram of the feedback module in the constant current driving circuit according to the first embodiment of the present invention; Figure 4 Shows the timing diagram of the clock signal and the PWM signal of the constant current driving circuit according to the first embodiment of the present invention; Figure 5a Shows the schematic circuit diagram of the sampling mode of the constant current driving circuit according to the first embodiment of the present invention; Figure 5b Shows the schematic circuit diagram of the working mode of the constant current driving circuit according to the first embodiment of the present invention.
[0023] As Figure 2 shown, the constant current driving circuit 200 of the present application is a common anode constant current driving circuit, which includes: an operational amplifier OP, a feedback module 210, a power transistor TM, and a switch transistor array 220.
[0024] The operational amplifier OP includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal receives a reference voltage VCRES to provide a reference for constant current control; the inverting input terminal is connected to the first end of the switch transistor array 220 via the feedback module 210 to receive a bias voltage VD; the output terminal is connected to the power transistor TM via the feedback module 210.
[0025] In the ideal constant current driving circuit 200, the reference voltage VCRES received by the non-inverting input terminal of the operational amplifier OP should be the same as the bias voltage VD received by the inverting input terminal. That is, in the ideal constant current driving circuit 200, the actual voltage VINN received by the inverting input terminal should be equal to the bias voltage VD which is equal to the reference voltage VCRES. However, due to mismatches in the circuit of the operational amplifier OP, there is a mismatch voltage Voff between the reference voltage VCRES received by the non-inverting input terminal and the bias voltage VD received by the inverting input terminal of the operational amplifier OP. That is, there is a mismatch voltage Voff between the actual voltage VINN received by the inverting input terminal and the reference voltage VCRES. That is, the actual bias voltage is the sum of the ideal bias voltage and the offset voltage. At this time, the reference voltage VCRES = actual voltage VINN + mismatch voltage Voff = bias voltage VD + mismatch voltage Voff.
[0026] The feedback module 210 divides the entire working state of the constant current driving circuit 200 into a working mode and a sampling mode according to the clock signal CLK. In the sampling mode, the inverting input terminal and the output terminal of the operational amplifier OP are connected together to form a unity gain buffer, and the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier OP is sampled and stored. In the working mode, the offset voltage Voff stored in the sampling mode by the feedback module 210 eliminates the influence of the offset, and the voltages received by the two ends of the operational amplifier OP are the same. At the same time, the consistency of the output current between channels is greatly improved.
[0027] The first end of the power transistor TM is the output terminal of the constant current driving circuit 200 for outputting current, and is connected to the cathode of the LED string in the display array of the display panel, so as to provide a constant current for the LED string; the second end of the power transistor TM is connected to the first end of the switch transistor array 220; the control end of the power transistor TM is connected to the output terminal of the operational amplifier OP via the feedback module 210.
[0028] The switch transistor array 220 includes N + 1 switch transistors T0 - Tn. The first ends of the N + 1 switch transistors are connected to each other and serve as the first end of the switch transistor array 220 connected to the feedback module 210 and the power transistor TM; the second ends of the N + 1 switch transistors are connected to the ground terminal GND; the control ends of the N + 1 switch transistors are respectively connected to N + 1 control voltages VCTRL<0> - VCTRL <n>One-to-one connection. The N+1 switching transistors T0-Tn in the switching transistor array 220 serve as current regulating switching transistors to change the equivalent impedance and achieve multi-level constant current output to adapt to the requirements of different brightness levels of the LED string.
[0029] Further, referring to Figure 3 , the feedback module 210 includes a first switch S1 to a fourth switch S4, and a capacitor C1. Among them, the first terminal of the first switch S1 is connected to the non-inverting input terminal of the operational amplifier OP; the first terminal of the second switch S2 is connected to the second terminal of the first switch S1, and the second terminal is connected to the first terminal of the switching transistor array 220 to receive the bias voltage VD; the first terminal of the third switch S3 is connected to the inverting input terminal of the operational amplifier OP, and the second terminal is connected to the output terminal of the operational amplifier OP; the first terminal of the fourth switch S4 is connected to the output terminal of the operational amplifier OP, and the second terminal is connected to the control terminal of the power transistor TM; the first terminal of the capacitor C1 is connected to the second terminal of the first switch S1, and the second terminal is connected to the inverting input terminal of the operational amplifier OP. In the feedback module 210, the clock signal CLK controls the conduction and cutoff of the first switch S1 to the fourth switch S4, thereby enabling the constant current driving circuit 200 to switch between the working mode and the sampling mode.
[0030] Specifically, Figure 4 shows the timing relationship between the clock signal CLK and the PWM signal. Among them, the constant current driving circuit 200 is controlled to switch between the working mode and the sampling mode according to the high-level state and the low-level state of the clock signal CLK. For example, when the clock signal CLK is at a high level, the operational amplifier OP in the constant current driving circuit 200 is controlled to work in the sampling mode, and when the clock signal CLK is at a low level, the operational amplifier OP is controlled to work in the working mode; or when the clock signal CLK is at a high level, the operational amplifier OP is controlled to work in the working mode, and when the clock signal CLK is at a low level, the operational amplifier OP is controlled to work in the sampling mode.
[0031] Figure 5a shows the conduction and cutoff states of the first switch S1 to the fourth switch S4 in the feedback module 210 when the constant current driving circuit 200 is in the sampling mode. Referring to Figure 5a , in the sampling mode, the first switch S1 and the third switch S3 are turned on, and the second switch S2 and the fourth switch S4 are turned off. At this time, the output terminal and the inverting input terminal of the operational amplifier OP are connected together to form the structure of a unity-gain buffer. Due to the existence of random mismatch, there will be a certain voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier OP, that is, the offset voltage Voff, usually about several mV. This voltage difference will be stored on the capacitor C1 in the form of charge. At this time, the voltage on the capacitor C1 is the difference between the reference voltage VCRES and the actual voltage VINN at the inverting input terminal of the operational amplifier OP, that is, VCRES - VINN = VCRES - (VD + Voff) = -Voff.
[0032] Figure 5b shows the on and off states of the first switch S1 to the fourth switch S4 in the feedback module 210 of the constant current driving circuit 200 in the working mode. Refer to Figure 5b , in the working mode, the first switch S1 and the third switch S3 are turned off, and the second switch S2 and the fourth switch S4 are turned on. The first end of the capacitor C1 will change from being connected to the non-inverting input terminal via the first switch S1 to being connected to the first end of the switch array 220 via the second switch S2, and the second end of the capacitor C1 becomes only connected to the inverting input terminal of the operational amplifier OP. The capacitor C1 still retains the offset voltage Voff stored in the sampling stage. According to the fact that the voltages on the left and right plates of the capacitor C1 are kept consistent, the voltage received by the inverting input terminal of the operational amplifier OP is the sum of the bias voltage VD with the offset voltage Voff and the offset voltage Voff stored in the sampling stage, that is, the voltage received by the inverting input terminal of the operational amplifier OP is (VD + Voff) + (-Voff) = VINN = VD = (VD + Voff) + (VCRES - (VD + Voff)) = VCRES, so that the voltages received by the non-inverting input terminal and the inverting input terminal of the operational amplifier OP are of the same magnitude. Therefore, in the working mode, the feedback module 210 superimposes the offset voltage Voff obtained in the sampling mode on the bias voltage to make the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier OP approach zero.
[0033] Therefore, the capacitor C1 can eliminate or reduce the offset voltage Voff caused by the operational amplifier OP in the constant current driving circuit 200, make the magnitudes of the bias voltage VD and the reference voltage VCRES tend to be consistent, and further make the output current closer to the desired ideal value, while greatly improving the consistency of the output currents between channels.
[0034] Furthermore, Figure 6 The schematic circuit diagram of the constant current driving circuit according to the second embodiment of the present invention is shown. Compared with the first embodiment, the circuit of the constant current driving circuit in the second embodiment is a common cathode constant current driving circuit.
[0035] Referring to Figure 6 , the common cathode constant current driving circuit 200 in the second embodiment includes: an operational amplifier OP, a feedback module 210, a power transistor TM, and a switch transistor array 220.
[0036] The operational amplifier OP includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The non-inverting input terminal receives a reference voltage VCRES to provide a reference for constant current control; the inverting input terminal is connected to the first end of the switch transistor array 220 via the feedback module 210 to receive a bias voltage VD; the output terminal is connected to the power transistor TM via the feedback module 210.
[0037] The feedback module 210 divides the entire working state of the constant current driving circuit 200 into a working mode and a sampling mode according to a clock signal CLK. In the sampling mode, the inverting input terminal and the output terminal of the operational amplifier OP are connected together to form a unity gain buffer, and the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier OP is sampled and stored. In the working mode, the offset voltage Voff stored in the sampling mode by the feedback module 210 eliminates the influence of the offset, the voltages received at both the positive and negative ends of the operational amplifier OP are the same, and at the same time, the consistency of the output current between channels is greatly improved.
[0038] The first end of the power transistor TM is the output terminal of the constant current driving circuit 200, which is used to output current and is connected to the anodes of the LED lamp strings in the display array of the display panel, so as to provide a constant current for the LED lamp strings; the second end of the power transistor TM is connected to the first end of the switch transistor array 220; the control end of the power transistor TM is connected to the output terminal of the operational amplifier OP via the feedback module 210.
[0039] The switch transistor array 220 includes N + 1 switch transistors T0 - Tn. The first ends of the N + 1 switch transistors are connected to each other and serve as the first end of the switch transistor array 220 connected to the feedback module 210 and the power transistor TM; the second ends of the N + 1 switch transistors are connected to the power supply voltage VCC; the control ends of the N + 1 switch transistors are respectively connected to N + 1 control voltages Vctrl[0] - Vctrl[n] in one-to-one correspondence. The N + 1 switch transistors T0 - Tn in the switch transistor array 220 serve as current regulating switch transistors to change the equivalent impedance and achieve multi-level constant current output to adapt to the requirements of different brightnesses of the LED lamp strings.
[0040] Furthermore, the present application also provides an LED display driving chip, which includes a plurality of the aforementioned constant current driving circuits 200.
[0041] Furthermore, the present application also provides a display device, which includes a display panel and the aforementioned LED display driving chip.
[0042] For the constant current driving circuit, LED display driving chip and display device provided by the present invention, a feedback module is added to the constant current driving circuit. The feedback module is controlled by a clock signal, so that the operational amplifier in the constant current driving circuit is divided into a working mode and a sampling mode according to the clock signal. In the sampling mode, the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier is obtained. In the working mode, the bias voltage received by the inverting input terminal of the operational amplifier is adjusted to eliminate the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier, so that the voltages at the non-inverting and inverting input terminals of the operational amplifier are the same, the output current of the constant current driving circuit is closer to the desired ideal value, and at the same time, the consistency of the output currents between channels is greatly improved.
[0043] Furthermore, for the constant current driving circuit, LED display driving chip and display device provided by the present application, the feedback module in the constant current driving circuit includes four switches and a capacitor, and the on-off of the four switches is controlled by a clock signal. The structure of this feedback module is simple, and the consistency of the output currents between multiple constant current driving circuits can be achieved.
[0044] As described above in the embodiments of the present invention, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, according to the above description, many modifications and variations can be made. These embodiments are selected and specifically described in this specification to better explain the principle and practical application of the present invention, so that those skilled in the art can make good use of the present invention and its modifications based on the present invention. The present invention is only limited by the claims and their full scope and equivalents.< / n>
Claims
1. A constant current driving circuit, comprising: An operational amplifier, including a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein the non-inverting input terminal receives a reference voltage; A feedback module, which is respectively connected to the non-inverting input terminal, the inverting input terminal, and the output terminal of the operational amplifier, and the inverting input terminal of the operational amplifier receives a bias voltage via the feedback module, wherein the feedback module controls the operational amplifier to switch between a working mode and a sampling mode according to a clock signal; In the sampling mode, the feedback module acquires the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier; In the working mode, the feedback module superimposes the offset voltage acquired in the sampling mode on the bias voltage, so that the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier approaches zero.
2. The constant current driving circuit according to claim 1, wherein, The feedback module includes: A first switch, the first end of which is connected to the non-inverting input terminal of the operational amplifier; A second switch, the first end of which is connected to the second end of the first switch; A third switch, the first end of which is connected to the inverting input terminal of the operational amplifier, and the second end is connected to the output terminal of the operational amplifier; A fourth switch, the first end of which is connected to the output terminal of the operational amplifier; A capacitor, the first end of which is connected to the second end of the first switch, and the second end is connected to the inverting input terminal of the operational amplifier.
3. The constant current driving circuit according to claim 2, wherein, In the sampling mode, the first switch and the third switch are turned on, and the second switch and the fourth switch are turned off.
4. The constant current driving circuit according to claim 2, wherein, In the sampling mode, the capacitor acquires and stores the offset voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier.
5. The constant current driving circuit according to claim 2, wherein, In the working mode, the first switch and the third switch are turned off, and the second switch and the fourth switch are turned on.
6. The constant current driving circuit according to claim 3 or 5, wherein, When the clock signal is at a high level, the operational amplifier is in the working mode; when the clock signal is at a low level, the operational amplifier is in the sampling mode; or When the clock signal is at a low level, the operational amplifier is in the working mode; when the clock signal is at a high level, the operational amplifier is in the sampling mode.
7. The constant current driving circuit according to claim 2, wherein, It further includes: A power transistor, the first end of which is connected to an LED lamp string, and the control end is connected to the second end of the fourth switch; A switch transistor array, including a plurality of switch transistors, the first ends of the plurality of switch transistors are all connected to the second end of the second switch, and the control ends respectively receive a plurality of control voltages.
8. The constant current driving circuit according to claim 7, wherein, The second ends of the plurality of switch transistors in the switch transistor array are all connected to the ground terminal; or The second ends of the plurality of switch transistors in the switch transistor array are all connected to the power supply voltage.
9. An LED display driving chip, wherein, The LED display driving chip includes a plurality of constant current driving circuits as described in any one of claims 1-8.
10. A display device, wherein, The display device includes a display panel and an LED display driving chip as described in claim 9.
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