System and method for operating low density parity check bit flipping decoder

The LDPC bit flip decoder iteratively corrects bit errors in LDPC codewords through soft reliability information, solving the contradiction between error correction ability and complexity in the prior art, improving error correction ability and extending the service life of the storage device.

CN120548677APending Publication Date: 2025-08-26SK HYNIX NAND PRODUCT SOLUTIONS CORP
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Patent Information

Application Number
CN202380089242.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-12-28
Filing Date
2023-11-22
Publication Date
2025-08-26

AI Technical Summary

Technical Problem

There is a contradiction between error correction capability and complexity in existing LDPC codeword decoders, resulting in the problems of high uncorrectable bit error rate and shortened service life of storage devices.

Method used

The LDPC bit flip decoder is used to correct the bit errors in the LDPC codewords through the iterative bit flip algorithm using soft reliability information, limiting the number of flips of high confidence bits, and preventing more than 33%.

Benefits of technology

It improves the error correction ability of LDPC codewords, reduces the uncorrectable bit error rate, and extends the service life of the storage device.

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Abstract

Systems and methods for operating a low density parity check (LDPC) bit flipping decoder are disclosed herein. An LDPC codeword is received, and each bit in the LDPC codeword is classified as a high confidence bit or a low confidence bit based on at least one criterion. The LDPC codeword is iteratively processed by a plurality of iterations based on a parity check equation associated with each bit in the LDPC codeword to generate a processed LDPC codeword. For each of the plurality of iterations, the iterative processing includes flipping at least one bit of the LDPC codeword, while for the first n iterations of the plurality of iterations, preventing bits classified as high confidence bits from including more than 33% of the total number of flipped bits. The processed LDPC codeword is decoded.
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