Single-chip microcomputer and distance measuring sensor

Abstract

The embodiment of the invention discloses a single chip microcomputer and a distance measuring sensor, which are used for realizing high precision and high resolution. The embodiment of the invention comprises a timer, a GPIO (General Purpose Input / Output) input register, a DMA (Direct Memory Access) controller and a memory, wherein the DMA controller is respectively connected with the timer, the GPIO input register and the memory; the GPIO input register is used for latching image data sent by an image sensor through a plurality of parallel data ends in a digital video port (DVP); the timer is used for counting pixel clock signals during the effective period of the line synchronization signals when the line synchronization signals and the pixel clock signals sent by the image sensor are received; and when the count value of the pixel clock signal reaches a preset threshold value, controlling the DMA controller to cache the image data latched by the GPIO input register to the memory.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of image data processing, and in particular to a single-chip microcomputer and a ranging sensor for achieving high precision and high resolution. Background Art

[0002] Distance sensors are essential for robots, capable of measuring the distance between an object and the robot. Distance sensors based on triangulation are widely used. Triangulation involves projecting a laser onto an object's surface, capturing the laser's position with a camera, and calculating the object's distance based on geometric triangulation. Existing solutions combine a contact image sensor (CIS) with a serial peripheral interface (SPI) port with a microcontroller dedicated to processing SPI port signals to generate high-resolution image data. The microcontroller dedicated to processing SPI port signals is used to cache the image sensor's image data in memory.

[0003] However, the image data processed by this type of ranging sensor currently has low accuracy and cannot meet users' needs for processing high-precision image data. Summary of the Invention

[0004] The embodiments of the present application provide a single chip microcomputer and a ranging sensor for achieving high precision and high resolution.

[0005] A first aspect of an embodiment of the present application provides a single-chip microcomputer, comprising: a timer, a GPIO input register, a direct memory access (DMA) controller, and a memory; wherein the DMA controller is connected to the timer, the GPIO input register, and the memory, respectively;

[0006] The GPIO input register is used to latch image data sent by the image sensor through multiple parallel data terminals in the digital video port DVP;

[0007] The timer is configured to, upon receiving a line synchronization signal and a pixel clock signal sent by the image sensor, count the pixel clock signal during a valid period of the line synchronization signal; and, when the count value of the pixel clock signal reaches a preset threshold, control the DMA controller to cache the image data latched by the GPIO input register into the memory.

[0008] Optionally, the timer is provided with an external trigger input terminal and an edge detection terminal, wherein the external trigger input terminal is connected to a pixel clock terminal of the image sensor, and the edge detection terminal is connected to a line synchronization signal terminal of the image sensor;

[0009] The timer is specifically configured to count the pixel clock signal that can trigger the timer to count when the edge detection end receives the line synchronization signal that can start the timer and is sent by the image sensor through the line synchronization signal end.

[0010] Optionally, the timer is provided with an external trigger input terminal, wherein the external trigger input terminal is connected to the output terminal of an AND gate, and two input terminals of the AND gate are respectively connected to a line synchronization signal terminal and a pixel clock terminal of the image sensor;

[0011] The timer is used to count the reminder count signal after receiving the reminder count signal output by the output end of the AND gate through the external trigger input end, and the count of the reminder count signal is used as the count of the pixel clock signal; wherein, the image sensor inputs the line synchronization signal and the pixel clock signal to the AND gate through the line synchronization signal end and the pixel clock end respectively, and when the polarity of the line synchronization signal is the start trigger polarity of the timer and the polarity of the pixel clock signal is the count trigger polarity of the timer, the output end of the AND gate outputs the reminder count signal.

[0012] Optionally, the GPIO input register is provided with a GPIO terminal, the multiple parallel data terminals are connected to the GPIO terminals with consecutive addresses in the same group, and the starting address of the GPIO terminal is a byte start bit;

[0013] The timer is specifically configured to control the DMA controller to cache the image data of the same group latched by the GPIO input register into the memory at one time when the count value of the pixel clock signal reaches a preset threshold.

[0014] Optionally, the timer includes input filtering and an edge detector;

[0015] The input filter and edge detector is connected to the image sensor. When receiving the line synchronization signal and the pixel clock signal sent by the image sensor, the input filter and edge detector is used to detect the edge of the pixel clock signal during the valid period of the line synchronization signal.

[0016] Optionally, the timer further includes a counter, and the counter is connected to the input filter and edge detector;

[0017] The counter is used to count the pixel clock signal when receiving the output signal sent by the input filter and edge detector.

[0018] Optionally, the number of bits of the counter is 16 bits or 32 bits.

[0019] Optionally, the timer further includes a control module and an automatic reload register;

[0020] The control module is connected to the automatic reload register and the counter respectively. The automatic reload register is used to pre-store the preset threshold value. The control module is used to compare the count value with the preset threshold value.

[0021] Optionally, the timer further includes a DMA request generator;

[0022] The DMA request generator is connected to the control module, and the control module is used to issue a control instruction to the DMA request generator when the count value of the pixel clock signal reaches the preset threshold, so that the DMA request generator controls the DMA controller to cache the image data latched by the GPIO input register to the memory.

[0023] A second aspect of an embodiment of the present application provides a ranging sensor, characterized in that it includes: the aforementioned single-chip microcomputer, and an image sensor with a digital video port DVP, wherein the image sensor is connected to the single-chip microcomputer based on the DVP.

[0024] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0025] If the timer receives a horizontal synchronization signal and a pixel clock signal from the image sensor, it counts the pixel clock signal while the horizontal synchronization signal is active. When the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched in the GPIO input register into memory. The microcontroller involved in this application is a general-purpose microcontroller that lacks peripherals specifically designed to process DVP port signals. Instead, it utilizes common basic peripherals (a timer, a DMA controller, and GPIO input registers) and employs an image sensor with a DVP. Because the DVP has multiple parallel data ports, the corresponding data width is larger than that of SPI, enabling high resolution. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic diagram of an embodiment of the connection between a single chip microcomputer and an image sensor disclosed in this application;

[0027] Figure 2 This is a schematic diagram of another embodiment of the connection between a single-chip microcomputer and an image sensor disclosed in this application;

[0028] Figure 3 This is the DVP signal timing diagram disclosed in this application;

[0029] Figure 4This is a timer framework diagram disclosed in this application. DETAILED DESCRIPTION

[0030] The present application is further described in detail below with reference to the accompanying drawings.

[0031] The embodiments of the present application provide a single chip microcomputer and a ranging sensor for achieving high precision and high resolution.

[0032] Distance sensors are used in a wide range of industries. Distance sensors are implemented using two principles: the first directly or indirectly measures the round-trip time of a signal to calculate distance, while the second locates the signal's location within the sensor and calculates distance based on geometric triangulation. The accuracy of distance sensors using the second principle is affected by the resolution of the receiving end (i.e., the image sensor and receiving lens). Image sensors offer interfaces such as SPI, DVP, and MIPI. DVP ports offer higher transmission rates, resulting in higher image resolution, but require specialized DVP peripherals to receive and process the data. SPI ports, on the other hand, offer lower transmission rates and generally require SPI peripherals, which are found in nearly every general-purpose microcontroller (MCU). In practical applications, if high-resolution image data is required, an image sensor with a DVP port can be used in conjunction with a microcontroller equipped with a dedicated peripheral for processing DVP signals to obtain high-resolution data. If high-resolution image data is not required but cost is a concern, an image sensor with an SPI port can be used in conjunction with a low-cost general-purpose MCU to obtain lower-resolution image data. While the first solution can obtain high-resolution image data, it requires a specific single-chip microcontroller and is relatively expensive. While the second solution is low-cost, it cannot achieve high precision and resolution. To address the above issues, this application provides an image data caching method and related apparatus. This method utilizes an image sensor with a DVP port, combined with general-purpose peripherals (i.e., a timer, DMA controller, and GPIO input registers) in a general-purpose single-chip microcontroller to cache high-resolution image data in memory. This eliminates the need for specialized DVP peripherals, achieving high precision and resolution at a low cost, and thus reducing the burden on users.

[0033] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0034] The terms "first," "second," "third," "fourth," and the like in the specification and claims of the present invention and in the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] The following describes a single chip microcomputer of this application. Figure 1 , a single-chip microcomputer of the present application includes a timer, a GPIO input register, a direct memory access DMA controller and a memory; wherein the DMA controller is connected to the timer, the GPIO input register and the memory respectively;

[0036] The GPIO input register is used to latch image data sent by the image sensor through multiple parallel data terminals in the digital video port DVP;

[0037] The timer is configured to, upon receiving a line synchronization signal and a pixel clock signal sent by the image sensor, count the pixel clock signal during a valid period of the line synchronization signal; and, when the count value of the pixel clock signal reaches a preset threshold, control the DMA controller to cache the image data latched by the GPIO input register into the memory.

[0038] Specifically, if the timer receives a horizontal synchronization signal and a pixel clock signal from the image sensor that enable the timer to start and count, the timer will count the pixel clock signals. After receiving laser light, the image sensor converts the optical signal into electrical signals, namely the horizontal synchronization signal and the pixel clock signal. When the horizontal synchronization signal is valid, enabling the timer to start, and the rising edge (or falling edge) of the pixel clock signal occurs, the timer counts the pixel clock signals. During the period when the horizontal synchronization signal is valid, one pixel clock signal is counted, and the number accumulates continuously.

[0039] If the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched by the GPIO input register to the memory. Wherein, if the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched by the GPIO input register to the memory. Wherein, the image data is the data sent by the image sensor received and latched by the GPIO input register. Specifically, while the timer counts the pixel clock signal, the image sensor sends the image data to the GPIO input register, and the GPIO input register receives and latches the image data. Then, the timer continuously counts the pixel clock signal during the period when the line synchronization signal is valid. If the corresponding count value reaches the preset threshold, an instruction is sent to the DMA controller, so that the DMA controller moves the image data in the GPIO input register to the memory. Wherein, the DMA controller is a peripheral for efficient data transmission in the embedded system, which can realize data transfer between the peripheral and the memory without occupying the CPU resources of the central processing unit.

[0040] In an embodiment of the present application, if a timer receives a horizontal synchronization signal and a pixel clock signal from an image sensor, the timer counts the pixel clock signal while the horizontal synchronization signal is active. When the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched in the GPIO input register into memory. The microcontroller involved in this application is a general-purpose microcontroller that lacks peripherals specifically designed to process DVP port signals. Instead, it utilizes common basic peripherals (a timer, a DMA controller, and GPIO input registers) and employs an image sensor with a DVP. Because the DVP has multiple parallel data ports, the corresponding data width is larger than that of SPI, enabling high resolution.

[0041] The following is a detailed description of the microcontroller of this application. Figures 2 to 4 , another embodiment of the single-chip microcomputer of the present application includes a timer, a GPIO input register, a direct memory access DMA controller and a memory; wherein, the DMA controller is connected to the timer, the GPIO input register and the memory respectively;

[0042] The GPIO input register is used to latch image data sent by the image sensor through multiple parallel data terminals in the digital video port DVP;

[0043] The timer is configured to, upon receiving a line synchronization signal and a pixel clock signal sent by the image sensor, count the pixel clock signal during a valid period of the line synchronization signal; and, when the count value of the pixel clock signal reaches a preset threshold, control the DMA controller to cache the image data latched by the GPIO input register into the memory.

[0044] Specifically, if the timer receives a horizontal synchronization signal and a pixel clock signal from the image sensor that enable the timer to start and count, the timer will count the pixel clock signals. After receiving laser light, the image sensor converts the optical signal into electrical signals, namely the horizontal synchronization signal and the pixel clock signal. When the horizontal synchronization signal is valid, enabling the timer to start, and the rising edge (or falling edge) of the pixel clock signal occurs, the timer counts the pixel clock signals. During the period when the horizontal synchronization signal is valid, one pixel clock signal is counted, and the number accumulates continuously.

[0045] If the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched by the GPIO input register to the memory. Wherein, if the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched by the GPIO input register to the memory. Wherein, the image data is the data sent by the image sensor received and latched by the GPIO input register. Specifically, while the timer counts the pixel clock signal, the image sensor sends the image data to the GPIO input register, and the GPIO input register receives and latches the image data. Then the timer continuously counts the pixel clock signal during the period when the line synchronization signal is valid. If the corresponding count value reaches the preset threshold, an instruction is sent to the DMA controller, causing the DMA controller to move the image data in the GPIO input register to the memory.

[0046] Among them, there are at least two ways to connect the image sensor and the timer, which are not limited here. In one embodiment, the timer is provided with an external trigger input terminal and an edge detection terminal, wherein the external trigger input terminal is connected to the pixel clock terminal of the image sensor, and the edge detection terminal is connected to the line synchronization signal terminal of the image sensor. The timer is specifically used to count the pixel clock signal that can trigger the timer to count when the line synchronization signal that can start the timer is received by the image sensor through the line synchronization signal terminal through the edge detection terminal. The corresponding counting method is: if the timer receives the line synchronization signal with the polarity of the start trigger polarity of the timer sent by the image sensor based on the line synchronization signal terminal through the edge detection terminal, then the timer receives the pixel clock signal sent by the image sensor based on the pixel clock terminal through the external trigger input terminal, and counts the pixel clock signal with the polarity of the count trigger polarity of the timer. Specifically, the image sensor has a frame of image data to cache. During the period when the frame synchronization signal is valid, the line synchronization signal is directly sent to the timer. If the line synchronization signal is valid (that is, the polarity of the line synchronization signal is the start trigger polarity of the timer, for example, when the line synchronization signal polarity is high, the timer can be triggered to start), the timer will count the pixel clock signal directly sent to the timer by the image sensor. If the pixel clock signal is valid (that is, the polarity of the pixel clock signal is the count trigger polarity of the timer, for example, counting is performed when the pixel clock signal is in the rising edge stage), the counter in the timer counts the pixel clock signal once, and continuously accumulates during the period when the line synchronization signal is valid. At the same time, the image sensor will transmit the image data to the GPIO input register, which receives and latches the data and waits for subsequent instructions.

[0047] In another embodiment, the timer is provided with an external trigger input terminal, wherein the external trigger input terminal is connected to the output terminal of an AND gate, and the two input terminals of the AND gate are respectively connected to the line synchronization signal terminal and the pixel clock terminal of the image sensor. The timer is configured to count the reminder count signal after receiving the reminder count signal output by the output terminal of the AND gate via the external trigger input terminal, and the count of the reminder count signal serves as the count of the pixel clock signal. The image sensor inputs the line synchronization signal and the pixel clock signal to the AND gate via the line synchronization signal terminal and the pixel clock terminal, respectively. When the polarity of the line synchronization signal is the start trigger polarity of the timer and the polarity of the pixel clock signal is the count trigger polarity of the timer, the output terminal of the AND gate outputs the reminder count signal. The corresponding counting method is as follows: If the image sensor inputs a horizontal synchronization signal and a pixel clock signal into an AND gate via the horizontal synchronization signal terminal and the pixel clock terminal, respectively, and the horizontal synchronization signal's polarity is the timer's start trigger polarity, and the pixel clock signal's polarity is the timer's count trigger polarity, then the timer counts the signal received via the external trigger input terminal to count the pixel clock signal. Specifically, the image sensor is not directly connected to the timer; the signal must pass through the AND gate to the timer. During the period when the frame synchronization signal is valid, if both signals input to the AND gate meet the conditions (i.e., the horizontal synchronization signal's polarity is the timer's start trigger polarity, and the pixel clock signal's polarity is the timer's count trigger polarity), the AND gate outputs the corresponding signal, and the timer counts the signal via the external trigger input terminal. Simply put, the AND gate's valid output signal is counted only when both the horizontal synchronization signal and the pixel clock signal are valid. Furthermore, the AND gate's reminder count signal is only valid when the pixel clock signal is valid. Therefore, counting the AND gate's output signal is actually indirectly counting the pixel clock signal.

[0048] This embodiment is described by taking the first implementation mode as an example.

[0049] Existing solutions use software to determine whether the horizontal synchronization signal and pixel clock signal are valid, and the interrupt response time of general MCU is long, which will cause fluctuations and loss of some pixel data. However, this embodiment is based on the structure of an image sensor with a DVP port and a general MCU, which can obtain high-resolution and complete image data. Figure 3The DVP port includes the frame synchronization signal VSYNC, the line synchronization signal HSYNC, the pixel clock PCLK, and data terminals D0-D7. The frame synchronization signal indicates the start and end of a frame of image transmission, the line synchronization signal indicates the start and end of a line of image data transmission, the pixel clock signal serves as the timing reference, and the data terminal is used to transmit image data. Assuming that the image sensor can produce an image with a resolution of 640x480, this corresponds to 480 line synchronization signal cycles, and one line synchronization signal active period contains 640 pixel clock signal cycles. During the active period of a line synchronization signal, the corresponding multiple pixel clock signals are counted, and data transmission is also carried out on the data terminal.

[0050] In order to avoid acquiring image data from the GPIO input register multiple times, multiple data terminals of the image sensor are connected to the same group of GPIO terminals, so that image data can be acquired at one time, thereby improving efficiency. Specifically, the GPIO input register is provided with a GPIO terminal, and the multiple parallel data terminals are connected to the GPIO terminals with consecutive addresses in the same group, and the starting address of the GPIO terminal is the byte start bit. The timer is specifically used to control the DMA controller to cache the image data of the same group latched by the GPIO input register to the memory at one time when the count value of the pixel clock signal reaches a preset threshold. Among them, if all the data are placed in the same group of GPIO terminals, all the corresponding image data of this group can be cached in the memory at one time. For example, assuming there are eight data terminals, each data terminal is connected to a GPIO terminal, and the connected GPIO terminals all belong to the same group, and the starting address is the byte start bit, the DMA controller moves the same group of data in bytes.

[0051] The timer includes input filtering and edge detector, counter, control module, automatic reload register and DMA request generator.

[0052] The input filter and edge detector is connected to the image sensor. When receiving the line synchronization signal and the pixel clock signal sent by the image sensor, the input filter and edge detector is used to detect the edge of the pixel clock signal during the valid period of the line synchronization signal.

[0053] The counter is connected to the input filter and edge detector. The counter is configured to count the pixel clock signal upon receiving an output signal from the input filter and edge detector. The number of bits of the counter is 16 bits or 32 bits, or other values, and can be set based on actual needs and is not specifically limited herein.

[0054] The control module is connected to the automatic reload register and the counter respectively. The automatic reload register is used to pre-store the preset threshold value. The control module is used to compare the count value with the preset threshold value.

[0055] The DMA request generator is connected to the control module, and the control module is used to issue a control instruction to the DMA request generator when the count value of the pixel clock signal reaches the preset threshold, so that the DMA request generator controls the DMA controller to cache the image data latched by the GPIO input register to the memory.

[0056] The working principle of this embodiment is now described with an example. In one embodiment, the timer is configured in a gated mode, wherein the gated mode is a method of controlling the start and stop of the timer counting by an external signal. The line synchronization signal terminal of the image sensor is directly connected to the edge detection terminal of the timer, and the count start and stop of the timer is controlled based on the line synchronization signal. In this way, the timer will only count when the line synchronization signal is valid. This path corresponds to Figure 4 In addition, the pixel clock terminal of the image sensor is directly connected to the external trigger input ETR terminal of the timer, and the ETR terminal is configured as the clock source of the timer. The count trigger polarity of the timer is configured to be consistent with the effective polarity of the pixel clock signal. This path corresponds to Figure 4 The external clock source route in the timer. The preset threshold is the value in the auto-reload register in the timer. While the horizontal synchronization signal is active, the counter in the timer starts counting. Later, when the pixel clock signal is active, the input filter and edge detector perform edge detection. If it is a rising or falling edge, the counter counts once for each pixel clock signal. The control module compares the count value with the preset threshold in the auto-reload register. If the count value reaches the preset threshold, a control instruction is issued to the DMA request generator, which instructs the DMA controller to move one byte of high-resolution image data from the GPIO input register to the memory.

[0057] In this embodiment, if a timer receives a horizontal synchronization signal and a pixel clock signal transmitted by an image sensor, the timer counts the pixel clock signal while the horizontal synchronization signal is active. When the count value corresponding to the pixel clock signal reaches a preset threshold, the timer controls the DMA controller to cache the image data latched by the GPIO input register into memory. The microcontroller involved in this application is a general-purpose microcontroller. It lacks peripherals specifically designed to process DVP port signals, nor does it utilize peripherals specifically designed to process SPI ports. Instead, it utilizes general-purpose basic peripherals (a timer, a DMA controller, and GPIO input registers) and employs an image sensor with a DVP. Because the DVP has multiple parallel data ports, the corresponding data width is larger than that of the SPI, enabling high resolution.

[0058] The above describes a single-chip microcomputer of the present application. The following describes a range-finding sensor of the present application. One embodiment of the range-finding sensor of the present application includes the single-chip microcomputer described above and an image sensor with a digital video port (DVP), the image sensor being connected to the single-chip microcomputer via the DVP.

[0059] In this embodiment, the image sensor based on the DVP port and the general single chip microcomputer can achieve high resolution at a relatively low cost.

[0060] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0061] It should be noted that in the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0062] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0063] In addition, the functional units in the various embodiments of this application may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units. This application claims protection for all solutions belonging to the same inventive concept.

Claims

1. A single chip microcomputer, characterized in that: include: A timer, a GPIO input register, a direct memory access (DMA) controller, and a memory; wherein the DMA controller is connected to the timer, the GPIO input register, and the memory, respectively; The GPIO input register is used to latch image data sent by the image sensor through multiple parallel data terminals in the digital video port DVP; The timer is configured to, upon receiving a line synchronization signal and a pixel clock signal sent by the image sensor, count the pixel clock signal during a valid period of the line synchronization signal; and, when the count value of the pixel clock signal reaches a preset threshold, control the DMA controller to cache the image data latched by the GPIO input register into the memory.

2. The single chip microcomputer according to claim 1, characterized in that: The timer is provided with an external trigger input terminal and an edge detection terminal, wherein the external trigger input terminal is connected to the pixel clock terminal of the image sensor, and the edge detection terminal is connected to the line synchronization signal terminal of the image sensor; The timer is specifically configured to count the pixel clock signal that can trigger the timer to count when the edge detection end receives the line synchronization signal that can start the timer and is sent by the image sensor through the line synchronization signal end.

3. The single chip microcomputer according to claim 1, wherein: The timer is provided with an external trigger input terminal, wherein the external trigger input terminal is connected to the output terminal of an AND gate, and two input terminals of the AND gate are respectively connected to the line synchronization signal terminal and the pixel clock terminal of the image sensor; The timer is used to count the reminder count signal after receiving the reminder count signal output by the output end of the AND gate through the external trigger input end, and the count of the reminder count signal is used as the count of the pixel clock signal; wherein, the image sensor inputs the line synchronization signal and the pixel clock signal to the AND gate through the line synchronization signal end and the pixel clock end respectively, and when the polarity of the line synchronization signal is the start trigger polarity of the timer and the polarity of the pixel clock signal is the count trigger polarity of the timer, the output end of the AND gate outputs the reminder count signal.

4. The single chip microcomputer according to claim 1, characterized in that: The GPIO input register is provided with a GPIO terminal, the plurality of parallel data terminals are connected to the GPIO terminals with consecutive addresses in the same group, and the starting address of the GPIO terminal is a byte start bit; The timer is specifically configured to control the DMA controller to cache the image data of the same group latched by the GPIO input register into the memory at one time when the count value of the pixel clock signal reaches a preset threshold.

5. The single chip microcomputer according to claim 1, wherein: The timer includes input filtering and an edge detector; The input filter and edge detector is connected to the image sensor. When receiving the line synchronization signal and the pixel clock signal sent by the image sensor, the input filter and edge detector is used to detect the edge of the pixel clock signal during the valid period of the line synchronization signal.

6. The single chip microcomputer according to claim 5, characterized in that: The timer further includes a counter connected to the input filter and edge detector; The counter is used to count the pixel clock signal when receiving the output signal sent by the input filter and edge detector.

7. The single chip microcomputer according to claim 6, characterized in that: The number of bits of the counter is 16 bits or 32 bits.

8. The single chip microcomputer according to claim 6, characterized in that: The timer also includes a control module and an automatic reload register; The control module is connected to the automatic reload register and the counter respectively. The automatic reload register is used to pre-store the preset threshold value. The control module is used to compare the count value with the preset threshold value.

9. The single chip microcomputer according to claim 8, characterized in that: The timer also includes a DMA request generator; The DMA request generator is connected to the control module, and the control module is used to issue a control instruction to the DMA request generator when the count value of the pixel clock signal reaches the preset threshold, so that the DMA request generator controls the DMA controller to cache the image data latched by the GPIO input register to the memory.

10. A distance measuring sensor, characterized in that: include: The single chip microcomputer according to any one of claims 1 to 9, and an image sensor with a digital video port (DVP), wherein the image sensor is connected to the single chip microcomputer based on the DVP.

Images