Secure storage method and device for flash memory data, electronic equipment and storage medium

Abstract

The invention discloses a flash memory data secure storage method and device, electronic equipment and a storage medium, and relates to the technical field of flash memories. The method comprises the following steps: dividing a physical page in a data block of the flash memory into a common storage area and an enhanced storage area; the enhanced storage area is used for storing first flash memory data, the common storage area is used for storing second flash memory data, and the security level of the first flash memory data is higher than that of the second flash memory data; when the first flash memory data is stored, determining a target write-in mode according to the type of the flash memory; wherein the target write-in mode is used for determining the number of data states in the enhanced storage area; when the type of the flash memory is a multi-layer storage unit flash memory, determining that the target write-in mode is a single-bit write-in mode; the number of data states in the enhanced storage area is smaller than the number of data states in the common storage area; and writing the to-be-stored first flash memory data into the enhanced storage area according to the target writing mode. And the storage security of the flash memory data can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of flash memory, and in particular to a flash memory data security storage method and device, an electronic device, and a storage medium. BACKGROUND

[0002] NAND Flash, also known as flash memory, is a widely used storage chip at present, and has excellent characteristics such as high speed and non-volatility. The internal part of the flash memory NAND Flash is to store data by storing electric charges, that is, the internal part of the flash memory NAND Flash actually represents data in the form of stored electric charges. In actual use, due to changes in various internal and external conditions, the number of stored electric charges will change, which will cause an increase in the number of data errors in the flash memory and a decrease in the security of the flash memory data. The same physical page of the flash memory may store different types of data, and these data have different functions and different security levels. The conventional data storage method does not consider the different requirements of the flash memory data in the page, but stores the flash memory data according to a unified security strength. It can be seen that the security of the conventional data storage method is not high, and in addition, different reading modes need to be switched when reading different flash memory data in the same page, which will cause a decrease in reading efficiency. Therefore, how to simply and efficiently improve the storage security of the flash memory data is a technical problem to be solved. SUMMARY

[0003] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application provides a flash memory data security storage method and device, an electronic device, and a storage medium, which can use the ordinary storage area and the enhanced storage area divided in the physical page to respectively store flash memory data of different security levels, thereby improving the storage security of the flash memory data.

[0004] In a first aspect, an embodiment of the present application provides a flash memory data security storage method, including: dividing a physical page in a data block of a flash memory into an ordinary storage area and an enhanced storage area; wherein the ordinary storage area and the enhanced storage area each include data pages of different types; the number and types of the data pages are determined by the type of the flash memory; the type of the flash memory is a multi-layer storage unit flash memory, or a three-layer storage unit flash memory, or a four-layer storage unit flash memory; the enhanced storage area is used to store first flash memory data, and the ordinary storage area is used to store second flash memory data; the security level of the first flash memory data is higher than that of the second flash memory data; When the first flash data is stored, a target write mode is determined according to a type of the flash memory; wherein the target write mode is used to determine a number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than a number of data states in the normal storage area; when the type of the flash memory is a multi-layer storage unit flash, the target write mode is determined as a single-bit write mode; The first flash data to be stored is written into the enhanced storage area according to the target write mode.

[0005] In a second aspect, an embodiment of the present application provides a flash data secure storage device, comprising at least one processor and a memory connected with the at least one processor in communication; the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the flash data secure storage method according to any one of the embodiments of the first aspect.

[0006] In a third aspect, an embodiment of the present application provides an electronic device comprising the flash data secure storage device according to the embodiments of the second aspect.

[0007] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium storing computer executable instructions for causing a computer to perform the flash data secure storage method according to any one of the embodiments of the first aspect.

[0008] The embodiment of the present application comprises the following steps: first, dividing the physical pages in the data block of the flash memory into a normal storage area and an enhanced storage area; wherein, the normal storage area and the enhanced storage area both comprise different types of data pages; the number and type of the data pages are determined by the type of the flash memory; the type of the flash memory is: multi-layer storage unit flash memory, or three-layer storage unit flash memory, or four-layer storage unit flash memory; the enhanced storage area is used for storing first flash data, and the normal storage area is used for storing second flash data; the security level of the first flash data is higher than that of the second flash data; by dividing the physical pages in the data block of the flash memory into the normal storage area and the enhanced storage area, a space foundation is laid for subsequent regional storage of flash data with different security levels; then, when the first flash data is stored, a target write mode is determined according to the type of the flash memory; wherein, the target write mode is used to determine the number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than that in the normal storage area; when the type of the flash memory is multi-layer storage unit flash memory, the target write mode is determined as a single-bit write mode; finally, the first flash data to be stored is written into the enhanced storage area according to the target write mode; the first flash data with a high security level is stored in the enhanced storage area according to the target write mode, so that the storage capacity in the enhanced storage area is reduced; by using the property of the flash memory that the storage capacity is exchanged for data storage reliability, the storage security of the flash data is further improved. That is to say, the scheme of the embodiment of the present application can store flash data with different security levels in the normal storage area and the enhanced storage area divided in the physical pages, which is beneficial to improve the storage security of the flash data.

[0009] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the present application. The objects and other advantages of the present application will be realized and attained by the structure particularly pointed out in the written description and claims. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 is a structure schematic diagram of a flash memory provided by an embodiment of the present application; Figure 2 is a flow schematic diagram of a flash data security storage method provided by an embodiment of the present application; Figure 3 is a flow schematic diagram of a specific method of step S130 in the method; Figure 2 Figure 4 is a comparison schematic diagram of the storage states of the three-bit write mode and the single-bit write mode provided by an embodiment of the present application; Figure 5 ​is a contrast diagram of the storage state of the three-bit write mode and the two-bit write mode provided by an embodiment of the present application; Figure 6 is a hardware structure diagram of the flash data security storage device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0011] In order to make the purpose, technical solutions and advantages of the present application more clear, the present application is further described in detail below in combination with the drawings and embodiments.

[0012] It should be understood that, in the description of the present application, the orientation description, such as the orientation or position relationship indicated by up, down, front, back, left, right and the like, is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0013] It should be noted that, in the description of the present application, although the logical order is shown in the flowchart, in some cases, the steps shown or described can be performed in an order different from that in the flowchart. In the description of the present application, the meaning of several is one or more, and the meaning of multiple is two or more. The description of "first", "second" is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the order of indicated technical features.

[0014] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application, and are not intended to limit the present application.

[0015] First, some terms involved in the present application are explained: Multi-Level Cell flash (MLC): each physical cell stores 2 bits, corresponding to 4 voltage levels. In order to split the 2 bits into independent logical pages, MLC further subdivides the same cell into two logical pages: the least significant bit page (LSB Page) and the most significant bit page (MSB Page).

[0016] Triple-Level Cell flash (TLC): also commonly referred to as TLC NAND. A TLC NAND flash device has 3 bits of data per cell, LSB (Least Significant Bit), CSB (Central Significant Bit), and MSB (Most Significant Bit). In a TLC (3 bit / cell) flash, a single physical cell is split into 3 logical pages. There are 3 types of pages, LSB Page, CSB Page, and MSB Page, based on the type of data stored. Most TLCs use one pass programming, where the LSB / CSB / MSB are programmed together. The low bit corresponds to the LSB, the middle bit corresponds to the CSB, and the high bit corresponds to the MSB.

[0017] Quad-Level Cell flash (QLC): Each physical cell holds 4 bits, so 16 different voltage levels are needed. QLC includes: LSB Page, CSB Page, MSB Page, and TSB Page.

[0018] The application provides a flash data secure storage method, a flash data secure storage device, an electronic device and a computer readable storage medium, and relates to the technical field of flash memory. The method comprises the following steps: dividing a physical page in a data block of a flash memory into a normal storage area and an enhanced storage area; the enhanced storage area is used for storing first flash data, and the normal storage area is used for storing second flash data; the security level of the first flash data is higher than that of the second flash data; when the first flash data is stored, a target write mode is determined according to the type of the flash memory; wherein the target write mode is used for determining the number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than that in the normal storage area; and the first flash data to be stored is written into the enhanced storage area according to the target write mode. The method is beneficial to improving the storage security of flash data.

[0019] The embodiments of the application are further described below with reference to the drawings.

[0020] As shown in Figure 1 , the application provides a flash data secure storage method, a flash data secure storage device, an electronic device and a computer readable storage medium, and relates to the technical field of flash memory. The method comprises the following steps: dividing a physical page in a data block of a flash memory into a normal storage area and an enhanced storage area; the enhanced storage area is used for storing first flash data, and the normal storage area is used for storing second flash data; the security level of the first flash data is higher than that of the second flash data; when the first flash data is stored, a target write mode is determined according to the type of the flash memory; wherein the target write mode is used for determining the number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than that in the normal storage area; and the first flash data to be stored is written into the enhanced storage area according to the target write mode. The method is beneficial to improving the storage security of flash data. Figure 1Fig. 1 is a structural diagram of a flash memory provided by an embodiment of the present application; the flash memory comprises a plurality of data blocks; each data block comprises a plurality of physical pages; each physical page comprises: a normal storage area and an enhanced storage area.

[0021] Those skilled in the art can understand that the system structure shown in the figure does not constitute a limitation on the embodiments of the present application, and can comprise more or fewer components than the figure, or combine certain components, or different component arrangements.

[0022] The system embodiments described above are merely illustrative, wherein the units illustrated as separate components can or can not be physically separated, i.e., can be located in one place, or can be distributed to multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiments.

[0023] Those skilled in the art can understand that the system architecture and application scenarios described in the embodiments of the present application are for more clearly illustrating the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that, with the evolution of system architecture and the appearance of new application scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0024] Based on the above system structure, the following proposes various embodiments of the flash data secure storage method of the present application.

[0025] In a first aspect, as shown in the figure, the flash data secure storage method can include but is not limited to steps S110 to S130. Figure 2

[0026] Step S110: dividing the physical pages in the data block of the flash memory into a normal storage area and an enhanced storage area; wherein the normal storage area and the enhanced storage area each comprise: different types of data pages; the number and type of data pages are determined by the type of the flash memory; the type of the flash memory is: a multi-layer storage cell flash memory, or a three-layer storage cell flash memory, or a four-layer storage cell flash memory; the enhanced storage area is used to store first flash data, and the normal storage area is used to store second flash data, the security level of the first flash data is higher than that of the second flash data.

[0027] Step S120: when storing the first flash data, determining a target write mode according to the type of the flash memory; wherein the target write mode is used to determine the number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than the number of data states in the normal storage area; when the type of the flash memory is a multi-layer storage cell flash memory, the target write mode is determined to be a single-bit write mode.

[0028] ​Step S130: writing the first flash data to be stored into the enhanced storage area according to the target write mode.

[0029] Further explanation of step S110.

[0030] Specifically, the type of flash memory to which the flash data security storage method of the present application is applicable includes multi-layer storage unit flash memory, three-layer storage unit flash memory, and four-layer storage unit flash memory. The number and type of data pages are determined by the type of flash memory.

[0031] Specifically, when the type of flash memory device is four-layer storage unit flash memory, the different types of data pages included in the four-layer storage unit flash memory include the most significant bit data page, the next most significant bit data page, the next least significant bit data page, and the least significant bit data page; a total of four types of data pages.

[0032] Specifically, when the type of flash memory device is three-layer storage unit flash memory, the different types of data pages included in the three-layer storage unit flash memory include the most significant bit data page, the middle significant bit data page, and the least significant bit data page; a total of three types of data pages.

[0033] Specifically, when the type of flash memory device is multi-layer storage unit flash memory, the different types of data pages included in the multi-layer storage unit flash memory include the most significant bit data page and the least significant bit data page; a total of two types of data pages.

[0034] It can be understood that different manufacturers need different data to be securely stored, and therefore, in practice, the flash data to be stored can be the first flash data with a higher security level or the second flash data with a lower security level, which can be determined by the user according to actual conditions. In an embodiment, the user can use different security level flags to identify the first flash data and the second flash data according to actual needs, and then write the first flash data into the corresponding data enhanced area and the second flash data into the corresponding normal storage area according to the different security level flags. Alternatively, different write instructions can be used to write the first flash data into the corresponding data enhanced area and the second flash data into the corresponding normal storage area. Therefore, the present application does not specifically limit how to write the first flash data and the second flash data into the corresponding areas of the physical page.

[0035] Further explanation of step S120.

[0036] Specifically, the target write mode includes a single-bit write mode and a two-bit write mode. In the single-bit write mode, the number of data states in the enhanced storage area is 2; and in the two-bit write mode, the number of data states in the enhanced storage area is 4.

[0037] According to some embodiments of the present application, the step S120 of determining the target write mode according to the type of the flash memory comprises: when the type of the flash memory is a multi-layer storage unit flash memory, determining the target write mode as a single-bit write mode; when the type of the flash memory is a three-layer storage unit flash memory, determining the target write mode as a single-bit write mode or a two-bit write mode; and when the type of the flash memory is a four-layer storage unit flash memory, determining the target write mode as a single-bit write mode or a two-bit write mode. Thus, the target write mode of the data enhancement area is determined, which provides a reference for subsequent writing of the first flash data with a higher security level into the data enhancement area.

[0038] According to some embodiments of the present application, as shown in Figure 3 Further explanation of the step S130 is provided, and the step S130 of writing the first flash data to be stored into the enhancement storage area according to the target write mode comprises but is not limited to the steps S131 and S132.

[0039] The step S131 of obtaining the first flash data to be stored. The step S132 of writing the first flash data to be stored into the enhancement storage area when the target write mode is the single-bit write mode, so that the number of data states in the enhancement storage area is 2.

[0040] For example, as shown in Table 1 and Figure 4 For the TLC type of flash memory, the two data states in the enhancement storage area under the single-bit write mode are 111 and 101.

[0041] According to some embodiments of the present application, as shown in Figure 3 Further explanation of the step S130 is provided, and the step S130 of writing the first flash data to be stored into the enhancement storage area according to the target write mode comprises but is not limited to the steps S131 and S133.

[0042] The step S131 of obtaining the first flash data to be stored. The step S133 of writing the first flash data to be stored into the enhancement storage area when the target write mode is the two-bit write mode, so that the number of data states in the enhancement storage area is 4.

[0043] For example, as shown in Table 2 and Figure 5 For the TLC type of flash memory, the four data states in the enhancement storage area under the two-bit write mode are 111, 001, 010 and 100.

[0044] It can be understood that the steps S131 and S132 are one embodiment of the step S130, and the steps S131 and S133 are another embodiment of the step S130.

[0045] It should be noted that the normal write mode of the enhanced storage area is determined by the type of the flash memory. Specifically, when the type of the flash memory is: multi-layer storage unit flash memory, the normal write mode of the enhanced storage area is: two-bit write mode; when the type of the flash memory is: three-layer storage unit flash memory, the normal write mode of the enhanced storage area is: three-bit write mode; when the type of the flash memory is: four-layer storage unit flash memory, the normal write mode of the enhanced storage area is: four-bit write mode.

[0046] By step S130, the write mode of the enhanced storage area is switched from the normal write mode to the target write mode, so that the number of corresponding data states in the target write mode is less than the number of corresponding data states in the normal write mode. By reducing the data storage capacity of the flash memory, the data storage security is improved.

[0047] According to some embodiments of the present application, after the first flash data to be stored is written into the enhanced storage area according to the target write mode, the flash data secure storage method further comprises: in the case of reading the first flash data from the enhanced storage area, determining the reading mode according to the target write mode; reading the first flash data from the enhanced storage area according to the reading mode. To ensure that the stored first flash data can be correctly read.

[0048] The physical pages in the data block of the flash memory are first divided into the normal storage area and the enhanced storage area through steps S110 to S130; the normal storage area and the enhanced storage area each include different types of data pages; the number and type of the data pages are determined by the type of the flash memory; the type of the flash memory is a multi-layer storage cell flash memory, or a three-layer storage cell flash memory, or a four-layer storage cell flash memory; the enhanced storage area is used to store first flash data, and the normal storage area is used to store second flash data; the security level of the first flash data is higher than that of the second flash data; the physical pages in the data block of the flash memory are divided into the normal storage area and the enhanced storage area, laying a space foundation for subsequent regional storage of flash data of different security levels; when the first flash data is stored, a target write mode is determined according to the type of the flash memory; the target write mode is used to determine the number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than that in the normal storage area; when the type of the flash memory is a multi-layer storage cell flash memory, the target write mode is determined to be a single-bit write mode; finally, the first flash data to be stored is written into the enhanced storage area according to the target write mode; the first flash data of a high security level is stored in the enhanced storage area according to the target write mode, so that the storage capacity of the enhanced storage area is reduced, and the storage security of the flash data is further improved by using the property of the flash memory that the storage capacity is exchanged for data storage reliability. That is, the scheme of the embodiment of the application can store flash data of different security levels in the normal storage area and the enhanced storage area divided in the physical pages, respectively, which is conducive to improving the storage security of the flash data.

[0049] It's important to emphasize that existing data security storage methods typically set different check bit rates for different areas within a page, assigning more check bit protection to enhanced storage areas and fewer check bit protection to standard storage areas. This approach adjusts the code rates of different codewords within a physical page to set different security attributes. However, this data security storage method has the following drawbacks: First, encoding and decoding complexity: Setting different encoding and decoding methods for a physical page requires matching the page length with the check bit length, and recording the encoding modes used for different codewords. This significantly increases encoding and decoding complexity, and also complicates flash memory data management. Second, it increases read latency: Existing data security storage methods do not reduce the bit error rate, and high bit error rates lead to increased decoding latency, making them unsuitable for certain scenarios where rapid data recovery is required. This application switches the write mode of the enhanced storage area from the conventional write mode to the target write mode, so that the number of corresponding data states in the target write mode is less than the number of corresponding data states in the conventional write mode; the examples of the threshold voltages corresponding to these bits are added, which significantly reduces the bit error rate. Compared with the existing technology, it has the following main advantages: First, the encoding and decoding complexity is low. This application does not change the original ECC encoding and decoding method, and all codewords in the physical page use the same encoding and decoding method; second, the read delay is significantly reduced. In one embodiment, the storage unit of the enhanced storage area is switched from a multi-bit write mode to a single-bit write mode, which improves data security and reduces the bit error rate. Rereading is usually not required, which greatly improves data recovery efficiency and reduces read delay.

[0050] According to some embodiments of the present application, after dividing the physical pages in the data block of the flash memory into the normal storage area and the enhanced storage area, the flash memory data secure storage method further includes but is not limited to steps S210 to S220.

[0051] Step S210: When storing the second flash memory data, a normal write mode is determined according to the type of the flash memory; wherein the normal write mode is used to determine the number of data states in the normal storage area.

[0052] Step S220: writing the second flash memory data to be stored into the normal storage area according to the normal writing mode.

[0053] According to some embodiments of the present application, step S210 is further described, wherein determining the normal write mode according to the type of the flash memory includes: when the type of the flash memory is: multi-layer storage unit flash memory, determining the normal write mode is: two-bit write mode; when the type of the flash memory is: three-layer storage unit flash memory, determining the normal write mode is: three-bit write mode; when the type of the flash memory is: four-layer storage unit flash memory, determining the normal write mode is: four-bit write mode.

[0054] Specifically, for the multi-layer storage unit flash memory, the regular write mode adopted when writing the second flash data into the normal storage area is the two-bit write mode; the target write mode adopted when writing the first flash data into the enhanced storage area is the single-bit write mode.

[0055] Specifically, for the three-layer storage unit flash memory, the regular write mode adopted when writing the second flash data into the normal storage area is the three-bit write mode; the target write mode adopted when writing the first flash data into the enhanced storage area is the single-bit write mode or the two-bit write mode.

[0056] Specifically, for the four-layer storage unit flash memory, the regular write mode adopted when writing the second flash data into the normal storage area is the four-bit write mode; the target write mode adopted when writing the first flash data into the enhanced storage area is the single-bit write mode or the two-bit write mode.

[0057] By steps S210 to S220, the second flash data with a lower security level is stored into the normal storage area in the regular write mode, so as to realize the partition storage and store the flash data with different security levels respectively, which is beneficial to improve the storage security of the flash data.

[0058] Taking a TLC block of a TLC type flash memory as an example, the flash data security storage method provided by the embodiments of the present application is specifically explained.

[0059] In step S301, the data in a physical block block of the TLC type flash memory is erased.

[0060] In step S302, when writing a certain physical page in the block, the space of the physical page is divided into a normal storage area and an enhanced storage area.

[0061] In step S303, when writing the normal storage area, the second flash data with a lower security level is written into the normal storage area according to the normal TLC data regular write mode (i.e. the three-bit write mode). In the three-bit write mode, the storage state in the normal storage area is as shown in Table 1.

[0062] Table 1

[0063] Step S304, when writing the enhanced storage area, the LSB page, the CSB page and the MSB page of the TLC are written according to a certain rule, that is, the LSB page is written first, then the CSB page, and finally the MSB page. When the target write mode is the single-bit write mode, the first flash data with a higher security level is written into the enhanced storage area according to the single-bit write mode, wherein the CSB page writes normal data, and the LSB page and the MSB page in the enhanced storage area write 0xff data. That is to say, the user data to be actually stored is written to the CSB page; and before writing the CSB page, the LSB page to which the same cell belongs is written with all 0xFF (that is, "empty" or "1" state); and the corresponding MSB page is also filled with 0xFF (that is, "empty" or "1" state). Thus, of the three pages of the whole memory cell Cell, only the CSB page is real data, and the other two pages are "placeholder empty values". When the LSB page and the MSB page are written with "1" state in the single-bit write mode, the storage state in the enhanced storage area is as shown in Table 2.

[0064] Table 2

[0065] Step S304, when reading the data stored in the normal storage area, the data is read according to the normal TLC block data reading method.

[0066] Step S305, when reading the data stored in the enhanced storage area, the TLC block is switched to the SLC state to read the data stored in the enhanced storage area. Since the data stored in the enhanced storage area is stored by using the single-bit write mode, the error code rate is greatly reduced, and the data can be quickly recovered without re-reading.

[0067] Another example is taken to explain the flash data security storage method provided by the embodiment of the application in detail.

[0068] The above steps S301 to S303 are performed in the same way. Step S306, when writing the enhanced storage area, the LSB page, the CSB page and the MSB page of the TLC are written according to a certain rule, that is, the LSB page is written first, then the CSB page, and finally the MSB page. When the target write mode is the two-bit write mode, the first flash data with a higher security level is written into the enhanced storage area according to the two-bit write mode, wherein under the same memory cell (Cell), the LSB page and the MSB page write the user data to be actually stored, and the CSB page writes the data stored in the LSB page and the MSB page after performing the exclusive OR operation; therefore, as shown in Table 3, there are four data states in the two-bit write mode, which are 111, 001, 010 and 100. Figure 5 ​

[0069] It should be noted that, Figure 5 The TLC flash memory of 3bit mode in the upper part can store eight data states, which are converted into the pMLC flash memory of 2bit mode based on the XOR operation. It can be seen that the pMLC flash memory improves the reliability of data storage at the cost of sacrificing 1 / 3 storage capacity.

[0070] In summary, in the embodiment of the present application, the physical page is divided into a normal storage area and an enhanced storage area, and the write mode of the enhanced storage area is switched from a conventional write mode to a target write mode, so that the number of corresponding data states in the target write mode is less than the number of corresponding data states in the conventional write mode. By reducing the data storage capacity of the flash memory, the data storage security is improved. By sacrificing the storage capacity of the flash memory, the reliability and security of data storage are improved; the enhanced storage area stores important first flash data with high security level, and the reading efficiency of the enhanced storage area is also effectively improved.

[0071] As Figure 6 The present application also provides a flash data secure storage device, which comprises: The processor 601 can be implemented in a general-purpose central processing unit (CPU), a microprocessor, an application specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute related programs to realize the technical solutions provided by the embodiments of the present application; The memory 602 can be implemented in a read only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 602 can store an operating system and other application programs. When the technical solutions provided by the embodiments of the present application are implemented by software or firmware, the related program codes are stored in the memory 602 and executed by the processor 601 to realize the flash data secure storage method of the embodiments of the present application; The input / output interface 603 is used to realize information input and output; The communication interface 604 is used to realize the communication interaction between the device and other devices. The communication can be realized by wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.); The bus 605 transmits information between various components (such as the processor 601, the memory 602, the input / output interface 603, and the communication interface 604) of the device; The processor 601, the memory 602, the input / output interface 603 and the communication interface 604 are communicatively connected with each other through the bus 605.

[0072] The embodiment of the present application further provides an electronic device, which comprises the flash data security storage device as above.

[0073] The embodiment of the present application further provides a storage medium, which is a computer readable storage medium, and stores a computer program. The computer program is executed by a processor to implement the flash data security storage method.

[0074] The memory is a non-transitory computer readable storage medium, and can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory can include a high-speed random access memory, and can also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some embodiments, the memory can optionally include a memory remotely arranged relative to the processor, and the remote memory can be connected to the processor through a network. Examples of the network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The device embodiments described above are merely schematic, and units described as separate components can or can not be physically separated, can be located in one place, or can also be distributed on multiple network units. According to actual needs, part or all of the modules can be selected to achieve the purpose of the embodiment.

[0075] As will be appreciated by one of ordinary skill in the art, all or some steps, systems of the above-disclosed methods can be implemented as software, firmware, hardware, or any suitable combination thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application- specific integrated circuit. Such software can be distributed on computer readable media, which can comprise computer storage media (or non-transitory media) and communication media (or transitory media). As is well known to those of ordinary skill in the art, computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Further, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules, or other data in a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery media.

[0076] The above description is that of the preferred embodiments of the present application. Various modifications and changes can be made thereto without departing from the spirit of the application, which is defined by the appended claims.

Claims

1. A flash memory data secure storage method, characterized in that: include: Physical pages in a data block of a flash memory are divided into a normal storage area and an enhanced storage area; wherein the normal storage area and the enhanced storage area both include: different types of data pages; the number and type of the data pages are determined by the type of the flash memory; the type of the flash memory is: multi-layer storage unit flash memory, three-layer storage unit flash memory, or four-layer storage unit flash memory; the enhanced storage area is used to store first flash memory data, and the normal storage area is used to store second flash memory data, and the security level of the first flash memory data is higher than the security level of the second flash memory data; When storing the first flash memory data, determining a target write mode according to the type of the flash memory; wherein the target write mode is used to determine the number of data states in the enhanced storage area; the number of data states in the enhanced storage area is less than the number of data states in the normal storage area; when the type of the flash memory is a multi-layer storage unit flash memory, determining the target write mode to be a single-bit write mode; The first flash memory data to be stored is written into the enhanced storage area according to the target write mode.

2. The flash memory data secure storage method according to claim 1, wherein: The determining the target write mode according to the type of the flash memory further includes: When the type of the flash memory is a three-layer storage unit flash memory, determining that the target write mode is a single-bit write mode or a two-bit write mode; When the type of the flash memory is a four-level storage unit flash memory, the target write mode is determined to be a single-bit write mode or a two-bit write mode.

3. The flash memory data secure storage method according to claim 2, wherein: Writing the first flash memory data to be stored into the enhanced storage area according to the target write mode includes: Acquire first flash memory data to be stored; When the target write mode is the single-bit write mode, the first flash memory data to be stored is written into the enhanced storage area, so that the number of data states in the enhanced storage area is 2.

4. The flash memory data secure storage method according to claim 2, wherein: Writing the first flash memory data to be stored into the enhanced storage area according to the target write mode includes: Acquire first flash memory data to be stored; When the target write mode is a two-bit write mode, the first flash memory data to be stored is written into the enhanced storage area, so that the number of data states in the enhanced storage area is four.

5. The flash memory data secure storage method according to claim 2, wherein: After writing the first flash memory data to be stored into the enhanced storage area according to the target write mode, the method further includes: In case of reading first flash memory data from the enhanced storage area, determining a reading mode according to the target write mode; The first flash memory data is read from the enhanced storage area according to the reading method.

6. The flash memory data secure storage method according to claim 1, wherein: After dividing the physical pages in the data blocks of the flash memory into a normal storage area and an enhanced storage area, the method further includes: When storing the second flash memory data, determining a normal write mode according to the type of the flash memory; wherein the normal write mode is used to determine the number of data states in the normal storage area; The second flash memory data to be stored is written into the common storage area according to the normal writing mode.

7. The flash memory data secure storage method according to claim 6, wherein: Determining the normal write mode according to the type of the flash memory includes: When the type of the flash memory is a multi-layer memory cell flash memory, determining that the normal write mode is a two-bit write mode; When the type of the flash memory is a three-layer storage unit flash memory, determining that the normal write mode is a three-bit write mode; When the type of the flash memory is a four-level storage unit flash memory, the normal write mode is determined to be a four-bit write mode.

8. A flash memory data security storage device, characterized in that: It includes at least one processor and a memory for communicating with the at least one processor; the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the flash memory data secure storage method as described in any one of claims 1 to 7.

9. An electronic device, characterized in that: The device comprises the flash memory data security storage device as claimed in claim 8.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the flash memory data secure storage method according to any one of claims 1 to 7.

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