Dual-motor vector control position synchronization method and system

Abstract

The application discloses a double-motor vector control position synchronization method, comprising the following steps: configuring a delay scheme to stagger the FOC interruption of two motors by half a period, wherein the FOC three-closed-loop control mode is adopted for the two motors, the outer ring is a position ring, the middle ring is a speed ring, and the inner ring is a current ring; taking the feedback of the position ring of the master motor as the given value of the position ring of the slave motor, and compensating the output of the position ring of the master motor to the input of the speed ring of the slave motor; and executing the vector control code of the double motor to realize the position synchronization of the double motor. The FOC interruption time of the two motors is designed, and the master-slave control strategy is optimized, so that the position synchronization of the double motor is realized, and the method is simple and suitable for actual engineering implementation.

Description

Technical Field

[0001] This invention belongs to the field of dual-motor vector control, specifically relating to a dual-motor vector control position synchronization method and system. Background Technology

[0002] Currently, there are three main schemes for dual-motor synchronous control:

[0003] 1. Dual-motor parallel control: The two motors run in parallel with the same instructions and the same code, and there is no synchronization strategy between the two motors.

[0004] 2. Dual-motor master-slave control: The output of the master motor is used as the input of the slave motor to achieve synchronous operation of the two motors.

[0005] 3. Dual-motor cross-coupling control: The position error (or speed error) between the two motors is compensated separately to the two motors to achieve synchronization of the two motors.

[0006] The existing dual-motor synchronous control has the following drawbacks:

[0007] 1. The dual-motor parallel control strategy will have large position or speed errors when the loads of the two motors are inconsistent, making it impossible to achieve synchronization of the two motors and easily damaging the system structure.

[0008] 2. In dual-motor master-slave control, the slave motor is prone to lag during start-up, stop, or frequent speed adjustment, and cannot keep up with the master motor in time.

[0009] 3. Dual-motor cross-coupling control requires two additional feedback loop parameters, increasing the complexity of debugging. Inappropriate parameters can cause system oscillation and loss of synchronization. Summary of the Invention

[0010] To address the problems existing in dual-motor master-slave control, this invention provides a dual-motor vector control position synchronization method. By designing the FOC interrupt timing of the two motors and combining it with an optimized master-slave control strategy, the position synchronization of the two motors is achieved.

[0011] According to one aspect of the present invention, a dual-motor vector control position synchronization method is provided, comprising:

[0012] Configure a delay scheme to stagger the FOC interruptions of the two motors by half a cycle. Both motors adopt the FOC three-closed-loop control method, with the outer loop being the position loop, the middle loop being the speed loop, and the inner loop being the current loop.

[0013] The feedback from the master motor position loop is used as the input to the slave motor position loop, and the output of the master motor position loop is compensated to the input of the slave motor speed loop.

[0014] Execute the vector control code for the two motors to achieve position synchronization between the two motors.

[0015] As a further technical solution, a delay scheme is configured to stagger the FOC interruptions of the two motors by half a cycle, including:

[0016] By utilizing the interrupt mechanism of the chip's SPWM module, the two SPWM counters are made to be half a cycle apart, thereby causing the FOC interrupts of the two motors to be staggered by half a cycle.

[0017] As a further technical solution, the method also includes:

[0018] When one SPWM counter overflows, the other SPWM counter is enabled, and then the overflow interrupt of the first SPWM counter is disabled, thus achieving a 180-degree phase shift between the two SPWM waveforms.

[0019] As a further technical solution, the method also includes: setting up several sensors to collect the position and speed information required for vector control of the two motors respectively.

[0020] As a further technical solution, the method further includes: configuring the setpoint of the main motor position loop, wherein the setpoint of the main motor position loop and the feedback of the main motor position loop work together to obtain the output of the main motor position loop.

[0021] As a further technical solution, the method further includes: the output of the main motor position loop is sent to the main motor speed loop.

[0022] As a further technical solution, the method further includes: the feedback of the main motor position loop and the feedback of the slave motor position loop work together to obtain the output of the slave motor position loop.

[0023] As a further technical solution, the method further includes: the output of the motor position loop is fed into the motor speed loop.

[0024] According to one aspect of the present invention, a dual-motor device is provided, the dual-motor device including a first motor and a second motor, a processor and a memory, the memory storing a computer program, and the processor executing the computer program to implement the dual-motor vector control position synchronization method.

[0025] As a further technical solution, the first motor and the second motor are each equipped with several sensors to collect the position and speed information of the first motor and the second motor.

[0026] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0027] 1. The flexible interrupt mechanism of the chip's SPWM module makes it easy to synchronize two SPWM counters by half a cycle, requiring minimal software intervention. This allows the FOC interrupts of the two motors to be staggered by half a cycle, preventing mutual interference and ensuring accurate current sampling timing for both motors, thus enabling normal vector control of dual-motor FOC.

[0028] 2. By adopting an optimized master-slave control strategy, the position synchronization of the two motors can be achieved without increasing the debugging parameters, avoiding the problem of lag in the slave motor in the traditional master-slave control scheme, which is very suitable for practical engineering implementation. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the waveform of a dual-motor PWM counter provided in an embodiment of the present invention.

[0031] Figure 2 The FOC three-closed-loop control vector control block diagram provided in the embodiment of the present invention.

[0032] Figure 3 This is a block diagram of a dual-motor position synchronization strategy provided in an embodiment of the present invention.

[0033] Figure 4 This is a flowchart of dual-motor position synchronization provided in an embodiment of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. In addition, the technical features of the various embodiments or individual embodiments provided by the present invention can be arbitrarily combined to form new technical solutions. Such combinations are not bound by the order of steps and / or structural composition patterns, but must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0035] This invention provides a dual-motor vector control position synchronization method, comprising the following steps:

[0036] First, a delay scheme is configured to stagger the FOC interrupts of the two motors by half a cycle. Both motors employ a three-loop FOC control method: an outer loop for position, a middle loop for speed, and an inner loop for current. The counter enable of the SPWM1 module is triggered by the count overflow interrupt of the SPWM0 module, and then the count overflow interrupt of the SPWM0 module is disabled. This ensures that the two SPWM counters are out of sync by half a cycle, preventing mutual interference between the FOC interrupts of the two motors.

[0037] Subsequently, the feedback from the master motor's position loop is used as the input to the slave motor's position loop, enabling the slave motor to follow the master motor's position via a PI controller in its position loop. The output of the master motor's position loop is then compensated for and fed into the slave motor's speed loop, achieving consistent response between the two motors, avoiding slave motor lag, and thus achieving position synchronization between the two motors.

[0038] Finally, the vector control code for the two motors is executed to achieve position synchronization between the two motors.

[0039] This invention primarily addresses the issue of lag in the slave motor under dual-motor master-slave control, resolves the problem of large position errors between the two motors in FOC control, and achieves position synchronization between the two motors.

[0040] Figure 1 This is a waveform for a dual-motor PWM counter, where motor 1 is the master motor and motor 2 is the slave motor. The PWM counting of the master motor is started first, followed by the PWM counting of the slave motor. Figure 1 As shown, by enabling the counter of the other SPWM within the overflow interrupt of one SPWM and then disabling the SPWM overflow interrupt, the two SPWM waveforms can be phase-shifted by 180 degrees. This ensures that the FOC interrupts of the two motors are staggered by half the SPWM cycle time, preventing mutual interference between the two motors' FOC interrupts. Furthermore, it guarantees accurate current sampling timing for both motors, thus enabling normal vector control of dual-motor FOC.

[0041] As a preferred embodiment, this embodiment of the invention uses this method to stagger two SPWM waveforms to achieve dual-motor FOC control. Other similar delay counting schemes are also within the protection scope of the invention, such as automatically starting the second SPWM module counting mode after a set delay time through the chip's timer module.

[0042] Figure 2 This is the FOC three-loop control vector control block diagram. The control block diagrams for the two motors are similar, except for the position synchronization scheme. For details, please refer to [link / reference needed]. Figure 3This example uses a single motor block diagram. The system employs a three-loop control method: the outermost loop is the position loop, the middle loop is the speed loop, and the innermost loop is the current loop. The output of the position loop serves as the input to the speed loop, and the output of the speed loop serves as the input to the current loop. The current loop outputs the dq-axis voltage. After inverse Park transformation, the dq-axis voltage is used to output a PWM duty cycle via the SVPWM algorithm to control the on / off state of the MOSFET. The position and speed information necessary for vector control are acquired through sensors.

[0043] Figure 3 The diagram illustrates a dual-motor position synchronization strategy, employing an optimized master-slave synchronization approach. The feedback from the master motor's position loop is used as the input to the slave motor's position loop, enabling the slave motor to follow the master motor's position. The output of the master motor's position loop is compensated for by inputting the slave motor's speed loop, achieving consistent response between the two motors and thus realizing dual-motor position synchronization. This avoids the lag issue present in traditional master-slave control synchronization schemes.

[0044] Figure 4 The flowchart for dual-motor position synchronization is as follows: First, the SPWM0 module overflow interrupt is enabled and starts counting. Within the SPWM0 overflow interrupt, the SPWM1 counter is enabled. Then, the SPWM0 module overflow interrupt is disabled to prevent frequent interrupts from consuming CPU resources. This allows the waveforms of the two SPWM modules to be staggered by half a cycle. Both motors use a three-loop PI control system (position loop, speed loop, and current loop). The feedback from the master motor's position loop is used as the input to the slave motor's position loop, and the output of the master motor's position loop is compensated to the input of the slave motor's speed loop, thus achieving dual-motor position synchronization.

[0045] Based on the same inventive concept as the foregoing embodiments, this embodiment of the invention also provides a dual-motor device, which includes a first motor and a second motor, a processor, and a memory. The first motor and the second motor are each equipped with a plurality of sensors for collecting position and speed information of the first motor and the second motor. The memory stores a computer program, and the processor executes the computer program to implement the dual-motor vector control position synchronization method.

[0046] In summary, the key points of this invention are:

[0047] 1. By triggering the counter enable of the SPWM1 module through the count overflow interrupt of the SPWM0 module and then disabling the count overflow interrupt of the SPWM0 module, it is easy to achieve a half-cycle difference between the two SPWM counters. This is achieved through the flexible interrupt mechanism of the chip's SPWM module, requiring minimal software intervention. This avoids mutual interference between the FOC interrupts of the two motors and ensures accurate current sampling timing for both motors, thus enabling normal vector control of dual-motor FOC.

[0048] 2. The feedback from the master motor position loop is used as the reference for the slave motor position loop, and the output of the master motor position loop is compensated to the input of the slave motor speed loop, thereby achieving dual motor position synchronization. This avoids the problem of slave motor lag in traditional master-slave control synchronization schemes. The implementation method is simple and suitable for practical engineering implementation.

[0049] The terms “comprising” and “having”, and any variations thereof, in the specification, claims, and accompanying drawings of this invention are intended to cover a non-exclusive inclusion, such as a process, method, system, product, or apparatus that includes a series of steps or units, not necessarily limited to those explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the technical solutions of the embodiments of the present invention.

Claims

1. A dual-motor vector control position synchronization method, characterized in that, include: A delay scheme is configured to stagger the FOC interrupts of the two motors by half a cycle. Both motors employ a three-loop FOC control method, with an outer loop for position, a middle loop for speed, and an inner loop for current. This delay scheme, which staggers the FOC interrupts of the two motors by half a cycle, includes: utilizing the interrupt mechanism of the chip's SPWM module to achieve a half-cycle phase difference between the two SPWM counters, thus staggering the FOC interrupts of the two motors by half a cycle; and further includes: enabling the other SPWM counter when one SPWM counter overflows, and then disabling the overflow interrupt of the first SPWM counter, achieving a 180-degree phase shift between the two SPWM waveforms. The feedback from the master motor position loop is used as the input to the slave motor position loop, and the output of the master motor position loop is compensated to the input of the slave motor speed loop. Execute the vector control code for the two motors to achieve position synchronization between the two motors.

2. The dual-motor vector control position synchronization method according to claim 1, characterized in that, The method further includes setting up several sensors to collect the position and speed information required for vector control of the two motors.

3. The dual-motor vector control position synchronization method according to claim 1, characterized in that, The method further includes: configuring the setpoint of the main motor position loop, wherein the setpoint of the main motor position loop and the feedback of the main motor position loop work together to obtain the output of the main motor position loop.

4. The dual-motor vector control position synchronization method according to claim 3, characterized in that, The method further includes: the output of the main motor position loop is fed into the main motor speed loop.

5. The dual-motor vector control position synchronization method according to claim 1, characterized in that, The method further includes: the feedback from the master motor position loop and the feedback from the slave motor position loop work together to obtain the output of the slave motor position loop.

6. The dual-motor vector control position synchronization method according to claim 5, characterized in that, The method further includes: the output of the slave motor position loop is fed into the slave motor speed loop.

7. A dual-motor device, characterized in that, The dual-motor device includes a first motor and a second motor, a processor and a memory, the memory storing a computer program, and the processor executing the computer program to implement the dual-motor vector control position synchronization method according to any one of claims 1 to 6.

8. The dual-motor device according to claim 7, characterized in that, The first motor and the second motor are each equipped with several sensors to collect the position and speed information of the first motor and the second motor.

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