Data processing method and device of downlink channel, electronic equipment, storage medium and program product
By labeling PDCCH and PDSCH data with channel tags and sharing channel estimation and equalization processing modules, the problems of wasted hardware resources and increased power consumption are solved, thereby reducing hardware costs and improving processing accuracy.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SICHUAN CHUANGZHI LIANHENG TECH CO LTD
- Filing Date
- 2025-08-28
- Publication Date
- 2026-07-03
AI Technical Summary
In the existing technology, the independent design of the processing modules of PDCCH and PDSCH leads to a waste of hardware resources, increased power consumption, and higher hardware costs.
A shared channel estimation and equalization processing module is adopted. By labeling the PDCCH and PDSCH data with channel tags and inputting them into the shared module for processing, the sharing of channel estimation and equalization processing is achieved.
It significantly reduces hardware resource consumption, lowers the cost and power consumption of terminal devices, while ensuring processing accuracy and reliability and simplifying system design.
Smart Images

Figure CN121000558B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and more specifically, to a data processing method, apparatus, electronic device, storage medium, and program product for a downlink channel. Background Technology
[0002] In 5G NR (New Radio) communication systems, the terminal's processing of the PDCCH (Physical Downlink Control Channel) and PDSCH (Physical Downlink Shared Channel) is a crucial step in achieving efficient data transmission and control information delivery. The PDCCH primarily carries downlink scheduling information and uplink grant control information, instructing the terminal on how to receive data from the PDSCH and how to transmit data on the uplink. The PDSCH, on the other hand, is responsible for transmitting downlink data, including user data and system information.
[0003] In existing technologies, the hardware modules in the terminal process PDCCH and PDSCH independently. Each type of data has its own independent channel estimation and equalization processing module. These two modules process the PDCCH and PDSCH signals separately. They independently perform channel estimation and equalization processing on the PDCCH and PDSCH signals received from the wireless channel to ensure signal quality and integrity.
[0004] While this design approach ensures the independence of the two modules to a certain extent, facilitating separate maintenance and development, it is not very efficient in terms of hardware resource utilization. Especially in hardware module implementations (such as FPGAs), each independent module requires a significant portion of logic and storage resources. This leads to redundant hardware resource configuration, resulting in unnecessary waste. This waste not only increases the cost of the hardware but also increases the power consumption of the entire system. Summary of the Invention
[0005] The purpose of this application is to provide a downlink channel data processing method, apparatus, electronic device, storage medium, and program product to improve the problem in the prior art where the processing of PDCCH and PDSCH uses independent channel estimation and equalization processing modules, resulting in resource waste and increased hardware costs.
[0006] In a first aspect, embodiments of this application provide a downlink channel data processing method applied to a terminal, the method comprising:
[0007] Determine the target data that needs to be processed at the current moment, wherein the target data is PDCCH data or PDSCH data;
[0008] Label the target data with the corresponding channel tag to obtain the target data carrying the channel tag;
[0009] The target data carrying the channel label is input into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data.
[0010] In the above implementation process, channel estimation and equalization processing modules are shared by labeling PDCCH or PDSCH data with channel tags and then inputting the labeled data into the shared channel estimation module and shared equalization processing module for processing. This sharing method significantly reduces the occupation of hardware resources and lowers the cost and power consumption of terminal equipment. At the same time, distinguishing data from different channels through channel tags ensures the accuracy and reliability of processing and simplifies system design.
[0011] Optionally, determining the target data to be processed at the current moment includes:
[0012] The target data to be processed at the current moment is determined based on the load status of the shared channel estimation module or the shared equalization processing module.
[0013] In the above implementation process, by dynamically determining the target data to be processed at the current moment based on the load status of the shared channel estimation module or the shared equalization processing module, it is possible to achieve reasonable allocation and efficient utilization of processing module resources. This not only improves the system's flexibility and response speed but also ensures stable processing performance under different load conditions.
[0014] Optionally, determining the target data to be processed at the current moment based on the load status of the shared channel estimation module or the shared equalization processing module includes:
[0015] If the shared channel estimation module or the shared equalization processing module is idle, the target data to be processed at the current moment is determined based on the PDCCH cache data and the PDSCH cache data.
[0016] If the shared channel estimation module or the shared equalization processing module is busy, then wait for the shared channel estimation module or the shared equalization processing module to change to idle.
[0017] In the above implementation process, data processing tasks are dynamically scheduled by monitoring the load status of the shared channel estimation module or the shared equalization processing module in real time. When the module is idle, it can flexibly select the target data to be processed at the current moment based on the status of the PDCCH and PDSCH cached data, making full use of the module's idle resources and improving data processing efficiency. When the module is busy, it chooses to wait, avoiding data processing conflicts and excessive resource consumption, and ensuring the stable operation of the system.
[0018] Optionally, determining the target data to be processed at the current moment based on the PDCCH cache data and the PDSCH cache data includes:
[0019] Determine if there is any PDCCH data in the PDCCH cache that needs to be processed;
[0020] If so, the target data to be processed at the current moment is determined to be PDCCH data, and this PDCCH data is processed first.
[0021] If not, then check if there is any PDSCH data that needs to be processed in the PDSCH cache data;
[0022] If the PDSCH cache data contains PDSCH data that needs to be processed, then the target data that needs to be processed at the current moment is determined to be PDSCH data.
[0023] In the above implementation process, prioritizing the processing of PDCCH data in the PDCCH buffer ensures the timely processing and transmission of control information, which is crucial for guaranteeing the communication control flow of terminal devices. Simultaneously, when there is no data to process in the PDCCH buffer, the PDSCH buffer data is then evaluated and processed. This ordered processing logic not only improves data processing efficiency but also optimizes resource allocation, avoiding resource waste and processing delays caused by disordered processing.
[0024] Optionally, before determining the target data to be processed at the current moment, the method further includes:
[0025] Extract the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current time slot number corresponding to the current time. The PDCCH scheduling parameters include the time-frequency position occupied by the PDCCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDCCH. The PDSCH scheduling parameters include the time-frequency position occupied by the PDSCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDSCH.
[0026] Based on the PDCCH scheduling parameters, PDCCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDCCH data.
[0027] Based on the PDSCH scheduling parameters, PDSCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDSCH data.
[0028] The target data is either the demapped PDCCH data or the demapped PDSCH data.
[0029] In the above implementation process, by extracting the scheduling parameters of PDCCH and PDSCH based on the current timeslot number before determining the target data to be processed at the current moment, and then extracting and demapping the corresponding PDCCH and PDSCH data from the downlink frequency domain data accordingly, fine-grained management of the data processing flow is achieved. This extraction and demapping mechanism based on timeslot number and scheduling parameters ensures the accuracy and timeliness of data processing and avoids processing errors caused by data misalignment or timing disorder.
[0030] Optionally, after obtaining the demapped PDCCH data, the method further includes:
[0031] The demapped PDCCH data is stored in the PDCCH cache;
[0032] After obtaining the demapped PDSCH data, the process further includes:
[0033] The demapped PDSCH data is stored in the PDSCH cache.
[0034] In the above implementation process, the introduction of the caching mechanism enables the system to temporarily store data when the processing module is busy, avoiding data loss or processing conflicts, thereby improving the stability and reliability of the system.
[0035] Optionally, the step of extracting the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current slot number corresponding to the current time includes:
[0036] Retrieve the corresponding PDCCH scheduling parameters from the PDCCH scheduling parameter cache based on the current slot number corresponding to the current time.
[0037] The corresponding PDSCH scheduling parameters are retrieved from the PDSCH scheduling parameter cache based on the current slot number corresponding to the current time.
[0038] In the above implementation, efficient management and accurate extraction of scheduling parameters are achieved by extracting the corresponding PDCCH and PDSCH scheduling parameters from the PDCCH and PDSCH scheduling parameter caches respectively based on the current timeslot number. This timeslot-based caching and extraction mechanism ensures the timeliness and accuracy of scheduling parameters, avoiding signal processing problems caused by parameter errors or delays.
[0039] Optionally, after inputting the target data carrying the channel label into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data, the method further includes:
[0040] The processed data is distributed to the corresponding upper-layer processing module for further processing based on the channel label.
[0041] In the above implementation process, by attaching channel tags to the processed data and distributing the data to the corresponding upper-layer processing modules based on these tags, refined and efficient management of the data processing flow is achieved. This mechanism ensures the accurate transmission and processing of data at different processing stages, avoiding problems such as data confusion or incorrect routing.
[0042] Secondly, embodiments of this application provide a downlink channel data processing apparatus applied to a terminal, the apparatus comprising:
[0043] The data determination module is used to determine the target data that needs to be processed at the current moment, wherein the target data is PDCCH data or PDSCH data;
[0044] The tag module is used to tag the target data with the corresponding channel tag to obtain the target data carrying the channel tag;
[0045] The processing module is used to input the target data carrying the channel label into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data.
[0046] Thirdly, embodiments of this application provide an electronic device, including a processor and a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the steps of the method provided in the first aspect above are performed.
[0047] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the method provided in the first aspect above.
[0048] Fifthly, embodiments of this application provide a computer program product, including computer program instructions, which, when read and executed by a processor, perform the steps of the method provided in the first aspect above.
[0049] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing embodiments of this application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description
[0050] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0051] Figure 1 A schematic diagram of a system architecture for applying the solution of this application is provided as an embodiment of this application;
[0052] Figure 2 A flowchart illustrating a downlink channel data processing method provided in an embodiment of this application;
[0053] Figure 3 An overall architecture diagram of a downlink channel data processing system provided in this application embodiment;
[0054] Figure 4 A structural block diagram of a downlink channel data processing apparatus provided in an embodiment of this application;
[0055] Figure 5 This is a schematic diagram of the structure of an electronic device for performing a downlink channel data processing method, provided in an embodiment of this application. Detailed Implementation
[0056] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.
[0057] It should be noted that the terms "system" and "network" in the embodiments of this invention can be used interchangeably. "Multiple" refers to two or more; therefore, in the embodiments of this invention, "multiple" can also be understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.
[0058] It should also be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.
[0059] The technical solution of this application can be applied to non-terrestrial network (NTN) systems such as satellite communication systems and high altitude platform station (HAPS) communication, for example, integrated communication and navigation (ICaN) systems and global navigation satellite systems (GNSS).
[0060] Satellite communication systems can be integrated with traditional mobile communication systems. For example, the mobile communication system can be a fourth-generation (4G) communication system (e.g., Long Term Evolution (LTE) system), a worldwide interoperability for microwave access (WiMAX) communication system, a fifth-generation (5G) communication system (e.g., a new radio (NR) system), and future mobile communication systems, etc.
[0061] The system architecture or scenario primarily applied in this application is as follows: Figure 1 As shown, this includes base stations and terminals. A base station can be a base station in an NR system, such as a New Generation Node B (gNodeB), or it can refer to a satellite base station in a satellite system.
[0062] The terminals mentioned in the embodiments of this application include various handheld devices, vehicle-mounted devices, wearable devices, computing devices, or other processing devices connected to a wireless modem with wireless communication functions. Specifically, they may refer to user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent, or user device. Terminals can also be satellite phones, cellular phones, smartphones, wireless data cards, wireless modems, machine-type communication devices, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to a wireless modem, in-vehicle devices or wearable devices, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical care, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, terminal devices in 5G networks or future communication networks, etc.
[0063] This application provides a downlink channel data processing method applied to a terminal. This method tags PDCCH or PDSCH data with channel labels and inputs the tagged data into a shared channel estimation module and a shared equalization processing module for processing, thus achieving sharing of the channel estimation and equalization processing modules. This sharing method significantly reduces hardware resource consumption, lowering the cost and power consumption of the terminal device. Simultaneously, distinguishing data from different channels through channel labels ensures processing accuracy and reliability, and simplifies system design.
[0064] Please refer to Figure 2 , Figure 2 A flowchart of a downlink channel data processing method provided in this application embodiment, the method including the following steps:
[0065] Step S110: Determine the target data that needs to be processed at the current moment.
[0066] The target data is either PDCCH data or PDSCH data. PDCCH is mainly responsible for transmitting scheduling information, which tells the terminal when and on which resources to receive PDSCH data, while PDSCH is used to carry user data.
[0067] In some implementations, the target data to be processed can be determined based on current scheduling needs. Since PDSCH data is scheduled from PDCCH data, the terminal can prioritize processing PDCCH data. If there is no PDCCH data to be processed at present, then PDSCH data will be processed. That is, the terminal first acquires PDCCH data and transmits it to the shared channel estimation module and the shared equalization processing module for processing. If there is no PDCCH data at present, then it acquires PDSCH data and transmits it to the shared channel estimation module and the shared equalization processing module for processing.
[0068] Of course, you can also randomly select the target data to be processed, such as randomly selecting to process PDCCH data or PDSCH data.
[0069] Step S120: Label the target data with the corresponding channel label to obtain the target data carrying the channel label.
[0070] Channel labels can be used to represent PDCCH data or PDSCH data. For example, a channel label of 1 indicates that the data source is PDCCH, while a channel label of 0 indicates that the data source is PDSCH.
[0071] In some implementations, the channel tag can be added to the header or tail of the data packet to ensure that the subsequent shared channel estimation module and shared equalization processing module can identify the data source, and then encapsulate the tagged data into a new data packet for transmission to the subsequent modules.
[0072] In some other implementations, the channel tag can also be transmitted via an additional control signal channel.
[0073] Step S130: Input the target data carrying the channel label into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data.
[0074] In this scheme, the terminal's hardware module (such as FPGA) is designed with only one shared channel estimation module and one shared equalization processing module. PDCCH data and PDSCH data can be processed by time-division multiplexing these two modules.
[0075] The shared channel estimation module is used to estimate the distortion of the signal caused by the wireless channel using the received demodulation reference signal (such as DMRS).
[0076] The shared equalization processing module is used to compensate for channel distortion and restore the original transmitted signal using the channel estimation results.
[0077] Specifically, after receiving PDCCH or PDSCH data, the terminal first performs time-frequency conversion on the PDCCH or PDSCH data, converting it into frequency domain data. Then, the shared channel estimation module determines the DMRS position based on the PDCCH or PDSCH data. For PDCCH data, it extracts the DMRS at fixed symbol positions based on the CORESET configuration information; for PDSCH data, it extracts the distributed DMRS based on the DMRS pattern scheduled by DCI (Downlink Control Information). The channel response is then estimated based on the extracted DMRS and transmitted to the shared equalization processing module. This module uses the channel response to compensate and correct the PDCCH or PDSCH data, reducing channel-induced distortion and interference and restoring the original signal.
[0078] In the above implementation process, channel estimation and equalization processing modules are shared by labeling PDCCH or PDSCH data with channel tags and then inputting the labeled data into the shared channel estimation module and shared equalization processing module for processing. This sharing method significantly reduces the occupation of hardware resources and lowers the cost and power consumption of terminal equipment. At the same time, distinguishing data from different channels through channel tags ensures the accuracy and reliability of processing and simplifies system design.
[0079] In the above implementation process, the target data to be processed at the current moment can be determined based on the load status of the shared channel estimation module or the shared equalization processing module.
[0080] In this implementation, a status detector can be created to monitor the load status of the shared channel estimation module or the shared equalization processing module in real time or at intervals. For example, it can detect whether the shared channel estimation module or the shared equalization processing module is currently processing data. If it is, its load status is considered to be busy. If the module is not currently processing data, its load status is considered to be idle.
[0081] In some other implementations, the load status can also be determined based on the amount of data currently being processed by the shared channel estimation module or the shared load balancing module, the processing queue length, etc. For example, if the data volume and / or processing queue is greater than a corresponding threshold, the load status is considered busy; otherwise, the load status is considered idle.
[0082] When determining the target data to be processed, priority rules can be used. If the module's load status is idle, PDCCH data can be selected as the target data for processing (PDCCH data usually has a higher priority because it contains scheduling information that directly affects the reception of PDSCH data). If the module is busy, the target data to be processed can be determined after the module's load status changes to idle.
[0083] In the above implementation process, by dynamically determining the target data to be processed at the current moment based on the load status of the shared channel estimation module or the shared equalization processing module, it is possible to achieve reasonable allocation and efficient utilization of processing module resources. This not only improves the system's flexibility and response speed but also ensures stable processing performance under different load conditions.
[0084] Based on the above embodiments, if the shared channel estimation module or the shared equalization processing module is idle, the target data to be processed at the current moment is determined according to the PDCCH cache data and the PDSCH cache data. If the shared channel estimation module or the shared equalization processing module is busy, the system waits for the shared channel estimation module or the shared equalization processing module to change to idle.
[0085] PDCCH buffer data refers to the data stored in the PDCCH buffer module, which stores data received from the PDCCH channel. PDSCH buffer data refers to the data stored in the PDSCH buffer module, which stores data received from the PDSCH channel. When a terminal receives data, it can store the data in the corresponding buffer module according to the channel type and record the arrival time of the data.
[0086] The state detector can detect the load status of the shared channel estimation module or the shared equalization processing module. If the load status is detected to be idle, it can check the data in the PDCCH buffer module and the PDSCH buffer module to determine which buffer contains data. The buffered data can be used as the target data to be processed. If both buffer modules contain data, the data in one buffer module can be randomly selected as the target data to be processed.
[0087] If the load status is detected as busy, the target data to be processed can be determined after the load status of the shared channel estimation module or the shared equalization processing module changes to idle. During the waiting period, new data continues to be received and buffered, and the load status of the module is continuously monitored.
[0088] In the above implementation process, data processing tasks are dynamically scheduled by monitoring the load status of the shared channel estimation module or the shared equalization processing module in real time. When the module is idle, it can flexibly select the target data to be processed at the current moment based on the status of the PDCCH and PDSCH cached data, making full use of the module's idle resources and improving data processing efficiency. When the module is busy, it chooses to wait, avoiding data processing conflicts and excessive resource consumption, and ensuring the stable operation of the system.
[0089] Based on the above embodiments, when the shared channel estimation module or the shared equalization processing module is idle, it can first be determined whether there is PDCCH data that needs to be processed in the PDCCH buffer data. If there is, the target data that needs to be processed at the current moment is determined to be PDCCH data, and the PDCCH data is processed first. If not, it can be determined whether there is PDSCH data that needs to be processed in the PDSCH buffer data. If there is PDSCH data that needs to be processed in the PDSCH buffer data, the target data that needs to be processed at the current moment is determined to be PDSCH data.
[0090] In other words, when idle, it first checks whether there is still unprocessed data in the PDCCH cache module. If there is, it processes the PDCCH data first, because PDCCH data usually contains scheduling information and has high real-time requirements. If there is no data in the PDCCH cache, it processes the data in the PDSCH cache.
[0091] Of course, if there is no data in the PDSCH buffer, it will wait to receive new data and first check if there is new data in the PDCCH buffer. If there is, it will process the PDCCH data first.
[0092] In the above implementation process, prioritizing the processing of PDCCH data in the PDCCH buffer ensures the timely processing and transmission of control information, which is crucial for guaranteeing the communication control flow of terminal devices. Simultaneously, when there is no data to process in the PDCCH buffer, the PDSCH buffer data is then evaluated and processed. This ordered processing logic not only improves data processing efficiency but also optimizes resource allocation, avoiding resource waste and processing delays caused by disordered processing.
[0093] Based on the above embodiments, before determining the target data to be processed at the current moment, the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters can be extracted according to the current timeslot number corresponding to the current moment. The PDCCH scheduling parameters include the time-frequency position occupied by the PDCCH, the interleaving mode, the time-domain position indication information of the DMRS, and the timeslot number corresponding to the PDCCH. The PDSCH scheduling parameters include the time-frequency position occupied by the PDSCH, the interleaving mode, the time-domain position indication information of the DMRS, and the timeslot number corresponding to the PDSCH. Then, PDCCH data can be extracted from the downlink frequency domain data according to the PDCCH scheduling parameters and demapped to obtain demapped PDCCH data. Similarly, PDSCH data can be extracted from the downlink frequency domain data according to the PDSCH scheduling parameters and demapped to obtain demapped PDSCH data. The target data is either the demapped PDCCH data or the demapped PDSCH data.
[0094] The terminal obtains the current timeslot number through a synchronization mechanism with the base station, such as by receiving synchronization signal blocks and system information blocks to obtain the current timeslot number. The timeslot number is used to determine the scheduling information of PDCCH and PDSCH in the current timeslot.
[0095] The terminal can extract PDCCH scheduling parameters from the control information sent by the base station, including time-frequency location (the specific location of PDCCH in the time and frequency domains), interleaving mode (the interleaving mode of PDCCH data, used for deinterleaving processing), DRMS time domain location indication information (the location of the demodulation reference signal of PDCCH, used for channel estimation), and the time slot number corresponding to PDCCH.
[0096] The terminal also extracts PDSCH scheduling parameters from the control information sent by the base station, including time-frequency position (the specific position of PDSCH in the time and frequency domains), interleaving mode (the interleaving mode of PDSCH data, used for deinterleaving processing), DRMS time domain position indication information (the position of the demodulation reference signal of PDSCH, used for channel estimation), and the time slot number corresponding to PDSCH.
[0097] The terminal obtains the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current timeslot number. The current timeslot number corresponds to the timeslot number in the two scheduling parameters. This is done to make the PDCCH scheduling parameters and PDSCH scheduling parameters correspond to the timeslot number of the downlink frequency domain data.
[0098] Since the time-frequency resources occupied by the PDCCH and PDSCH channels do not overlap, the obtained PDCCH scheduling parameters and PDSCH scheduling parameters can be processed independently. For PDCCH, the downlink frequency domain data can be demapped by extracting the time-frequency position and interleaving mode from the PDCCH scheduling parameters. Similarly, the downlink frequency domain data can be demapped by extracting the time-frequency position and interleaving mode from the PDSCH scheduling parameters.
[0099] Downlink frequency domain data refers to the output data of the Lowphy module, which converts received time-domain data into frequency-domain data. For example, depending on the interleaving method, the extracted PDCCH data can be deinterleaved, and then the deinterleaved data can be mapped from the frequency domain to the time domain to obtain demapped PDCCH data. Similarly, depending on the interleaving method, the extracted PDSCH data can be deinterleaved, and the deinterleaved data can be mapped from the frequency domain to the time domain to obtain demapped PDSCH data.
[0100] Subsequent data processing involves processing either the demapped PDCCH data or the demapped PDSCH data.
[0101] In the above implementation process, by extracting the scheduling parameters of PDCCH and PDSCH based on the current timeslot number before determining the target data to be processed at the current moment, and then extracting and demapping the corresponding PDCCH and PDSCH data from the downlink frequency domain data accordingly, fine-grained management of the data processing flow is achieved. This extraction and demapping mechanism based on timeslot number and scheduling parameters ensures the accuracy and timeliness of data processing and avoids processing errors caused by data misalignment or timing disorder.
[0102] Based on the above embodiments, after demapping the PDCCH data or PDSCH data, the demapped PDCCH data can be stored in the PDCCH cache, and the demapped PDSCH data can be stored in the PDSCH cache.
[0103] Here, PDCCH cache or PDSCH cache can refer to a cache queue or a cache module, i.e., a memory. For example, two cache queues can be created: one is the PDCCH cache queue, which is used to store the demapped PDCCH data, and the other is the PDSCH cache queue, which is used to store the demapped PDSCH data.
[0104] After the target data that needs to be processed is determined, the data can be directly extracted from the corresponding buffer queue and input into the shared channel estimation module and the shared equalization processing module for processing.
[0105] In the above implementation process, the introduction of the caching mechanism enables the system to temporarily store data when the processing module is busy, avoiding data loss or processing conflicts, thereby improving the stability and reliability of the system.
[0106] Based on the above embodiments, in the above method of extracting the PDCCH scheduling parameters and PDSCH scheduling parameters corresponding to the current timeslot number, the corresponding PDCCH scheduling parameters can be extracted from the PDCCH scheduling parameter cache according to the current timeslot number corresponding to the current time, and the corresponding PDSCH scheduling parameters can be extracted from the PDSCH scheduling parameter cache according to the current timeslot number corresponding to the current time.
[0107] Two scheduling parameter caches can be pre-created: a PDCCH scheduling parameter cache and a PDSCH scheduling parameter cache. After the terminal's processor obtains the PDCCH and PDSCH scheduling parameters from the base station's control information, it stores them into their respective caches.
[0108] Therefore, the PDCCH scheduling parameter cache and PDSCH scheduling parameter cache may store scheduling parameters issued at different times. At the current time, it is necessary to retrieve the scheduling parameters corresponding to the current timeslot number from the cache in order to perform demapping processing on the currently received data.
[0109] In the above implementation, efficient management and accurate extraction of scheduling parameters are achieved by extracting the corresponding PDCCH and PDSCH scheduling parameters from the PDCCH and PDSCH scheduling parameter caches respectively based on the current timeslot number. This timeslot-based caching and extraction mechanism ensures the timeliness and accuracy of scheduling parameters, avoiding signal processing problems caused by parameter errors or delays.
[0110] Based on the above embodiments, after the shared channel estimation module and the shared equalization processing module process the target data and obtain the processed data, the processed data can also be distributed to the corresponding upper-layer processing modules for further processing according to the channel label.
[0111] Understandably, the processed data also carries corresponding channel tags. Therefore, the type of target data can be identified based on the channel tags. If the target data is PDCCH data, it is transmitted to the PDCCH processing module in the processor via the PDCCH interface. This PDCCH processing module can decode the PDCCH, extract control information, parse the control information, and obtain scheduling instructions, resource allocation information, etc. If the target data is PDSCH data, it is transmitted to the PDSCH processing module in the processor via the PDSCH interface. This PDSCH processing module can decode the PDSCH data, extract user data, demodulate the user data, and recover the original data, etc. In this way, the two types of data processed by the shared channel estimation module and the shared equalization processing module can be distinguished by the channel tags, and different types of data can be distributed to different upper-layer processing modules for corresponding processing.
[0112] In the above implementation process, by attaching channel tags to the processed data and distributing the data to the corresponding upper-layer processing modules based on these tags, refined and efficient management of the data processing flow is achieved. This mechanism ensures the accurate transmission and processing of data at different processing stages, avoiding problems such as data confusion or incorrect routing.
[0113] The implementation process of the above method is illustrated below with a detailed embodiment.
[0114] The core of this solution lies in using a dynamic scheduling arbitration mechanism to allow the PDCCH and PDSCH to share the same channel estimation module and equalization processing module in a time-sharing manner, thereby saving logical resources. The overall system architecture is as follows: Figure 3 As shown, it mainly includes the following functional modules:
[0115] Parameter caching module: Receives and caches scheduling parameters from the terminal's CPU, including PDCCH scheduling parameter cache and PDSCH scheduling parameter cache, which store the scheduling parameters of the two channels respectively;
[0116] Time slot management module: Real-time acquisition of system frame number and subframe number after synchronization with base station, and calculation of accurate current time slot number;
[0117] The parameter extraction and distribution module uses the current timeslot number as an index to simultaneously query the PDCCH scheduling parameter cache and the PDSCH scheduling parameter cache. If a scheduling parameter matching the current timeslot number is found, it is extracted. The extracted scheduling parameters are then distributed to the demapping module. It can also distribute DRMS configuration information to the shared channel estimation module.
[0118] Data demapping and caching module: This module includes two demapping units and two caching units. The demapping units distribute scheduling parameters, extract the corresponding PDCCH or PDSCH data from the downlink frequency domain data sent by the Lowphy module, and perform deinterleaving and demapping to output symbol data. The caching units can be first-in-first-out (FIFO) memories, serving as PDCCH data cache queues and PDSCH data cache queues respectively, for temporarily storing the demapped data.
[0119] Each cache queue can be set with a data validity flag to indicate whether there is data to be processed in the queue. When determining the target data later, the data validity flag can be used to determine the target data.
[0120] Arbitration and Tag Injection Module: This module continuously monitors the load status of the shared channel estimation module or the shared equalization processing module, as well as the data validity flags of the two data buffer queues.
[0121] Arbitration strategy: Arbitration is initiated immediately when the shared channel estimation module or the shared equalization processing module is detected to be idle. Following the PDCCH priority principle: First, the PDCCH buffer queue is checked; if data is available, processing permission is granted immediately; otherwise, the PDSCH buffer queue is checked.
[0122] Tag injection: Once the arbitration decides to process data for a certain channel, a specific format tag, i.e., a channel tag, is attached to the data as it is read from the buffer queue. For example, it is represented by a 1-bit signal (0 represents PDCCH, 1 represents PDSCH). This channel tag is entered into the subsequent processing pipeline as an accompanying signal synchronized with the data.
[0123] The shared channel estimation module and the shared equalization processing module: Channel estimation refers to locating and extracting the DMRS reference signal from the input data stream based on the DMRS configuration information sent by the parameter distribution module, and using the least squares (LS) algorithm to perform initial channel response estimation to obtain the channel frequency response of the entire data bandwidth. Equalization processing utilizes the estimated channel response to perform equalization on the data symbols to compensate for channel distortion.
[0124] Data distribution module: Based on the channel label carried by the equalized output data, it routes the data to the corresponding subsequent processing interface: PDCCH data is sent to the PDCCH processing module, and PDSCH data is sent to the PDSCH processing module.
[0125] The entire processing flow uses a time slot as the basic scheduling cycle, and its detailed steps are as follows:
[0126] (1) Parameter pre-configuration and caching:
[0127] The CPU pre-calculates the PDCCH and PDSCH scheduling parameters for the current and several future time slots based on the downlink control information (DCI). The CPU then sends these parameter packets to the parameter cache module of the FPGA via the bus and stores them in the corresponding cache area.
[0128] (2) Time slot synchronization and parameter activation:
[0129] The time slot management module tracks the current time slot number in real time. When the system time enters a new time slot, the parameter extraction module immediately retrieves the parameter cache using that time slot number as the key. If a match is found, the corresponding parameter group is activated for data processing in this time slot.
[0130] (3) Data reception and preprocessing:
[0131] The lowphy module delivers the converted frequency domain data stream.
[0132] The demapping module extracts the time-frequency resource data of PDCCH and PDSCH from the data stream in parallel according to the activated parameters, performs demapping, and stores them into their respective buffer queues.
[0133] (4) Dynamic scheduling and processing:
[0134] Scenario A (Ideal): When the shared module is idle and the PDCCH cache queue has data, the arbitrator immediately schedules the PDCCH data, tags it with 0, and sends it to the shared module for processing. After processing, the data is correctly distributed according to tag 0.
[0135] Scenario B (PDCCH arrives while PDSCH is being processed): If the shared module is processing PDSCH data (tag 1), and new data arrives in the PDCCH buffer queue (due to its higher priority), the arbiter will send a high-priority interrupt request to the shared module. After completing the current symbol or a minimum computation unit, the shared module saves the intermediate state of the current PDSCH processing (such as partial computation results and pointer positions) to a dedicated context register, then responds to the interrupt and enters an idle state. The arbiter then schedules the PDCCH data for processing. After the PDCCH is processed, the shared module restores the PDSCH processing state from the saved context and continues to complete the interrupt computation. Alternatively, it can wait for the PDSCH data to be processed before releasing the PDCCH data.
[0136] Scenario C (PDSCH only): When the PDCCH queue is empty but the PDSCH queue has data, the arbitrator schedules the PDSCH data, tags it with 1, and processes and distributes it.
[0137] (5) Resource cleanup:
[0138] Once all data within a time slot has been processed, the corresponding parameters are marked as invalid, awaiting the next round of time slot synchronization.
[0139] Please refer to Figure 4 , Figure 4 This is a structural block diagram of a downlink channel data processing apparatus 200 provided in an embodiment of this application. The apparatus 200 may be a module, program segment, or code on an electronic device. It should be understood that the apparatus 200 corresponds to the above method embodiment and is capable of performing the various steps involved in the method embodiment. The specific functions of the apparatus 200 can be found in the description above, and detailed descriptions are appropriately omitted here to avoid repetition.
[0140] Optionally, the device 200 includes:
[0141] Data determination module 210 is used to determine the target data that needs to be processed at the current moment, wherein the target data is PDCCH data or PDSCH data;
[0142] Tag module 220 is used to tag the target data with a corresponding channel tag to obtain target data carrying the channel tag;
[0143] The processing module 230 is used to input the target data carrying the channel label into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data.
[0144] Optionally, the data determination module 210 is used to determine the target data to be processed at the current moment based on the load status of the shared channel estimation module or the shared equalization processing module.
[0145] Optionally, the data determination module 210 is configured to determine the target data to be processed at the current moment based on the PDCCH cache data and PDSCH cache data if the load status of the shared channel estimation module or the shared equalization processing module is idle; and to wait for the load status of the shared channel estimation module or the shared equalization processing module to change to idle if the load status of the shared channel estimation module or the shared equalization processing module is busy.
[0146] Optionally, the data determination module 210 is used to determine whether there is PDCCH data that needs to be processed in the PDCCH cache data; if there is, the target data that needs to be processed at the current moment is determined to be PDCCH data, and the PDCCH data is processed first; if not, it is determined whether there is PDSCH data that needs to be processed in the PDSCH cache data; if there is PDSCH data that needs to be processed in the PDSCH cache data, the target data that needs to be processed at the current moment is determined to be PDSCH data.
[0147] Optionally, the device 200 further includes:
[0148] The demapping module is used to extract the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current time slot number at the current moment. The PDCCH scheduling parameters include the time-frequency position occupied by the PDCCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDCCH. The PDSCH scheduling parameters include the time-frequency position occupied by the PDSCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDSCH. Based on the PDCCH scheduling parameters, PDCCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDCCH data. Similarly, based on the PDSCH scheduling parameters, PDSCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDSCH data.
[0149] The target data is either the demapped PDCCH data or the demapped PDSCH data.
[0150] Optionally, the device 200 further includes:
[0151] The caching module is used to store the demapped PDCCH data in the PDCCH cache and the demapped PDSCH data in the PDSCH cache.
[0152] Optionally, the demapping module is used to extract the corresponding PDCCH scheduling parameters from the PDCCH scheduling parameter cache according to the current slot number corresponding to the current time; and to extract the corresponding PDSCH scheduling parameters from the PDSCH scheduling parameter cache according to the current slot number corresponding to the current time.
[0153] Optionally, the device 200 further includes:
[0154] The data distribution module is used to distribute the processed data to the corresponding upper-layer processing module for processing according to the channel label.
[0155] It should be noted that those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0156] Please refer to Figure 5 , Figure 5This application provides a schematic diagram of the structure of an electronic device for executing a downlink channel data processing method. The electronic device may include: at least one processor 310, such as a CPU; at least one communication interface 320; at least one memory 330; and at least one communication bus 340. The communication bus 340 is used to establish communication between these components. In this embodiment, the communication interface 320 is used for signaling or data communication with other node devices. The memory 330 may be a high-speed RAM or non-volatile memory, such as at least one disk storage device. Optionally, the memory 330 may also be at least one storage device located remotely from the processor. The memory 330 stores computer-readable instructions, which, when executed by the processor 310, cause the electronic device to perform the aforementioned method process.
[0157] As one implementation method, the aforementioned electronic device can be a terminal, and different terminals can be interconnected via wired or wireless means. Terminals can be widely used in various scenarios, such as Near Field Communication (NFC) device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, and smart cities.
[0158] The aforementioned terminal may further include an antenna and a transceiver. The transceiver modulates (e.g., analog-to-digital conversion, filtering, amplification, and up-conversion) the output sample and generates an uplink signal, which is transmitted to the network device via the antenna. On the downlink, the antenna receives the downlink signal transmitted by the network device, and the transceiver modulates (e.g., filtering, amplification, down-conversion, and digitization) the signal received from the antenna and provides input sampling. The processor 310 is used to execute the delay correction method described in the above embodiments. The embodiments of this application do not limit the specific technology or device form used in the terminal.
[0159] Understandable. Figure 5 The structure shown is for illustrative purposes only; the electronic device may also include components that are more advanced than those shown. Figure 5 The more or fewer components shown, or having the same Figure 5 The different configurations shown. Figure 5 The components shown can be implemented using hardware, software, or a combination thereof.
[0160] This application provides a computer-readable storage medium storing a computer program thereon. When the computer program is executed by a processor, it performs the method process executed by the electronic device in the above method embodiments.
[0161] This embodiment discloses a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, and when the program instructions are executed by a computer, the computer can perform the methods provided in the above-described method embodiments, such as including:
[0162] Determine the target data that needs to be processed at the current moment, wherein the target data is PDCCH data or PDSCH data;
[0163] Label the target data with the corresponding channel tag to obtain the target data carrying the channel tag;
[0164] The target data carrying the channel label is input into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data.
[0165] In summary, the embodiments of this application provide a downlink channel data processing method, apparatus, electronic device, storage medium, and program product. By labeling PDCCH data or PDSCH data with channel tags and inputting the labeled data into a shared channel estimation module and a shared equalization processing module for processing, the channel estimation and equalization processing modules are shared. This sharing method significantly reduces the occupation of hardware resources and lowers the cost and power consumption of terminal equipment. Simultaneously, distinguishing data from different channels through channel tags ensures the accuracy and reliability of processing and simplifies system design.
[0166] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.
[0167] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0168] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.
[0169] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.
[0170] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.
Claims
1. A data processing method for a downlink channel, characterized in that, Applied to a terminal, the method includes: Determine the target data that needs to be processed at the current moment, wherein the target data is PDCCH data or PDSCH data; Label the target data with the corresponding channel tag to obtain the target data carrying the channel tag; The target data carrying the channel label is input into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data. Before determining the target data to be processed at the current moment, the process also includes: Extract the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current time slot number corresponding to the current time. The PDCCH scheduling parameters include the time-frequency position occupied by the PDCCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDCCH. The PDSCH scheduling parameters include the time-frequency position occupied by the PDSCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDSCH. Based on the PDCCH scheduling parameters, PDCCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDCCH data. Based on the PDSCH scheduling parameters, PDSCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDSCH data. The target data is either the demapped PDCCH data or the demapped PDSCH data.
2. The method according to claim 1, characterized in that, The determination of the target data to be processed at the current moment includes: The target data to be processed at the current moment is determined based on the load status of the shared channel estimation module or the shared equalization processing module.
3. The method according to claim 2, characterized in that, Determining the target data to be processed at the current moment based on the load status of the shared channel estimation module or the shared equalization processing module includes: If the shared channel estimation module or the shared equalization processing module is idle, the target data to be processed at the current moment is determined based on the PDCCH cache data and the PDSCH cache data. If the shared channel estimation module or the shared equalization processing module is busy, then wait for the shared channel estimation module or the shared equalization processing module to change to idle.
4. The method according to claim 3, characterized in that, The step of determining the target data to be processed at the current moment based on PDCCH cache data and PDSCH cache data includes: Determine if there is any PDCCH data in the PDCCH cache that needs to be processed; If so, the target data to be processed at the current moment is determined to be PDCCH data, and this PDCCH data is processed first. If not, then check if there is any PDSCH data that needs to be processed in the PDSCH cache data; If the PDSCH cache data contains PDSCH data that needs to be processed, then the target data that needs to be processed at the current moment is determined to be PDSCH data.
5. The method according to claim 1, characterized in that, After obtaining the demapped PDCCH data, the process further includes: The demapped PDCCH data is stored in the PDCCH cache; After obtaining the demapped PDSCH data, the process further includes: The demapped PDSCH data is stored in the PDSCH cache.
6. The method according to claim 1, characterized in that, The step of extracting the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current slot number at the current time includes: Retrieve the corresponding PDCCH scheduling parameters from the PDCCH scheduling parameter cache based on the current slot number corresponding to the current time. The corresponding PDSCH scheduling parameters are retrieved from the PDSCH scheduling parameter cache based on the current slot number corresponding to the current time.
7. The method according to any one of claims 1-6, characterized in that, After inputting the target data carrying the channel label into the shared channel estimation module and the shared equalization processing module for processing, and obtaining the processed data, the method further includes: The processed data is distributed to the corresponding upper-layer processing module for further processing based on the channel label.
8. A data processing apparatus for a downlink channel, characterized in that, Applied to a terminal, the device includes: The data determination module is used to determine the target data that needs to be processed at the current moment, wherein the target data is PDCCH data or PDSCH data; The tag module is used to tag the target data with the corresponding channel tag to obtain the target data carrying the channel tag; The processing module is used to input the target data carrying the channel label into the shared channel estimation module and the shared equalization processing module for processing to obtain the processed data; The device further includes: The demapping module is used to extract the corresponding PDCCH scheduling parameters and PDSCH scheduling parameters based on the current time slot number at the current moment. The PDCCH scheduling parameters include the time-frequency position occupied by the PDCCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDCCH. The PDSCH scheduling parameters include the time-frequency position occupied by the PDSCH, the interleaving mode, the time-domain position indication information of the DMRS, and the time slot number corresponding to the PDSCH. Based on the PDCCH scheduling parameters, PDCCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDCCH data. Similarly, based on the PDSCH scheduling parameters, PDSCH data is extracted from the downlink frequency domain data and demapped to obtain demapped PDSCH data. The target data is either the demapped PDCCH data or the demapped PDSCH data.
9. An electronic device, characterized in that, It includes a processor and a memory, the memory storing computer-readable instructions that, when executed by the processor, perform the method as described in any one of claims 1-7.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it performs the method as described in any one of claims 1-7.
11. A computer program product, characterized in that, It includes computer program instructions, which, when read and executed by a processor, perform the method as described in any one of claims 1-7.