Polarization-free LED display device and manufacturing method thereof

Abstract

The invention discloses a non-polarized light LED display device and a manufacturing method thereof, and the dependence of a traditional polaroid is eliminated through the collaborative design of a directional light-emitting LED array, a micro-lens array, a patterned light absorption barrier and a reflection enhancement layer. The device has the advantages of high brightness (greater than or equal to 1250nits), wide visual angle (brightness decay within 160 degrees is less than 30%), low reflection (less than 1%), ultra-thin (less than 1.2 mm) and the like, and is suitable for consumer electronics, vehicle-mounted display, virtual manufacturing and other scenes.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a non-polarized LED display device based on directional light-emitting structure and light path optimization and a manufacturing method thereof, which is suitable for high-brightness, wide-viewing-angle, low-power-consumption commercial display, vehicle-mounted display and virtual production scenes. BACKGROUND

[0002] Traditional LED display devices usually rely on polarizing sheets to control the polarization direction of light to realize image display, but polarizing sheets have significant technical defects:

[0003] · Light efficiency loss: polarizing sheets only allow light in a single polarization direction to pass through, resulting in about 60% of light intensity being absorbed (referring to the research on LCD polarization loss in Optics Express in 2020), limiting screen brightness;

[0004] · Viewing angle limitation: the polarization characteristics of polarizing sheets change with viewing angle, which easily causes color deviation and brightness decay, for example, the brightness outside a 160° viewing angle decreases by more than 30% (according to the actual measurement data of mainstream LCDs by DisplayMate in 2022);

[0005] · Thickness and cost: polarizing sheets require additional lamination processes, increasing device thickness (about 1.8 mm) and manufacturing cost (accounting for 15%-20% of the total cost of the panel).

[0006] The non-polarized LED solutions (such as direct light-emitting Micro-LED) proposed in the prior art still do not solve the following core problems:

[0007] · The divergence angle of the self-emission of LED chips is large (usually > 60°), resulting in low light utilization (only about 10% of the effective light exits);

[0008] · When mixing multi-color light (RGB), viewing angle deviation (ΔE > 5) occurs due to path differences, and full-view color consistency is not achieved;

[0009] · The surface reflectivity is high (> 5%), and environmental light interference leads to a decrease in contrast ratio (typical value < 1000:1).

[0010] Therefore, there is an urgent need for a non-polarized LED display device that breaks through the limitations of polarizing sheets through structural innovation, while improving light efficiency, viewing angle consistency and anti-reflection performance. SUMMARY

[0011] PURPOSE OF THE INVENTION

[0012] The purpose of the present application is to provide a non-polarized LED display device that eliminates the dependence on polarizing sheets through the coordinated design of directional light-emitting structure, microlens array and light-absorbing barrier, and achieves the following technical objectives:

[0013] • Light efficiency: brightness ≥ 1200 nits (more than 50% increase);

[0014] • Extended viewing angle: brightness attenuation < 30% and color temperature fluctuation < ± 30K within 160° horizontal / vertical viewing angle;

[0015] • Reduced reflection: surface reflectivity < 1% (anti-environmental light interference);

[0016] • Ultra-thin design: overall thickness < 1.2mm (flexible display adaptation).

[0017] Technical solutions

[0018] To achieve the above-mentioned purposes, the following technical solutions are adopted in the present application:

[0019] 1. Core structure of non-polarized LED display device

[0020] The display device comprises the following functional modules (shown in Table 1):

[0021]

[0022]

[0023] Table 1

[0024] 2. Key technical features

[0025] • Directional light emitting structure: LED chips are constrained in light emitting direction by nano-grating (period 200-400nm, depth 50-100nm), combined with micro-lens focusing (NA=0.4), which limits the light within ±5° divergence angle, reduces stray light loss (light efficiency increases by 50%).

[0026] • Light path optimization mechanism: micro-lens guides focused light to the opening area (width 0.8-1.2μm) of light absorption barrier, only allows light in target direction to exit, and non-target direction light is absorbed by chromium layer (crosstalk rate < 2%).

[0027] • Multi-color mixing enhancement: RGB three-color chips are arranged asymmetrically (red: 0°, green: 45°, blue: 90°), which eliminates viewing angle color deviation (ΔE < 1.5 within 160° viewing angle) through light path superposition.

[0028] • Anti-reflection design: surface coated with anti-glare nano-structure (depth 50nm, duty cycle 30%) with period 200nm, reflectivity < 1% (environmental light contrast increased to 10000:1).

[0029] 3. Manufacturing method

[0030] The manufacturing method of the display device comprises the following steps (see flow chart) Figure 4 ):

[0031] Step 1: substrate pretreatment

[0032] • Substrate selection: sapphire (Al2O3) or silicon-based (Si) substrate (thickness 0.3-0.5 mm);

[0033] • Polishing process: chemical mechanical polishing (CMP) is used, and the surface roughness Ra is less than 0.5 nm (detected by atomic force microscopy).

[0034] Step 2: LED chip growth and grating preparation

[0035] • Epitaxial growth: MOCVD equipment (model: Veeco TurboDisc K465i) is used to grow InGaN quantum well layer (thickness 3 μm) with gradient distribution of In component (0%-30%);

[0036] • Nanometer grating fabrication: electron beam lithography (EBL, resolution 5 nm) is used to define grating pattern (period 200-400 nm), and ICP etching (Cl2 / BCl3 mixed gas) is used to form grating structure with a depth of 50-100 nm.

[0037] Step 3: micro-lens array integration

[0038] • Photoresist coating: SU-8 photoresist (thickness 10 μm) is used, and the spin coating speed is 3000 rpm;

[0039] • Photoetching patterning: ultraviolet exposure (wavelength 365 nm, energy 300 mJ / cm 2 ), and after development, lens mold with a diameter of 10-15 μm is formed;

[0040] • Nanoimprinting: UV curing glue (refractive index 1.5-1.6) is used, the pressure is 0.5 MPa, the temperature is 80°C, the imprinting time is 30 s, and the micro-lens array is formed.

[0041] Step 4: light absorption barrier fabrication

[0042] • Chromium layer deposition: magnetron sputtering (power 50 W, Ar flow rate 50 sccm), and the thickness of the Cr layer is 0.3-0.5 μm;

[0043] • Opening processing: electron beam lithography (EBL) is used to define the opening pattern (width 0.8-1.2 μm), and reactive ion etching (O2 plasma) is used to remove the chromium layer in the opening area with an accuracy of ±0.1 μm.

[0044] Step 5: deposition of reflection enhancement layer

[0045] DBR fabrication: Alternately depositing SiO2(thickness 50 nm) and TiO2(thickness 30 nm) by magnetron sputtering, 10-15 periods in total, deposition rate 0.1 nm / s (to ensure uniformity);

[0046] Stress matching: Releasing film stress by annealing (temperature 400 ℃, time 1 h) to avoid DBR layer peeling.

[0047] Step 6: Packaging and integration

[0048] Packaging material: UV-cured glue (model: Norland NOA61), thickness 20 μm, refractive index 1.52 (matched with glass);

[0049] Driving IC bonding: COG (chip-on-glass) process to bond FPGA driving chip to backboard, line width 50 μm (to ensure signal transmission speed).

[0050] Step 7: Driving debugging and calibration

[0051] Partition calibration: Measuring brightness of each partition using integrating sphere (model: Labsphere SphereOptics), adjusting current by FPGA (accuracy ±1%);

[0052] Color calibration: Measuring color coordinates based on spectrophotometer (model: X-Rite i1Pro 3), dynamically adjusting RGB duty cycle (response time <10 ms).

[0053] Advantages

[0054] Compared with the prior art, the present application has the following significant advantages (supported by experimental data): BRIEF DESCRIPTION OF DRAWINGS

[0055] Figure 1 : Cross-sectional structure diagram of the non-polarized LED display device, labeling components (1- directional light-emitting LED array; 2- microlens array; 3- patterned light-absorbing barrier; 4- reflection enhancement layer; 5- driving module; 6- substrate).

[0056] Figure 2 : Cross-sectional diagram of the nanograting structure of the directional light-emitting LED chip, showing grating period (d = 200-400 nm) and etching depth (h = 50-100 nm).

[0057] Figure 3 : Light path diagram of the synergistic work of the microlens array and the light-absorbing barrier, showing that light is focused by the microlens to the open area (A) and the non-open area (B, absorbed by the chromium layer).

[0058] Figure 4 Figure 6: Partitioned regulation logic diagram of the driving and control module, showing the 256x256 partitioned current regulation and real-time color calibration flow. DETAILED DESCRIPTION

[0059] Example 1: Micro-unpolarized LED display screen (1 inch, consumer electronics level)

[0060] Manufacturing parameters:

[0061] • Substrate: 0.5 mm sapphire substrate (Ra = 0.3 nm after CMP);

[0062] • LED chip: size 50x50 pm 2 , nanograting period 300 nm (depth 80 nm);

[0063] • Microlens array: diameter 10 pm, pitch 12 pm, refractive index n = 1.5;

[0064] • Light absorption barrier: Cr layer thickness 0.3 pm, opening width 0.8 pm (opening rate 25%);

[0065] • DBR layer: SiO2(50 nm) / TiO2(30 nm) x 10 periods, reflectivity 96%;

[0066] • Driving module: 256x256 partitions, FPGA model Xilinx Artix-7.

[0067] Test results:

[0068] • Brightness: center 1350 nits, 160° viewing angle edge 1000 nits (decay 26%);

[0069] • Color temperature: center 6500 K, 160° viewing angle edge 6525 K (fluctuation 25 K);

[0070] • Reflectivity: 0.8% (integrating sphere measurement);

[0071] • Power consumption: 85 W / m 2 (240 Hz refresh rate).

[0072] Example 2: Unpolarized LED screen for vehicle HUD (12 inches, automotive level)

[0073] Manufacturing parameters:

[0074] • Substrate: 0.3 mm silicon-based substrate (Ra = 0.4 nm after CMP);

[0075] • LED chip: size 75x75 pm 2, nanometer grating period 200 nm (depth 60 nm);

[0076] • Microlens array: diameter 15 pm, pitch 18 pm, refractive index n = 1.6;

[0077] • Light absorption barrier: Cr layer thickness 0.5 pm, opening width 1.2 pm (opening rate 30%);

[0078] • DBR layer: SiO2(55 nm) / TiO2(35 nm) x 12 periods, reflectivity 97%;

[0079] • Driving module: 512 x 512 partitions, FPGA model Intel Stratix 10.

[0080] Test results:

[0081] • Brightness: center 1400 nits (comply with ISO 15008 vehicle display standard);

[0082] • Temperature stability: brightness fluctuation < 5% under -40-85 °C environment (thermal compensation algorithm in effect);

[0083] • Anti-vibration: no deviation after 10-2000 Hz vibration test (MIL-STD-810G standard);

[0084] • Life: brightness attenuation < 10% after 1000 h high temperature and humidity (85 °C / 85% RH) test.

Claims

1. A polarization-free LED display device, characterized in that, include: ● The directional LED array is composed of InGaN-based Micro-LED chips with built-in nanogratings, and the chip divergence angle FWHM≤10°; ● A microlens array, covering the LED chip, consists of lenses with a diameter of 10-15μm and a spacing of 12-18μm, with a refractive index n = 1.5-1.6; ● Patterned light absorption barrier, formed by nanoimprinting of a black metallic chromium layer with an opening width of 0.8-1.2μm, and the positional error between the opening and the LED chip is ≤0.1μm; ● The reflection enhancement layer, located below the LED chip, is a distributed Bragg reflector (DBR) with alternating SiO2 / TiO2 layers, a period of 50-60nm, and a reflectivity of ≥95%. ● The drive and control module is integrated into the back panel and supports 256×256-512×512 zone current adjustment (accuracy ±1%) and real-time color calibration (response time ≤10ms).

2. The non-polarized LED display device according to claim 1, characterized in that: The directional LED chip has a nanograting period of 200-400nm and a depth of 50-100nm, constraining the light emission direction to within ±5° of the divergence angle.

3. The non-polarized LED display device according to claim 1, characterized in that: The microlens array has a focusing efficiency of ≥85% and NA=0.4, guiding light to the opening region of the light absorption barrier.

4. The non-polarized LED display device according to claim 1, characterized in that: The chromium layer of the patterned light absorption barrier has a thickness of 0.3-0.5 μm, a surface optical density ≥3.0, and an opening accuracy of ±0.1 μm.

5. The non-polarized LED display device according to claim 1, characterized in that: The SiO2 / TiO2 period of the reflection enhancement layer is 50-60nm, the reflectivity is ≥95%, and the thickness error is ≤±2nm.

6. A method for manufacturing a polarization-free LED display device as described in any one of claims 1-5, characterized in that, Includes the following steps: a. Substrate pretreatment: Using sapphire or silicon substrates, chemical mechanical polishing (CMP) is performed until the surface roughness Ra < 0.5 nm; b. LED chip growth: InGaN quantum well layer (3 μm thickness) is epitaxially grown by MOCVD, combined with PSS template to improve light extraction efficiency; c. Nanograting fabrication: Electron beam lithography defines the grating pattern, and ICP etching forms a grating structure with a depth of 50-100 nm; d. Microlens integration: Microlens arrays are fabricated by ultraviolet lithography and nanoimprint lithography (linewidth tolerance ±0.5 nm); e. Fabrication of the light absorption barrier: magnetron sputtering of a Cr layer (thickness 0.3-0.5μm), followed by electron beam lithography to form an opening (width 0.8-1.2μm); f. Deposition of the reflective layer: magnetron sputtering of an alternating SiO2 / TiO2 layer (period 50-60nm), followed by stress relief annealing; g. Packaging and Integration: UV-curable adhesive encapsulation (20μm thickness), COG process bonding of driver IC; h. Driver debugging: FPGA programming to implement partitioned current adjustment and real-time color calibration (based on integrating sphere and spectrophotometer measurement).

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