Non-volatile two-terminal memory device and memory system
By shorting adjacent bit lines and sharing source lines in the non-volatile end-to-end memory module, the problems of increased line resistance and parasitic capacitance are solved, realizing a high-density integrated and low-cost non-volatile memory design.
Patent Information
- Application Number
- CN202511090558.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-05
- Publication Date
- 2026-07-24
- Estimated Expiration
- 2045-08-05
AI Technical Summary
When increasing storage capacity, existing non-volatile end-point memory faces problems such as excessive line resistance, increased parasitic capacitance and resistance, which makes high-density chip integration difficult and increases production costs.
By shorting adjacent bit lines in the non-volatile end-to-end memory module, the bit line width is increased, the bit line resistance and parasitic capacitance are reduced, signal integrity is optimized, and the source line is shared to reduce the use of metal layers.
It reduces bit line resistance and power consumption, improves signal speed and integration, reduces production costs, reduces crosstalk and leakage problems, and enhances the reliability and density of memory devices.