Low-dropout linear regulator for coil switch driver

Abstract

This invention relates to the field of wireless transmission systems and provides a low-dropout linear regulator circuit for a coil switch driver, comprising a self-biased gm amplifier, a gain stage circuit, an output stage circuit, and a feedback stage circuit. The power supply terminal of the coil switch driver is connected to the input terminal of the output stage circuit via a charging diode D1. The output terminal of the output stage circuit is connected to the control terminal of the output stage circuit via the feedback stage circuit, the self-biased gm amplifier, and the gain stage circuit in sequence. The electrical connection point between the output terminal of the output stage circuit and the feedback stage circuit is connected to a boost terminal BST. The boost terminal BST is also connected to the input terminals of the self-biased gm amplifier and the gain stage circuit. This invention's low-dropout linear regulator circuit, with its self-biased gm amplifier, can be directly used in a floating power domain to achieve precise output voltage control, compared to traditional low-dropout linear regulator circuits that require a reference voltage.

Description

Technical Field

[0001] This invention relates to the field of wireless transmission systems, and more specifically, to a low-dropout linear regulator circuit for a coil switch driver. Background Technology

[0002] In some wireless transmission systems, coil switching requires a switch, therefore, the drive control of the coil switch is necessary, such as... Figure 1a The switching transistor in the middle switches coils L1 and L2 via a drive signal Vg. During the LC oscillation of the coils, the node voltage Vs alternates between positive and negative values, such as... Figure 1b As shown, compared to the design of ordinary switch drivers, ordinary switch drivers do not need to consider the case of negative voltage. The introduction of negative voltage will cause the transient power consumption of the drive controller of the coil switch to be too large.

[0003] Common drive control designs such as Figure 2 As shown, the floating ground is the node voltage Vs. When the voltage at the boost terminal BST is low, the charging diode D1 conducts in the forward direction to charge the boost terminal BST. When the voltage at the boost terminal BST is high, the charging diode D1 is reverse-biased and cut off to prevent leakage at the boost terminal BST. The Zener capacitor C1 keeps the voltage from the boost terminal BST to the floating ground Vs stable when the floating ground Vs transitions between high and low. When the charging voltage for the boost terminal BST is higher than 5V, the clamping diode D2 breaks down in the reverse direction to discharge the charge, ensuring that the voltage from the boost terminal BST to the floating ground Vs does not exceed 5V. The current-limiting resistor R0 is used to limit the power of the entire drive circuit. The drive module can control the state of the switching transistor by controlling the output high and low levels through logic. Figure 2The circuit structure is simple, with few components and reliable function, but it suffers from high power consumption in high-power applications. In high-power applications, assuming the floating ground Vs voltage is -100V, it can be calculated that the boost terminal BST voltage is clamped by the clamping diode D2, making the voltage difference between the boost terminal BST and the floating ground Vs 5V, so BST = Vs + 5V = -95V. The total input current I = (5V - Vpn - BST) / R1, where Vpn is the forward voltage drop of the charging diode D1 (approximately 0.7V), I = 99.3V / R1. The transient input power of the drive circuit P = U * I = (5V - Vs) * (99.3V / R1) ≈ 10.4kΩ / R1. It can be seen that the input power is inversely proportional to the current-limiting resistor R0. However, a large current-limiting resistor R0 reduces power and also affects charging efficiency. Typically, the voltage regulator capacitor C1 is 100nF. In a 100kHz system, the RC time constant needs to be less than one cycle, and R1 * C1 ≤ 10µs. Therefore, the maximum usable current-limiting resistor R0 = 100Ω. Substituting this into the equation, the transient power P = 104W. For a wireless transmission system, 104W of drive loss has a significant impact on system efficiency. Furthermore, the entire drive circuit will overheat due to the 104W power consumption, ultimately damaging the components.

[0004] In response to the above problems, such as Figure 3 As shown, a low dropout linear regulator (LDO) architecture is proposed to implement the drive control of the coil switch, which will... Figure 2 The clamping diode D2 in the circuit has been replaced with a low-dropout linear regulator (LDL-RD). This LDL-RD stabilizes the voltage from the boost terminal BST to the floating ground Vs. The LDL-RD includes a switching transistor P1, voltage divider resistors R1 and R2, and an error amplifier. (Comparison) Figure 2 By utilizing the clamping diode D2, the power dissipation of the low-dropout linear regulator is fixed and does not change with the voltage fluctuations of the floating ground Vs. This low-dropout linear regulator consumes 1mA. In high-power applications, assuming the floating ground Vs voltage is -100V, the power dissipation can be calculated as P = U * I = (5V - Vs) * 1mA = 105mW, which is significantly less than [the required voltage]. Figure 2 The architecture is 104W. This low-dropout linear regulator architecture is a loop-controlled circuit system. Loop control requires a reference voltage, but traditional floating power supply domains do not have a reference voltage, making it impossible to achieve precise output voltage control. Summary of the Invention

[0005] The present invention aims to provide a low-dropout linear regulator circuit for coil switch drivers to solve the problem that traditional solutions cannot achieve accurate output voltage control due to the need for a reference voltage.

[0006] The present invention provides a low dropout linear regulator circuit for a coil switch driver, comprising a self-biased gm amplifier, a gain stage circuit, an output stage circuit, and a feedback stage circuit;

[0007] The power supply terminal of the coil switch driver is connected to the input terminal of the output stage circuit via the charging diode D1. The output terminal of the output stage circuit is connected to the control terminal of the output stage circuit via the feedback stage circuit, the self-biased gm amplifier, and the gain stage circuit in sequence. The electrical connection point between the output terminal of the output stage circuit and the feedback stage circuit is connected to the boost terminal BST. The boost terminal BST is also connected to the input terminals of the self-biased gm amplifier and the gain stage circuit.

[0008] In a preferred embodiment, the self-biased gm amplifier includes switching transistors N1, N2, P2, and P3, resistors R3 and R4.

[0009] The boost terminal BST is connected to one end of resistor R4 via the source and drain of switch P2, the drain and source of switch N1, and resistor R3 in sequence. On the other hand, it is connected to one end of resistor R4 via the source and drain of switch P3 and the drain and source of switch N2 in sequence. The other end of resistor R4 is connected to the floating ground Vs. The gate of switch P2 is connected to both the drain of switch P2 and the gate of switch P3. The gates of switches N1 and N2 are both connected to the output of the feedback stage circuit. The electrical connection point between the drains of switch P3 and N2 is connected to the input of the gain stage circuit.

[0010] In a preferred embodiment, the gain stage circuit includes switching transistors P4, P5, N3, N4, N5, P6, P7, and R5.

[0011] The boost terminal BST is simultaneously connected to the source of switch P4, the source of switch P5, and the gate of switch N5; the gate of switch P4 is simultaneously connected to the drain of switch P4 and the gate of switch P5, and the drain of switch P4 serves as the input terminal of the gain stage circuit; the drain of switch P5 is connected to the drain of switch N3; the gate of switch N3 is simultaneously connected to the drain of switch N3 and the gate of switch N4; the drain of switch N4 is connected to the source of switch N5; the output terminal of charging diode D1 is connected to the drain of switch N5 via the source and drain of switch P6, and to one end of resistor R5 via the source and drain of switch P7; the gate of switch P6 is simultaneously connected to the drain of switch P6 and the gate of switch P7; the electrical connection point between the drain of switch P7 and one end of resistor R5 serves as the output terminal of the gain stage circuit; the source of switch N3, the source of switch N4, and the other end of resistor R5 are connected to the floating ground Vs.

[0012] In a preferred embodiment, the feedback stage circuit is a voltage divider circuit composed of resistors R1 and R2; the boost terminal BST is connected to the floating ground Vs via resistors R1 and R2 in sequence; the electrical connection point between resistors R1 and R2 is the output terminal of the feedback stage circuit.

[0013] In a preferred embodiment, the output stage circuit is implemented using a switching transistor P1; the source of the switching transistor P1 is the input terminal of the output stage circuit; the drain of the switching transistor P1 is the output terminal of the output stage circuit; and the gate of the switching transistor P1 is the control terminal of the output stage circuit.

[0014] In a preferred embodiment, switching transistors N1 and N2, as well as switching transistors P2 and P3, each constitute a current mirror, and the current ratios of the current mirrors are as follows:

[0015] N1:N2=8:1;

[0016] P2:P3=1:1.

[0017] In a preferred embodiment, switching transistors P4 and P5, N3 and N4, and P6 and P7 each constitute a current mirror, and the current ratios of the current mirrors are as follows:

[0018] P4:P5 = 1:4;

[0019] N3:N4=1:4;

[0020] P6:P7=1:4.

[0021] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0022] The low-dropout linear regulator circuit of this invention features a self-biased GM amplifier. Compared to traditional low-dropout linear regulator circuits that require a reference voltage, it can be directly used in the floating power domain to achieve precise output voltage control. Furthermore, it significantly improves the power loss of coil switching drivers, offering a clear advantage in wireless transmission systems. Attached Figure Description

[0023] Figure 1a This is a schematic diagram of the coil switch switching in a wireless transmission system.

[0024] Figure 1b for Figure 1a Waveform of node voltage when the intermediate coil switch is switched.

[0025] Figure 2 This is a schematic diagram of a coil switch driver in a traditional scheme.

[0026] Figure 3This is a schematic diagram of a coil switching driver implemented using a low-dropout linear regulator architecture in a traditional solution.

[0027] Figure 4 This is a schematic diagram of a low-dropout linear voltage regulator circuit for a coil switch driver proposed in an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0029] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0030] like Figure 4 As shown, this embodiment of the invention proposes a low-dropout linear regulator circuit for a coil switch driver, including a self-biased gm amplifier, a gain stage circuit, an output stage circuit, and a feedback stage circuit. The power supply terminal of the coil switch driver is connected to the input terminal of the output stage circuit via a charging diode D1. The output terminal of the output stage circuit is connected to the control terminal of the output stage circuit via the feedback stage circuit, the self-biased gm amplifier, and the gain stage circuit in sequence. The electrical connection point between the output terminal of the output stage circuit and the feedback stage circuit is connected to the boost terminal BST. The boost terminal BST is also connected to the input terminals of the self-biased gm amplifier and the gain stage circuit.

[0031] The circuit works as follows: the floating ground of the low-dropout linear regulator is Vs, and the voltage at the boost terminal BST is input to the self-biased gm amplifier after passing through the feedback stage circuit.

[0032] When the voltage at the boost terminal BST is less than the set threshold, the self-biased gm amplifier does not output current.

[0033] When the boost terminal BST voltage is greater than the set threshold, the self-biased gm amplifier outputs a current Igm. This current Igm is amplified by the gain stage circuit, which raises the control terminal voltage of the output stage circuit, thereby achieving stable control output of the boost terminal BST voltage.

[0034] Furthermore, the self-biased gm amplifier includes switching transistors N1, N2, P2, and P3, resistors R3 and R4; the boost terminal BST is connected to one end of resistor R4 sequentially via the source and drain of switching transistor P2, the drain and source of switching transistor N1, and resistor R3; on the other hand, it is connected to one end of resistor R4 sequentially via the source and drain of switching transistor P3 and the drain and source of switching transistor N2, and the other end of resistor R4 is connected to the floating ground Vs; the gate of switching transistor P2 is connected to both the drain of switching transistor P2 and the gate of switching transistor P3; the gates of switching transistors N1 and N2 are both connected to the output of the feedback stage circuit; the electrical connection point between the drains of switching transistors P3 and N2 is connected to the input of the gain stage circuit.

[0035] In this embodiment of the invention, switching transistors N1 and N2, as well as switching transistors P2 and P3, all constitute current mirrors. The current ratios of the current mirrors are N1:N2 = 8:1 and P2:P3 = 1:1, respectively. Based on the subthreshold current characteristics of the switching transistors (MOSFETs), the current flowing through resistor R3... , ξ is the saturation current constant, ξ is a non-ideal factor determined by the process, and VT is the thermal voltage (approximately 26mV). For exponential calculations, the gate-source voltage of the switching transistor, after simplification, is VGS = ξ * VT * ln Using current I D The exponential characteristic of the voltage can generate a bandgap reference voltage. Furthermore, based on N1:N2 = 8:1, it can be derived that:

[0036] I D *R3=VGS_N2-VGS_N1;

[0037] I D *R3=ξ*VT*ln -ξ*VT*ln ;

[0038] I D =ξ*VT*ln8 / R3;

[0039] Where VGS_N1 is the gate-source voltage of switch N1, and VGS_N2 is the gate-source voltage of switch N2. The gate voltage of switch N2 is:

[0040] VG_N2=VGS_N2+2*I D *R4=VGS_N2+2*ξ*VT*ln8*R4 / R3;

[0041] In this circuit, the gate-source voltage VGS_N2 of switch N2 has a negative temperature coefficient, while ξ*VT*ln8*R4 / R3 has a positive temperature coefficient. By adjusting the ratio of resistors R4 to R3 (R4 / R3), a temperature-compensated voltage can be obtained. Therefore, the gate voltage VG_N2 of switch N2 is the temperature-compensated self-biased voltage. From the mirror image relationship of switches P2 and P3, the output current of the self-biased gm amplifier is the difference between the output currents of switches N1 and N2. Therefore, the output transconductance gain gm is the difference between the transconductance gain gm_N2 of switch N2 and the transconductance gain gm_N1 of switch N1, i.e., gm = gm_N2 - gm_N1. Using the simplified formula for transconductance with a source negative feedback resistor, we can obtain gm_N1 = gm_N2 / (1 + gm_N2 * R3). Substituting this into the formula, we get the transconductance gain of the self-biased gm amplifier: gm = (gm_N2 * gm_N2 * R3) / (1 + gm_N2 * R3). We also have the transconductance gain of the switching transistor N2: gm_N2 = d(I... D ) / d(VGS)=I D / (ξ*VT), through the design current I D With resistor R3, a suitable transconductance gain gm can be obtained for the self-biased gm amplifier.

[0042] Further, the gain stage circuit includes switches P4, P5, N3, N4, N5, P6, P7, and R5; the boost terminal BST is simultaneously connected to the source of switch P4, the source of switch P5, and the gate of switch N5; the gate of switch P4 is simultaneously connected to the drain of switch P4 and the gate of switch P5, and the drain of switch P4 serves as the input terminal of the gain stage circuit; the drain of switch P5 is connected to the drain of switch N3; the gate of switch N3 is simultaneously connected to the drain of switch N3 and the R5. The gate of transistor N4 is connected to the drain of transistor N4, which is connected to the source of transistor N5. The output of charging diode D1 is connected to the drain of transistor N5 via the source and drain of transistor P6, and to one end of resistor R5 via the source and drain of transistor P7. The gate of transistor P6 is connected to both the drain of transistor P6 and the gate of transistor P7. The electrical connection point between the drain of transistor P7 and one end of resistor R5 serves as the output of the gain stage circuit. The sources of transistors N3 and N4, as well as the other end of resistor R5, are connected to the floating ground Vs. In this embodiment of the invention, switching transistors P4 and P5, N3 and N4, and P6 and P7 all constitute current mirrors. The current ratios of the current mirrors are: P4:P5=1:4, N3:N4=1:4, and P6:P7=1:4. From the current ratios, it can be seen that the amplification factor of each current mirror is 4. It can be seen that the gain stage circuit amplifies the output current of the self-biased gm amplifier by 64 times and generates a voltage across resistor R5. The total gain AV of the error amplifier composed of the self-biased gm amplifier and the gain stage circuit is AV=gm*64*R5.

[0043] The low-dropout linear regulator circuit of this invention is easy to compensate for in loop. As can be seen from the circuit architecture, this low-dropout linear regulator circuit approximates a single-pole system with low-resistance internal structures. The high-resistance and large-capacitance nodes are located at the output of the low-dropout linear regulator circuit. In the approximate single-pole system, the dominant pole Pole1 = 1 / (RL*C), where RL is the load resistance of the low-dropout linear regulator circuit and C is the load capacitance of the low-dropout linear regulator circuit.

[0044] In this embodiment of the invention, switches P1, P2, P3, P4, P5, P6, and P7 are all PMOS transistors; switches N1, N2, N3, N4, and N5 are all NMOS transistors. It should be noted that the selection of PMOS and NMOS transistors is not limited to this; they can be replaced according to the desired function, and their corresponding connections can be adjusted accordingly. As can be seen from the above, the low-dropout linear regulator circuit of this invention, with its self-biased gm amplifier, can be directly used in the floating power domain to achieve precise output voltage control compared to traditional low-dropout linear regulator circuits that require a reference voltage. Furthermore, it significantly improves the power loss of coil switch drivers in applications requiring coil switch drivers, exhibiting a clear advantage in wireless transmission systems.

[0045] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A low-dropout linear regulator circuit for a coil switch driver, characterized in that, It includes a self-biased GM amplifier, a gain stage circuit, an output stage circuit, and a feedback stage circuit; The power supply terminal of the coil switch driver is connected to the input terminal of the output stage circuit via the charging diode D1. The output terminal of the output stage circuit is connected to the control terminal of the output stage circuit via the feedback stage circuit, the self-biased gm amplifier, and the gain stage circuit in sequence. The electrical connection point between the output terminal of the output stage circuit and the feedback stage circuit is connected to the boost terminal BST. The boost terminal BST is also connected to the input terminals of the self-biased gm amplifier and the gain stage circuit. The self-biased gm amplifier includes switches N1, N2, P2, and P3, resistors R3 and R4. The boost terminal BST is connected to one end of resistor R4 sequentially via the source and drain of switch P2, the drain and source of switch N1, and resistor R3. Simultaneously, it is connected to one end of resistor R4 sequentially via the source and drain of switch P3 and the drain and source of switch N2. The other end of resistor R4 is connected to the floating ground Vs. The gate of switch P2 is connected to both the drain of switch P2 and the gate of switch P3. The gates of switches N1 and N2 are both connected to the output of the feedback stage circuit. The electrical connection point between the drains of switch P3 and N2 is connected to the input of the gain stage circuit. The gain stage circuit includes switches P4, P5, N3, N4, N5, P6, P7, and resistor R5. The boost terminal BST is simultaneously connected to the source of switch P4, the source of switch P5, and the gate of switch N5. The gate of switch P4 is simultaneously connected to the drain of switch P4 and the gate of switch P5, and the drain of switch P4 serves as the input terminal of the gain stage circuit. The drain of switch P5 is connected to the drain of switch N3. The gate of switch N3 is simultaneously connected to the drain of switch N3 and switch N4. The gate of switch N4 is connected to the source of switch N5; the output of charging diode D1 is connected to the drain of switch N5 via the source and drain of switch P6, and to one end of resistor R5 via the source and drain of switch P7; the gate of switch P6 is connected to both the drain of switch P6 and the gate of switch P7; the electrical connection point between the drain of switch P7 and one end of resistor R5 serves as the output of the gain stage circuit; the source of switch N3, the source of switch N4, and the other end of resistor R5 are connected to floating ground Vs. Switches P1, P2, P3, P4, P5, P6, and P7 are all PMOS transistors; switches N1, N2, N3, N4, and N5 are all NMOS transistors.

2. The low-dropout linear regulator circuit for a coil switch driver according to claim 1, characterized in that, Switches N1 and N2, as well as switches P2 and P3, each form a current mirror. The current ratios of the current mirrors are as follows: N1:N2=8:1; P2:P3=1:

1.

3. The low-dropout linear regulator circuit for a coil switch driver according to claim 1, characterized in that, Switches P4 and P5, N3 and N4, and P6 and P7 each form a current mirror, and the current ratios of the current mirrors are as follows: P4:P5 = 1:4; N3:N4=1:4; P6:P7=1:

4.

4. The low-dropout linear regulator circuit for a coil switch driver according to claim 1, characterized in that, The feedback stage circuit is a voltage divider circuit composed of resistors R1 and R2; the boost terminal BST is connected to the floating ground Vs via resistors R1 and R2 in sequence; the electrical connection point between resistors R1 and R2 is the output terminal of the feedback stage circuit.

5. The low-dropout linear regulator circuit for a coil switch driver according to claim 1, characterized in that, The output stage circuit is implemented using a switching transistor P1; the source of the switching transistor P1 is the input terminal of the output stage circuit; the drain of the switching transistor P1 is the output terminal of the output stage circuit; and the gate of the switching transistor P1 is the control terminal of the output stage circuit.

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