Backlight control circuit and display panel

Abstract

The application relates to a backlight control circuit and a display panel. The backlight control circuit is connected with a backlight enable signal input end of a driving chip. The driving chip turns off a backlight module when the backlight enable signal is turned off. The backlight control circuit is used for controlling the voltage drop speed when the backlight enable signal is turned off, so that the backlight enable signal slowly drops or is delayed to drop. The backlight control circuit can control the voltage drop speed when the backlight enable signal is turned off, so that the backlight enable signal is not immediately turned into a low level during the turning-off process, but slowly drops or is delayed to drop, so that the backlight light source has enough time to release the residual energy, the residual light emission of the fluorescent powder in the non-working state is reduced, the red flashing phenomenon during the turning-off process can be effectively inhibited, the visual experience of a user is improved, and the display performance is enhanced.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a backlight control circuit and a display panel. Background Technology

[0002] With the continuous development of display technology, liquid crystal display panels have been widely used in various fields such as consumer electronics, industrial control, and automotive displays. As an important component of liquid crystal display devices, the backlight module plays a crucial role in display brightness, color performance, and visual experience.

[0003] In the early days of Liquid Crystal Display (LCD) development, cold cathode fluorescent lamps (CCFLs) were primarily used as backlights. This technology provided uniform backlighting, but its color gamut performance was mediocre, and its power consumption was high. With advancements in LED technology, white LEDs began to be used as backlights for LCDs. Compared to CCFLs, LED backlighting offers higher energy efficiency, longer lifespan, and better color performance. However, traditional white LEDs generate white light by exciting yellow phosphors with a blue LED driver IC, which results in insufficient performance in the red and green wavelengths, limiting the expansion of the color gamut.

[0004] In recent years, in order to achieve a wider color gamut and better luminous efficiency, more and more backlight modules have adopted KSF phosphors (such as K2SiF6:Mn). 4+ KSF phosphor, used as a red wavelength conversion material, is paired with blue LED driver chips to achieve a wide color gamut backlight effect. KSF phosphor exhibits remanent light characteristics; the remanent light time is determined by the type of material at the phosphor's luminescent center. For high color gamut red KSF phosphor, the luminescent center is Mn... 4+ The emission of red light under the action of excitation light has a certain time delay, that is, the red light is seen 8.4ms before the excitation energy is received.

[0005] However, in practical applications, it has been found that when the backlight module is turned off, KSF phosphor may still produce a weak red light flicker (i.e., "red flash") due to residual excitation or ambient light reflection, affecting the user experience and potentially causing visual interference. This phenomenon is particularly noticeable in dark environments or when the backlight is off, becoming a technical bottleneck restricting its widespread use. Summary of the Invention

[0006] This application provides a backlight control circuit and a display panel to solve the technical problem of how to avoid the red flashing phenomenon when the backlight module is turned off.

[0007] In a first aspect, this application provides a backlight control circuit, which is connected to the backlight enable signal input terminal of a driver chip; the driver chip turns off the backlight module when the backlight enable signal is turned off. The backlight control circuit is used to control the voltage drop rate when the backlight enable signal is turned off, so that the backlight enable signal drops slowly or with a delay.

[0008] Optionally, the backlight control circuit includes a first microcontroller unit, an operational amplifier, a first PMOS transistor, a first resistor, and a first capacitor; The first output terminal of the first microcontroller is connected to the non-inverting input terminal of the operational amplifier, the inverting input terminal of the operational amplifier is connected to the first terminal of the first resistor, the inverting input terminal of the operational amplifier and the first terminal of the first resistor are grounded, and the output terminal of the operational amplifier is connected to the gate of the first PMOS transistor. The source of the first PMOS transistor is connected to the second terminal of the first resistor, and the drain of the first PMOS transistor is connected to the first terminal of the first capacitor and the backlight enable signal. The second terminal of the first capacitor is grounded.

[0009] Optionally, the backlight control circuit further includes a second resistor and a second capacitor; The first end of the second resistor is connected to the first output terminal of the first microcontroller unit, the second end of the second resistor is connected to the first end of the second capacitor and the non-inverting input terminal of the operational amplifier, and the second end of the second capacitor is grounded.

[0010] Optionally, the first microcontroller unit is configured to calculate the output voltage of the first output terminal of the first microcontroller unit based on the target slope, the resistance value of the first resistor and the capacitance value of the first capacitor when receiving the falling edge of the backlight enable signal, and drive the first output terminal to output according to the output voltage, so as to control the voltage of the backlight enable signal to decrease linearly according to the target slope.

[0011] Optionally, the backlight control circuit includes a voltage divider unit, a first comparator, a timer, a second PMOS transistor, and an NMOS transistor; The voltage divider unit has its input connected to a first power supply, its output connected to the inverting input of a first comparator, and its non-inverting input connected to the drain of a second PMOS transistor. The gate of the second PMOS transistor is connected to a power-off signal, and its source is connected to a pixel voltage signal. The output of the first comparator is connected to the input of a timer, and the output of the timer is connected to the gate of an NMOS transistor. The source of the NMOS transistor is grounded, and its drain is connected to the backlight enable signal.

[0012] Optionally, the voltage divider unit includes a third resistor, a fourth resistor, and a third capacitor; The first end of the third resistor is connected to the first power supply, and the second end of the third resistor is connected to the first end of the fourth resistor, the first end of the third capacitor, and the first input end of the comparator. The second terminal of the fourth resistor is grounded, and the second terminal of the third capacitor is grounded.

[0013] Optionally, the backlight control circuit further includes a fifth resistor, a sixth resistor, a fourth capacitor, a first inverter, a second inverter, and a first feedback resistor; Wherein, the first end of the fifth resistor is connected to the output terminal of the timer, and the second end of the fifth resistor is connected to the gate of the NMOS transistor; The delay time input terminal of the timer is connected to the first terminal of the sixth resistor, the second terminal of the sixth resistor is connected to the first terminal of the fourth capacitor, and the second terminal of the fourth capacitor is grounded. The power-off signal is connected to the input terminal of the first inverter, the output terminal of the first inverter is connected to the input terminal of the second inverter, the output terminal of the second inverter is connected to the first terminal of the first feedback resistor, and the second terminal of the first feedback resistor is connected to the gate of the second PMOS transistor.

[0014] Optionally, the backlight control circuit includes a second comparator, a third comparator, a NOR gate, a second microcontroller unit, and a third PMOS transistor; The inverting input of the second comparator is connected to the first reference voltage, the non-inverting input of the second comparator is connected to the inverting input of the third comparator and the source output voltage, the non-inverting input of the third comparator is connected to the second reference voltage, and the output of the second comparator is connected to the output of the third comparator and the first input of the NOR gate. The second input terminal of the NOR gate is connected to the power-off signal, the output terminal of the NOR gate is connected to the input terminal of the second microcontroller unit, and the output terminal of the second microcontroller unit is connected to the gate of the third PMOS transistor. The source of the third PMOS transistor is connected to the backlight enable signal, and the drain of the third PMOS transistor is grounded.

[0015] Optionally, the backlight control circuit further includes a seventh resistor, a third inverter, a fourth inverter, and a second feedback resistor; The first end of the seventh resistor is connected to the backlight enable signal, and the second end of the seventh resistor is connected to the source of the third PMOS transistor. The power-off signal is connected to the input terminal of the third inverter, the output terminal of the third inverter is connected to the input terminal of the fourth inverter, the output terminal of the fourth inverter is connected to the first terminal of the second feedback resistor, and the second terminal of the second feedback resistor is connected to the second input terminal of the NOR gate.

[0016] Secondly, this application provides a display panel, the display panel including the backlight control circuit described in any one of the first aspects.

[0017] Compared with the prior art, the technical solution provided in this application has the following advantages: The backlight control circuit provided in this application is connected to the backlight enable signal input terminal of the driver chip; the driver chip turns off the backlight module when the backlight enable signal is off; the backlight control circuit is used to control the voltage drop rate when the backlight enable signal is off, so that the backlight enable signal drops slowly or with a delay. Because this backlight control circuit can control the voltage drop rate when the backlight enable signal is off, the backlight enable signal does not immediately become low-level during the shutdown process, but drops slowly or with a delay. This allows the backlight source sufficient time to release remaining energy, reduces residual luminescence of the phosphor in the non-working state, effectively suppresses the red flickering phenomenon when the device is turned off, improves the user's visual experience, and enhances display performance. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0021] Figure 1 This is a schematic diagram illustrating an application scenario of a backlight control circuit provided in one embodiment of this application; Figure 2 A schematic diagram of a backlight control circuit provided in one embodiment of this application; Figure 3 A schematic diagram of the control flow of a first microcontroller unit in a backlight control circuit provided in one embodiment of this application; Figure 4 A schematic diagram of a backlight control circuit provided for another embodiment of this application; Figure 5 A schematic diagram of a backlight control circuit provided for another embodiment of this application; Figure 6 This is a schematic diagram of the control flow of a second microcontroller unit in a backlight control circuit according to an embodiment of this application.

[0022] The attached figures are labeled as follows: MCU1 - First Microcontroller Unit; MCU2 - Second Microcontroller Unit; U0 - Operational Amplifier; U1 - First Comparator; U2 - Second Comparator; U3 - Third Comparator; R1 - First resistor; R2 - Second resistor; R3 - Third resistor; R4 - Fourth resistor; R5 - Fifth resistor; R6 - Sixth resistor; R7 - Seventh resistor; R11 - First feedback resistor; R12 - Second feedback resistor; C1 - First capacitor; C2 - Second capacitor; C3 - Third capacitor; C4 - Fourth capacitor; A1 - First inverter; A2 - Second inverter; A3 - Third inverter; A4 - Fourth inverter; Q1 - First PMOS transistor; Q2 - Second PMOS transistor; Q3 - NMOS transistor; Q4 - Third PMOS transistor; NOR - NOR gate; T1 - Timer. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0025] To address the technical problem of avoiding the red flickering phenomenon when the backlight module is turned off in existing technologies, this application provides a backlight control circuit and display panel that can control the voltage drop rate when the backlight enable signal is turned off. This ensures that the backlight enable signal does not immediately become low-level during the shutdown process, but rather drops slowly or with a delay. This allows the backlight source sufficient time to release its remaining energy, reducing residual luminescence from the phosphor in the non-working state. This effectively suppresses the red flickering phenomenon when the device is turned off, improves the user's visual experience, and enhances display performance.

[0026] The first embodiment of this application provides a backlight control circuit, such as Figure 1 The backlight control circuit is connected to the backlight enable signal (BL_EN, or EN for short) input terminal of the driver IC. The driver IC turns off the backlight module when the backlight enable signal is turned off.

[0027] The backlight control circuit is used to control the rate of voltage drop when the backlight enable signal is turned off, so that the backlight enable signal drops slowly or with a delay.

[0028] This backlight control circuit can control the rate of voltage drop when the backlight enable signal is turned off, so that the backlight enable signal does not immediately become low level during the shutdown process, but drops slowly or with a delay. This allows the backlight source to have enough time to release its remaining energy, reducing residual luminescence of the phosphor in the non-working state. It can effectively suppress the red flickering phenomenon when the power is off, improve the user's visual experience, and enhance display performance.

[0029] The backlight control circuit will now be described in detail with several specific embodiments.

[0030] Example 1 In one embodiment, such as Figure 2 The backlight control circuit includes a first microcontroller unit MCU1, an operational amplifier U0, a first PMOS transistor Q1, a first resistor R1, and a first capacitor C1.

[0031] The connection relationships are as follows: The first output terminal of the first microcontroller unit MCU1 is connected to the non-inverting input terminal of the operational amplifier U0. The inverting input terminal of the operational amplifier U0 is connected to the first terminal of the first resistor R1. The inverting input terminal of the operational amplifier U0 and the first terminal of the first resistor R1 are grounded. The output terminal of the operational amplifier U0 is connected to the gate of the first PMOS transistor Q1. The source of the first PMOS transistor Q1 is connected to the second terminal of the first resistor R1. The drain of the first PMOS transistor Q1 is connected to the first terminal of the first capacitor C1 and the backlight enable signal. The second terminal of the first capacitor C1 is grounded.

[0032] In this embodiment, a control voltage (V_DAC) is output from the first output terminal (which can be referred to as the DAC terminal) of the first microcontroller unit MCU1. This voltage is then discharged through a constant current source formed by the operational amplifier U0 and the first PMOS transistor Q1, causing a constant current discharge to the first capacitor C1. This controls the EN output terminal to generate a linearly decreasing voltage ramp. The first microcontroller unit MCU1 can adjust V_DAC in real time to change the constant current value of the constant current source. For example, if the resistance of the first resistor R1 is R_set and the capacitance of the first capacitor C1 is C_int, then the constant current value I = V_DAC / R_set, thereby precisely controlling the decreasing slope of the EN output = I / C_int. Because the voltage drop rate when the backlight enable signal is turned off can be controlled, the backlight enable signal does not immediately become low during the shutdown process, but rather decreases slowly or with a delay. This allows the backlight source sufficient time to release its remaining energy, reducing residual luminescence of the phosphor in the non-working state, effectively suppressing the red flickering phenomenon when the device is turned off, improving the user's visual experience, and enhancing display performance.

[0033] In one embodiment, the backlight control circuit further includes a second resistor R2 and a second capacitor C2.

[0034] The first end of the second resistor R2 is connected to the first output terminal of the first microcontroller unit MCU1, the second end of the second resistor R2 is connected to the first end of the second capacitor C2 and the non-inverting input terminal of the operational amplifier U0, and the second end of the second capacitor C2 is grounded.

[0035] In this embodiment, the control voltage output from the first output terminal of the first microcontroller unit MCU1 can be filtered first through the second resistor R2 and the second capacitor C2 to ensure the stability of the signal quality.

[0036] In one embodiment, the first microcontroller unit MCU1 is used to calculate the output voltage of the first output terminal of the first microcontroller unit MCU1 based on the target slope, the resistance value of the first resistor and the capacitance value of the first capacitor when it receives the falling edge of the backlight enable signal, and drive the first output terminal to output according to the output voltage, so as to control the voltage of the backlight enable signal to decrease linearly according to the target slope.

[0037] In this embodiment, the first microcontroller unit MCU1 detects the falling edge of the backlight enable signal EN, calculates the target slope = dV / dt = V_DAC / (R_set * C_int), and outputs V_DAC. A constant current source composed of operational amplifier U0 and the first PMOS transistor Q1 generates a current I = V_DAC / R_set. Then, the constant current source discharges the first capacitor C1, causing the EN voltage to decrease linearly.

[0038] For example, if you want the EN signal to drop from 5V to 0V in 2 seconds.

[0039] MCU settings: The required slope is calculated as: 5V / 2s = 2.5V / s; According to the formula, the target slope is Slope = V_DAC / (R_set * C_int); V_DAC=2.5×5000×0.00001=0.125V; That is, the first output terminal of the MCU outputs 0.125V.

[0040] Backlight control circuit operation: The constant current source output I = V_DAC / R_set = 0.125V / 5kΩ = 25uA; The first capacitor C1 discharges at a rate of 25uA / 10uF = 2.5V / s; Then it takes 2 seconds for EN to go from 5V to 0V.

[0041] To adjust the slope of the EN signal, you can adjust the output voltage of V_DAC or the resistance value of the first resistor R1 (i.e., adjust the R_set value).

[0042] In this embodiment, the control flow of the first microcontroller unit is as follows: Figure 3 ,include: Initialize the DAC, GPIO, and timer; GPIO stands for General Purpose Input / Output Interface, which refers to the pins of the first microcontroller unit MCU1, and the timer is the internal timer of the first microcontroller unit MCU1; Wait for the falling edge of EN to trigger; Read the preset parameters; the preset parameters are the resistance value of the first resistor, the capacitance value of the first capacitor, the voltage when EN is high, the desired slow descent time, and other parameters. Calculate the target slope; set the DAC output value V_DAC; Start the timer; Determine if EN is less than or equal to 0V; If so, the timer stops and the DAC outputs 0V; If not, return to the waiting state.

[0043] In this embodiment, the DAC, GPIO, and timer are first initialized, and the system waits for the EN drop trigger signal. After the trigger signal is activated, the target slope is calculated according to preset parameters and the DAC output voltage is set. The timer is started to periodically update the DAC value to achieve a linear slope. When BL_EN drops to 0V, the DAC outputs 0V, thus delaying the EN drop.

[0044] In this embodiment, the precise and slowed descent of the EN signal is achieved by controlling constant current discharge. It has the advantages of simple hardware, flexible software, and good linearity. The core principle mainly includes hardware constant current source control and software programmable design. The MCU timer interrupt updates the DAC value in real time. Furthermore, it can also support piecewise slope or nonlinear descent curves to achieve dynamic slope control. The hardware constant current source structure avoids the exponential curve problem of traditional RC discharge. The design of this embodiment can meet the high requirements for voltage gradient rate.

[0045] Example 2 In one embodiment, such as Figure 4 The backlight control circuit includes a voltage divider unit, a first comparator U1, a timer T1, a second PMOS transistor Q2, and an NMOS transistor Q3.

[0046] The connection relationships are as follows: The input of the voltage divider unit is connected to the first power supply, and the output of the voltage divider unit is connected to the inverting input of the first comparator U1. The non-inverting input of the first comparator U1 is connected to the drain of the second PMOS transistor Q2. The gate of the second PMOS transistor Q2 is connected to the power-off signal, and the source of the second PMOS transistor Q2 is connected to the pixel voltage signal. The output of the first comparator U1 is connected to the input of the timer T1, and the output of the timer T1 is connected to the gate of the NMOS transistor Q3. The source of the NMOS transistor Q3 is grounded, and the drain of the NMOS transistor Q3 is connected to the backlight enable signal.

[0047] In this embodiment, the first power supply is VIN, which can be the main input power supply, such as the 12V or 5V voltage output from the power board. During normal shutdown, the system performs a black pixel insertion operation, resulting in a state where the pixel voltage signal source is low but not completely powered off. This causes EN to power down earlier than VIN but later than the start of source black pixel insertion. In this embodiment, the output of the voltage divider unit provides the reference voltage Vref for the first comparator U1. The system shutdown signal SYSTEM_EN triggers the second PMOS transistor Q2 to conduct. The first comparator U1 outputs a signal to timer T1. Timer T1 delays the output signal duration, and after the timer expires, NMOS transistor Q3 conducts, causing EN to drop, thus completing the delayed drop of the EN signal. In this embodiment, the delayed drop of the EN signal allows sufficient time for the backlight source to release its remaining energy, reducing residual luminescence of the phosphor in non-working states. This effectively suppresses the red flickering phenomenon during shutdown, improves the user's visual experience, and enhances display performance.

[0048] In one embodiment, the voltage divider unit includes a third resistor R3, a fourth resistor R4, and a third capacitor C3.

[0049] The first end of the third resistor R3 is connected to the first power supply, and the second end of the third resistor R3 is connected to the first end of the fourth resistor R4, the first end of the third capacitor C3, and the first input terminal of the comparator; the second end of the fourth resistor R4 is grounded, and the second end of the third capacitor C3 is grounded.

[0050] Voltage division is achieved through the third resistor R3 and the fourth resistor R4, and filtering is achieved through the third capacitor C3. This allows the voltage divider unit to output a stable reference signal Vref, thereby improving the stability of the backlight control circuit.

[0051] In one embodiment, the backlight control circuit further includes a fifth resistor R5, a sixth resistor R6, a fourth capacitor C4, a first inverter A1, a second inverter A2, and a first feedback resistor R11.

[0052] Among them, the first end of the fifth resistor R5 is connected to the output terminal of timer T1, and the second end of the fifth resistor R5 is connected to the gate of NMOS transistor Q3; The delay time input terminal of timer T1 is connected to the first terminal of the sixth resistor R6, the second terminal of the sixth resistor R6 is connected to the first terminal of the fourth capacitor C4, and the second terminal of the fourth capacitor C4 is grounded. The power-off signal is connected to the input terminal of the first inverter A1. The output terminal of the first inverter A1 is connected to the input terminal of the second inverter A2. The output terminal of the second inverter A2 is connected to the first terminal of the first feedback resistor R11. The second terminal of the first feedback resistor R11 is connected to the gate of the second PMOS transistor Q2.

[0053] In this embodiment, a bus hold circuit is formed by the first inverter A1, the second inverter A2, and the first feedback resistor R11. This circuit stabilizes the power-off signal SYSTEM_EN, preventing accidental triggering of the second PMOS transistor Q2 and ensuring system stability. The sixth resistor R6 and the fourth capacitor C4 form an RC circuit, which controls the delay time of timer T1 (delay time T = τ × R6 × C4, where τ is a constant). The third resistor R3 protects the NMOS transistor Q3.

[0054] The working principle of Example 2 is as follows: ①Detecting SOURCE black insertion The first comparator U1 is used to detect the source output voltage and a reference voltage (Vref) is set. When the source voltage drops below the reference voltage and the system power-off signal (STYSTEM_EN) is activated, it is considered that the black screen insertion stage is not a black screen display. Then the output of the first comparator U1 becomes high level and is sent to the timer T1 as a trigger signal.

[0055] ② Start timer T1 delay After receiving the trigger signal, timer T1 starts timing. The delay time is determined by the external RC circuit (T=τ×R6×C4). The delay time can be set and adjusted according to the actual required black insertion duration (the black insertion time must be less than the total black insertion time of the system to ensure that EN drops before VIN drops).

[0056] ③ Controlling EN decrease The output of timer T1 is connected to the gate of the NMOS. After the timing ends, the NMOS turns on, grounding the EN pin through the NMOS, causing its level to change from high to low. At this time, the EN drop occurs after the source is plugged in and before VIN is turned off.

[0057] In practical use, there will be some black insertion in the system of products such as mobile phones and tablets. However, since the black insertion time is uncertain, the BL_EN signal needs to be delayed to the time period of the source black insertion during the design. It has a similar principle to Example 1 in improving the red flashing problem of KSF phosphor. However, the design of Example 2 is entirely in hardware, which has the advantages of low cost and controllable delay time.

[0058] Example 3 In one embodiment, such as Figure 5 The backlight control circuit includes a second comparator U2, a third comparator U3, a NOR gate, a second microcontroller MCU2, and a third PMOS transistor Q4.

[0059] The connection relationships are as follows: The inverting input of the second comparator U2 is connected to the first reference voltage Vref1. The non-inverting input of the second comparator U2 is connected to the inverting input of the third comparator U3 and the source output voltage Sout. The non-inverting input of the third comparator U3 is connected to the second reference voltage Vref2. The output of the second comparator U2 is connected to the output of the third comparator U3 as V_out. V_out is connected to the first input of the NOR gate. The second input of the NOR gate is connected to the power-off signal SYSTEM_EN. The output of the NOR gate is connected to the input of the second microcontroller MCU2. The output of the second microcontroller MCU2 is connected to the gate of the third PMOS transistor Q4. The source of the third PMOS transistor Q4 is connected to the backlight enable signal. The drain of the third PMOS transistor Q4 is grounded.

[0060] In this embodiment, the source output voltage Sout can be precisely monitored to determine whether the black screen insertion stage is in progress. Since the Sout condition is the same when the panel displays a normal black screen and during black screen insertion, after completing the Sout detection, the relationship between V_out and the SYSTEM_EN signal is determined using a NOR gate to determine whether the black screen insertion stage is in progress during power-off rather than the normal black screen display stage. After confirmation, the NOR gate output signal triggers the MCU to start its built-in timer. According to the preset logic, the MCU controls the conduction and cutoff state of the third PMOS transistor Q4 to ensure that the EN signal output is high or low.

[0061] In one embodiment, the backlight control circuit further includes a seventh resistor R7, a third inverter A3, a fourth inverter A4, and a second feedback resistor R12.

[0062] The first end of the seventh resistor R7 is connected to the backlight enable signal, and the second end of the seventh resistor R7 is connected to the source of the third PMOS transistor Q4; the power-off signal is connected to the input of the third inverter A3, the output of the third inverter A3 is connected to the input of the fourth inverter A4, the output of the fourth inverter A4 is connected to the first end of the second feedback resistor R12, and the second end of the second feedback resistor R12 is connected to the second input of the NOR gate.

[0063] In this embodiment, a bus hold circuit is formed by the third inverter A3, the fourth inverter A4, and the second feedback resistor R12. This circuit stabilizes the power-off signal SYSTEM_EN, preventing accidental triggering of the SYSTEM_EN signal and thus preventing errors in the NOR output of the NOR gate, thereby ensuring system stability. The seventh resistor R7 protects the third PMOS transistor Q4.

[0064] The working principle of Example 3 is as follows: ①Detection function: Detects whether the source is blacked out using dual comparators. Since the voltage (S_black) is low but not completely zero when the source is set to black, and Sout may vary slightly in reality, a range of values ​​can be selected for accurate determination of whether the source is black. When the positive input voltage of the dual comparators (comparator U2 and comparator U3) is greater than the negative input voltage, the comparators conduct and output a high level; when the positive input voltage is less than the negative input voltage, the output is a low level. Where Vref1 > S_black > Vref2.

[0065] If Sout > Vref1 > Vref2, U2 is turned on, U3 is not turned on, and the output V_out is high. If Vref1 > Sout > Vref2, U2 is not turned on, U3 is not turned on, and the output V_out is low; at this time, source is in the black insertion stage. If Vref1 > Vref2 > Sout, U2 is not conducting, U3 is conducting, and the output V_out is high.

[0066] ② Determine if the system is in a shutdown state and is not displaying a black screen. The NOR gate input is connected to V_out and STYSTEM_EN; a bus hold circuit is used at STYSTEM_EN to stabilize the SYSTEM_EN signal and prevent the SYSTEM_EN signal from being accidentally triggered, which could lead to output errors; when STYSTEM_EN is low and V_out is low, it can be determined that the system is shut down.

[0067] ③ MCU2 starts the timer, and the third PMOS transistor Q4 controls EN to decrease. When the input terminal of MCU2 (MCU_IN) is low, the timer is not triggered, the output is high, the third PMOS transistor Q4 is not turned on, and EN remains at its original high level. When MCU_IN is detected to be high, a timer is triggered. After a certain time (the timer must ensure that BL_EN drops before VIN), a low level is output, the third PMOS transistor Q4 is turned on, and EN drops.

[0068] In this embodiment, the control flow diagram of the second microcontroller unit is as follows: Figure 6 ,include: Initialize the system; Detect the high or low level of MCU_IN; If MCU_IN is low, the EN output remains unchanged; If MCU_IN is high, the timer will start. Set the timer to a predetermined delay time; Determine if the timer has expired; if the set delay time has expired, output a high level; if the set delay time has not expired, output a low level.

[0069] In this embodiment, dual comparators are used to accurately detect the voltage of the Source signal, and a NOR gate is used to determine whether it is the black-pinning phase during system shutdown. Combined with the internal timer of MCU2, flexible and adjustable delay control is achieved. Finally, the third PMOS transistor Q4 drives the EN signal to slowly decrease, offering advantages such as accurate response, programmable delay time, and strong adaptability. In practical applications, this solution can improve system stability and reliability, and is suitable for scenarios such as backlight control and power management systems.

[0070] Compared with Example 2, this example uses a combination of hardware and software to precisely control the EN delay time, which can ensure that EN completes the discharge with an ideal waveform.

[0071] Based on the same technical concept, the second embodiment of this application provides a display panel, which includes the backlight control circuit described in any one of the first embodiments.

[0072] Display panels employing backlight control circuits can control the rate at which the voltage drops when the backlight enable signal is turned off. This prevents the backlight enable signal from immediately dropping to a low level during the shutdown process, instead allowing it to drop slowly or with a delay. This gives the backlight source sufficient time to release its remaining energy, reducing residual luminescence from the phosphor in non-working states. It effectively suppresses the red flickering phenomenon of the display panel when it is turned off, improves the user's visual experience, and enhances the display panel's display performance.

[0073] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0074] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0075] It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. In the description, suffixes such as "module," "part," or "unit" used to denote elements are used solely for illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" may be used interchangeably.

[0076] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A backlight control circuit, characterized in that, The backlight control circuit is connected to the backlight enable signal input terminal of the driver chip; the driver chip turns off the backlight module when the backlight enable signal is turned off. The backlight control circuit is used to control the voltage drop rate when the backlight enable signal is turned off, so that the backlight enable signal drops slowly or with a delay. The backlight control circuit includes a voltage divider unit, a first comparator, a timer, a second PMOS transistor, and an NMOS transistor. The voltage divider unit has its input connected to a first power supply, its output connected to the inverting input of a first comparator, and its non-inverting input connected to the drain of a second PMOS transistor. The gate of the second PMOS transistor is connected to a power-off signal, and its source is connected to a pixel voltage signal. The output of the first comparator is connected to the input of a timer, and the output of the timer is connected to the gate of an NMOS transistor. The source of the NMOS transistor is grounded, and its drain is connected to the backlight enable signal. The backlight control circuit further includes a fifth resistor, a sixth resistor, a fourth capacitor, a first inverter, a second inverter, and a first feedback resistor. Wherein, the first end of the fifth resistor is connected to the output terminal of the timer, and the second end of the fifth resistor is connected to the gate of the NMOS transistor; The delay time input terminal of the timer is connected to the first terminal of the sixth resistor, the second terminal of the sixth resistor is connected to the first terminal of the fourth capacitor, and the second terminal of the fourth capacitor is grounded. The power-off signal is connected to the input terminal of the first inverter, the output terminal of the first inverter is connected to the input terminal of the second inverter, the output terminal of the second inverter is connected to the first terminal of the first feedback resistor, and the second terminal of the first feedback resistor is connected to the gate of the second PMOS transistor.

2. The backlight control circuit according to claim 1, characterized in that, The backlight control circuit includes a first microcontroller unit, an operational amplifier, a first PMOS transistor, a first resistor, and a first capacitor; The first output terminal of the first microcontroller is connected to the non-inverting input terminal of the operational amplifier, the inverting input terminal of the operational amplifier is connected to the first terminal of the first resistor, the inverting input terminal of the operational amplifier and the first terminal of the first resistor are grounded, and the output terminal of the operational amplifier is connected to the gate of the first PMOS transistor. The source of the first PMOS transistor is connected to the second terminal of the first resistor, and the drain of the first PMOS transistor is connected to the first terminal of the first capacitor and the backlight enable signal. The second terminal of the first capacitor is grounded.

3. The backlight control circuit according to claim 2, characterized in that, The backlight control circuit also includes a second resistor and a second capacitor. The first end of the second resistor is connected to the first output terminal of the first microcontroller unit, the second end of the second resistor is connected to the first end of the second capacitor and the non-inverting input terminal of the operational amplifier, and the second end of the second capacitor is grounded.

4. The backlight control circuit according to claim 2 or 3, characterized in that, The first microcontroller unit is used to calculate the output voltage of the first output terminal of the first microcontroller unit according to the target slope, the resistance value of the first resistor and the capacitance value of the first capacitor when it receives the falling edge of the backlight enable signal, and drive the first output terminal to output according to the output voltage, so as to control the voltage of the backlight enable signal to decrease linearly according to the target slope.

5. The backlight control circuit according to claim 1, characterized in that, The voltage divider unit includes a third resistor, a fourth resistor, and a third capacitor; The first end of the third resistor is connected to the first power supply, and the second end of the third resistor is connected to the first end of the fourth resistor, the first end of the third capacitor, and the first input end of the comparator. The second terminal of the fourth resistor is grounded, and the second terminal of the third capacitor is grounded.

6. A backlight control circuit, characterized in that, The backlight control circuit is connected to the backlight enable signal input terminal of the driver chip; the driver chip turns off the backlight module when the backlight enable signal is turned off. The backlight control circuit is used to control the voltage drop rate when the backlight enable signal is turned off, so that the backlight enable signal drops slowly or with a delay. The backlight control circuit includes a second comparator, a third comparator, a NOR gate, a second microcontroller unit, and a third PMOS transistor. The inverting input of the second comparator is connected to the first reference voltage, the non-inverting input of the second comparator is connected to the inverting input of the third comparator and the source output voltage, the non-inverting input of the third comparator is connected to the second reference voltage, and the output of the second comparator is connected to the output of the third comparator and the first input of the NOR gate. The second input terminal of the NOR gate is connected to the power-off signal, the output terminal of the NOR gate is connected to the input terminal of the second microcontroller unit, and the output terminal of the second microcontroller unit is connected to the gate of the third PMOS transistor. The source of the third PMOS transistor is connected to the backlight enable signal, and the drain of the third PMOS transistor is grounded. The backlight control circuit also includes a seventh resistor, a third inverter, a fourth inverter, and a second feedback resistor. The first end of the seventh resistor is connected to the backlight enable signal, and the second end of the seventh resistor is connected to the source of the third PMOS transistor. The power-off signal is connected to the input terminal of the third inverter, the output terminal of the third inverter is connected to the input terminal of the fourth inverter, the output terminal of the fourth inverter is connected to the first terminal of the second feedback resistor, and the second terminal of the second feedback resistor is connected to the second input terminal of the NOR gate.

7. A display panel, characterized in that, The display panel includes the backlight control circuit according to any one of claims 1-6.

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