Communication link establishment method, apparatus, chip, device, medium and program product

Abstract

The application relates to a communication link establishment method, device, chip, equipment, medium and program product, which is applied to any target chip in a chip. The method comprises the following steps: firstly, obtaining a local random number, encrypting the local random number based on a link root key pre-burned in a nonvolatile memory of the target chip, and sending the encrypted local random number to a peer chip through an interconnection link; the interconnection link is a physical communication link between the target chip and the peer chip connected through a metal wire; then, receiving the encrypted peer random number sent by the peer chip through the interconnection link, and decrypting the encrypted peer random number based on the link root key to obtain the peer random number; and finally, generating a communication key for secure communication between the target chip and the peer chip through the interconnection link module according to the local random number and the peer random number. The method can improve the efficiency of communication link establishment between chips.

Description

Technical Field

[0001] This application relates to the field of chip-based secure communication technology, and in particular to a communication link establishment method, apparatus, chip, device, medium, and program product. Background Technology

[0002] With the development of technologies such as large-scale AI (Artificial Intelligence) models, higher demands are being placed on the computing power, storage capacity, and on-chip and off-chip communication performance of single chips. System-on-Package (SOP) integrates multiple functional chips, including a central processing unit, volatile memory, non-volatile memory, accelerator, communication, and power supply, onto a single substrate. This enables high-performance computing and large-capacity storage within a single chip, and optimizes energy consumption through high integration, thus better meeting the needs of applications such as large-scale AI models. Therefore, information security of SOP-type chips, which are based on chip groups composed of multiple functional chips, has become a key concern.

[0003] Because communication between chips requires physical connections such as substrates, the security of communication data in chip clusters faces greater risks compared to single-chip designs. Therefore, how to achieve secure communication between chips efficiently and at low cost has become an urgent technical problem to be solved. Summary of the Invention

[0004] Therefore, it is necessary to provide a method, apparatus, chip, device, medium, and program product for establishing communication links between chips that can achieve efficient and low-cost communication, addressing the aforementioned technical problems.

[0005] In a first aspect, this application provides a communication link establishment method, applied to a key management unit in the interconnection link module of any target chip in a chip, the method comprising:

[0006] The local random number is obtained and encrypted based on the link root key. The encrypted local random number is then sent to the peer core through the interconnect link. The interconnect link is a physical communication link between the target core and the peer core connected by a metal wire. The link root key is pre-programmed into the non-volatile memory of the target core.

[0007] Receive the encrypted random number sent by the peer core through the interconnect link, and decrypt the encrypted random number based on the link root key to obtain the peer random number;

[0008] Based on the local random number and the remote random number, a communication key is generated for secure communication between the target core and the remote core via the interconnection link module.

[0009] In one embodiment, obtaining a local random number includes:

[0010] If a random number generator exists in the target core, then a random number is generated at this end using the random number generator;

[0011] If the target chip does not have a random number generator, the initial data of the static random access memory in the target chip after power-on is obtained, and a local random number is generated based on the initial data.

[0012] In one embodiment, encrypting the local random number based on the link root key includes:

[0013] Read the link root key from non-volatile memory;

[0014] Configure the encryption engine key of the interconnect link module according to the link root key;

[0015] By calling the encryption engine in the interconnection link module, the local random number is encrypted using the encryption engine key to obtain the encrypted local random number.

[0016] In one embodiment, decrypting the encrypted peer random number based on the link root key includes:

[0017] Read the link root key from non-volatile memory;

[0018] Configure the decryption engine key of the interconnect link module according to the link root key;

[0019] By calling the decryption engine in the interconnection link module, the encrypted peer random number is decrypted using the decryption engine key, and the peer random number is obtained.

[0020] In one embodiment, the communication key is an encryption key, the local random number includes a first random number, and the remote random number includes a second random number; based on the local random number and the remote random number, a communication key for secure communication between the target chip and the remote chip via the interconnection link module is generated, including:

[0021] The first random number is encrypted based on the link root key, and the encrypted first random number is sent to the peer core through the interconnection link;

[0022] Receive the encrypted second random number sent by the peer chip through the interconnect link, and decrypt the encrypted second random number according to the link root key to obtain the second random number;

[0023] The encryption key for the interconnection link module is generated based on the first random number and the second random number.

[0024] In one embodiment, the method further includes:

[0025] The encryption engine key of the interconnection link module is updated based on the encryption key, and used as the new encryption engine key for the interconnection link module.

[0026] In one embodiment, the communication key is a decryption key, the local random number includes a third random number, and the remote random number includes a fourth random number. Based on the local random number and the remote random number, a communication key for secure communication between the target chip and the remote chip via the interconnection link module is generated, including:

[0027] The third random number is encrypted based on the link root key, and the encrypted third random number is sent to the peer core through the interconnection link.

[0028] Receive the encrypted fourth random number sent by the peer chip through the interconnect link, and decrypt the encrypted fourth random number according to the link root key to obtain the fourth random number;

[0029] The decryption key for the interconnection link module is generated based on the third and fourth random numbers.

[0030] In one embodiment, the method further includes:

[0031] The decryption engine key of the interconnection link module is updated based on the decryption key, and used as the new decryption engine key for the interconnection link module.

[0032] In one embodiment, the non-volatile memory is a secure electronic fuse unit, and the link root key is burned into the preset storage location when it is determined that the preset storage location in the secure electronic fuse unit has not been burned.

[0033] In one embodiment, the method further includes:

[0034] In the case of generating a communication key for secure communication between the target kernel and the peer kernel via an interconnection link module, it is checked whether the preset key update time has been reached at the current time.

[0035] The communication key is updated when the preset key update time is reached.

[0036] In one embodiment, updating the communication key includes:

[0037] Obtain the new encryption engine key and the new decryption engine key of the interconnection link module;

[0038] The local random number is encrypted using the new encryption engine key, and the encrypted local random number is sent to the peer core via the interconnection link.

[0039] Receive the encrypted random number sent by the peer chip through the interconnection link, and decrypt the encrypted random number based on the new decryption engine key to obtain the peer random number;

[0040] Generate a communication update key based on the random numbers generated at the local end and the random numbers generated at the remote end;

[0041] Update the communication key based on the communication update key.

[0042] In one embodiment, the communication update key includes an encryption update key, and updating the communication key based on the communication update key includes:

[0043] Generate a first key update completion data packet, encrypt the first key update completion data packet based on the new encryption engine key, and send it to the peer core.

[0044] The encryption engine key of the interconnect link module is updated according to the encryption update key, and used as the new encryption engine key for the interconnect link module.

[0045] In one embodiment, the communication update key includes decrypting the update key and updating the communication key based on the communication update key, including:

[0046] After receiving the second key update completion data packet sent by the peer core, the decryption engine key of the interconnection link module is updated according to the decryption update key, which serves as the new decryption engine key for the interconnection link module.

[0047] In one embodiment, the method further includes:

[0048] If the target core has a random number generator, then generate a random number on this end using the random number generator;

[0049] If the target chip does not have a random number generator, a local random number is generated by XORing the plaintext and ciphertext of the data sent by the target chip.

[0050] Secondly, this application also provides a communication link establishment device, applied to any target chip in a chip, the device comprising:

[0051] The first acquisition module is used to acquire a local random number, encrypt the local random number based on the link root key, and send the encrypted local random number to the peer core through the interconnection link; the interconnection link is a physical communication link between the target core and the peer core connected by a metal wire; the link root key is pre-programmed into the non-volatile memory of the target core.

[0052] The first receiving module is used to receive the encrypted random number sent by the peer core through the interconnection link, and decrypt the encrypted random number based on the link root key to obtain the peer random number.

[0053] The first generation module is used to generate a communication key for secure communication between the target chip and the peer chip via the interconnection link module, based on the local random number and the peer random number.

[0054] Thirdly, this application also provides an interconnection link module, including a key management unit, an encryption engine, a decryption engine, and a communication module; the key management unit is used to perform any of the method steps in the first aspect above.

[0055] Fourthly, this application also provides a functional core, which includes the interconnection link module as described in the third aspect above.

[0056] Fifthly, this application also provides a chip comprising at least two functional chips as described in the fourth aspect above.

[0057] In a sixth aspect, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement any of the steps of the method described in the first aspect above.

[0058] In a seventh aspect, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the methods described in the first aspect above.

[0059] Eighthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements any of the steps described in the first aspect above.

[0060] The aforementioned communication link establishment method, apparatus, chip, device, medium, and program product, applied to any target chip, firstly, acquires a local random number and encrypts it based on a link root key pre-programmed into the target chip's non-volatile memory. The encrypted local random number is then sent to the peer chip via an interconnect link. The interconnect link is a physical communication link connecting the target and peer chips via a metal wire. Next, the encrypted peer random number sent by the peer chip via the interconnect link is received and decrypted based on the link root key to obtain the peer random number. Finally, based on the local and peer random numbers, a communication key for secure communication between the target and peer chips via the interconnect link module is generated. In this way, the target chip pre-programs a link root key into its non-volatile memory. By sending and acquiring local and peer random numbers using the link root key and the interconnect link, a communication key can be generated for secure communication between the target and peer chips. No additional hardware resources are required, resulting in higher efficiency and lower cost in establishing the communication link. Attached Figure Description

[0061] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0062] Figure 1 This is a schematic diagram of the SOP chip structure;

[0063] Figure 2 This is an application environment diagram of a communication link establishment method in one embodiment;

[0064] Figure 3 This is a schematic diagram of the interconnection link module in one embodiment;

[0065] Figure 4 This is a flowchart illustrating a communication link establishment method in one embodiment;

[0066] Figure 5 This is a flowchart illustrating the local random number encryption steps in one embodiment;

[0067] Figure 6 This is a flowchart illustrating the random number decryption steps at the other end in one embodiment;

[0068] Figure 7 This is a flowchart illustrating the target core encryption key generation step in one embodiment;

[0069] Figure 8 This is a flowchart illustrating the target chip decryption key generation step in one embodiment;

[0070] Figure 9 This is a flowchart illustrating the target chip key update step in one embodiment;

[0071] Figure 10 This is a flowchart illustrating the communication key update step in another embodiment;

[0072] Figure 11 This is a flowchart illustrating the communication key update step in another embodiment;

[0073] Figure 12 This is an application environment diagram of a communication link establishment method in one embodiment;

[0074] Figure 13 This is a structural block diagram of a communication link establishment device in one embodiment;

[0075] Figure 14This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0076] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0077] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0078] SOP chips encapsulate multiple functional chips within a single chip using a substrate, enabling the implementation of various functions, including computing, storage, and power supply, all within a single chip, thus achieving a highly integrated design. Figure 1 This is a schematic diagram of the structure of an SOP chip. The SOP chip integrates multiple functions, including power chip, CPU chip, storage chip, I / O chip and accelerator chip. The functional characteristics and architecture design of different chips are different. Multiple functional chips form a chip group. This SOP-type chip based on chip group design has a significant improvement over traditional chips in chip interconnection and power supply efficiency, and can greatly simplify motherboard design.

[0079] SOP (System-on-Pack) chips require interconnection of multiple chips through packaging technology to achieve complete chip functionality. The design of the interconnect links between chips is crucial. Based on packaging technology, existing interconnect links include 2D, 2.5D, and 3D types. Since communication between chips requires physical connections such as substrates, the security of communication data in chip groups faces greater risks compared to single-chip designs. Therefore, how to achieve secure communication between chips efficiently and at low cost has become an urgent technical problem to be solved.

[0080] Currently, in related technologies, random number generators are typically used to generate various keys, and then asymmetric algorithms are used for key distribution. However, random number generators and asymmetric key algorithms require a lot of hardware resources and are costly. Furthermore, the key distribution and key update process of asymmetric key algorithms is relatively complex and inefficient. In addition, in chip designs based on chip groups, such as SOP chips, some chips do not support complex asymmetric encryption engines and random number generators, so this approach cannot be used.

[0081] In view of this, the communication link establishment method provided in this application embodiment is applied to any target chip in a chip. First, a local random number is obtained, and the local random number is encrypted based on the link root key pre-programmed into the non-volatile memory of the target chip. The encrypted local random number is then sent to the peer chip via an interconnect link. The interconnect link is a physical communication link connecting the target chip and the peer chip via a metal wire. Then, the encrypted peer random number sent by the peer chip via the interconnect link is received, and the encrypted peer random number is decrypted based on the link root key to obtain the peer random number. Finally, based on the local random number and the peer random number, a communication key for secure communication between the target chip and the peer chip via the interconnect link module is generated. In this way, the target chip pre-programs the link root key into its non-volatile memory. By sending and obtaining the local and peer random numbers through the link root key and the interconnect link, a communication key can be generated for secure communication between the target chip and the peer chip. No additional hardware resources are required, resulting in higher efficiency and lower cost in establishing the communication link.

[0082] The communication link establishment method provided in this application embodiment can be applied to, for example, Figure 2 In the application environment shown, the target chip 102 communicates with the peer chip 104 via an interconnect link. The target chip 102 and the peer chip 104 are... Figure 1 Any two chips in the SOP chip. Each chip may include at least one interconnect link module. An interconnect link module of the target chip 102 is matched with an interconnect link module of the peer chip 104 to form an interconnect link. The interconnect link module is used for the establishment and maintenance of the interconnect link between chips, including the negotiation and updating of communication keys, etc. Multiple interconnect link modules within the same chip are independent of each other. Figure 3 As shown, each interconnection link module may include a key management unit, an encryption engine, a decryption engine, and a communication module. The communication module comprises a transport layer module, a link layer module, and a physical layer module. The transport layer module, link layer module, and physical layer module implement the protocol stack of each layer of the general interconnection link. The key management unit, encryption engine, and decryption engine encrypt and decrypt the communication process, achieving secure transmission of the interconnection link. The key management unit is used for negotiating and updating the communication keys of the interconnection link modules; the encryption engine stores the encryption engine key and, under the configuration of the key management unit, encrypts the link communication data; the decryption engine stores the decryption engine key and, under the configuration of the key management unit, decrypts the link communication data. Both the encryption and decryption engines are based on symmetric block cipher algorithms. The encryption engine can be configured as follows: Figure 3Before the transport layer module shown, the encryption engine can also be set between the transport layer module and the link layer module, or between the link layer module and the physical layer module. The decryption engine can be set as follows: Figure 3 Before the transport layer module shown, the decryption engine can also be set between the transport layer module and the link layer module, or between the link layer module and the physical layer module. This application does not limit this.

[0083] In one exemplary embodiment, such as Figure 4 As shown, a method for establishing a communication link is provided, which can be applied to... Figure 3 Taking the key management unit of any interconnect link module in the target core 102 as an example, the following steps are included:

[0084] S101, obtain the local random number, encrypt the local random number based on the link root key, and send the encrypted local random number to the peer core through the interconnection link.

[0085] The interconnect link is the physical communication link connecting the target core and the peer core via a metal wire. The target core communicates with the peer core through the interconnect link, such as... Figure 2 As shown, the target chip and the peer chip may include one or more interconnect links. This embodiment does not limit this. The interconnect link modules in the target chip are used for negotiating the communication keys of their respective interconnect links. Different interconnect link modules in the target chip can independently and in parallel negotiate the communication keys, thereby improving the efficiency of establishing the communication link of the target chip. The peer chip is another chip that communicates with the target chip. For example, when the target chip is a CPU chip, the peer chip can be a storage chip that communicates with the CPU chip. It is understood that when the target chip is a storage chip, the peer chip is a CPU chip.

[0086] To achieve secure communication between the target chip and the peer chip, the target chip and the peer chip can encrypt the data packets to be sent using a communication key, which means that communication key negotiation is required. Optionally, the target chip can perform the communication key negotiation process after power-on and after the interconnection link has completed initialization training.

[0087] The root link key is pre-programmed into the non-volatile memory of the target chip. Non-volatile memory is a storage technology that retains data even when power is off, and can include FLASH, flash memory, read-only memory, etc. Different chips within the same chip share the same root link key. For ease of explanation, this embodiment uses... Figure 2The establishment of the interconnection link consisting of interconnection link module 1 and interconnection link module 3 between the target chip and the peer chip is illustrated using the example shown. Here, the local random number is a random number generated by interconnection link module 1 of the target chip. The local random number can be generated by the random number generator of the target chip or it can be generated based on the random information in interconnection link module 1. After generating the local random number, interconnection link module 1 obtains the link root key through non-volatile memory, encrypts the local random number based on the link root key, and sends it to interconnection link module 3 of the peer chip. Encryption using the link root key ensures the security of the local random number transmission process.

[0088] S102: Receive the encrypted random number sent by the peer core through the interconnection link, and decrypt the encrypted random number based on the link root key to obtain the peer random number.

[0089] The peer-end random number is generated by the interconnection link module 3 of the peer core. This random number can be generated by the random number generator of the peer core or based on random information in the interconnection link module 3. After generating the peer-end random number, the interconnection link module 3 obtains the link root key through a non-volatile memory, encrypts the peer-end random number based on the link root key, and sends it to the interconnection link module 1 of the target core, ensuring the security of the peer-end random number transmission process. Upon receiving the encrypted peer-end random number, the interconnection link module 1, since all cores have the same link root key, decrypts the encrypted peer-end random number based on the link root key of the target core to obtain the peer-end random number.

[0090] S103, Based on the local random number and the remote random number, generate a communication key for secure communication between the target core and the remote core through the interconnection link module.

[0091] The interconnection link module 1 of the target chip generates a communication key according to a preset rule based on the generated local random number and the received remote random number. Optionally, the preset rule can be an XOR operation. The communication key can be used to encrypt data packets transmitted between the interconnection link module 1 of the target chip and the interconnection link module 3 of the remote chip, achieving secure communication. Correspondingly, the interconnection link module 2 of the target chip and the interconnection link module 4 of the remote chip can negotiate the communication key and establish a communication link in the same way as described above, which will not be elaborated here. At the same time, the process of establishing the communication link between interconnection link module 1 and interconnection link module 3 can be performed independently and in parallel with the process of establishing the communication link between interconnection link module 2 and interconnection link module 4.

[0092] In the above embodiments, the interconnection link module 1 of the target chip and the interconnection link module 3 of the peer chip can use the same communication key, that is, both the interconnection link module 1 of the target chip and the interconnection link module 3 of the peer chip use the above-mentioned communication key for encryption and decryption. Optionally, the interconnection link module 1 of the target chip and the interconnection link module 3 of the peer chip can also use different communication keys. Taking the target chip as a CPU chip and the peer chip as a storage chip as an example, a communication key A can be generated through the above steps. This communication key A is used to encrypt the data sent by the interconnection link module 1 of the CPU chip, and the storage chip stores this communication key A to decrypt the data sent by the interconnection link module 1 of the CPU chip. It can be understood that the storage chip can also be used as the target chip and the CPU chip as the peer chip. Similarly, a communication key B can be generated through the above steps. This communication key B is used to encrypt the data sent by the interconnection link module 3 of the storage chip, and the CPU chip stores this communication key B to decrypt the data sent by the interconnection link module 3 of the storage chip.

[0093] In the above embodiments, applied to any target chip, firstly, a local random number is obtained and encrypted based on the link root key pre-programmed into the non-volatile memory of the target chip. The encrypted local random number is then sent to the peer chip via an interconnect link. The interconnect link is a physical communication link connecting the target chip and the peer chip via metal wires. Next, the encrypted peer random number sent by the peer chip via the interconnect link is received and decrypted based on the link root key to obtain the peer random number. Finally, based on the local and peer random numbers, a communication key for secure communication between the target chip and the peer chip via the interconnect link module is generated. In this way, the target chip pre-programs the link root key into its non-volatile memory. By sending and obtaining the local and peer random numbers using the link root key and the interconnect link, a communication key can be generated for secure communication between the target chip and the peer chip. This requires no additional hardware resources, resulting in higher efficiency and lower cost in establishing the communication link.

[0094] In the embodiments of this application, obtaining the local random number includes two methods. It is understood that the remote core can also be the target core, that is, the method of generating the remote random number is the same as the method of generating the local random number.

[0095] The first method involves generating local random numbers if the target chip contains a random number generator. Since different chips have different functions and hardware structures, some chips, such as CPU chips, integrate a random number generator, allowing the CPU chip to generate random numbers.

[0096] The second approach involves obtaining the initial data from the static random access memory (SRAM) after power-on in the target chip if no random number generator is present. This initial data is then used to generate a local random number. If the target chip itself does not integrate a random number generator, to save hardware resources, an additional random number generator is not required; in this case, the initial data from the SRAM after power-on can be used to generate the random number. It can be understood that each interconnect module in the target chip obtains its own initial data from its SRAM after power-on to generate random numbers.

[0097] In the above embodiments, local random numbers can be generated in different ways without the need to add an additional random number generator to the core, resulting in lower random number generation costs.

[0098] In an optional embodiment of this application, the step of encrypting the local random number based on the link root key is as follows: Figure 5 As shown, it includes:

[0099] S201, Read the link root key from non-volatile memory.

[0100] Optionally, the non-volatile memory is a secure electronic fuse unit (EFUSE). The link root key is programmed into the preset storage location only if it is determined that the preset storage location in the secure electronic fuse unit has not been programmed before. The secure electronic fuse unit can be a secure EFUSE, and each EFUSE storage bit can only be programmed once; the stored content is non-volatile after power loss. The secure EFUSE can store chip-specific information, such as analog device parameters, SRAM repair parameters, chip identifiers and serial numbers, and security information. After the chips in the chip are packaged, the link root key can be programmed into the preset storage location of the secure EFUSE of each chip. Optionally, the link root key can be protected by a link protection key. After obtaining the encrypted link root key, it is programmed into the preset storage location. The link protection key for different chips can be the same or different, and the link protection key can be preset in the chip's decryption engine.

[0101] During the link root key burning process, in order to ensure that the link root key is burned only once, before burning, the valid bit of the link root key recorded at the specified address is checked. If the valid bit is 1, it indicates that the link root key has been burned at the preset storage location, so burning stops and does not continue. If the valid bit is 0, the link root key is burned, and after successful burning, the valid bit of the link root key at the specified address is set to 1 to avoid repeated burning.

[0102] To enhance the security of the link root key, when reading the link root key from the secure EFUSE, the secure EFUSE will determine the source of the request to access the link root key. Only read requests originating from the interconnect link module can read the link root key, while other read and write requests will be discarded and reported as errors.

[0103] S202, Configure the encryption engine key of the interconnection link module according to the link root key.

[0104] After the interconnection module obtains the link root key, if the link root key was encrypted before programming, it is decrypted using the link protection key in the decryption engine to obtain the link root key. If the link root key was scrambled before programming (scrambling rules could include swapping values ​​at preset positions), it is descrambled according to the scrambling rules to obtain the link root key. Then, the link root key is configured as the encryption engine key of the interconnection module of the target chip.

[0105] S203, by calling the encryption engine in the interconnection link module, the local random number is encrypted using the encryption engine key to obtain the encrypted local random number.

[0106] The encryption engine of the interconnection link module is used to encrypt the generated local random number based on the configured encryption engine key, obtaining the encrypted local random number, which is then sent to the interconnection link module of the peer core. The encryption engine, configured by the key management unit of the interconnection link module, encrypts the interconnection link communication data. The encryption engine is based on a symmetric block cipher algorithm, and the encryption engine key is stored within the encryption engine and cannot be accessed externally. Optionally, the symmetric encryption engine can employ various encryption algorithms such as AES (Advanced Encryption Standard), SM4 (ShangMi 4), and SM1 (ShangMi 1), and can adopt various operating modes such as ECB (Electronic Codebook Mode), CBC (Cipher Block Chaining Mode), CFB (Cipher Feedback Mode), OFB (Output Feedback Mode), and CTR (Counter Mode).

[0107] In the embodiments of this application, the steps for decrypting the encrypted peer random number based on the link root key are as follows: Figure 6 As shown, it includes:

[0108] S301, read the link root key from non-volatile memory.

[0109] The steps for reading the link root key are as described in the above embodiments and will not be repeated here.

[0110] S302, Configure the decryption engine key of the interconnecting link module according to the link root key.

[0111] The interconnect link module will configure the obtained link root key as the decryption engine key of the interconnect link module of the target core.

[0112] S303, by calling the decryption engine in the interconnection link module, uses the decryption engine key to decrypt the encrypted peer random number to obtain the peer random number.

[0113] The decryption engine of the interconnection link module is used to decrypt the received encrypted peer random number based on the configured decryption engine key, thus obtaining the peer random number. The decryption engine decrypts interconnection link communication data under the configuration of the key management unit of the interconnection link module. The decryption engine key is stored within the decryption engine and cannot be accessed externally.

[0114] In the above embodiments, the key management unit of the interconnection link module can read and parse the link root key from the security EFUSE, and then configure the link root key as the encryption engine key and the decryption engine key to realize the encryption and transmission of the local random number and the decryption of the received peer random number.

[0115] In the embodiments of this application, the communication key is an encryption key, the local random number includes a first random number, and the remote random number includes a second random number; based on the local random number and the remote random number, a communication key is generated for secure communication between the target chip and the remote chip via the interconnection link module, such as... Figure 7 As shown, it includes:

[0116] S401, encrypts the first random number based on the link root key, and sends the encrypted first random number to the peer core through the interconnect link.

[0117] Please continue to refer to this. Figure 2 Taking the interconnection link between interconnection link module 1 and interconnection link module 3 as an example, after the interconnection link module 1 obtains the link root key, it configures the link root key as the encryption engine key and generates the first random number. Then, it encrypts the random number through the encryption engine and sends it to the interconnection link module 3 through the interconnection link.

[0118] S402: Receive the encrypted second random number sent by the peer chip through the interconnection link, and decrypt the encrypted second random number according to the link root key to obtain the second random number.

[0119] Correspondingly, the second random number sent by the interconnection link module 3 is received. Since different chips of the same chip use the same link root key, the interconnection link module 1 can configure the link root key as the decryption engine key and decrypt the second random number according to the decryption engine to obtain the second random number.

[0120] S403, generate the encryption key for the interconnection link module based on the first random number and the second random number.

[0121] Interconnection link module 1 generates an encryption key for the target core based on a first random number and a second random number using a symmetric encryption algorithm. The encryption key is used to encrypt data sent by interconnection link module 1 to interconnection link module 3.

[0122] Optionally, the encryption engine key of the interconnection link module is updated based on the encryption key, serving as the new encryption engine key for the interconnection link module.

[0123] The generated encryption key is configured as the encryption engine key of the interconnection link module 1 of the target core, serving as the new encryption engine key for the interconnection link module 1. When the interconnection link module 1 sends data to the interconnection link module 3, it encrypts the data according to the new encryption engine key.

[0124] Similarly, after obtaining the link root key, the interconnection link module 3 configures the link root key as the encryption engine key and the decryption engine key. Then, it receives the encrypted first random number sent by the interconnection link module 1 and decrypts it through the decryption engine to obtain the first random number. The interconnection link module 3 obtains the encryption key of the interconnection link module 1 based on the first random number and the generated second random number. This key is used by the interconnection link module 3 to decrypt the data received from the interconnection link module 1, which is the decryption key of the interconnection link module 3. This key can be configured as the decryption engine key of the interconnection link module 3.

[0125] In the embodiments of this application, the communication key is a decryption key. The local random number includes a third random number, and the remote random number includes a fourth random number. Based on the local and remote random numbers, a communication key is generated for secure communication between the target chip and the remote chip via the interconnection link module, such as... Figure 8 As shown, it includes:

[0126] S501 encrypts the third random number based on the link root key and sends the encrypted third random number to the peer core through the interconnect link.

[0127] S502 receives the encrypted fourth random number sent by the peer chip through the interconnection link, and decrypts the encrypted fourth random number according to the link root key to obtain the fourth random number.

[0128] S503 generates the decryption key for the interconnection link module based on the third and fourth random numbers.

[0129] The steps for obtaining the third and fourth random numbers are the same as those for obtaining the first and second random numbers, and will not be repeated here. The interconnection link module 1 generates the decryption key of the target core interconnection link module 1 based on the third and fourth random numbers using a symmetric encryption algorithm. The decryption key is used by the interconnection link module 1 to decrypt data sent by the interconnection link module 3.

[0130] Optionally, the decryption engine key of the interconnection link module is updated according to the decryption key, and used as the new decryption engine key for the interconnection link module. The generated decryption key is configured as the decryption engine key of the interconnection link module 1 of the target core, and used as the new decryption engine key for the interconnection link module 1. When the interconnection link module 1 receives data sent by the interconnection link module 3, it decrypts the data according to the new decryption engine key.

[0131] Similarly, the interconnection link module 3 obtains the decryption key of the interconnection link module 1 based on the third random number and the generated fourth random number. This key is used by the interconnection link module 3 to encrypt the data sent to the interconnection link module 1. In other words, it is the encryption key of the interconnection link module 3, which can be configured as the encryption engine key of the interconnection link module 3.

[0132] In the above embodiments, by generating a communication key between interconnection link module 1 and interconnection link module 3, the interconnection link is established, and the target chip and the peer chip can start secure data communication.

[0133] In embodiments of this application, to ensure the security of the interconnection link, the communication key of the interconnection link can be updated periodically, such as... Figure 9 As shown, the method also includes:

[0134] S601, when generating a communication key for secure communication between the target kernel and the peer kernel via an interconnection link module, detects whether the preset key update time has been reached at the current time.

[0135] During the secure communication between the target chip and the peer chip using the communication key generated in the above steps, it is checked whether the preset key update time has been reached. Optionally, the key update time can be set according to requirements. For example, if it is set to 2 hours, then the preset key update time is reached after 2 hours.

[0136] S602, when the preset key update time is reached, the communication key is updated.

[0137] If the key update time is reached, the communication key is updated. This timed update ensures secure data communication between the cores. Optionally, updating the communication key can involve regenerating the communication key between the target core and the peer core according to the method described in the above embodiments, and then updating the encryption engine key and decryption engine key based on the new communication key.

[0138] In one embodiment, the steps for updating the communication key are as follows: Figure 10 As shown, it includes:

[0139] S701, obtain the new encryption engine key and the new decryption engine key of the interconnection link module.

[0140] Please continue to refer to this. Figure 2 Taking the interconnection link module 1 of the target core and the interconnection link module 3 of the peer core as an example, the communication key between the interconnection link module 1 and the interconnection link module 3 of the peer core is generated through the key negotiation process established by the above communication link, and the encryption engine key and decryption engine key are configured according to the communication key.

[0141] When the preset key update time is reached and the communication key needs to be updated, the latest encryption engine key and decryption engine key of the interconnection link module 1 of the current target core are obtained.

[0142] S702 encrypts local random numbers based on a new encryption engine key and sends the encrypted local random numbers to the peer core via an interconnect link.

[0143] Interconnection link module 1 encrypts the newly generated local random number according to the new encryption engine key and sends it to the interconnection link module 3 of the peer core.

[0144] Optionally, the random number generation method during the communication key update process includes the following two cases: the peer core can also be the target core, and the random number generation method is the same.

[0145] The first method involves generating a random number generator for the target core if such a generator exists.

[0146] The second method involves generating a local random number if the target chip does not have a random number generator. This is done by XORing the plaintext and ciphertext of the data sent by the target chip.

[0147] For each interconnecting link module of the target core, if the target core does not have a random number generator, the plaintext and ciphertext of the data sent by each interconnecting link module are XORed, and the local random number of each interconnecting link module is obtained based on the XOR result.

[0148] S703 receives the encrypted random number sent by the peer chip through the interconnection link, and decrypts the encrypted random number based on the new decryption engine key to obtain the peer random number.

[0149] Interconnection link module 1 receives the encrypted peer random number sent by interconnection link module 3, and decrypts it according to the new decryption engine key to obtain the peer random number currently regenerated by interconnection link module 3.

[0150] S704 generates a communication update key based on the local random number and the remote random number.

[0151] Interconnection link module 1 generates a communication update key based on its own random number and the random number generated by the peer. Similarly, interconnection link module 3 generates a communication update key based on its own random number and the random number generated by the peer.

[0152] S705 updates the communication key based on the communication update key.

[0153] In one embodiment, the communication update key includes an encryption update key, and the communication key is updated based on the communication update key, such as... Figure 11 As shown, it includes:

[0154] S801, generate the first key update completion data packet, encrypt the first key update completion data packet based on the new encryption engine key, and send it to the peer core.

[0155] After generating the communication update key, the interconnection link module 1 generates a first key update completion data packet, encrypts the first key update completion data packet based on the new encryption engine key obtained by S701, and sends it to the interconnection link module 3 of the peer core to notify the interconnection link module 3 to update the communication key.

[0156] S802, update the encryption engine key of the interconnection link module according to the encryption update key, and use it as the new encryption engine key for the interconnection link module.

[0157] After sending the first key update completion data packet, Interconnection Link Module 1 configures the encryption update key as its encryption engine key. Subsequent data packets sent to Interconnection Link Module 3 are then encrypted using this new encryption engine key. It can be understood that Interconnection Link Module 3 configures this encryption update key as its decryption engine key to decrypt data packets sent by Interconnection Link Module 1.

[0158] In one embodiment, the communication update key includes a decryption update key. Updating the communication key based on the communication update key includes: after receiving a second key update completion data packet sent by the peer chip, updating the decryption engine key of the interconnection link module based on the decryption update key as the new decryption engine key of the interconnection link module.

[0159] After receiving the second key update completion data packet sent by the interconnection link module 3 of the peer core, that is, at this time the interconnection link module 3 generates a new encrypted communication key, the next data communication will use the new encrypted communication key. At this time, the interconnection link module 1 uses the communication update key generated this time as the decryption update key and configures it as the decryption engine key of the interconnection link module 1, thereby decrypting the data received from the interconnection link module 3.

[0160] In the above embodiments, the security of interconnection link communication is improved by periodically updating the communication key.

[0161] To facilitate understanding, the complete process of the communication link establishment method provided in the embodiments of this application is illustrated with examples, such as... Figure 12 As shown, an SOP chip is implemented by packaging six chips, including two power chips, one CPU chip, one memory chip, one I / O chip, and one accelerator chip. Except for the power chip, the other four chips each contain a security EFUSE and multiple interconnect link modules. The security EFUSE stores an encrypted link root key A, and the interconnect link modules enable communication between the chips.

[0162] The CPU core can protect the root key using link protection key 1, resulting in the encrypted root key ciphertext A-1. Similarly, the storage core, I / O core, and accelerator core use link protection keys 2, 3, and 4 respectively to encrypt the root key A, resulting in ciphertexts A-2, A-3, and A-4. Multiple interconnection modules within the same core use the same link protection key; the link protection key can be the same for different cores, or it can be different, as described above. The link protection key is built into the decryption engine of each interconnection module as a decryption key.

[0163] After the six chips are packaged, the link root key is programmed into the designated address of the secure EFUSE on four of the chips. The programmed content is ciphertext A-1 to A-4 respectively. Before programming, the valid bit of the link root key recorded at the designated address in the secure EFUSE is checked. If the valid bit is 1, it indicates that the link root key has been programmed, and programming stops. If the valid bit is 0, the link root key is programmed, and the valid bit is programmed to 1 after successful programming. The valid bit of the link root key can only be programmed once. After being programmed and set to 1, the secure EFUSE will judge the source of the request to access the link root key. Only read requests from the interconnection link module can read the link root key; other read and write requests will be discarded and error messages will be displayed.

[0164] Because the four chips have different functions, only the CPU chip has a random number generator, while the other three chips do not. Therefore, the CPU chip's interconnect link module takes its local random number from the random number generator during communication key negotiation and communication key update processes, while the other three chips' interconnect link modules take their local random numbers from the random information of the interconnect link modules. Optionally, the random information during communication key negotiation is taken from the initial data of the SRAM in the interconnect link module after power-on, and the random information during communication key update is taken from the XOR result of the plaintext and ciphertext of all data sent before the key update.

[0165] In this embodiment, taking the target chip as the CPU chip and the peer chip as the storage chip, and using the interconnection link module 1-1 of the CPU chip and the interconnection link module 2-1 of the storage chip as examples, the communication key negotiation and communication key update process of the secure interconnection link is described. It should be noted that the communication key negotiation and communication key update process of other secure interconnection links is similar, and multiple secure interconnection links can independently and in parallel perform communication key negotiation and communication key update. Since the random numbers generated each time in the above process are different, the communication keys negotiated and updated by different secure interconnection links will ultimately be different.

[0166] After the interconnection link module 1-1 and interconnection link module 2-1 complete their initialization training, the communication key negotiation process begins, which includes the following steps:

[0167] 1. The key management unit of interconnection link module 1-1 reads the encrypted link root key A-1 from security EFUSE1 and decrypts it with link protection key 1 to obtain link root key A. Similarly, the key management unit of interconnection link module 2-1 reads the encrypted link root key A-2 from security EFUSE2 and decrypts it to obtain link root key A.

[0168] 2. The key management units of interconnection link module 1-1 and interconnection link module 2-1 respectively configure the link root key A as their respective encryption engine key and decryption engine key.

[0169] 3. The key management unit of interconnect link module 1-1 obtains the first random number from the random number generator. The key management unit of interconnect link module 2-1 uses the initial random information of the internal SRAM power-on as the second random number. The key management unit of interconnect link module 1-1 controls the encryption engine to encrypt the first random number and sends it to interconnect link module 2-1 through the communication module. The key management unit of interconnect link module 2-1 controls the encryption engine to encrypt the second random number and sends it to interconnect link module 1-1 through the communication module.

[0170] 4. The key management units of interconnection link module 1-1 and interconnection link module 2-1 decrypt the received data using the decryption engine key to obtain the second random number and the first random number, respectively.

[0171] 5. The key management units of interconnection link module 1-1 and interconnection link module 2-1 respectively XOR the first random number and the second random number to obtain the same communication key E, which is the encryption key of interconnection link module 1-1. Interconnection link module 1-1 and interconnection link module 2-1 complete state synchronization.

[0172] 6. The key management unit of interconnection link module 1-1 configures communication key E as encryption engine key, and the key management unit of interconnection link module 2-1 configures communication key E as decryption engine key.

[0173] 7. Repeat steps 3 to 5 above to generate the communication key F. It can be understood that the storage chip can be used as the target chip, and the CPU chip as the peer chip, to obtain the communication key F, which is the encryption key for the storage chip and the decryption key for the CPU chip.

[0174] 8. The key management unit of interconnection link module 1-1 configures the communication key F as the decryption engine key, and the key management unit of interconnection link module 2-1 configures the communication key F as the encryption engine key.

[0175] 9. After the encryption engine key and decryption engine key of each interconnect link module 1-1 and interconnect link module 2-1 are configured, a secure link is established between interconnect link module 1-1 and interconnect link module 2-1, and secure data communication can be started.

[0176] To further ensure the security of the interconnection link, interconnection link module 1-1 and interconnection link module 2-1 can update the communication key after a preset key update time, such as 2 hours. The update process includes:

[0177] 1. The key management unit of the interconnection link module 1-1 obtains a random number from the random number generator and uses the random number as the data of the key update data packet. After being encrypted by the encryption engine using the existing encryption engine key, it is sent to the interconnection link module 2-1.

[0178] The key management unit of the interconnection link module 2-1 uses the XOR value of the plaintext and ciphertext of the cumulatively sent data as the random number of the peer, and uses the random number of the peer as the key to update the data packet. After being encrypted by the encryption engine using the existing encryption engine key, it is sent to the interconnection link module 1-1.

[0179] 2. The key management units of interconnection link module 1-1 and interconnection link module 2-1 respectively decrypt to obtain the random number at the peer end and the random number at the local end.

[0180] 3. The key management units of interconnection link module 1-1 and interconnection link module 2-1 respectively XOR the local random number and the remote random number to obtain the same communication key E1. After obtaining the communication key E1, interconnection link module 1-1 and interconnection link module 2-1 complete state synchronization.

[0181] 4. The key management unit of interconnection link module 1-1 generates the first key update completion data packet, and encrypts it with the existing encryption engine key before sending it to interconnection link module 2-1.

[0182] 5. The key management unit of the interconnection link module 1-1 configures the communication key E1 as the encryption engine key for subsequent communication data encryption.

[0183] 6. After receiving the first key update completion data packet, the cryptographic management unit of interconnection link module 2-1 configures communication key E1 as the decryption engine key for decryption of subsequent communication data sent by interconnection link module 1-1.

[0184] 7. Repeat steps 1 to 6. The storage chip can be used as the target chip and the CPU chip as the peer chip. The communication key F1 is negotiated and configured as the decryption engine key of interconnection link module 1-1 and the encryption engine key of interconnection link module 2-1, so as to realize the key update of interconnection link module 1-1 and interconnection link module 2-1 respectively.

[0185] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0186] Based on the same inventive concept, this application also provides a communication link establishment apparatus for implementing the communication link establishment method described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more communication link establishment apparatus embodiments provided below can be found in the limitations of the communication link establishment method described above, and will not be repeated here.

[0187] In one exemplary embodiment, such as Figure 13 As shown, a communication link establishment device 1300 is provided, which is applied to any target chip in a chip, including: a first acquisition module 1301, a first receiving module 1302, and a first generation module 1303, wherein:

[0188] The first acquisition module 1301 is used to acquire a local random number, encrypt the local random number based on the link root key, and send the encrypted local random number to the peer core through the interconnection link; the interconnection link is a physical communication link between the target core and the peer core connected by a metal wire; the link root key is pre-programmed into the non-volatile memory of the target core;

[0189] The first receiving module 1302 is used to receive the encrypted random number sent by the peer core through the interconnection link, and decrypt the encrypted random number based on the link root key to obtain the peer random number.

[0190] The first generation module 1303 is used to generate a communication key for secure communication between the target core and the peer core through the interconnection link module, based on the local random number and the peer random number.

[0191] In one embodiment, the first acquisition module 1301 includes:

[0192] The first generation unit is used to generate a random number at this end if a random number generator exists in the target core.

[0193] The second generation unit is used to obtain the initial data of the static random access memory in the target core after power-on if there is no random number generator in the target core, and generate a local random number based on the initial data.

[0194] In one embodiment, the first acquisition module 1301 includes:

[0195] The first reading unit is used to read the link root key from non-volatile memory;

[0196] The first configuration unit is used to configure the encryption engine key of the interconnection link module according to the link root key;

[0197] The encryption unit is used to encrypt the local random number by calling the encryption engine in the interconnection link module and using the encryption engine key to obtain the encrypted local random number.

[0198] In one embodiment, the first receiving module 1302 includes:

[0199] The second reading unit is used to read the link root key from the non-volatile memory;

[0200] The second configuration unit is used to configure the decryption engine key of the interconnection link module according to the link root key;

[0201] The decryption unit is used to decrypt the encrypted peer random number by calling the decryption engine in the interconnection link module and using the decryption engine key to obtain the peer random number.

[0202] In one embodiment, the communication key is an encryption key, the local random number includes a first random number, and the remote random number includes a second random number; the aforementioned first generation module 1303 includes:

[0203] The first transmitting unit is used to encrypt the first random number based on the link root key and send the encrypted first random number to the peer core through the interconnection link.

[0204] The first receiving unit is used to receive the encrypted second random number sent by the peer core through the interconnection link, and decrypt the encrypted second random number according to the link root key to obtain the second random number;

[0205] The third generation unit is used to generate the encryption key for the interconnection link module based on the first random number and the second random number.

[0206] In one embodiment, the apparatus further includes a first update module for updating the encryption engine key of the interconnection link module according to the encryption key, as a new encryption engine key for the interconnection link module.

[0207] In one embodiment, the communication key is a decryption key, the local random number includes a third random number, the remote random number includes a fourth random number, and the aforementioned first generation module 1301 includes:

[0208] The second sending unit is used to encrypt the third random number based on the link root key and send the encrypted third random number to the peer core through the interconnection link.

[0209] The second receiving unit is used to receive the encrypted fourth random number sent by the peer core through the interconnection link, and decrypt the encrypted fourth random number according to the link root key to obtain the fourth random number.

[0210] The fourth generation unit is used to generate the decryption key for the interconnection module based on the third and fourth random numbers.

[0211] In one embodiment, the apparatus further includes a second update module for updating the decryption engine key of the interconnection link module according to the decryption key, as the new decryption engine key of the interconnection link module.

[0212] In one embodiment, the non-volatile memory is a secure electronic fuse unit, and the link root key is burned into the preset storage location when it is determined that the preset storage location in the secure electronic fuse unit has not been burned.

[0213] In one embodiment, the device further includes a key update module, used to detect whether a preset key update time has been reached when a communication key for secure communication between the target kernel and the peer kernel is generated via an interconnection link module; and to update the communication key if the preset key update time has been reached.

[0214] In one embodiment, the key update module further includes:

[0215] The first acquisition unit is used to acquire the new encryption engine key and the new decryption engine key of the interconnection link module;

[0216] The third sending unit is used to encrypt the local random number based on the new encryption engine key, and send the encrypted local random number to the peer core through the interconnection link;

[0217] The third receiving unit is used to receive the encrypted random number sent by the peer core through the interconnection link, and decrypt the encrypted random number based on the new decryption engine key to obtain the peer random number.

[0218] The fifth generation unit is used to generate a communication update key based on the local random number and the remote random number.

[0219] The update unit is used to update the communication key according to the communication update key.

[0220] In one embodiment, the communication update key includes an encryption update key and an update unit, specifically used to generate a first key update completion data packet, encrypt the first key update completion data packet based on the new encryption engine key, and send it to the peer core; and update the encryption engine key of the interconnection link module according to the encryption update key, as the new encryption engine key of the interconnection link module.

[0221] In one embodiment, the communication update key includes a decryption update key and an update unit, specifically used to update the decryption engine key of the interconnection link module according to the decryption update key after receiving the second key update completion data packet sent by the peer chip, as the new decryption engine key of the interconnection link module.

[0222] In one embodiment, the device further includes:

[0223] The second generation module is used to generate a random number at this end if a random number generator exists in the target core.

[0224] The third generation module is used to generate a local random number by XORing the plaintext and ciphertext of the data sent by the target core if the target core does not have a random number generator.

[0225] Each module in the aforementioned communication link establishment device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the corresponding operations of each module.

[0226] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 13As shown, this computer device includes a processor, memory, input / output interfaces (I / O), and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores communication link data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When executed by the processor, the computer program implements a method for establishing a communication link.

[0227] Those skilled in the art will understand that Figure 13 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0228] This application also provides a chip, such as Figure 1 As shown, the chip includes multiple functions, and the chip is used to perform any of the method steps described in the above method embodiments.

[0229] In an exemplary embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to perform the following steps: obtaining a local random number, encrypting the local random number based on a link root key, and sending the encrypted local random number to a peer core through an interconnect link; the interconnect link is a physical communication link between the target core and the peer core connected by a metal wire; the link root key is pre-programmed into the non-volatile memory of the target core; receiving the encrypted peer random number sent by the peer core through the interconnect link, and decrypting the encrypted peer random number based on the link root key to obtain the peer random number; and generating a communication key for secure communication between the target core and the peer core through an interconnect link module based on the local random number and the peer random number.

[0230] In one embodiment, when the processor executes the computer program, it further performs the following steps: if a random number generator exists in the target chip, a local random number is generated by the random number generator; if a random number generator does not exist in the target chip, the initial data of the static random access memory in the target chip after power-on is obtained, and a local random number is generated based on the initial data.

[0231] In one embodiment, when the processor executes the computer program, it further performs the following steps: reading the link root key from non-volatile memory; configuring the encryption engine key of the interconnection link module according to the link root key; and encrypting the local random number using the encryption engine key by calling the encryption engine in the interconnection link module to obtain the encrypted local random number.

[0232] In one embodiment, when the processor executes the computer program, it further performs the following steps: reading the link root key from non-volatile memory; configuring the decryption engine key of the interconnection link module according to the link root key; and decrypting the encrypted peer random number by calling the decryption engine in the interconnection link module and using the decryption engine key to obtain the peer random number.

[0233] In one embodiment, the communication key is an encryption key, the local random number includes a first random number, and the remote random number includes a second random number; when the processor executes the computer program, it further implements the following steps: encrypting the first random number based on the link root key, and sending the encrypted first random number to the remote core through the interconnect link; receiving the encrypted second random number sent by the remote core through the interconnect link, and decrypting the encrypted second random number according to the link root key to obtain the second random number; generating an encryption key for the interconnect link module based on the first random number and the second random number.

[0234] In one embodiment, when the processor executes the computer program, it further performs the following steps: updating the encryption engine key of the interconnection link module according to the encryption key, as the new encryption engine key of the interconnection link module.

[0235] In one embodiment, the communication key is a decryption key, the local random number includes a third random number, the remote random number includes a fourth random number, and the processor, when executing the computer program, further implements the following steps: encrypting the third random number based on the link root key, and sending the encrypted third random number to the remote core through the interconnection link; receiving the encrypted fourth random number sent by the remote core through the interconnection link, and decrypting the encrypted fourth random number according to the link root key to obtain the fourth random number; generating a decryption key for the interconnection link module based on the third random number and the fourth random number.

[0236] In one embodiment, when the processor executes the computer program, it further performs the following steps: updating the decryption engine key of the interconnection link module according to the decryption key, as the new decryption engine key of the interconnection link module.

[0237] In one embodiment, the non-volatile memory is a secure electronic fuse unit, and the link root key is burned into the preset storage location when it is determined that the preset storage location in the secure electronic fuse unit has not been burned.

[0238] In one embodiment, when the processor executes the computer program, it further performs the following steps: when generating a communication key for secure communication between the target chip and the peer chip via an interconnection link module, it detects whether a preset key update time has been reached at the current time; if the preset key update time has been reached, it updates the communication key.

[0239] In one embodiment, when the processor executes the computer program, it further performs the following steps: obtaining a new encryption engine key and a new decryption engine key from the interconnection link module; encrypting a local random number based on the new encryption engine key, and sending the encrypted local random number to the peer core via the interconnection link; receiving the encrypted peer random number sent by the peer core via the interconnection link, and decrypting the encrypted peer random number based on the new decryption engine key to obtain the peer random number; generating a communication update key based on the local random number and the peer random number; and updating the communication key based on the communication update key.

[0240] In one embodiment, the communication update key includes an encryption update key, and the processor, when executing the computer program, further implements the following steps: generating a first key update completion data packet, encrypting the first key update completion data packet based on the new encryption engine key, and sending it to the peer core; updating the encryption engine key of the interconnection link module according to the encryption update key, as the new encryption engine key of the interconnection link module.

[0241] In one embodiment, the communication update key includes a decryption update key, and the processor, when executing the computer program, further implements the following steps: after receiving a second key update completion data packet sent by the peer chip, updating the decryption engine key of the interconnection link module according to the decryption update key as the new decryption engine key of the interconnection link module.

[0242] In one embodiment, when the processor executes the computer program, it further performs the following steps: if a random number generator exists in the target chip, a local random number is generated by the random number generator; if a random number generator does not exist in the target chip, a local random number is generated by XORing the plaintext and ciphertext of the data sent by the target chip.

[0243] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps of any one of the above method embodiments.

[0244] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps described in any of the above method embodiments.

[0245] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0246] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0247] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0248] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for establishing a communication link, characterized in that, A key management unit applied in the interconnect link module of any target chip in a chip, the method comprising: A random number is obtained from the local end, and the local random number is encrypted based on the link root key. The encrypted local random number is then sent to the peer core through an interconnect link. The interconnect link is a physical communication link between the target core and the peer core connected by a metal wire. The link root key is pre-programmed into the non-volatile memory of the target core. Receive the encrypted peer random number sent by the peer core through the interconnect link, and decrypt the encrypted peer random number based on the link root key to obtain the peer random number; Based on the local random number and the peer random number, a communication key is generated for secure communication between the target chip and the peer chip via the interconnection link module.

2. The method according to claim 1, characterized in that, The process of obtaining a local random number includes: If a random number generator exists in the target core, then the local random number is generated by the random number generator; If the target chip does not contain a random number generator, then the initial data of the static random access memory in the target chip after power-on is obtained, and the local random number is generated based on the initial data.

3. The method according to claim 1 or 2, characterized in that, The encryption of the local random number based on the link root key includes: Read the link root key from the non-volatile memory; Configure the encryption engine key of the interconnection link module according to the link root key; By calling the encryption engine in the interconnection link module, the local random number is encrypted using the encryption engine key to obtain the encrypted local random number.

4. The method according to claim 1 or 2, characterized in that, The process of decrypting the encrypted peer random number based on the link root key includes: Read the link root key from the non-volatile memory; Configure the decryption engine key of the interconnection link module according to the link root key; By calling the decryption engine in the interconnection link module, the encrypted peer random number is decrypted using the decryption engine key to obtain the peer random number.

5. The method according to claim 1 or 2, characterized in that, The communication key is an encryption key, the local random number includes a first random number, and the remote random number includes a second random number; the step of generating a communication key for secure communication between the target chip and the remote chip via the interconnection link module based on the local random number and the remote random number includes: The first random number is encrypted based on the link root key, and the encrypted first random number is sent to the peer core through the interconnection link. The encrypted second random number is received from the peer chip through the interconnection link, and the encrypted second random number is decrypted according to the link root key to obtain the second random number; The encryption key for the interconnection link module is generated based on the first random number and the second random number.

6. The method according to claim 5, characterized in that, The method further includes: The encryption engine key of the interconnection link module is updated according to the encryption key, and used as the new encryption engine key of the interconnection link module.

7. The method according to claim 1 or 2, characterized in that, The communication key is a decryption key. The local random number includes a third random number, and the remote random number includes a fourth random number. Generating a communication key for secure communication between the target chip and the remote chip via the interconnection link module based on the local random number and the remote random number includes: The third random number is encrypted based on the link root key, and the encrypted third random number is sent to the peer core through the interconnection link. The encrypted fourth random number is received from the peer chip through the interconnection link, and the encrypted fourth random number is decrypted according to the link root key to obtain the fourth random number; The decryption key for the interconnection link module is generated based on the third random number and the fourth random number.

8. The method according to claim 7, characterized in that, The method further includes: The decryption engine key of the interconnection link module is updated according to the decryption key, and used as the new decryption engine key of the interconnection link module.

9. The method according to claim 1 or 2, characterized in that, The non-volatile memory is a secure electronic fuse unit, and the link root key is burned into the preset storage location when it is determined that the preset storage location in the secure electronic fuse unit has not been burned before.

10. The method according to claim 1 or 2, characterized in that, The method further includes: In the case of generating a communication key for secure communication between the target core and the peer core via the interconnection link module, it is detected whether the preset key update time has been reached at the current time; The communication key is updated when the preset key update time is reached.

11. The method according to claim 10, characterized in that, Updating the communication key includes: Obtain the new encryption engine key and the new decryption engine key of the interconnection link module; The local random number is encrypted based on the new encryption engine key, and the encrypted local random number is sent to the peer core through the interconnection link. The encrypted peer random number sent by the peer chip through the interconnection link is received, and the encrypted peer random number is decrypted based on the new decryption engine key to obtain the peer random number. A communication update key is generated based on the local random number and the remote random number. The communication key is updated according to the communication update key.

12. The method according to claim 11, characterized in that, The communication update key includes an encryption update key, and updating the communication key according to the communication update key includes: A first key update completion data packet is generated, and the first key update completion data packet is encrypted based on the new encryption engine key and then sent to the peer core. The encryption engine key of the interconnection link module is updated according to the encryption update key, and used as the new encryption engine key of the interconnection link module.

13. The method according to claim 11, characterized in that, The communication update key includes a decryption update key, and updating the communication key according to the communication update key includes: After receiving the second key update completion data packet sent by the peer chip, the decryption engine key of the interconnection link module is updated according to the decryption update key, and used as the new decryption engine key of the interconnection link module.

14. The method according to claim 11, characterized in that, The method further includes: If the target core has a random number generator, then the local random number is generated by the random number generator; If the target chip does not have a random number generator, the local random number is generated by XORing the plaintext and ciphertext of the data sent by the target chip.

15. A communication link establishment device, characterized in that, A key management unit applied in the interconnect link module of any target chip in a chip, the device comprising: The first acquisition module is used to acquire a local random number, encrypt the local random number based on the link root key, and send the encrypted local random number to the peer chip through an interconnection link; the interconnection link is a physical communication link between the target chip and the peer chip connected by a metal wire; the link root key is pre-programmed into the non-volatile memory of the target chip; The first receiving module is used to receive the encrypted peer random number sent by the peer core through the interconnection link, and decrypt the encrypted peer random number based on the link root key to obtain the peer random number. The first generation module is used to generate a communication key for secure communication between the target chip and the peer chip through the interconnection link module, based on the local random number and the peer random number.

16. An interconnection link module, characterized in that, The interconnection link module includes a key management unit, an encryption engine, a decryption engine, and a communication module; The key management unit is used to perform the method steps of any one of claims 1 to 14.

17. A functional core, characterized in that, The functional core includes the interconnect link module as described in claim 15.

18. A chip, characterized in that, The chip includes at least two functional chips as described in claim 17.

19. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 14.

20. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 14.

21. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 14.

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