Continuous timeslot scheduling for physical uplink shared channel resources
By scheduling the demodulation reference signal for subsequent time slots in the new radio system and using the same frequency and time alignment for channel estimation, the problem of inaccurate channel estimation caused by finite DMRS is solved, and the system performance is improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-28
- Publication Date
- 2026-03-31
AI Technical Summary
In the new radio system, channel estimation of the physical uplink shared channel is limited by a finite number of demodulation reference signals, which leads to a decrease in system performance.
By scheduling the demodulation reference signal of subsequent time slots after a specific time slot, channel estimation is performed using the same frequency, transmit power, and time alignment, increasing the orthogonal frequency division multiplexing symbols in subsequent time slots, and improving the quality of channel estimation.
It improves the accuracy of channel estimation and enhances system performance, especially in time-division duplex and frequency-division duplex systems, reducing performance degradation caused by the reduction in the number of DMRS symbols.
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Figure CN121773583A_ABST
Abstract
Description
Related applications
[0001] This application claims priority to U.S. nonprovisional patent application No. 18 / 352,438, filed July 14, 2023, entitled “CONSECUTIVE SLOT SCHEDULINGFOR PHYSICAL UPLINK SHARED CHANNEL RESOURCES”, the entire contents of which are incorporated herein by reference. Background Technology
[0002] In New Radio (NR) systems, similar to Long Term Evolution (LTE) systems, time slots can be used for both downlink (DL) and uplink (UL) transmissions. For UL, the Physical Uplink Shared Channel (PUSCH) demodulation reference signal (DMRS) is used for PUSCH channel estimation, and the channel estimation is in turn used to decode UL data.
[0003] Within a given time slot, the duration of PUSCH resources scheduled for PUSCH transmission is finite. Therefore, for a given time slot, the number of PUSCH DMRS and DMRS appendages is limited to one or two. This limited number of PUSCH DMRSs can lead to poor channel estimation and degraded system performance.
[0004] The background techniques for PUSCH channel estimation described above are intended only to provide a contextual overview of the current issues and are not intended to be exhaustive. Further contextual information may become more apparent upon reviewing the detailed description below. Attached Figure Description
[0005] Figure 1 This is a block diagram of an exemplary system according to one or more embodiments described herein.
[0006] Figure 2 This is a block diagram of an exemplary system according to one or more embodiments described herein.
[0007] Figure 3 This is a block diagram of an exemplary system according to one or more embodiments described herein.
[0008] Figure 4 This is a block diagram of an exemplary system according to one or more embodiments described herein.
[0009] Figure 5 This is a schematic diagram of exemplary time slot and channel estimation according to one or more embodiments described herein.
[0010] Figure 6This is a schematic diagram of exemplary time slot and channel estimation according to one or more embodiments described herein.
[0011] Figure 7 This is a schematic diagram of a delay budget according to one or more embodiments described herein.
[0012] Figure 8 This is a block flowchart of a process associated with continuous time slot scheduling according to one or more embodiments described herein.
[0013] Figure 9 This is an example, non-limiting computing environment in which one or more embodiments described herein can be implemented.
[0014] Figure 10 This is an example, non-limiting network environment in which one or more embodiments described herein can be implemented. Detailed Implementation
[0015] This subject matter disclosure is now described with reference to the accompanying drawings, wherein the same reference numerals are used to refer to the same elements throughout the text. In the following description, numerous specific details are set forth for purposes of explanation in order to provide a thorough understanding of this subject matter disclosure. However, it will be apparent, however, that this subject matter disclosure can be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form to aid in the description of this subject matter disclosure.
[0016] As mentioned above, channel estimation can be improved in various ways, and various embodiments are described herein to achieve this and / or other purposes. The disclosed subject matter relates to telecommunications, and more specifically, to continuous time-slot scheduling for shared channel resources in the physical uplink.
[0017] According to an embodiment, a system may include a processor and a memory storing executable instructions that, when executed by the processor, facilitate the execution of operations including: determining a first demodulation reference signal for a specific time slot of a physical uplink shared channel; and scheduling a second demodulation reference signal for subsequent time slots of the physical uplink shared channel after the specific time slot, based on the first demodulation reference signal, for uplink transmission via a user equipment shared by the specific time slot and subsequent time slots.
[0018] In various embodiments, the first demodulation reference signal and the second demodulation reference signal may include a common frequency. In a further embodiment, the first demodulation reference signal and the second demodulation reference signal may include a common transmit power. In an additional embodiment, the first demodulation reference signal and the second demodulation reference signal may include a common antenna. In yet another further embodiment, the first demodulation reference signal and the second demodulation reference signal may include common time alignment.
[0019] In various embodiments, the second demodulation reference signal can be used for channel estimation applicable to a specific time slot. In a further embodiment, the second demodulation reference signal can include sequential first orthogonal frequency division multiplexing (OFDM) symbols for subsequent time slots. In an additional embodiment, the second demodulation reference signal includes sequential third or fourth OFDM symbols for subsequent time slots.
[0020] In various embodiments, the above operation may also include: in response to determining that the gNodeB includes a separation of Layer 1 and Layer 2 units, sending an indication to a Layer 1 receiver that subsequent time slots can be used for channel estimation for user equipment.
[0021] In various embodiments, the above operation may also include: in response to determining that the gNodeB includes a layer 1 and a layer 2 unit separation, the layer 1 and layer 2 unit separation including a layer 1 receiver and a layer 2 receiver, modifying the delay limit of the layer 2 receiver applicable to the layer 1 receiver to enable the execution of processing associated with a specific time slot.
[0022] In another embodiment, a non-transitory machine-readable medium may include executable instructions that, when executed by a processor, facilitate the execution of operations, including: determining a first demodulation reference signal for a specific time slot of a physical uplink shared channel; and scheduling a second demodulation reference signal for subsequent time slots of the physical uplink shared channel after the specific time slot, based on the first demodulation reference signal, for uplink transmission via a user equipment shared by the specific time slot and subsequent time slots.
[0023] In various embodiments, the first demodulation reference signal and the second demodulation reference signal may include a common frequency. In a further embodiment, the first demodulation reference signal and the second demodulation reference signal may include a common transmit power. In an additional embodiment, the first demodulation reference signal and the second demodulation reference signal may include a common antenna. In yet another further embodiment, the first demodulation reference signal and the second demodulation reference signal may include common time alignment.
[0024] In various embodiments, the second demodulation reference signal can be used for channel estimation applicable to a specific time slot. In a further embodiment, the first demodulation reference signal can be used for channel estimation applicable to a specific time slot.
[0025] According to another embodiment, a method may include: determining a first demodulation reference signal for a specific time slot of a physical uplink shared channel by a network device including a processor; and scheduling a second demodulation reference signal for a subsequent time slot of the physical uplink shared channel after the specific time slot by the network device based on the first demodulation reference signal for uplink transmission via a user equipment shared by the specific time slot and the subsequent time slot.
[0026] In various embodiments, the second demodulation reference signal can include sequential first orthogonal frequency division multiplexing symbols in subsequent time slots.
[0027] In various embodiments, the above method may also include: in response to determining that the gNodeB includes Layer 1 and Layer 2 unit separation, the network device sends an indication to the Layer 1 receiver of the capability of subsequent time slots to be used for channel estimation for user equipment.
[0028] In various embodiments, the above method may also include: in response to determining that the gNodeB includes a Layer 1 and Layer 2 unit separation, the Layer 1 and Layer 2 unit separation including a Layer 1 receiver and a Layer 2 receiver, the network device modifies the latency limit of the Layer 2 receiver applicable to the Layer 1 receiver so that it can be used for processing associated with a specific time slot.
[0029] It should be understood that additional representations, configurations, implementations, protocols, etc., can be utilized by combining the components described herein or different / additional components as understood by those skilled in the art.
[0030] Various embodiments described herein include scheduling subsequent time slots (e.g., UL time slots) for the same UE after a specific time slot (e.g., using the same allocation configuration in terms of antennas and resource blocks used), and / or utilizing the first DMRS symbol of the subsequent time slot for channel estimation for the specific time slot.
[0031] Note that the embodiments described herein are applicable to Time Division Duplex (TDD) and / or Frequency Division Duplex (FDD) systems. In FDD (as in TDD), any PUSCH may be assigned a small number of symbols, thus suffering performance degradation as the number of DMRS symbols decreases.
[0032] Turn now Figure 1 The illustration depicts an example non-limiting system 102 according to one or more embodiments herein. System 102 can include computerized tools that can be configured to perform various operations related to continuous time slot scheduling. System 102 can include one or more of a variety of components, such as memory 104, processor 106, bus 108, signal determination component 110, and / or scheduling component 112. In various embodiments, system 102 can be communicatively coupled to or can further include user equipment (UE) 114 (e.g., a mobile device) and / or gNodeB 116. In various embodiments, one or more of memory 104, processor 106, bus 108, signal determination component 110, scheduling component 112, UE 114, and / or gNodeB 116 can be communicatively or operatively coupled to each other (e.g., via a bus or wireless network) to perform one or more functions of system 102.
[0033] According to an embodiment, the signal determination component 110 is capable of determining a first demodulation reference signal (DMRS) (e.g., 508) for a specific time slot (e.g., specific time slot 502) of the physical uplink shared channel. Note that the DMRS may include a reference signal used for channel estimation (e.g., via channel estimation component 204, which will be discussed in more detail later). The scheduling component 112 is then capable of scheduling a second demodulation reference signal (e.g., 510 or 604) for subsequent time slots (e.g., UL time slot 504) of the physical uplink shared channel after the specific time slot, based on the first demodulation reference signal, for uplink transmission via a user equipment (e.g., UE 114) shared by the specific time slot 502 and subsequent time slot 504.
[0034] In various embodiments, the first demodulation reference signal (e.g., 508) and the second demodulation reference signal (e.g., 510 or 604) can include a common frequency. In a further embodiment, the first demodulation reference signal and the second demodulation reference signal can include a common transmit power. In an additional embodiment, the first demodulation reference signal and the second demodulation reference signal can utilize a common antenna (e.g., the antenna of gNodeB 116). In yet another embodiment, the first demodulation reference signal and the second demodulation reference signal can include a common time alignment. In this respect, UE 114 avoids updating its RF frequency, time alignment, and / or power control loop when transmitting signals and can use the same antenna precoding.
[0035] Now for reference Figure 2 The illustration depicts an example non-limiting system 202 according to one or more embodiments herein. System 202 can include computerized tools that can be configured to perform various operations related to continuous time slot scheduling. System 202 can be similar to system 102 and can include one or more of a variety of components, such as memory 104, processor 106, bus 108, signal determination component 110, and / or scheduling component 112. In various embodiments, system 202 can be communicatively coupled to or further include UE 114 and / or gNodeB 116. System 202 can also include channel estimation component 204. In various embodiments, one or more of memory 104, processor 106, bus 108, signal determination component 110, scheduling component 112, UE 114, gNodeB 116, and / or channel estimation component 204 can be communicatively or operatively coupled to each other (e.g., via a bus or wireless network) to perform one or more functions of system 202.
[0036] In various embodiments, the second demodulation reference signal (e.g., 510 or 604) herein can be used (e.g., via channel estimation component 204) for channel estimation applicable to a specific time slot 502. In additional embodiments, the second demodulation reference signal can include sequential third or fourth orthogonal frequency division multiplexing symbols (e.g., 510) for subsequent time slots (e.g., UL time slot 504). In this regard, see [link to relevant documentation]. Figure 5 The diagram illustrates an exemplary time slot and channel estimation schematic 500 according to one or more embodiments described herein. Schematic 500 depicts a specific time slot 502, a UL time slot 504 (e.g., a subsequent time slot), and processed (e.g., equalized) data 506. In schematic 500, a second demodulation reference signal (e.g., 510) is capable of including a sequential third or fourth orthogonal frequency division multiplexing symbol of UL time slot 504 (in schematic 500, the second demodulation reference signal (e.g., 510) is in a sequential third position, but is not limited thereto). In a further embodiment, the second demodulation reference signal is capable of including a sequential first orthogonal frequency division multiplexing symbol of a subsequent time slot (e.g., 604). See also [link to relevant documentation] for further details. Figure 6 The illustration shows a schematic diagram 600 of exemplary time slot and channel estimation according to one or more embodiments described herein. Note that schematic diagram 600 is similar to schematic diagram 500. However, in schematic diagram 600, the second demodulation reference signal can include sequential first orthogonal frequency division multiplexing symbols of UL time slot 602. In various embodiments herein, scheduling component 112 can schedule subsequent time slots (e.g., UL time slot 504) after a specific time slot 502 for UL transmission of the same UE 114, using the same allocation configuration in terms of antennas and used RBs (resource blocks). Therefore, the PUSCH DMRS of the subsequent time slot (e.g., UL time slot 504) can be used for channel estimation of the specific time slot 502 (e.g., via channel estimation component 204), where channel estimation component 204 is able to determine various channel state information applicable to the communication link associated with UE 114.
[0037] Note that in 5G, a PUSCH transmission can typically include one to four DMRS events occurring within a time slot. Therefore, the embodiments described herein are not limited to two DMRS symbols, and such descriptions herein are purely exemplary. The embodiments described herein can utilize DMRS from two or more consecutive time slots. Furthermore, the embodiments described herein are not limited to channel estimation for a specific time slot. Further embodiments can include channel estimation for other suitable time slots (such as UL and / or DL time slots) according to various embodiments herein. Other suitable combinations and / or implementations are contemplated.
[0038] Additionally, it should be noted that, for both the UE 114 and the base station side (e.g., the system described herein and / or gNodeB 116), the embodiments described herein can be applied symmetrically to both the DL and UL data channels—PUSCH and the Physical Downlink Shared Channel (PDSCH).
[0039] Turn now Figure 3 The illustration depicts an example non-limiting system 302 according to one or more embodiments herein. System 302 can include computerized tools that can be configured to perform various operations related to continuous time slot scheduling. System 302 can be similar to system 202 and can include one or more of a variety of components, such as memory 104, processor 106, bus 108, signal determination component 110, scheduling component 112, and / or channel estimation component 204. In various embodiments, system 302 can be communicatively coupled to or can further include UE 114 and / or gNodeB 116. System 302 can also include communication component 304. In various embodiments, one or more of memory 104, processor 106, bus 108, signal determination component 110, scheduling component 112, UE 114, gNodeB 116, channel estimation component 204, and / or communication component 304 can be communicatively or operatively coupled to each other (e.g., via a bus or wireless network) to perform one or more functions of system 302.
[0040] In various embodiments, communication component 304 is capable of sending an indication to a layer 1 receiver (e.g., L1 118 and L2 120) that subsequent time slots (e.g., UL time slot 504) can be used for channel estimation for UE 114 (e.g., via channel estimation component 204) in response to determining (e.g., via signal determination component 110 or another suitable component or system herein) that gNodeB 116 includes layer 1 and layer 2 unit separations (e.g., L1 118 and L2 120). The foregoing enables channel estimation component 204 to utilize UL time slot 504 in channel estimation for a specific time slot 502 herein. Note that communication component 304 may include the hardware required to implement various communication protocols (e.g., infrared (“IR”), shortwave transmission, near field communication (“NFC”), Bluetooth, Wi-Fi, Long Term Evolution (“LTE”), 3G, 4G, 5G, 6G, Global System for Mobile Communications (“GSM”), Code Division Multiple Access (“CDMA”), satellite, visual cues, radio waves, etc.).
[0041] Turn now Figure 4The illustration depicts an example non-limiting system 402 according to one or more embodiments herein. System 402 can include computerized tools that can be configured to perform various operations related to continuous time slot scheduling. System 402 can be similar to system 302 and can include one or more of a variety of components, such as memory 104, processor 106, bus 108, signal determination component 110, scheduling component 112, channel estimation component 204, and / or communication component 304. In various embodiments, system 402 can be communicatively coupled to or can further include UE 114 and / or gNodeB 116. System 402 can also include modification component 404. In various embodiments, one or more of the memory 104, processor 106, bus 108, signal determination component 110, scheduling component 112, UE 114, gNodeB 116, channel estimation component 204, communication component 304 and / or modification component 404 can be communicatively or operably coupled to each other (e.g., via a bus or wireless network) to perform one or more functions of system 402.
[0042] In various embodiments, the modification component 404 can, in response to determining that the gNodeB includes a Layer 1 and Layer 2 unit separation comprising a Layer 1 receiver (e.g., L1 118) and a Layer 2 receiver (e.g., L2 120), modify the latency constraints of the Layer 2 receiver (e.g., L1 118) applicable to the Layer 1 receiver (e.g., L1 118) to enable the execution of processing associated with a specific time slot 502. This modification can include increasing or decreasing the defined latency constraints corresponding to a defined latency budget. See the example below. Figure 7 A schematic diagram 700 depicting a delay budget is provided, based on one or more embodiments described herein. In schematic diagram 700, T latency The delay allows L1 118 to process normally. However, in schematic 700, the starting point is at the first DMRS symbol of the second allocation (e.g., 510 or 604). In schematic 700, 702 is able to include a deadline for L1 118 to send the decoded PUSCH to L2 120.
[0043] The embodiments described herein address potential degradation in channel estimation for specific time slots, for example, by scheduling subsequent time slots (e.g., UL time slot 504) for UL transmissions targeting the same UE 114. The network gNodeB 116 (e.g., via L2 120) is able to schedule (e.g., via scheduling component 112) transmissions of the same UE 114 on subsequent time slots (e.g., UL time slot 504) starting at the first Orthogonal Frequency Division Multiplexing (OFDM) symbol, for example, by placing the first DMRS at symbol indices 0, 1, 2, or 3 (see [link to documentation]). Figure 5 and Figure 6 The next time slot allocation can include the same number of RBs (or more) and / or can include at least the same set of RBs used in the first time slot. Similarly, the allocation can utilize the same antenna precoding in both time slots. Without needing to schedule UE 114 in a subsequent time slot, L2 120 and / or scheduling component 112 can schedule a portion of the data transmitted by UE 114 using its resources in a specific time slot 502, and then the remaining data can be transmitted by the same UE 114 in a subsequent time slot (e.g., UL time slot 504) via scheduling component 112 (e.g., via communication component 304). For example, the number N of the original number of RBs can be divided in half, resulting in N / 2 in the first time slot and another N / 2 in the next time slot. Therefore, the PUSCH DMRS of the subsequent time slot (e.g., UL time slot 504) can be used for channel estimation in a specific time slot 502 (e.g., via channel estimation component 204).
[0044] Note that when a subsequent time slot (e.g., UL time slot 504) includes only one DMRS (e.g., due to a smaller number of symbols in the allocation), for a given UE 114, the channel estimation for the next time slot can benefit from the previous DMRS symbols. In this case, receiver performance can be improved with a cleaner channel estimation. Additionally, it should be noted that special processing (e.g., via the system described herein) can be performed when UE 114 does not include sufficient data for transmission in two consecutive time slots. In this case, even if the RB of UE 114 is limited by the scheduler (e.g., scheduling component 112) in a particular time slot 502, the UL resources in that particular time slot can be sufficient for UE 114 to transmit its data. In this case, subsequent UL time slots are not scheduled by the scheduler (e.g., scheduling component 112) for the same UE 114.
[0045] In the case where gNodeB 116 consists of separate L1 / L2 units (e.g., L1 118 and L2 120), a special signal (e.g., via communication component 304) can be used to notify L1 receiver 118 that the next time slot can also be used for channel estimation for UE 114. Note that L1 118 typically expects to send the decoded block back to L2 120 at most a given time T after the over-the-air (OTA) time slot ends. However, in various embodiments herein, L2 120 can expect and / or allow a higher delay for processing a specific time slot 502 for L1 118, including additional time until the first DMRS arrives for the subsequent time slot (e.g., UL time slot 504). This processing delay can depend, for example, on the mapping type of resource allocation for subsequent time slots after the specific time slot. In some embodiments, mapping type B is the only option for the specific time slot 502, and therefore, the DMRS is located at the beginning of the PUSCH resource allocation. If we assume that the allocation of PUSCH resources for the next time slot begins from the time slot boundary, then two exemplary cases for processing delays are possible, depending on the mapping type for subsequent time slots (e.g., UL time slot 504) after a specific time slot 502: ●Mapping type A: For this mapping, the first DMRS is located at the third or fourth symbol ( l 0 = 2, 3). Therefore, the embodiments in this paper add additional latency. T delay = ( l d + 2) × T symb or T delay = ( l d + 3) × T symb This depends on, for example, whether the third or fourth symbol is used in DMRS. In this respect, l d It is the duration of the allocated PUSCH for a specific time slot (mapping type B), and T symb It is the duration of an OFDM symbol. ●Mapping type B: For this mapping, the first DMRS is located at the first symbol ( l 0 = 0). In this respect, the embodiments in this paper add additional latency. T delay = l d × T symb .
[0046] Figure 8 A block flowchart of process 800 associated with consecutive time slot scheduling according to one or more embodiments described herein is illustrated. At 802, process 800 may include determining (e.g., 508) a first demodulation reference signal for a specific time slot 502 of the physical uplink shared channel (e.g., via signal determination component 110). At 804, process 800 may include scheduling (e.g., 510 or 604) a second demodulation reference signal (e.g., 510 or 604) of the physical uplink shared channel following specific time slot 502 (e.g., UL time slot 504) based on the first demodulation reference signal for uplink transmission via user equipment (e.g., UE 114) of the physical uplink shared channel, both specific time slot 502 and subsequent time slot (e.g., UL time slot 504).
[0047] To provide additional context for the various embodiments described herein, Figure 9 The following discussion is intended to provide a brief, general description of a suitable computing environment 900 in which the various embodiments described herein can be implemented. Although the embodiments have been described above in the general context of computer-executable instructions that can run on one or more computers, those skilled in the art will recognize that the embodiments can also be implemented in combination with other program modules and / or implemented as a combination of hardware and software.
[0048] Generally, a program module includes routines, programs, components, data structures, etc., that perform specific tasks or implement specific abstract data types. Furthermore, those skilled in the art will understand that various methods can be practiced with other computer system configurations, including single-processor or multi-processor computer systems, microcomputers, mainframe computers, Internet of Things (IoT) devices, distributed computing systems, and personal computers, handheld computing devices, microprocessor-based or programmable consumer electronics, each of which can be operatively coupled to one or more associated devices.
[0049] The embodiments described herein can also be practiced in a distributed computing environment, where certain tasks are performed by remote processing devices linked via a communication network. In a distributed computing environment, program modules can reside on both local and remote memory storage devices.
[0050] Computing devices typically include a variety of media, which can include computer-readable storage media, machine-readable storage media, and / or communication media. These two terms are used herein in ways distinct from each other. A computer-readable storage media or a machine-readable storage media can be any available storage medium accessible by a computer, and includes volatile and non-volatile media, removable and non-removable media. For example, but not limited to, a computer-readable storage media or a machine-readable storage media can be implemented in conjunction with any method or technology for storing information, such as computer-readable or machine-readable instructions, program modules, structured data, or unstructured data.
[0051] Computer-readable storage media can include, but is not limited to, random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CDROM), digital multi-purpose disc (DVD), Blu-ray disc (BD) or other optical disc storage devices, magnetic tape cassettes, magnetic tape, disk storage devices or other magnetic storage devices, solid-state drives or other solid-state storage devices, or other tangible and / or non-transitory media that can be used to store desired information. In this regard, the terms “tangible” or “non-transitory” used herein to refer to storage devices, memories, or computer-readable media should be understood to exclude the transmission of transient signals themselves as a modification, but do not waive the rights to all standard storage devices, memories, or computer-readable media that do not only transmit transient signals themselves.
[0052] A computer-readable storage medium can be accessed by one or more local or remote computing devices, for example via access requests, queries or other data retrieval protocols, for various operations on the information stored in the medium.
[0053] Communication media typically embody computer-readable instructions, data structures, program modules, or other structured or unstructured data in the form of data signals (such as modulated data signals), such as carrier waves or other transmission mechanisms, and include any information delivery or transmission medium. The term "modulated data signal" or signal refers to a signal having one or more characteristics that are set or altered in a manner that encodes information in one or more signals. For example, but not limited to, communication media include wired media (such as wired networks or direct connections) and wireless media (such as acoustic, RF, infrared, and other wireless media).
[0054] Refer again Figure 9An example environment 900 for implementing various embodiments of the aspects described herein includes a computer 902, which includes a processing unit 904, a system memory 906, and a system bus 908. The system bus 908 couples system components, including but not limited to the system memory 906, to the processing unit 904. The processing unit 904 can be any processor from various commercial processors. Dual microprocessors and other multiprocessor architectures can also be employed as the processing unit 904.
[0055] System bus 908 can be any type of bus architecture, which can be further interconnected to memory bus (with or without a memory controller), peripheral bus, and local bus using any bus architecture from various commercial bus architectures. System memory 906 includes ROM 910 and RAM 912. The Basic Input / Output System (BIOS) can be stored in non-volatile memory, such as ROM, erasable programmable read-only memory (EPROM), or EEPROM, and its BIOS contains basic routines that facilitate the transfer of information between components within computer 902, such as during startup. RAM 912 can also include high-speed RAM, such as static RAM for caching data.
[0056] Computer 902 also includes an internal hard disk drive (HDD) 914 (e.g., EIDE, SATA), one or more external storage devices 916 (e.g., floppy disk drive (FDD) 916, memory stick or flash drive reader, memory card reader, etc.), and an optical disc drive 920 (e.g., capable of reading from or writing to discs 922 such as CD-ROM, DVD, BD, etc.). Although the internal HDD 914 is illustrated as being located within computer 902, the internal HDD 914 can also be configured for external use in a suitable chassis (not shown). Additionally, although not shown in environment 900, a solid-state drive (SSD) may be used in addition to or in place of HDD 914. HDD 914, external storage devices 916, and optical disc drive 920 can be connected to system bus 908 via HDD interface 924, external storage interface 926, and optical disc drive interface 928, respectively. The interface 924 for external driver implementation can include at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external driver connectivity technologies are contemplated in the embodiments described herein.
[0057] Drives and their associated computer-readable storage media provide non-volatile storage of data, data structures, computer-executable instructions, etc. For computer 902, drives and storage media accommodate storage of any data in a suitable digital format. Although the above description of computer-readable storage media refers to a corresponding type of storage device, those skilled in the art will understand that other types of computer-readable storage media, whether existing or developed in the future, may also be used in the example operating environment, and further, any such storage medium is capable of containing computer-executable instructions for performing the methods described herein.
[0058] Multiple program modules can be stored in the drive and RAM 912, including the operating system 930, one or more application programs 932, other program modules 934, and program data 936. All or part of the operating system, applications, modules, and / or data can also be cached quickly in RAM 912. The systems and methods described herein can be implemented using a variety of commercially available operating systems or combinations of operating systems.
[0059] Computer 902 may optionally include emulation technology. For example, a hypervisor (not shown) or other intermediary may emulate the hardware environment for operating system 930, and the emulated hardware may optionally be different from that of operating system 930. Figure 9 The hardware is illustrated in the figure. In this embodiment, the operating system 930 can include one of a plurality of virtual machines (VMs) hosted at the computer 902. Furthermore, the operating system 930 can provide a runtime environment, such as the Java Runtime Environment or the .NET Framework, to the application 932. A runtime environment is a consistent execution environment that allows the application 932 to run on any operating system that includes a runtime environment. Similarly, the operating system 930 can support containers, and the application 932 can be in the form of a container, which is a lightweight, standalone, executable software package including, for example, application-specific code, runtime, system tools, system libraries, and settings.
[0060] Furthermore, the computer 902 can enable security modules, such as a Trusted Processing Module (TPM). For example, before loading the next startup component, the TPM is used to start the next startup component at the component hash time and wait for the result to match with a security value. This process can occur at any layer of the computer 902's code execution stack, for example, at the application execution level or at the operating system (OS) kernel level, thus achieving security at any code execution level.
[0061] Users can input commands and information into computer 902 via one or more wired / wireless input devices (e.g., keyboard 938, touchscreen 940, and pointing devices such as mouse 942). Other input devices (not shown) may include microphones, infrared (IR) remote controls, radio frequency (RF) remote controls or other remote controls, joysticks, virtual reality controllers and / or virtual reality headsets, gamepads, styluses, image input devices (e.g., cameras), gesture sensor input devices, visual motion sensor input devices, emotion or face detection devices, biometric input devices (e.g., fingerprint or iris scanners), etc. These and other input devices are typically connected to processing unit 904 via input device interface 944, which can be coupled to system bus 908, but can be connected via other interfaces (e.g., parallel ports, IEEE 1394 serial ports, game ports, USB ports, IR ports, BLUETOOTH® interfaces, etc.).
[0062] Monitor 946 or other types of display devices can also be connected to system bus 908 via an interface (such as video adapter 948). In addition to monitor 946, the computer typically includes other peripheral output devices (not shown), such as speakers, printers, etc.
[0063] Computer 902 is capable of operating in a networked environment using logical connections to one or more remote computers (such as multiple remote computers 950) via wired and / or wireless communications. The multiple remote computers 950 can be workstations, server computers, routers, personal computers, laptops, microprocessor-based entertainment devices, peer-to-peer devices, or other common network nodes, and typically include many or all of the elements described relative to computer 902, although for simplicity, only memory / storage device 952 is illustrated. The depicted logical connections include wired / wireless connections to a local area network (LAN) 954 and / or a larger network (e.g., a wide area network (WAN) 956). Such LAN and WAN network environments are common in offices and corporations and facilitate enterprise-wide computer networks (such as intranets), all of which are capable of connecting to global communication networks, such as the Internet.
[0064] When used in a LAN network environment, computer 902 can be connected to local area network 954 via a wired and / or wireless communication network interface or adapter 958. Adapter 958 facilitates wired or wireless communication to LAN 954, and LAN 954 can also include a wireless access point (AP) disposed thereon for communicating with adapter 958 in wireless mode.
[0065] When used in a WAN network environment, computer 902 may include modem 960 or be connected to a communication server on WAN 956 via other means for establishing communication on WAN 956, such as via the Internet. Modem 960 may be an internal or external, wired or wireless device, and may be connected to system bus 908 via input device interface 944. In a networked environment, program modules depicted relative to computer 902 or parts thereof may be stored in remote memory / storage device 952. It should be understood that the network connection shown is an example, and other methods for establishing communication links between computers can be used.
[0066] When used in a LAN or WAN network environment, computer 902 can access cloud storage systems or other network-based storage systems, in addition to or replacing the external storage device 916 described above. Generally, for example, a connection between computer 902 and the cloud storage system can be established on LAN 954 or WSN 956 via adapter 958 or modem 960, respectively. When computer 902 is connected to an associated cloud storage system, external storage interface 926 can manage the storage provided by the cloud storage system with the help of adapter 958 and / or modem 960, just as it would manage other types of external storage. For example, external storage interface 926 can be configured to provide access to cloud storage sources as if these sources were physically connected to computer 902.
[0067] Computer 902 is capable of communicating with any wirelessly operatively positioned device or entity, such as printers, scanners, desktop and / or portable computers, portable data assistants, communication satellites, any device or location associated with a wirelessly detectable tag (e.g., newsstands, kiosks, store shelves, etc.), and telephones. This can include Wi-Fi and BLUETOOTH® wireless technologies. Therefore, communication can be a predefined structure like a conventional network or simply self-organizing communication between at least two devices.
[0068] Now for reference Figure 10 The diagram illustrates a schematic block diagram of a computing environment 1000 according to this specification. System 1000 includes one or more clients 1002 (e.g., computers, smartphones, tablets, cameras, PDAs). Client 1002 can be hardware and / or software (e.g., threads, processes, computing devices). For example, client(s) 1002 can accommodate (multiple) cookies and / or associated contextual information by employing this specification.
[0069] System 1000 also includes one or more servers 1004. Server 1004 can be hardware or hardware combined with software (e.g., threads, processes, computing devices). For example, server 1004 can accommodate threads performing conversions of media items by employing various aspects of this disclosure. One possible form of communication between client 1002 and server 1004 can be a form of data packets suitable for transmission between two or more computer processes, wherein data packets may include encoded analysis header space and / or input. For example, data packets may include cookies and / or associated context information. System 1000 includes a communication framework 1006 (e.g., a global communication network, such as the Internet), which can be used to facilitate communication between (multiple) clients 1002 and (multiple) servers 1004.
[0070] Communication can be facilitated via wired (including fiber optic) and / or wireless technologies. Client 1002 is operatively connected to one or more client data repositories 1008, which can be used to store information local to client(s) 1002 (e.g., cookies and / or associated context information). Similarly, servers(s) 1004 are operatively connected to one or more server data repositories 1010, which can be used to store information local to server(s).
[0071] In one exemplary implementation, client 1002 can pass an encoded file (e.g., an encoded media item) to server 1004. Server 1004 can store the file, decode the file, or transfer the file to another client 1002. Note that, according to this disclosure, client 1002 can also pass an uncompressed file to server 1004, and server 1004 can compress and / or convert the file. Similarly, server 1004 can encode information and transmit it to one or more clients 1002 via communication framework 1006.
[0072] The aspects described in this disclosure can also be practiced in a distributed computing environment, where certain tasks are performed by remote processing devices linked via a communication network. In a distributed computing environment, program modules can reside on both local and remote memory storage devices.
[0073] The foregoing description includes non-limiting examples of various embodiments. It is certainly not possible to describe every conceivable combination of components or methods for the purpose of describing the disclosed subject matter, and those skilled in the art will recognize that further combinations and arrangements of various embodiments are possible. The disclosed subject matter is intended to cover all such changes, modifications, and variations that fall within the spirit and scope of the appended claims.
[0074] Regarding the various functions performed by the components, devices, circuits, systems, etc., described above, unless otherwise specified, the terminology used to describe such components (including references to "apparatus") is intended to include, as well as, any structure(s)(s) performing the specified functions of the described components (e.g., functional equivalents), even if not structurally equivalent to the disclosed structures. Furthermore, while specific features of the disclosed subject matter may have been disclosed only with respect to one of several implementations, such features may be combined with one or more other features of other implementations, as may be desirable and advantageous for any given or particular application.
[0075] The terms “exemplary” and / or “illustrative” or variations thereof, as may be used herein, are intended to mean as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to such examples. Furthermore, any aspect or design described herein as “exemplary” and / or “illustrative” is not necessarily to be construed as preferred or advantageous over other aspects or designs, nor does it imply the exclusion of equivalent structures and techniques known to those skilled in the art. Moreover, with respect to the use of the terms “include,” “have,” “comprising,” and other similar words in the embellishment or claims, such terms are intended to be inclusive—in a manner similar to the term “comprising” as an open transition word—without excluding any additional or other elements.
[0076] As used herein, the term “or” is intended to mean inclusive “or” rather than exclusive “or.” For example, the phrase “A or B” is intended to include instances of A, B, and both A and B. Additionally, the articles “a” and “an” as used in this application and the appended claims should generally be interpreted as meaning “one or more” unless otherwise specified or clearly indicated from the context in the singular form.
[0077] As used herein, the term "set" does not include an empty set, i.e., a set containing no elements. Therefore, "set" in this disclosure includes one or more elements or entities. Similarly, as used herein, the term "group" refers to a collection of one or more entities.
[0078] The description of embodiments of this disclosure provided herein, including those described in the abstract, is not intended to be exhaustive or to limit the disclosed embodiments to the precise form disclosed. While specific embodiments and examples have been described herein for illustrative purposes, various modifications are possible within the scope of such embodiments and examples, as will be appreciated by those skilled in the art. In this regard, although the subject matter has been described herein in conjunction with various embodiments and corresponding drawings, it should be understood where applicable that other similar embodiments can be used or modifications or additions can be made to the described embodiments to perform the same, similar, alternative, or substitute functions as those disclosed without departing from the disclosed subject matter. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but should be interpreted broadly and comprehensively in accordance with the appended claims.
Claims
1. A system comprising: processor; as well as A memory storing executable instructions that, when executed by the processor, facilitate the execution of operations, including: Determine the first demodulation reference signal for a specific time slot of the physical uplink shared channel; as well as Based on the first demodulation reference signal, a second demodulation reference signal is scheduled for the physical uplink shared channel in the subsequent time slot after the specific time slot, for uplink transmission via the user equipment in both the specific time slot and the subsequent time slot.
2. The system of claim 1, wherein the first demodulation reference signal and the second demodulation reference signal share a common frequency.
3. The system according to claim 1, wherein the first demodulation reference signal and the second demodulation reference signal include a common transmit power.
4. The system of claim 1, wherein the first demodulation reference signal and the second demodulation reference signal include a common antenna.
5. The system of claim 1, wherein the first demodulation reference signal and the second demodulation reference signal include a common time alignment.
6. The system of claim 1, wherein the second demodulation reference signal is used for channel estimation applicable to the specific time slot.
7. The system of claim 1, wherein the second demodulation reference signal comprises sequential first orthogonal frequency division multiplexing symbols of the subsequent time slots.
8. The system of claim 1, wherein the second demodulation reference signal comprises sequential third or fourth orthogonal frequency division multiplexing symbols of the subsequent time slots.
9. The system according to claim 1, wherein the operation further comprises: In response to determining that the gNodeB includes Layer 1 and Layer 2 unit separation, an indication is sent to the Layer 1 receiver that the subsequent time slots can be used for channel estimation for the user equipment.
10. The system of claim 1, wherein the operation further comprises: In response to determining that the gNodeB includes a Layer 1 and Layer 2 unit separation, the Layer 1 and Layer 2 unit separation including a Layer 1 receiver and a Layer 2 receiver, the delay limit of the Layer 2 receiver applicable to the Layer 1 receiver is modified to enable the execution of processing associated with the specific time slot.
11. A non-transitory machine-readable medium, the non-transitory machine-readable medium comprising executable instructions, which, when executed by a processor, facilitate the execution of operations, the operations comprising: Determine the first demodulation reference signal for a specific time slot of the physical uplink shared channel; as well as Based on the first demodulation reference signal, a second demodulation reference signal is scheduled for the physical uplink shared channel in the subsequent time slot after the specific time slot, for uplink transmission via the user equipment in both the specific time slot and the subsequent time slot.
12. The non-transient machine-readable medium of claim 11, wherein the first demodulation reference signal and the second demodulation reference signal share a common frequency.
13. The non-transient machine-readable medium of claim 11, wherein the first demodulation reference signal and the second demodulation reference signal include a common transmit power.
14. The non-transient machine-readable medium of claim 11, wherein the first demodulation reference signal and the second demodulation reference signal include a common antenna.
15. The non-transient machine-readable medium of claim 11, wherein the first demodulation reference signal and the second demodulation reference signal include a common time alignment.
16. The non-transient machine-readable medium of claim 11, wherein the second demodulation reference signal is used for channel estimation applicable to the specific time slot.
17. A method comprising: The network device, including the processor, determines the first demodulation reference signal for a specific time slot of the physical uplink shared channel; as well as Based on the first demodulation reference signal, the network device schedules a second demodulation reference signal for the physical uplink shared channel in a subsequent time slot after the specific time slot, for uplink transmission via the user equipment in both the specific time slot and the subsequent time slot.
18. The method of claim 17, wherein the second demodulation reference signal comprises sequential first orthogonal frequency division multiplexing symbols of the subsequent time slots.
19. The method of claim 17, further comprising: In response to determining that the gNodeB includes Layer 1 and Layer 2 unit separation, the network device sends the subsequent time slot to the Layer 1 receiver, including an indication of the capability used for channel estimation for the user equipment.
20. The method of claim 17, further comprising: In response to determining that the gNodeB includes a Layer 1 and Layer 2 unit separation, the Layer 1 and Layer 2 unit separation including a Layer 1 receiver and a Layer 2 receiver, the network device modifies the latency constraints of the Layer 2 receiver applicable to the Layer 1 receiver for processing associated with the specific time slot.