A low-noise reference current generation circuit with gain calibration function

Abstract

The application discloses a low-noise reference current generation circuit with a gain calibration function, which is suitable for a single-chip high-speed high-precision current steering DAC. The circuit comprises an external reference voltage, an external resistance, an operational amplifier, a suspended current mirror, a bias circuit and a P / N terminal trimming current mirror array. The suspended current mirror is composed of four groups of NMOS / PMOS tube pairs interconnected at the source, and is connected in series between a reference current branch and a DAC bias circuit. A closed loop is formed through multiple operational amplifiers and the suspended current mirror to accurately generate a reference current IREF=VREF / Rset. After being copied by the suspended current mirror, the bias circuit provides bias for two branches of the trimming array respectively, and the current difference value forms a trimming current ICA. The bias current IBIAS is obtained by summing the original branch and IREF. The design eliminates the additional current conversion link in the traditional scheme, and the noise level is close to that of the uncalibrated circuit. Meanwhile, the gain error caused by manufacturing mismatch is accurately compensated, and the calibration accuracy and low noise are double-guaranteed.

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