Double-sided polishing method, double-sided polishing equipment and silicon wafer

Abstract

The invention provides a double-sided polishing method, double-sided polishing equipment and a silicon wafer, and the method comprises the steps: setting parameters, controlling the rotation speed of a bearing disc and the rotation speed of an upper fixed disc and a lower fixed disc, enabling the removal amount of the front surface of the silicon wafer to be greater than the removal amount of the back surface of the silicon wafer, and enabling the sum of the removal amount of the front surface of the silicon wafer and the removal amount of the back surface of the silicon wafer to be a target removal amount. According to the double-sided polishing method, the double-sided polishing equipment and the silicon wafer, the surface particle level of the silicon wafer obtained after polishing can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a double-sided polishing method, double-sided polishing equipment, and silicon wafer. Background Technology

[0002] With the development of the semiconductor industry, higher requirements have been placed on the flatness of silicon wafers. Double-sided polishing is one of the effective methods to achieve both local and global flatness of silicon wafers. Double-sided polishing equipment includes an upper and lower fixed platen. The lower fixed platen comprises an inner pin ring, an outer pin ring, and a carrier plate. The outer pin ring is located outside the inner pin ring, and the carrier plate is positioned between the inner and outer pin rings to support the silicon wafer. During double-sided polishing, the silicon wafer is placed inside the carrier platen. The carrier platen revolves under the influence of the lower fixed platen and rotates on its own axis through the influence of the inner and outer pin rings. Combined with the relative rotation of the upper and lower fixed plates, chemical mechanical polishing is completed, ultimately forming a mirror-finished silicon wafer. However, after polishing with double-sided polishing equipment, the surface particle level of the silicon wafer is relatively poor and needs further improvement. Summary of the Invention

[0003] In order to solve at least one of the technical problems in the prior art, the present disclosure aims to provide a double-sided polishing method, a double-sided polishing device, and a silicon wafer.

[0004] The technical solutions provided in this disclosure are as follows:

[0005] A double-sided polishing method is applied to a double-sided polishing device, the double-sided polishing device including an upper fixed plate for polishing the front side of a silicon wafer and a lower fixed plate for polishing the back side of the silicon wafer. The lower fixed plate is provided with an inner pin ring, an outer pin ring, and a support plate. The outer pin ring is located around the inner pin ring, and the support plate is disposed between the outer pin ring and the inner pin ring. The support plate rotates under the drive of the inner pin ring and the outer pin ring, and revolves around the central axis under the drive of the lower fixed plate. The method includes:

[0006] Determine the preset equipment parameters;

[0007] Using preset equipment parameters, the rotation speed of the carrier disk and the rotation speed of the upper and lower fixed disks are controlled so that the amount of material removed from the front side of the silicon wafer is greater than the amount of material removed from the back side of the silicon wafer, and the sum of the amount of material removed from the front side and the amount of material removed from the back side of the silicon wafer is the target amount of material removed.

[0008] For example, controlling the rotation speed of the carrier disk and the rotation speed of the upper and lower fixed disks according to preset equipment parameters, so that the amount removed from the front side of the silicon wafer is greater than the amount removed from the back side of the silicon wafer, specifically includes:

[0009] The absolute value of the rotation speed of the carrier disk relative to the upper fixed disk is controlled to be greater than the absolute value of the rotation speed of the carrier disk relative to the lower fixed disk, so that the amount of material removed from the front side of the silicon wafer is greater than the amount of material removed from the back side of the silicon wafer.

[0010] For example, the rotation speed of the bearing plate relative to the upper fixed plate is a first relative rotation speed, the rotation speed of the bearing plate relative to the lower fixed plate is a second relative rotation speed, and the absolute value of the ratio of the first relative rotation speed to the second relative rotation speed is greater than 1.5.

[0011] For example, the rotation direction of the bearing plate relative to the upper fixed plate is opposite to the rotation direction of the bearing plate relative to the lower fixed plate.

[0012] For example, the preset device parameters are selected from one of a first setting parameter, a second setting parameter, and a third setting parameter, and the preset device parameters include at least the first relative rotation speed and the second relative rotation speed; wherein,

[0013] In the first set parameters, the first relative rotation speed is -4.69 ± 0.1 revolutions per minute, and the second relative rotation speed is 36.41 ± 0.1 revolutions per minute;

[0014] In the second set parameters, the first relative rotation speed is 15.46 ± 0.1 revolutions per minute, and the second relative rotation speed is -21.94 ± 0.1 revolutions per minute;

[0015] In the third set parameter, the first relative rotation speed is 36.41±0.1 revolutions per minute, and the second relative rotation speed is -4.69±0.1 revolutions per minute.

[0016] For example, in the method, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes: the absolute rotation speed of the bearing disk, and the absolute rotation speed of the bearing disk is less than or equal to 20 revolutions per minute.

[0017] For example, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes the revolution speed of the bearing disk relative to the reference ground, the rotation speed of the upper fixed disk, and the rotation speed of the lower fixed disk; wherein, in the first setting parameter, the revolution speed of the bearing disk relative to the reference ground is 2.689±0.1 revolutions per minute, and the rotation speed is 19.910±0.1 revolutions per minute; the rotation speed of the upper fixed disk is 24.6±0.1 revolutions per minute, and the rotation speed of the lower fixed disk is -16.5±0.1 revolutions per minute;

[0018] In the second set parameters, the revolution speed of the bearing plate relative to the reference ground is 7.464±0.1 revolutions per minute, and the rotation speed is 3.960±0.1 revolutions per minute; the rotation speed of the upper fixed plate is -11.5±0.1 revolutions per minute, and the rotation speed of the lower fixed plate is 25.9±0.1 revolutions per minute.

[0019] In the third set parameters, the revolution speed of the bearing plate relative to the reference ground is 2.689±0.1 revolutions per minute, and the rotation speed is 19.910±0.1 revolutions per minute; the rotation speed of the upper fixed plate is -16.5±0.1 revolutions per minute, and the rotation speed of the lower fixed plate is 24.6±0.1 revolutions per minute.

[0020] For example, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes the rotational speed of the outer pin ring and the rotational speed of the inner pin ring; wherein,

[0021] In the first set parameters, the rotational speed of the outer pin ring is 8.9 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is -19.6 ± 0.1 revolutions per minute;

[0022] In the second set parameter, the rotational speed of the outer pin ring is 6.2 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is 12.0 ± 0.1 revolutions per minute;

[0023] In the third set parameter, the rotational speed of the outer pin ring is 8.9 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is -19.6 ± 0.1 revolutions per minute.

[0024] For example, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes the radius of the outer pin ring relative to the center of the lower fixed plate, the radius of the inner pin ring relative to the center of the lower fixed plate, the radius of the carrier plate, and the distance between the center of the silicon wafer and the center of the carrier plate; wherein, in any one of the first setting parameter, the second setting parameter, and the third setting parameter, the radius of the outer pin ring relative to the center of the lower fixed plate is 1.031±0.1m, the radius of the inner pin ring relative to the center of the lower fixed plate is 0.287±0.1m, the radius of the carrier plate is 0.372±0.1m, and the distance between the center of the silicon wafer and the center of the carrier plate is 0.198±0.1m.

[0025] A double-sided polishing device, comprising:

[0026] Upper mounting plate used for polishing the front side of silicon wafers;

[0027] A lower mounting plate for polishing the back side of a silicon wafer, the lower mounting plate having an inner pin ring, an outer pin ring and a support plate, the outer pin ring being located around the inner pin ring, the support plate being located between the outer pin ring and the inner pin ring, and the support plate rotating under the drive of the inner pin ring and the outer pin ring, and revolving around the sun under the drive of the lower mounting plate;

[0028] A driving device is used to drive the upper fixed plate, the lower fixed plate, the inner pin ring, and the outer pin ring to rotate; and

[0029] A control device, connected to the drive device, is configured to perform the steps of the double-sided polishing method as described above.

[0030] A silicon wafer obtained by polishing using the double-sided polishing method described above, wherein the surface particles of the silicon wafer satisfy the following conditions:

[0031] The mean value of LLS@19nm is less than 25 ea.

[0032] The mean value of LLS@28nm is less than 4.0 ea.

[0033] The mean value of LLS@50nm is less than 3.5 ea.

[0034] The mean value of LLS@80nm is less than 0.3 ea.

[0035] The mean value of LLS@200nm is less than 0.1 ea.

[0036] For example, the surface particles of the silicon wafer satisfy the following conditions:

[0037] The mean value of LLS@19nm is less than 20 ea.

[0038] The mean value of LLS@28nm is less than 3.0 ea.

[0039] The mean value of LLS@50nm is less than 2.0 ea.

[0040] The mean value of LLS@80nm is less than 0.1 ea.

[0041] The mean value of LLS@200nm is less than 0.1 ea.

[0042] The beneficial effects of the embodiments disclosed herein are as follows:

[0043] In the above scheme, when polishing silicon wafers on both sides, the settings (Reice) of the double-sided polishing equipment are optimized. By precisely controlling the rotation speed of the carrier disk relative to the upper and lower fixed disks, asymmetrical polishing conditions are created between the front and back sides of the silicon wafer. Specifically, by setting parameters and precisely controlling process parameters, the absolute value of the rotation speed of the carrier disk relative to the upper fixed disk is greater than the absolute value of its rotation speed relative to the lower fixed disk. This ensures that the chemical mechanical abrasive force acting on the front side of the silicon wafer is greater than that on the back side, thereby achieving a greater removal amount on the front side than on the back side. Under the premise of keeping the total thickness removal amount (target removal amount) of the silicon wafer unchanged, larger surface defects introduced by previous processes (such as cutting, cleaning, etc.) on the front side of the silicon wafer are removed in a targeted manner to improve the surface particle level of the silicon wafer after polishing, providing a substrate with better surface quality for subsequent processes. Furthermore, in the further technical solution disclosed herein, by reducing the rotation speed of the carrier disk and reducing its friction and wear with the pin ring, particulate contaminants in the polishing slurry are reduced from the source, thereby fundamentally improving the level of small-sized particles (19-200nm) on the polished silicon wafer. Attached Figure Description

[0044] Figure 1 This diagram illustrates the structure of a double-sided polishing apparatus in some embodiments of this disclosure.

[0045] Figure 2 This is a top view of the lower plate in some embodiments of this disclosure;

[0046] Figure 3 This table shows the device setting parameters in three test embodiments of the double-sided polishing method disclosed herein;

[0047] Figure 4 This represents one of the LLS test results of a silicon wafer sample obtained using the double-sided polishing method of this disclosure embodiment;

[0048] Figure 5 This represents the second result of LLS testing on a silicon wafer sample obtained using the double-sided polishing method of this disclosure embodiment. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0050] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising,” “including,” or “including,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects.

[0051] Furthermore, throughout this document, unless otherwise defined, the terms “substantially,” “essentially,” “approximately,” and “about” are used to describe and explain small variations. When used with an event or situation, these terms can cover situations where the event or situation occurs precisely or approximately. For example, when used with a numerical value, these terms can include a range of variation of the value less than or equal to 10%, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” can refer to two surfaces arranged along the same plane within a micrometer range, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm.

[0052] Before providing a detailed description of the double-sided polishing method, double-sided polishing equipment, and silicon wafer provided in the embodiments of this disclosure, the following description of the related technologies is provided:

[0053] In related technologies, the processing of silicon wafers involves multiple steps, such as cutting and cleaning. The resulting silicon wafers often have surface defects. Generally, double-sided polishing can eliminate these defects to achieve the required surface flatness. However, even after polishing with double-sided polishing equipment, the particle level on the silicon wafer surface remains poor and requires further improvement.

[0054] The inventors of this disclosure have discovered that one of the reasons for the aforementioned problems is that pre-processing steps (such as cutting and grinding) leave deep defects on the silicon wafer surface, especially on the front side. If the removal amount is equal on both the front and back sides during double-sided polishing, these defects may not be completely eliminated, affecting device performance. Secondly, mechanical friction exists between the carrier pad and the inner and outer pin rings, and the resulting wear particles contaminate the recycled polishing slurry, leading to an excessive number of small-sized (19nm-200nm) particles (LLS, Light Point Defects) on the surface of the polished silicon wafer. Related technologies typically focus on achieving uniform removal or controlling the total thickness. During double-sided polishing, the removal amount is the same on both the front and back sides, and the target removal amount is fixed. Under the premise of a fixed total removal amount, it is impossible to actively and precisely control the ratio of front to back removal amounts to specifically improve front defects while simultaneously considering effective solutions to reduce frictional contamination. This results in the surface flatness of the silicon wafer's front side still failing to meet requirements after double-sided polishing.

[0055] To address the aforementioned issues, this disclosure provides a double-sided polishing method, a double-sided polishing apparatus, and a silicon wafer, which can improve the surface flatness of the polished silicon wafer.

[0056] The double-sided polishing method provided in this disclosure can be applied to double-sided polishing equipment.

[0057] like Figure 1 and Figure 2 As shown, the double-sided polishing equipment may include:

[0058] Upper mounting plate 100 for polishing the front side of silicon wafers;

[0059] A lower mounting plate 200 is used for polishing the back side of a silicon wafer. The lower mounting plate 200 has an inner pin ring 300, an outer pin ring 400, and a carrier 500. The outer pin ring 400 is located around the inner pin ring 300, and the carrier 500 is circular and positioned between the outer pin ring 400 and the inner pin ring 300. The carrier 500 engages with both the inner pin ring 300 and the outer pin ring 400 via gear structures on its outer circumference, thereby rotating under the drive of the inner and outer pin rings and simultaneously revolving around the sun, causing the silicon wafer 600 to complete a complex planetary motion.

[0060] In one embodiment, the outer pin ring 400 is annular, and an internal gear is provided on the inner ring of the annulus; the inner pin ring 300 is circular, and an external gear is provided on the outer periphery of the inner pin ring 300; the outer circumferential surface of the bearing disk has a transmission structure, which includes, for example, a gear structure. The gear structure of the bearing disk meshes with the internal gear on the outer pin ring 400 and the external gear on the inner pin ring 300, respectively. Thus, when the outer pin ring 400 and the inner pin ring 300 rotate, they can drive the bearing disk to rotate.

[0061] The double-sided polishing equipment also includes a driving device, which can refer to a driving assembly that drives the inner pin ring 300 and the outer pin ring 400 to rotate, and a driving assembly that drives the upper fixed plate 100 and the lower fixed plate 200 to rotate relative to each other. Under the combined action of the upper fixed plate 100, the lower fixed plate 200, the inner pin ring 300, and the outer pin ring 400, the double-sided polishing equipment performs material removal processing on the silicon wafer, such as honing, grinding, polishing, or abrasion.

[0062] The double-sided polishing method provided in this disclosure is applied to a double-sided polishing device to optimize the settings (Recipe) of the double-sided polishing device. The double-sided polishing method includes:

[0063] Determine the preset equipment parameters;

[0064] Using the preset equipment parameters, the rotation speed of the carrier disk 500 and the rotation speed of the upper fixed disk 100 and the lower fixed disk 200 are controlled so that the amount of material removed from the front side of the silicon wafer 600 is greater than the amount of material removed from the back side, and the sum of the removal amounts from the front and back sides is a fixed target removal amount (e.g., 8~20 micrometers).

[0065] In the above scheme, when polishing silicon wafers on both sides, the settings (Reice) of the double-sided polishing equipment are optimized. By precisely controlling the rotation speed of the carrier disk relative to the upper and lower fixed disks, asymmetrical polishing conditions are created between the front and back sides of the silicon wafer. Specifically, by setting parameters and precisely controlling process parameters, the absolute value of the rotation speed of the carrier disk relative to the upper fixed disk is greater than the absolute value of its rotation speed relative to the lower fixed disk. This ensures that the chemical mechanical abrasive force acting on the front side of the silicon wafer is greater than that on the back side, thereby achieving a greater removal amount on the front side than on the back side. Under the premise of keeping the total thickness removal amount (target removal amount) of the silicon wafer unchanged, larger surface defects introduced by previous processes (such as cutting, cleaning, etc.) on the front side of the silicon wafer are removed in a targeted manner to improve the surface particle level of the silicon wafer after polishing, providing a substrate with better surface quality for subsequent processes. Furthermore, in the further technical solution disclosed herein, by reducing the rotation speed of the carrier disk and reducing its friction and wear with the pin ring, particulate contaminants in the polishing slurry are reduced from the source, thereby fundamentally improving the level of small-sized particles (19-200nm) on the polished silicon wafer.

[0066] To achieve the above objectives, the key lies in controlling the rotation speed of the bearing plate 500 relative to the upper fixed plate 100 and the lower fixed plate 200.

[0067] In some exemplary embodiments, the absolute value of the rotational speed of the carrier disk 500 relative to the upper fixed disk 100 is controlled to be greater than the absolute value of its rotational speed relative to the lower fixed disk 200. In the above scheme, asymmetric removal of the front and back sides of the silicon wafer is achieved by controlling the difference in rotational speed between the carrier disk 500 and the upper and lower fixed disks. The principle is to change the relative grinding speed between the front and back sides of the silicon wafer and the upper and lower fixed disks, thereby regulating the material removal rate of each side. Specifically, when the absolute value of the rotational speed of the carrier disk 500 relative to the upper fixed disk 100 increases, the relative speed generated by the rotation increases, leading to an increase in the material removal rate of the silicon wafer surface on the side contacted by the fixed disk; conversely, when the absolute value of the rotational speed of the carrier disk 500 relative to the lower fixed disk 200 decreases, the relative speed generated by the rotation decreases on the back side of the silicon wafer, resulting in a decrease in the material removal rate on the back side. Therefore, by active control, the absolute value of the rotation speed of the carrier disk 500 relative to the upper fixed disk 100 can be greater than the absolute value of its rotation speed relative to the lower fixed disk 200, so that the amount of material removed from the front side of the silicon wafer is greater than the amount of material removed from the back side of the silicon wafer.

[0068] Specifically, the rotational speed of the carrier disk 500 relative to the upper fixed disk 100 is defined as the first relative rotational speed, and the rotational speed relative to the lower fixed disk 200 is defined as the second relative rotational speed. The absolute value of the ratio of the first relative rotational speed to the second relative rotational speed is controlled to be greater than 1.5. By setting this threshold, the relative rotational speed of the front side of the silicon wafer is at least 1.5 times that of the back side, to generate a sufficiently large difference in removal rate. If the ratio is too small (e.g., close to 1), the difference in removal rate between the front and back sides of the silicon wafer is not significant, and it cannot effectively ensure that defects on the front side are sufficiently removed.

[0069] In addition, in order to reduce particulate pollution caused by friction, the preset equipment parameters are selected from one of the first setting parameters, the second setting parameters, and the third setting parameters. The preset equipment parameters include at least the absolute rotation speed of the bearing disk, and the absolute rotation speed of the bearing disk 500 is less than or equal to 20 revolutions per minute.

[0070] In the above scheme, in mechanical transmission, the amount of wear is closely related to the relative speed and contact stress between the contacting parts. The absolute rotation speed of the bearing disk 500 directly determines the maximum relative speed between its gears and stationary reference objects such as the equipment frame. When the absolute rotation speed of the bearing disk 500 is high, the number of slippages between the gears on the outer periphery of the bearing disk 500 and the pin ring gear teeth increases sharply per unit time, leading to increased frictional work and accumulated frictional heat, thereby accelerating the wear of the polymer bearing disk and pin ring and generating more wear debris. In other words, the bearing disk 500 and the pin ring generate wear particles (wear debris) due to high-speed relative motion. By limiting the absolute rotation speed of the bearing disk 500 to a low level of ≤ 20 rpm, the intensity of the wear source is directly and effectively reduced. This is equivalent to greatly reducing the contact frequency and intensity of the friction pair per unit time, thereby proportionally reducing the amount of wear debris generated, significantly reducing particulate contaminants in the polishing slurry, and sharply reducing scratches and particle adhesion on the silicon wafer surface after polishing. This directly led to a significant decrease in the detection values ​​of small-sized particles (LLS@19nm -LLS@200nm).

[0071] also, Figure 3 The table shown provides three specific sets of setting parameter embodiments to clearly illustrate how to implement the present invention. The preset device parameters can be selected from one of the first setting parameter (Recipe 1), the second setting parameter (Recipe 2), and the third setting parameter (Recipe 3). Referring to the figures, in some exemplary embodiments, the rotation direction of the carrier disk relative to the upper fixed disk is opposite to the rotation direction of the carrier disk relative to the lower fixed disk. It should be noted that in this application, a negative relative rotation speed indicates that the carrier disk and the fixed disk rotate in opposite directions; a positive relative rotation speed indicates that the carrier disk and the fixed disk rotate in the same direction.

[0072] The preset device parameters include at least the first relative rotation speed and the second relative rotation speed; wherein...

[0073] In the first setting parameter (Recipe1), the first relative rotation speed is -4.69±0.1 revolutions per minute, and the second relative rotation speed is 36.41±0.1 revolutions per minute;

[0074] In the second setting parameter (Recipe2), the first relative rotation speed is 15.46 ± 0.1 revolutions per minute, and the second relative rotation speed is -21.94 ± 0.1 revolutions per minute;

[0075] In the third setting parameter (Reicpe3), the first relative rotation speed is 36.41±0.1 revolutions per minute, and the second relative rotation speed is -4.69±0.1 revolutions per minute.

[0076] Furthermore, any one of the first setting parameter, the second setting parameter, and the third setting parameter also includes the revolution speed of the bearing disk relative to the reference ground, the rotation speed of the upper fixed disk, and the rotation speed of the lower fixed disk; wherein, in the first setting parameter (Recipe1), the revolution speed of the bearing disk relative to the reference ground is 2.689±0.1 revolutions per minute, and the rotation speed is 19.910±0.1 revolutions per minute; the rotation speed of the upper fixed disk is 24.6±0.1 revolutions per minute, and the rotation speed of the lower fixed disk is -16.5±0.1 revolutions per minute;

[0077] In the second set parameter (Recipe2), the revolution speed of the bearing disk relative to the reference ground is 7.464±0.1 revolutions per minute, and the rotation speed is 3.960±0.1 revolutions per minute; the rotation speed of the upper fixed disk is -11.5±0.1 revolutions per minute, and the rotation speed of the lower fixed disk is 25.9±0.1 revolutions per minute.

[0078] In the third setting parameter (Recipe3), the revolution speed of the bearing disk relative to the reference ground is 2.689±0.1 revolutions per minute, and the rotation speed is 19.910±0.1 revolutions per minute; the rotation speed of the upper fixed disk is -16.5±0.1 revolutions per minute, and the rotation speed of the lower fixed disk is 24.6±0.1 revolutions per minute.

[0079] For example, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes the rotational speed of the outer pin ring and the rotational speed of the inner pin ring; wherein,

[0080] In the first set parameters, the rotational speed of the outer pin ring is 8.9 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is -19.6 ± 0.1 revolutions per minute;

[0081] In the second setting parameter (Recipe2), the rotational speed of the outer pin ring is 6.2 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is 12.0 ± 0.1 revolutions per minute;

[0082] In the third setting parameter (Recipe3), the rotational speed of the outer pin ring is 8.9 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is -19.6 ± 0.1 revolutions per minute.

[0083] For example, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes the radius of the outer pin ring relative to the center of the lower fixed plate, the radius of the inner pin ring relative to the center of the lower fixed plate, the radius of the carrier plate, and the distance between the center of the silicon wafer and the center of the carrier plate; wherein, in any one of the first setting parameter, the second setting parameter, and the third setting parameter, the radius of the outer pin ring relative to the center of the lower fixed plate is 1.031±0.1m, the radius of the inner pin ring relative to the center of the lower fixed plate is 0.287±0.1m, the radius of the carrier plate is 0.372±0.1m, and the distance between the center of the silicon wafer and the center of the carrier plate is 0.198±0.1m.

[0084] In the above embodiments, a systematic parameter design method is used to achieve asymmetrical grinding conditions on the front and back sides of the silicon wafer, and to reduce the rotational speed of the carrier 500. Specifically, based on the planetary gear transmission principle, the revolution and rotation of the carrier 500 are jointly determined by the rotational speeds of the upper fixed plate 100, lower fixed plate 200, inner pin ring 300, and outer pin ring 400. The relationship between these components can be accurately calculated using a known kinematic model. The input parameters of this model include the set rotational speeds of the upper fixed plate 100, lower fixed plate 200, inner pin ring 300, and outer pin ring 400, as well as key geometric dimensions such as the radius of the carrier 500, the radius of the inner pin ring 300, and the radius of the outer pin ring 400.

[0085] Based on the optimization of the above-mentioned setting parameters, the following two conditions can be met simultaneously: First, the rotational speed of the carrier disk 500 relative to the upper fixed disk 100 (first relative rotational speed) and the rotational speed relative to the lower fixed disk 200 (second relative rotational speed) are calculated, and the ratio of their absolute values ​​is ensured to be greater than 1.5, achieving the goal of removing more material from the front side of the silicon wafer than from the back side. Second, it is ensured that the sum of the total removal amount from the front and back sides of the silicon wafer meets the preset target removal amount under this rotational speed combination. Furthermore, under the premise of meeting the above removal target, the parameter design of the present invention further incorporates considerations of friction and wear. By selecting and optimizing the rotational speed combination, the absolute rotational speed of the carrier disk 500 itself can be controlled at a low level (e.g., preferably ≤ 20 rpm). Therefore, through the optimization of the above-mentioned setting parameters, the relative sliding speed between the carrier disk 500 and the inner and outer pin rings is reduced, the generation of wear particles is reduced, and the abnormal risk caused by foreign matter falling off and contaminating the polishing slurry is effectively reduced.

[0086] It should be understood that, Figure 3 Table 1 is only an example of setting parameters; the specific values ​​of each parameter in the settings are not limited to this.

[0087] Furthermore, to verify the effect of the double-sided polishing method provided in this disclosure on improving the surface quality of silicon wafers, comparative tests were conducted. The method parameters of this invention (see Table 1, i.e., the parameters of this invention) were used. Figure 3 Three embodiments of the present invention were used as the test group, and three embodiments using existing technical parameters were used as the control group.

[0088] Light line scattering (LLS) testing was performed on silicon wafers obtained from both the test and control groups to assess the level of surface particulate matter. LLS stands for "Light Line Scatter," a commonly used method for surface defect detection to evaluate the particulate matter level on silicon wafer surfaces.

[0089] The LLS test results are as follows: Figure 4 and Figure 5 As shown, at all critical size nodes (19nm, 28nm, 50nm, 80nm, 200nm), the particle quality of the test group was significantly better than that of the control group. Figure 4 The percentage comparison chart clearly shows that, compared with the control group (100%), the percentage of particles in the test group is mostly far below 100%, especially in Example 3 (Recipe 3), where the number of particles of various sizes is reduced to 40%-60% of the control group level, proving that the method of the present invention can effectively reduce surface particle density.

[0090] Furthermore, comparing Test Example 1 and Test Example 2, it can be seen that although both achieved a greater removal amount on the front side than on the back side (the absolute value of the ratio of the first relative rotation speed to the second relative rotation speed > 1.5), Example 2, by reducing the rotation speed of the carrier disk 500 to 3.96 rpm, can significantly reduce particulate contamination in key indicators such as LLS@19nm and LLS@200nm, fully verifying the importance of controlling the absolute rotation speed of the carrier disk 500 to ≤ 20 rpm for reducing particulate contamination in this disclosure.

[0091] Furthermore, Test Example 3, while maintaining a high spin ratio (controlling the absolute value of the ratio of the first relative spin speed to the second relative spin speed to be 7.76) to ensure sufficient removal of front-side defects, achieved a high surface cleanliness through optimized rotation speed combinations. Its LLS@19nm < 20 ea, and the particle level of LLS@80nm and above achieved an average LLS value < 0.1 ea. Specifically, using the parameters set in Test Example 1, the front side of the obtained silicon wafer sample was tested for LLS. The test results were: average LLS@19nm > 30.0 ea, average LLS@28nm > 4.5 ea, average LLS@30nm > 4.5 ea, average LLS@40nm > 4.5 ea, average LLS@50nm > 3.5 ea, average LLS@80nm < or equal to 0.3 ea, average LLS@200nm > 0.2 ea, and average LLS@500nm < or equal to 0 ea.

[0092] Using the parameters set in Example 2 of the test embodiment, the front side of the obtained silicon wafer sample was subjected to LLS testing. The test results were as follows: LLS@19nm average value less than 25ea, LLS@28nm average value greater than 4.0ea, LLS@30nm average value greater than 4.5ea, LLS@40nm average value greater than 4.5ea, LLS@50nm average value greater than 3.5ea, LLS@80nm average value greater than 0.3ea, LLS@200nm average value less than 0.1ea, and LLS@500nm average value less than 0.1ea.

[0093] Using the parameters set in Example 3 of the test embodiment, the front side of the obtained silicon wafer sample was subjected to LLS testing. The test results were as follows: LLS@19nm average value less than 20ea, LLS@28nm average value greater than 3ea, LLS@30nm average value less than 3ea, LLS@40nm average value less than 3ea, LLS@50nm average value less than 2ea, LLS@80nm average value less than 0.1ea, LLS@200nm average value less than 0.1ea, and LLS@500nm average value less than 0.1ea.

[0094] The above test results fully demonstrate that the double-sided polishing method provided in this embodiment can effectively reduce mechanical wear by optimizing the rotational speed combination of the upper fixed plate, lower fixed plate, inner pin ring, and outer pin ring, thereby significantly improving the surface particle size level of silicon wafers, especially for small particles of 19-200nm.

[0095] Here, LLS@19nm means that in the particle results of the test sample, the average value of LLS@19nm is less than 25ea, which means that within the 19-nanometer size range, the average light scattering is less than 25 units. In other words, the average light scattering is less than 25 units. The particle levels of LLS@28nm, LLS@50nm, LLS@80nm, LLS@200nm, and LLS@500nm follow the same pattern and will not be elaborated further.

[0096] In addition, such as Figure 1 and Figure 2 As shown in the illustration, this disclosure also provides a double-sided polishing apparatus, comprising:

[0097] Upper mounting plate 100 for polishing the front side of silicon wafers;

[0098] A lower mounting plate 200 for polishing the back side of a silicon wafer is provided with an inner pin ring 300, an outer pin ring 400 and a support plate 500. The outer pin ring 400 is located around the inner pin ring 300. The support plate 500 is located between the outer pin ring 400 and the inner pin ring 300. The support plate 500 rotates under the drive of the inner pin ring 300 and the outer pin ring 400 and revolves around the sun under the drive of the lower mounting plate 200.

[0099] A driving device (not shown in the figure) is used to drive the upper fixed plate 100, the lower fixed plate 200, the inner pin ring 300, and the outer pin ring 400 to rotate; and

[0100] A control device (not shown in the figure) is connected to the drive device, and the control device is used to implement the steps of the double-sided polishing method as described above.

[0101] Other essential components of the double-sided polishing equipment are those that should be understood by those skilled in the art, and will not be described in detail here, nor should they be construed as limiting this disclosure. Since the principle by which this double-sided polishing equipment solves the problem is similar to that of the double-sided polishing method described above, the embodiments of the double-sided polishing equipment provided in this disclosure can be referred to the embodiments of the double-sided polishing method provided in this disclosure, and will not be described in detail here.

[0102] Furthermore, this disclosure also provides a control device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor is configured to execute the computer program to implement the steps of the wafer pulling and drying method of this disclosure.

[0103] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0104] The memory can be an internal storage unit of the control device, such as a hard drive or RAM. Alternatively, it can be an external storage device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory can include both internal and external storage units. The memory is used to store the computer program and other programs and data required by the control device. It can also be used to temporarily store data that has been output or will be output.

[0105] Furthermore, this disclosure also provides a silicon wafer obtained by polishing using the double-sided polishing method of this disclosure. Since the silicon wafer in this embodiment is obtained by polishing using any of the above-mentioned silicon wafer polishing methods, at least all of the above-mentioned technical effects can be achieved.

[0106] Specifically, the surface particles of the silicon wafer satisfy the following conditions:

[0107] The mean value of LLS@19nm is less than 25 ea.

[0108] The mean value of LLS@28nm is less than 4.0 ea.

[0109] The mean value of LLS@50nm is less than 3.5 ea.

[0110] The mean value of LLS@80nm is less than 0.3 ea.

[0111] The mean value of LLS@200nm is less than 0.1 ea.

[0112] For example, the surface particles of the silicon wafer satisfy the following conditions:

[0113] The mean value of LLS@19nm is less than 20 ea.

[0114] The mean value of LLS@28nm is less than 3.0 ea.

[0115] The mean value of LLS@50nm is less than 2.0 ea.

[0116] The mean value of LLS@80nm is less than 0.1 ea.

[0117] The mean value of LLS@200nm is less than 0.1 ea.

[0118] Specifically, using the parameters set in Example 1 of the test embodiment, the front side of the obtained silicon wafer sample was subjected to LLS testing. The test results were as follows: the average value of LLS@19nm was greater than 30.0ea, the average value of LLS@28nm was greater than 4.5ea, the average value of LLS@30nm was greater than 4.5ea, the average value of LLS@40nm was greater than 4.5ea, the average value of LLS@50nm was greater than 3.5ea, the average value of LLS@80nm was less than or equal to 0.3ea, the average value of LLS@200nm was greater than 0.2ea, and the average value of LLS@500nm was less than or equal to 0ea.

[0119] Using the parameters set in Example 2 of the test embodiment, the front side of the obtained silicon wafer sample was subjected to LLS testing. The test results were as follows: LLS@19nm average value less than 25ea, LLS@28nm average value greater than 4.0ea, LLS@30nm average value greater than 4.5ea, LLS@40nm average value greater than 4.5ea, LLS@50nm average value greater than 3.5ea, LLS@80nm average value greater than 0.3ea, LLS@200nm average value less than 0.1ea, and LLS@500nm average value less than 0.1ea.

[0120] Using the parameters set in Example 3 of the test embodiment, the front side of the obtained silicon wafer sample was subjected to LLS testing. The test results were as follows: LLS@19nm average value less than 20ea, LLS@28nm average value greater than 3ea, LLS@30nm average value less than 3ea, LLS@40nm average value less than 3ea, LLS@50nm average value less than 2ea, LLS@80nm average value less than 0.1ea, LLS@200nm average value less than 0.1ea, and LLS@500nm average value less than 0.1ea.

[0121] The following points need to be explained:

[0122] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0123] (2) For clarity, the thickness of layers or regions is enlarged or reduced in the drawings used to describe embodiments of the present disclosure, i.e., these drawings are not drawn to scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being “above” or “below” another element, the element may be “directly” located “above” or “below” the other element or there may be intermediate elements.

[0124] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0125] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure shall be determined by the scope of the claims.

Claims

1. A double-side polishing method characterized by, An application is made in a double-sided polishing equipment, the double-sided polishing equipment including an upper fixed plate for polishing the front side of a silicon wafer and a lower fixed plate for polishing the back side of the silicon wafer. The lower fixed plate is provided with an inner pin ring, an outer pin ring, and a support plate. The outer pin ring is located around the inner pin ring, and the support plate is disposed between the outer pin ring and the inner pin ring. The support plate rotates under the drive of the inner pin ring and the outer pin ring, and revolves around the sun under the drive of the lower fixed plate. The method includes: Determine the preset equipment parameters; Using the preset equipment parameters, the rotation speed of the carrier disk and the rotation speed of the upper and lower fixed disks are controlled so that the amount of material removed from the front side of the silicon wafer is greater than the amount of material removed from the back side of the silicon wafer, and the sum of the amount of material removed from the front side and the amount of material removed from the back side of the silicon wafer is the target amount of material removed.

2. The double-side polishing method according to claim 1, wherein The step of controlling the rotation speed of the carrier disk and the rotation speed of the upper and lower fixed disks according to the preset equipment parameters, so that the amount of material removed from the front side of the silicon wafer is greater than the amount of material removed from the back side of the silicon wafer, specifically includes: The absolute value of the rotation speed of the carrier disk relative to the upper fixed disk is controlled to be greater than the absolute value of the rotation speed of the carrier disk relative to the lower fixed disk, so that the amount of material removed from the front side of the silicon wafer is greater than the amount of material removed from the back side of the silicon wafer.

3. The double-sided polishing method according to claim 2, characterized in that, The rotational speed of the bearing plate relative to the upper fixed plate is a first relative rotational speed, and the rotational speed of the bearing plate relative to the lower fixed plate is a second relative rotational speed, and the absolute value of the ratio of the first relative rotational speed to the second relative rotational speed is greater than 1.

5.

4. The double-sided polishing method according to claim 3, characterized in that, The direction of rotation of the bearing plate relative to the upper fixed plate is opposite to the direction of rotation of the bearing plate relative to the lower fixed plate.

5. The double-sided polishing method according to claim 4, characterized in that, In the method, the preset device parameters are selected from one of a first set parameter, a second set parameter, and a third set parameter, and the preset device parameters include at least the first relative rotation speed and the second relative rotation speed, wherein... In the first set parameters, the first relative rotation speed is -4.69 ± 0.1 revolutions per minute, and the second relative rotation speed is 36.41 ± 0.1 revolutions per minute; In the second set parameters, the first relative rotation speed is 15.46 ± 0.1 revolutions per minute, and the second relative rotation speed is -21.94 ± 0.1 revolutions per minute; In the third set parameter, the first relative rotation speed is 36.41±0.1 revolutions per minute, and the second relative rotation speed is -4.69±0.1 revolutions per minute.

6. The double-sided polishing method according to claim 5, characterized in that, In the method, any one of the first setting parameter, the second setting parameter, and the third setting parameter further includes the absolute rotation speed of the bearing disk, and the absolute rotation speed of the bearing disk is less than or equal to 20 revolutions per minute.

7. The double-sided polishing method according to claim 6, characterized in that, Each of the first setting parameter, the second setting parameter, and the third setting parameter further includes the revolution speed of the bearing disk relative to the reference ground, the rotation speed of the upper fixed disk, and the rotation speed of the lower fixed disk; wherein, in the first setting parameter, the revolution speed of the bearing disk relative to the reference ground is 2.689±0.1 revolutions per minute, and the rotation speed is 19.910±0.1 revolutions per minute; the rotation speed of the upper fixed disk is 24.6±0.1 revolutions per minute, and the rotation speed of the lower fixed disk is -16.5±0.1 revolutions per minute; In the second set parameters, the revolution speed of the bearing plate relative to the reference ground is 7.464±0.1 revolutions per minute, and the rotation speed is 3.960±0.1 revolutions per minute; the rotation speed of the upper fixed plate is -11.5±0.1 revolutions per minute, and the rotation speed of the lower fixed plate is 25.9±0.1 revolutions per minute. In the third set parameters, the revolution speed of the bearing plate relative to the reference ground is 2.689±0.1 revolutions per minute, and the rotation speed is 19.910±0.1 revolutions per minute; the rotation speed of the upper fixed plate is -16.5±0.1 revolutions per minute, and the rotation speed of the lower fixed plate is 24.6±0.1 revolutions per minute.

8. The double-sided polishing method according to claim 7, characterized in that, Each of the first setting parameter, the second setting parameter, and the third setting parameter further includes the rotational speed of the outer pin ring and the rotational speed of the inner pin ring; wherein, In the first set parameters, the rotational speed of the outer pin ring is 8.9 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is -19.6 ± 0.1 revolutions per minute; In the second set parameter, the rotational speed of the outer pin ring is 6.2 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is 12.0 ± 0.1 revolutions per minute; In the third set parameter, the rotational speed of the outer pin ring is 8.9 ± 0.1 revolutions per minute, and the rotational speed of the inner pin ring is -19.6 ± 0.1 revolutions per minute.

9. The double-sided polishing method according to claim 8, characterized in that, Each of the first setting parameter, the second setting parameter, and the third setting parameter further includes the radius of the outer pin ring relative to the center of the lower fixed plate, the radius of the inner pin ring relative to the center of the lower fixed plate, the radius of the carrier plate, and the distance between the center of the silicon wafer and the center of the carrier plate; wherein, in any of the first setting parameter, the second setting parameter, and the third setting parameter, the radius of the outer pin ring relative to the center of the lower fixed plate is 1.031±0.1m, the radius of the inner pin ring relative to the center of the lower fixed plate is 0.287±0.1m, the radius of the carrier plate is 0.372±0.1m, and the distance between the center of the silicon wafer and the center of the carrier plate is 0.198±0.1m.

10. A double-sided polishing device, characterized in that, include: Upper mounting plate used for polishing the front side of silicon wafers; A lower mounting plate for polishing the back side of a silicon wafer, the lower mounting plate having an inner pin ring, an outer pin ring and a support plate, the outer pin ring being located around the inner pin ring, the support plate being located between the outer pin ring and the inner pin ring, and the support plate rotating under the drive of the inner pin ring and the outer pin ring, and revolving around the sun under the drive of the lower mounting plate; A driving device is used to drive the upper fixed plate, the lower fixed plate, the inner pin ring, and the outer pin ring to rotate; and A control device, connected to the drive device, is configured to perform the steps of the double-sided polishing method as described in any one of claims 1 to 9.

11. A silicon wafer obtained by polishing using the double-sided polishing method as described in any one of claims 1 to 9, characterized in that, The surface particles of the silicon wafer satisfy the following conditions: The mean value of LLS@19nm is less than 25 ea. The mean value of LLS@28nm is less than 4.0 ea. The mean value of LLS@50nm is less than 3.5 ea. The mean value of LLS@80nm is less than 0.3 ea, and the mean value of LLS@200nm is less than 0.1 ea.

12. The silicon wafer according to claim 11, characterized in that, The surface particles of the silicon wafer satisfy the following conditions: The mean value of LLS@19nm is less than 20 ea. The mean value of LLS@28nm is less than 3.0 ea. The mean value of LLS@50nm is less than 2.0 ea. The mean value of LLS@80nm is less than 0.1 ea. The mean value of LLS@200nm is less than 0.1 ea.

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