Multi-channel burst signal interleaving demodulation device realized based on FPGA (Field Programmable Gate Array)

Abstract

The invention relates to a multi-channel burst signal interleaving demodulation device realized based on an FPGA (Field Programmable Gate Array), and belongs to the field of communication reconnaissance. The system comprises a signal acquisition interface module, a broadband digital down-conversion module, a multi-channel narrowband digital channelization module, a narrowband data delay module, a multi-channel data interleaving unique word correlation module, a multi-channel data interleaving correlation peak extraction module, a burst signal polling output module, a burst signal timing estimation module and a burst signal timing module. A burst signal coarse frequency offset compensation / coarse phase compensation module; and a burst signal fine frequency offset compensation / fine phase compensation module 11. According to the invention, multipath digital channelization and multipath burst signal detection demodulation are carried out by adopting an interleaving processing mode, so that the processing capability is improved, and processing resources are saved. The device is characterized in that a multi-channel burst signal demodulation function is completed by utilizing caching and serial interleaving processing.

Description

Technical Field

[0001] This invention belongs to the field of communication technology and relates to a multi-channel burst signal interleaving and demodulation device based on FPGA. Background Technology

[0002] Current satellite communication systems have a wide range of applications, providing voice, SMS, telegraph, and data services; suitable for both civilian and military communications; and applicable to both domestic and international communications. Satellite communication has become an important development direction for communication services. In the field of satellite communication, some satellite systems use FDMA and TDMA as multiple access methods for user segment access. Channel resources consist of frequency channels and time slots. To accommodate more users and greater traffic volume, frequency channel resources are often allocated to hundreds of channels with diverse signal specifications, posing challenges to full-band signal control.

[0003] Existing multi-channel burst signal demodulation devices mainly use multiple hardware resources to complete the demodulation of burst signals within the frequency channel in parallel, so as to achieve the purpose of full-band control. However, they have problems such as complex processing flow, low utilization of processing resources, and high hardware cost. Summary of the Invention

[0004] This invention aims to solve the aforementioned problems in reality, innovate in the direction of signal reception and processing, and provide a multi-channel burst signal interleaving and demodulation device based on FPGA.

[0005] To solve the technical problem, the technical solution adopted by this invention is as follows: A multi-channel burst signal interleaving and demodulation device based on FPGA includes a signal acquisition interface module 1, a broadband digital down-conversion module 2, a narrowband data delay module 4, a burst signal timing estimation module 8, and a burst signal timing module 9. It also includes a multi-channel narrowband digital channelization module 3, a multi-channel data interleaving unique word correlation module 5, a multi-channel data interleaving correlation peak extraction module 6, a burst signal polling output module 7, a burst signal coarse frequency offset compensation / coarse phase compensation module 10, a burst signal fine frequency offset compensation / fine phase compensation module 11; Signal acquisition interface module 1 is used to receive intermediate frequency sampling data and send it to broadband digital downconversion module 2; The broadband digital lower sideband module 2 is used to receive one sampling intermediate frequency signal sent by the signal acquisition interface module 1, and is used for frequency conversion and filtering decimation processing to obtain data within the bandwidth. The result is then sent to the multi-channel narrowband digital channelization module 3. The multi-channel narrowband digital channelization module 3 is used to perform multi-channel data frequency conversion and filtering extraction processing on the data from the broadband digital downconversion module 2 to obtain multi-channel narrowband data and perform interleaving processing, and send it to the multi-channel data interleaving unique word correlation module 5 and narrowband data delay module 4. Narrowband data delay module 4 is used to receive multiple narrowband data from multiple narrowband digital channelization module 3, complete narrowband data delay, and send the delayed data to burst signal polling output module 7; The multi-channel data interleaving unique word correlation module 5 is used to receive multi-channel narrowband interleaved data from the multi-channel narrowband digital channelization module 3, complete the unique word correlation processing of the multi-channel narrowband signals, calculate the correlation value and signal energy value, and send them to the multi-channel data interleaving correlation peak extraction module 6; The multi-channel data interleaving correlation peak extraction module 6 is used to receive the correlation value and energy value of the multi-channel data interleaving unique word correlation module 5, complete the correlation peak detection, generate a burst signal detection flag, and send it to the burst signal polling output module 7; The burst signal polling output module 7 is used to receive the burst signal detection flag from the multi-channel data interleaving correlation peak extraction module 6 and the delayed narrowband data from the narrowband data delay module 4, complete the extraction, framing and buffering of burst signals, and send the burst signals serially into the burst signal timing estimation module 8 according to the frame structure. The burst signal timing estimation module 8 is used to receive the burst signal from the burst signal polling output module 7, complete the timing estimation of the burst signal, and send the timing estimation value and the burst signal into the burst signal timing module 9. The burst signal timing module 9 is used to receive the timing estimate value and burst signal from the burst signal timing estimation module 8, complete the burst signal timing processing, and send the timing signal to the burst signal coarse frequency compensation / coarse phase compensation module 10. The burst signal coarse frequency compensation / coarse phase compensation module 10 is used to receive the timing signal from the burst signal timing module 9, complete the signal frequency and phase estimation, compensate the signal frequency and phase, and send the compensated signal to the burst signal fine frequency compensation / fine phase compensation module 11. The burst signal fine frequency compensation / fine phase compensation module 11 is used to receive the signal from the burst signal coarse frequency compensation / coarse phase compensation module 10, complete the fine adjustment and tracking of the signal frequency and phase, and finally complete the demodulation of multi-channel burst signals. Furthermore, the multi-channel narrowband digital channelization module 3 includes a parallel mixing processing module 301, a parallel CIC filtering processing module 302, and a serial low-pass filtering module 303. The parallel mixing module 301 receives data from the broadband digital lower sideband module 2, performs multi-channel mixing processing, and sends the multi-channel mixed data to the parallel CIC filtering module 302. The parallel CIC filtering module 302 receives the mixing data from the parallel mixing module 301, performs CIC filtering extraction, and sends the CIC filtered data to the serial low-pass filtering module 303. The serial low-pass filtering module 303 receives the data from the parallel CIC filtering module 302, performs serial interleaving low-pass filtering processing on the multi-channel parallel data, and outputs multiple narrowband digital channelized data to the multi-channel data interleaving unique word correlation module 5.

[0006] Furthermore, the multi-channel data interleaving unique character correlation module 5; The module receives multiple narrowband digital channelized data from the serial low-pass filter module 303, performs correlation processing sequentially with unique words according to the channel number, calculates the correlation value and energy value of each channel, and sends them to the multi-channel data interleaving correlation peak extraction module 6.

[0007] Furthermore, the multi-channel data interleaving correlation peak extraction module 6; The module is used to receive the correlation value and energy value of the unique word correlation module 5 for multi-channel data interleaving, perform correlation peak detection, and send the detection flag to the burst signal polling output module 7.

[0008] Furthermore, the burst signal polling output module 7 includes a burst signal extraction and framing module 701, a burst signal buffering module 702, and a burst signal output module 703; The burst signal extraction and framing module 701 receives the signal detection flag from the multi-channel data interleaving correlation peak extraction module 6 and the delayed data from the narrowband data delay module 4, extracts the burst signal, frames it, and sends it to the burst signal buffer module 702. The burst signal buffer module 702 receives the framed data sent by the burst signal extraction and framing module 701, sends it to the buffer RAM point by point according to the channel number, and outputs the buffer status of each channel to the burst signal output module 703. The burst signal output module 703 receives the buffer status information of each channel from the burst signal buffer module 702, reads the burst signal frame by frame from the buffer RAM according to the status information, and sends it to the burst signal timing estimation module 8.

[0009] Furthermore, the burst signal timing estimation module 8; It is used to receive the burst signal from the burst signal output module 703, perform timing estimation and data buffering, and send the timing estimate and burst signal to the burst signal timing module 9.

[0010] Furthermore, the burst signal timing module 9; The burst signal timing estimation module 8 receives the timing estimate and burst signal from the burst signal timing estimation module 8, performs interpolation and timing processing, and sends the timing-corrected signal to the burst signal coarse frequency compensation / coarse phase compensation module 10.

[0011] Furthermore, a coarse frequency compensation / coarse phase compensation module 10 for burst signals; The burst signal timing module 9 receives the timing signal after timing, performs frequency and phase estimation, compensates the input data, and sends the compensated signal to the burst signal fine frequency compensation / fine phase compensation module 11.

[0012] Furthermore, the aforementioned burst signal fine frequency compensation / fine phase compensation module 11; The signal is received by the coarse frequency compensation / coarse phase compensation module 10 for burst signals. It uses a phase-locked loop to track and compensate for frequency and phase offsets, and outputs the demodulation results.

[0013] Compared with the prior art, the present invention has the following advantages: 1. This invention uses an interleaving process for digital channelization and burst signal detection and demodulation, which reuses multiple computing resources, improves processing capabilities, and saves processing resources.

[0014] 2. This invention realizes real-time demodulation processing of multi-channel burst signals. Attached Figure Description

[0015] Figure 1 The diagram shown is a block diagram illustrating the principle of this invention.

[0016] Figure 2 The diagram shown is a block diagram illustrating the principle of multi-channel narrowband digital channelization.

[0017] Figure 3 The diagram shown is a block diagram illustrating the polling output principle of burst signals. Detailed Implementation

[0018] Reference Figures 1 to 3 The present invention will be further described below.

[0019] Figure 1 The block diagram of the present invention shown below illustrates the following: The present invention includes a signal acquisition interface module 1, a broadband digital down-conversion module 2, a multi-channel narrowband digital channelization module 3, a narrowband data delay module 4, a multi-channel data interleaving unique word correlation module 5, a multi-channel data interleaving correlation peak extraction module 6, a burst signal polling output module 7, a burst signal timing estimation module 8, a burst signal timing module 9, a burst signal coarse frequency offset compensation / coarse phase compensation module 10, and a burst signal fine frequency offset compensation / fine phase compensation module 11. Signal acquisition interface module 1 is used to receive intermediate frequency sampling data and send it to broadband digital downconversion module 2; The broadband digital lower sideband module 2 is used to receive one sampling intermediate frequency signal sent by the signal acquisition interface module 1, and is used for frequency conversion and filtering decimation processing to obtain data within the bandwidth. The result is then sent to the multi-channel narrowband digital channelization module 3. The multi-channel narrowband digital channelization module 3 is used to perform multi-channel data frequency conversion and filtering extraction processing on the data from the broadband digital downconversion module 2 to obtain multi-channel narrowband data and perform interleaving processing, and send it to the multi-channel data interleaving unique word correlation module 5 and narrowband data delay module 4. Narrowband data delay module 4 is used to receive multiple narrowband data from multiple narrowband digital channelization module 3, complete narrowband data delay, and send the delayed data to burst signal polling output module 7; The multi-channel data interleaving unique word correlation module 5 is used to receive multi-channel narrowband interleaved data from the multi-channel narrowband digital channelization module 3, complete the unique word correlation processing of the multi-channel narrowband signals, calculate the correlation value and signal energy value, and send them to the multi-channel data interleaving correlation peak extraction module 6; The multi-channel data interleaving correlation peak extraction module 6 is used to receive the correlation value and energy value of the multi-channel data interleaving unique word correlation module 5, complete the correlation peak detection, generate a burst signal detection flag, and send it to the burst signal polling output module 7; The burst signal polling output module 7 is used to receive the burst signal detection flag from the multi-channel data interleaving correlation peak extraction module 6 and the delayed narrowband data from the narrowband data delay module 4, complete the extraction, framing and buffering of burst signals, and send the burst signals serially into the burst signal timing estimation module 8 according to the frame structure. The burst signal timing estimation module 8 is used to receive the burst signal from the burst signal polling output module 7, complete the timing estimation of the burst signal, and send the timing estimation value and the burst signal into the burst signal timing module 9. The burst signal timing module 9 is used to receive the timing estimate value and burst signal from the burst signal timing estimation module 8, complete the burst signal timing processing, and send the timing signal to the burst signal coarse frequency compensation / coarse phase compensation module 10. The burst signal coarse frequency compensation / coarse phase compensation module 10 is used to receive the timing signal from the burst signal timing module 9, complete the signal frequency and phase estimation, compensate the signal frequency and phase, and send the compensated signal to the burst signal fine frequency compensation / fine phase compensation module 11. The burst signal fine frequency compensation / fine phase compensation module 11 is used to receive the signal from the burst signal coarse frequency compensation / coarse phase compensation module 10, complete the fine adjustment and tracking of the signal frequency and phase, and finally complete the demodulation of multi-channel burst signals. Figure 2The diagram shows the principle block diagram of multi-channel narrowband digital channelization processing. In this invention, the parallel mixing processing module 301 performs multi-channel frequency conversion processing, the parallel CIC filtering processing module performs multi-channel CIC filtering extraction on the parallel data, and the serial low-pass filtering module 303 serially interleaves the multi-channel parallel data and realizes multi-channel serial interleaving low-pass filtering processing.

[0020] Figure 3 The diagram shown is a block diagram of the principle of burst signal polling output. The burst signal polling output module 7 includes a burst signal extraction and framing module 701, a burst signal buffering module 702, and a burst signal output module 703. The burst signal extraction and framing module 701 receives the signal detection flag from the multi-channel data interleaving correlation peak extraction module 6 and the delayed data from the narrowband data delay module 4, extracts the burst signal, frames it, and sends it to the burst signal buffer module 702. The burst signal buffer module 702 receives the framed data sent by the burst signal extraction and framing module 701, sends it to the buffer RAM point by point according to the channel number, and outputs the buffer status of each channel data to the burst signal output module 703. The burst signal output module 703 receives the buffer status information of each channel data from the burst signal buffer module 702, reads the burst signal frame by frame from the buffer RAM according to the status information, and outputs it.

Claims

1. A multi-channel burst signal interleaving and demodulation device based on FPGA, characterized in that, It includes a signal acquisition interface module (1), a broadband digital downconversion module (2), a multi-channel narrowband digital channelization module (3), a narrowband data delay module (4), a multi-channel data interleaving unique word correlation module (5), a multi-channel data interleaving correlation peak extraction module (6), a burst signal polling output module (7), a burst signal timing estimation module (8), a burst signal timing module (9), a burst signal coarse frequency offset compensation / coarse phase compensation module (10), and a burst signal fine frequency offset compensation / fine phase compensation module (11). The signal acquisition interface module (1) is used to receive intermediate frequency sampling data and send it to the broadband digital downconversion module (2). The broadband digital lower sideband module (2) is used to receive the 1-channel sampled intermediate frequency signal sent by the signal acquisition interface module (1), perform frequency conversion and filtering extraction processing, obtain data within the bandwidth, and send the result to the multi-channel narrowband digital channelization module (3). The multi-channel narrowband digital channelization module (3) is used to perform multi-channel data frequency conversion and filtering extraction processing on the data from the broadband digital downconversion module (2) to obtain multi-channel narrowband data and perform interleaving processing, and send it to the multi-channel data interleaving unique word correlation module (5) and narrowband data delay module (4). The narrowband data delay module (4) is used to receive multiple narrowband data from the multiple narrowband digital channelization module (3), complete the narrowband data delay, and send the delayed data to the burst signal polling output module (7). The multi-channel data interleaving unique word correlation module (5) is used to receive multi-channel narrowband interleaved data from the multi-channel narrowband digital channelization module (3), complete the unique word correlation processing of the multi-channel narrowband signals, calculate the correlation value and signal energy value, and send them to the multi-channel data interleaving correlation peak extraction module (6). The multi-channel data interleaving correlation peak extraction module (6) is used to receive the correlation value and energy value of the multi-channel data interleaving unique word correlation module (5), complete the correlation peak detection, generate a burst signal detection flag, and send it to the burst signal polling output module (7). The burst signal polling output module (7) is used to receive the burst signal detection flag from the multi-channel data interleaving correlation peak extraction module (6) and the delayed narrowband data from the narrowband data delay module (4), complete the extraction, framing and buffering of burst signals, and send the burst signals serially into the burst signal timing estimation module (8) according to the frame structure. The burst signal timing estimation module (8) is used to receive the burst signal from the burst signal polling output module (7), complete the timing estimation of the burst signal, and send the timing estimation value and the burst signal into the burst signal timing module (9). The burst signal timing module (9) is used to receive the timing estimate value and burst signal from the burst signal timing estimation module (8), complete the burst signal timing processing, and send the timing signal to the burst signal coarse frequency compensation / coarse phase compensation module (10). The burst signal coarse frequency compensation / coarse phase compensation module (10) is used to receive the timing signal from the burst signal timing module (9), complete the signal frequency and phase estimation, compensate the signal frequency and phase, and send the compensated signal into the burst signal fine frequency compensation / fine phase compensation module (11). The burst signal fine frequency compensation / fine phase compensation module (11) is used to receive the signal from the burst signal coarse frequency compensation / coarse phase compensation module (10), complete the fine adjustment and tracking of the signal frequency and phase, and finally complete the demodulation of the multi-channel burst signal.

2. The multi-channel burst signal interleaving and demodulation device based on FPGA as described in claim 1, characterized in that, The multi-channel narrowband digital channelization module (3) includes a parallel mixing processing module (301), a parallel CIC filtering processing module (302), and a serial low-pass filtering module (303). Among them, the parallel mixing processing module (301) is used to receive data from the broadband digital lower sideband module (2), perform multi-channel mixing processing, and send the multi-channel mixed data to the parallel CIC filtering processing module (302); the parallel CIC filtering processing module (302) is used to receive the mixing data from the parallel mixing processing module (301), perform CIC filtering extraction, and send the CIC filtered data to the serial low-pass filtering module (303); the serial low-pass filtering module (303) is used to receive data from the parallel CIC filtering processing module (302), perform serial interleaving low-pass filtering processing on the multi-channel parallel data, and output the multi-channel narrowband digital channelized data to the multi-channel data interleaving unique word correlation module (5).

3. The multi-channel burst signal interleaving and demodulation device based on FPGA as described in claim 1, characterized in that: The multi-channel data interleaving unique character related module (5); The multi-channel narrowband digital channelized data received by the serial low-pass filter module (303) is sequentially correlated with the unique word according to the channel number, and the correlation value and energy value of each channel are calculated and sent to the multi-channel data interleaving correlation peak extraction module (6).

4. The multi-channel burst signal interleaving and demodulation device based on FPGA as described in claim 1, characterized in that: The burst signal polling output module (7) includes a burst signal extraction and framing module (701), a burst signal buffering module (702), and a burst signal output module (703). The burst signal extraction and framing module (701) is used to receive the signal detection flag of the multi-channel data interleaving correlation peak extraction module (6) and the delayed data of the narrowband data delay module (4), extract the burst signal and frame it and send it to the burst signal buffer module (702); the burst signal buffer module (702) receives the framed data sent by the burst signal extraction and framing module (701), sends it into the buffer RAM point by point according to the channel number, and outputs the buffer status of each channel data to the burst signal output module (703); the burst signal output module (703) receives the buffer status information of each channel data of the burst signal buffer module (702), reads the burst signal from the buffer RAM frame by frame according to the status information, and sends it into the burst signal timing estimation module (8).

5. The multi-channel burst signal interleaving and demodulation device based on FPGA according to claim 1, characterized in that: The aforementioned burst signal timing estimation module (8); Used to receive the burst signal from the burst signal output module (703), perform timing estimation and data buffering, and send the timing estimate and burst signal into the burst signal timing module (9).

6. The multi-channel burst signal interleaving demodulation device based on FPGA according to claim 1, characterized in that: Burst signal timing module (9); The timing estimate and burst signal are received from the burst signal timing estimation module (8), interpolated and timed, and the timed signal is sent to the burst signal coarse frequency compensation / coarse phase compensation module (10).

7. The multi-channel burst signal interleaving demodulation device based on FPGA according to claim 1, characterized in that: The aforementioned burst signal fine frequency compensation / fine phase compensation module (11); The signal is used to receive the signal from the coarse frequency compensation / coarse phase compensation module (10) for burst signals. The phase-locked loop is used to track the frequency offset and phase offset, and compensate for them, and output the demodulation result.

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