Multi-functional configurable satellite-borne high-speed device matching test system
The multifunctional and configurable spaceborne high-speed equipment testing system solves the problems of poor versatility and long development cycles of existing equipment, realizes the adaptability and efficient testing of equipment, and supports low-cost and mass production of satellites.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUNAN SIBEITU TECH CO LTD
- Filing Date
- 2026-03-31
- Publication Date
- 2026-06-16
AI Technical Summary
Existing high-speed satellite-borne testing equipment suffers from poor versatility, long development cycles, high costs, and fixed hardware modules, leading to reduced electromagnetic compatibility and stability. It also makes it impossible to uniformly schedule heterogeneous data, which can easily cause data conflicts and hinders the low-cost, mass production of satellites.
A multi-functional and configurable spaceborne high-speed equipment testing system is adopted, including a system management module, a baseband processing module, a radio frequency module, a low-speed interface module, a high-speed interface module, and a host computer. Data transmission is achieved through VPX backplane connection. Combined with a standardized test scenario template library and unified scheduling by the system management module, parameters are dynamically adjusted to adapt to changes in equipment status.
It improves the versatility and reliability of testing equipment, shortens the preparation cycle for new mission testing, reduces R&D testing costs, avoids data conflicts, ensures real-time response to low-speed commands and adaptability of equipment status, and supports low-cost, mass production of satellites.
Smart Images
Figure CN121940039B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of aerospace technology, and in particular to a multifunctional, configurable, spaceborne high-speed equipment testing system. Background Technology
[0002] With the rapid development of aerospace technology, the mission requirements of various spacecraft are becoming increasingly diversified. Differentiated payloads (such as high-resolution optical cameras and SAR payloads) are driving significant customization in onboard high-speed equipment (onboard solid-state storage, high-speed data transmission equipment, etc.). Hardware architectures need to be designed specifically for these needs, and core parameters such as data transmission protocols (TLK2711 / CAN, etc.), data rates (2Gbps-40Gbps), and radio frequency bands (X / Ku / Ka) vary greatly, placing higher demands on the testing process. Currently, the industry generally adopts a "one-to-one" specialized design model to develop test equipment. This involves matching the target equipment parameters with customized hardware circuits (such as RF filters and interface adapter circuits) and dedicated software (protocol parsing scripts and test procedure code) to complete basic testing.
[0003] However, this model has many drawbacks: the test equipment has extremely poor versatility, and new tasks (such as changes in interface, rate, and frequency band) require redevelopment, resulting in high costs; the development cycle is as long as 2-3 months, which seriously restricts the development progress of onboard equipment; the hardware modules are fixed, and parameter adjustments require hardware modifications, which can easily damage electromagnetic compatibility and stability, reducing test reliability; moreover, the test equipment modules often operate independently, and in the face of heterogeneous scenarios with high-speed and low-speed interface protocols, it is impossible to uniformly schedule heterogeneous data, which can easily lead to conflicts such as high-speed data crowding the bus and low-speed command delays. When the status of onboard equipment changes dynamically (signal fading, increased interference), it is difficult for each module to adjust parameters as needed, resulting in adaptation lag; these problems further exacerbate the defects of low test efficiency and insufficient data accuracy, making it difficult to support the industry trend of low-cost, mass production of satellites. Summary of the Invention
[0004] Therefore, it is necessary to provide a multifunctional and configurable testing system for spaceborne high-speed equipment to address the aforementioned technical problems.
[0005] A multifunctional, configurable, spaceborne high-speed equipment testing system, the system comprising:
[0006] The system includes a system management module, a baseband processing module, a radio frequency module, a low-speed interface module, a high-speed interface module, and a host computer that is communicatively connected to the system management module.
[0007] The baseband processing module, radio frequency module, low-speed interface module, and high-speed interface module are all connected to the system management module via the VPX backplane in the form of plug-in cards. They achieve data transmission with the system management module by relying on the high-bandwidth bus on the VPX backplane, and exchange instructions and status information with the system management module through the network interface.
[0008] The radio frequency module is used to convert the radio frequency signal of the spaceborne high-speed equipment into an intermediate frequency signal and transmit it to the baseband processing module. It is also used to receive the signal gain command and frequency offset adjustment command issued by the system management module, convert the modulation signal output by the baseband processing module into a radio frequency signal that meets the reception requirements of the spaceborne high-speed equipment and send it.
[0009] The baseband processing module is used to demodulate the intermediate frequency signal of the radio frequency module, transmit the demodulation performance parameters to the system management module in real time, and also to receive the demodulation configuration parameters issued by the system management module, modulate the data to generate a modulated signal, and output it to the radio frequency module.
[0010] The transmission channels of the low-speed interface module and the high-speed interface module are physically isolated, and data can be sent and received without conflict through scheduling by the system management module.
[0011] The host computer integrates control software with a built-in standardized test scenario template library, which is used to automatically derive test processes after the user modifies key parameters and send test process instructions to the system management module.
[0012] The system management module is used to receive test process instructions from the host computer, collect demodulation performance parameters output by the baseband processing module in real time, generate adjustment instructions based on the relationship between the demodulation performance parameters and preset thresholds, dynamically adjust the signal gain and frequency offset of the RF module and the demodulation configuration parameters of the baseband processing module, and schedule each module to perform tests according to the test process.
[0013] The aforementioned multi-functional, configurable, spaceborne high-speed equipment testing system, through VPX backplane card connections and a multi-module collaborative architecture, coupled with a standardized test scenario template library built into the host computer, allows users to automatically derive test procedures simply by modifying key parameters. This eliminates the need for custom hardware circuitry and dedicated software, significantly improving the versatility of the testing equipment, shortening the preparation cycle for new mission tests, and reducing R&D testing costs. Through unified scheduling by the system management module, combined with the physical isolation design of high- and low-speed interface transmission channels, heterogeneous data transmission conflicts can be effectively avoided, ensuring real-time response to low-speed command data. Relying on the system management module's real-time acquisition and dynamic adjustment mechanism for demodulation performance parameters, it can adapt to changes in the state of spaceborne equipment, flexibly optimizing the RF module signal gain, frequency offset, and baseband module demodulation configuration parameters without hardware modifications. This invention improves test reliability and data accuracy, strongly supporting the industry trend of low-cost, mass-produced satellite development. Attached Figure Description
[0014] Figure 1 A structural block diagram of a test system for a multifunctional configurable spaceborne high-speed device in one embodiment;
[0015] Figure 2 This is a schematic diagram of the test system software composition in one embodiment;
[0016] Figure 3 This is a schematic diagram of the receiving channel structure of the radio frequency module in one embodiment;
[0017] Figure 4 This is a schematic diagram of the transmit channel structure of the radio frequency module in one embodiment. Detailed Implementation
[0018] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0019] In one embodiment, such as Figure 1 As shown, a multifunctional and configurable test system for spaceborne high-speed equipment is provided, including:
[0020] The system management module, baseband processing module, radio frequency module, low-speed interface module, high-speed interface module, and host computer that communicates with the system management module;
[0021] The baseband processing module, radio frequency module, low-speed interface module, and high-speed interface module are all connected to the system management module via the VPX backplane in the form of plug-in cards. They rely on the high-bandwidth bus on the VPX backplane to realize data transmission with the system management module and realize the interaction of commands and status information with the system management module through the network interface.
[0022] The radio frequency module is used to convert the radio frequency signal of the spaceborne high-speed equipment into an intermediate frequency signal and transmit it to the baseband processing module. It is also used to receive the signal gain command and frequency offset adjustment command issued by the system management module, convert the modulation signal output by the baseband processing module into a radio frequency signal that meets the reception requirements of the spaceborne high-speed equipment and transmit it.
[0023] The baseband processing module is used to demodulate the intermediate frequency signal of the RF module, transmit the demodulation performance parameters to the system management module in real time, and also receive the demodulation configuration parameters issued by the system management module, modulate the data to generate a modulated signal, and output it to the RF module.
[0024] The transmission channels of the low-speed interface module and the high-speed interface module are physically isolated, and data transmission and reception without conflict is achieved through scheduling by the system management module.
[0025] The host computer integrates control software with a built-in standardized test scenario template library, which is used to automatically derive test processes after the user modifies key parameters and send test process instructions to the system management module.
[0026] The system management module is used to receive test process instructions from the host computer, collect demodulation performance parameters output by the baseband processing module in real time, generate adjustment instructions based on the relationship between the demodulation performance parameters and preset thresholds, dynamically adjust the signal gain and frequency offset of the RF module and the demodulation configuration parameters of the baseband processing module, and schedule each module to perform tests according to the test process.
[0027] The aforementioned multifunctional and configurable spaceborne high-speed equipment testing system utilizes VPX backplane card connections and a multi-module collaborative architecture. Coupled with a standardized test scenario template library built into the host computer, users can automatically derive test procedures simply by modifying key parameters, eliminating the need for customized hardware circuits and dedicated software. This significantly improves the versatility of the testing equipment, shortens the preparation cycle for new mission tests, and reduces R&D testing costs. Through unified scheduling by the system management module, combined with the physical isolation design of high- and low-speed interface transmission channels, heterogeneous data transmission conflicts can be effectively avoided, ensuring real-time response to low-speed command data. Relying on the system management module's real-time acquisition and dynamic adjustment mechanism for demodulation performance parameters, it can adapt to changes in the state of spaceborne equipment, flexibly optimizing the RF module signal gain, frequency offset, and baseband module demodulation configuration parameters without hardware modifications. This invention improves test reliability and data accuracy, strongly supporting the industry trend of low-cost, mass-produced satellite development.
[0028] like Figure 1As shown, the system of this invention adopts a generalized and modular design concept. The baseboard uses a VPX backplane, and corresponding functions are combined through plug-in modules, including a system management module, baseband processing module, RF module, low-speed interface module, high-speed interface module, and host computer integrated control software. The system management module serves as the central node, with other modules connected to it in a point-to-point manner. The central node is responsible for managing and controlling the communication of the entire system. The system management module provides configuration and fault detection services to each module; the RF module performs frequency conversion, filtering, and amplification of the received satellite RF signals, inputting and outputting intermediate frequency signals; the baseband processing module is mainly used for signal modulation and demodulation, and for controlling and configuring the low-speed and high-speed interface modules; the host computer integrated control software is used for signal parameter configuration and adjustment, real-time data acquisition, display, storage, and data playback. The entire test system is centered on the system management module. The baseband processing module, low-speed interface module, and high-speed interface module FPGA software achieve data interaction through the PCIe interface and complete command interaction through the network protocol via the Ethernet port. The baseband processing module receives data from the high-speed spaceborne equipment after it has been frequency-converted by the radio frequency module, based on the parameters sent by the host computer integrated control software. The host computer integrated control software then parses the received data and performs functions such as data acquisition, real-time display, storage, and data playback. The baseband processing module modulates and scrambles the data according to the parameters sent by the host computer integrated control software, and then sends it to the high-speed spaceborne equipment after frequency conversion by the radio frequency module.
[0029] In practical applications, the system of the present invention performs testing through the following steps:
[0030] Step 1: Performance testing of spaceborne high-speed equipment. Connect the radio frequency port of the spaceborne high-speed equipment to the test system. Run the host computer on the test system PC and use the integrated control software of the host computer to configure the frequency and signal, and confirm the status before the test.
[0031] Step 2: The baseband processing module receives ADC data according to the parameters issued by the host computer integrated control software. After completing operations such as data demodulation, carrier synchronization, symbol synchronization, frame synchronization, descrambling and decoding, the data is processed by the DMA module and sent to the system management module via PCIe. The host computer receives and parses the data and completes functions such as disk storage, spectrum display, and constellation diagram display.
[0032] Step 3: The baseband processing module modulates and scrambles the data according to the parameters sent by the host computer, and then sends the data out through the DAC.
[0033] Step four: The low-speed interface module sends the corresponding data through the corresponding low-speed interface according to the parameters sent by the host computer; the data received by the receiving interface is processed by the DMA module and then sent to the system management module through PCIe, where the host computer receives, parses, and saves the data.
[0034] Step 5: According to the parameters sent by the host computer, the high-speed interface module puts the data from the host computer into a fixed memory space through the PCIe interface. The high-speed processing FPGA retrieves the data from the memory space through the DMA module of the PCIe interface, parses the network UDP packets with instructions sent through the network port, and sends them to the corresponding high-speed interface module. The interface module performs frame processing on the data according to the protocol requirements of different payloads and then sends it out.
[0035] Step six: The high-speed interface module receives data from different payloads, performs frame de-framing processing on the data according to the protocol requirements of different payloads, processes the data through the DMA module, and then sends it to the system management module through the PCIE interface. The host computer receives, parses, and stores the data.
[0036] It is understood that the system of this invention can simultaneously perform transmission and reception performance tests on spaceborne high-speed equipment; it can simulate the function of a spaceborne computer, realize telemetry polling requests and remote control command transmission for spaceborne high-speed equipment, receive telemetry data returned by the spaceborne equipment itself, and has the function of data interaction between different types of payloads; it can meet the rapidly changing market demands, dynamically adjust to adapt to different mission requirements, and quickly complete the performance testing and verification of spaceborne high-speed equipment without the need to configure more testing equipment, thus shortening the development cycle of spaceborne high-speed products, reducing development costs, and providing a solid foundation for low-cost and mass production of satellites.
[0037] In one specific embodiment, such as Figure 2As shown in the figure, a schematic diagram of the software composition of a test system is provided. The test system software consists of four parts, namely the FPGA software of the baseband processing module, the FPGA software of the low-speed interface module, the FPGA software of the high-speed interface module, and the integrated control software of the upper computer. In addition, the reserved slot can be used for expanding the interface module. Among them, the functions that the FPGA software of the baseband processing module needs to implement include: configuring high-speed modulation and demodulation parameters and reporting status, configuring chip parameters related to the radio frequency module, storing demodulated data, supporting loading baseband files of on-board high-speed devices, etc.; the data processed by the baseband processing module is the data sent down by the on-board high-speed device (to verify the function of the satellite sending data to the ground), or sending local data to the on-board high-speed device (to verify the function of the ground sending data to the satellite); the functions implemented by the baseband processing module and the low-speed / high-speed interface module are independent, and can be controlled by the system control module at the same time for joint testing with the on-board high-speed device. The functions that the FPGA software of the low-speed interface module needs to implement include: the FPGA software of the low-speed interface module mainly implements various low-speed interfaces, such as the data reception and transmission functions of interfaces such as CAN, RS422, RS485, and LVDS. The interaction between this FPGA software and the system management module uses the network port to complete the interaction of instructions and status information, and uses the PCIE interface to complete the interaction of large amounts of data. The functions that the FPGA software of the high-speed interface module needs to implement include: the FPGA software of the high-speed interface module mainly implements various high-speed interfaces, such as the data reception and transmission functions of high-speed interfaces such as TLK2711, CXP, and optical ports. When implementing the sending function of the high-speed interface, the integrated control software of the upper computer reads the data to be sent from the disk array, packs it into a network packet and sends it to the high-speed interface processing module through the PCIE interface. After the FPGA of the high-speed interface processing module receives the data, it processes the data and sends it out through the corresponding high-speed interface (such as TLK2711, CXP, optical port, etc.). When implementing the receiving function of the high-speed interface, the high-speed interface processing module analyzes the received data according to the protocols of different on-board payloads, and sends the processed data to the system management module through the PCIE interface for disk storage processing.
[0038] In one embodiment, the radio frequency module includes a receiving channel and a transmitting channel; the receiving channel includes a low-noise amplification unit, a mixing unit, and an intermediate-frequency AGC functional unit. The low-noise amplification unit amplifies the radio frequency signal output by the on-board high-speed device through a low-noise amplifier, and filters out the clutter of the amplified signal through a filter. The mixing unit provides a local oscillator signal through a phase-locked loop to down-convert the radio frequency signal to the intermediate-frequency band. The intermediate-frequency AGC functional unit controls the power of the intermediate-frequency signal through a voltage-controlled VGA and outputs an intermediate-frequency signal with a constant power to the baseband processing module; the transmitting channel includes a mixing unit and a power amplification unit. The mixing unit up-converts the intermediate-frequency signal of the baseband processing module to the radio frequency band, and the power amplification unit amplifies the radio frequency signal through a pre-driver amplifier and a final-stage amplifier.
[0039] In this embodiment, the radio frequency module includes a receiving channel and a transmitting channel. For example... Figure 3 The diagram shows the receiver channel structure of the RF module. The RF module-receiver channel mainly performs frequency conversion, filtering, and amplification functions on the input signals (such as X, Ku, and Ka bands), and outputs the intermediate frequency (IF) signal to the baseband module. The receiver channel consists of three main functional units: a low-noise amplifier unit, a mixer unit, and an IF AGC (Automatic Frequency Control) unit.
[0040] (1) Low-noise amplifier unit: mainly composed of a low-noise amplifier and a filter. It receives downlink transmission signals from the spaceborne high-speed equipment and amplifies and filters the signals.
[0041] (2) Mixing Unit: Mainly composed of a phase-locked loop, mixer, and filter, it performs down-conversion and filtering. It down-converts the received high-speed downlink transmission signal from the satellite to the intermediate frequency band. At the same time, the local oscillator lock-in indication of the phase-locked loop is sent to the baseband processing module for acquisition and analysis, and then transmitted to the host computer integrated control software running on the system management module for display as needed.
[0042] (3) Intermediate Frequency AGC Functional Unit: The intermediate frequency AGC functional unit mainly consists of a detector, a voltage-controlled VGA, an amplifier, and a filter. It performs power control processing on the received intermediate frequency signal transmitted by the satellite high-speed downlink within the dynamic range, and then sends the intermediate frequency signal with constant power output to the baseband processing module for digital demodulation processing. At the same time, it sends the AGC telemetry data to the baseband processing module for acquisition and analysis processing, and transmits it to the host computer integrated control software running on the system management module for display as needed.
[0043] like Figure 4 The diagram shows the structure of the RF module's transmit channel. The RF module's transmit channel mainly amplifies, filters, and controls the power of the input intermediate frequency signal to ensure the linearity of the output RF signal and control its output power. The transmit channel consists of two main functional units: a mixer unit and a power amplifier unit.
[0044] (1) Mixing unit: mainly composed of phase-locked loop, mixer and filter. It up-converts the intermediate frequency output from the baseband processing module. At the same time, the local oscillator lock-in indication of the phase-locked loop is sent to the baseband processing module for acquisition and analysis, and transmitted to the host computer integrated control software running on the system management module for display as needed.
[0045] (2) Power Amplification Unit: Mainly composed of a detector, temperature sensor, preamplifier, final stage amplifier, and isolator. It amplifies the signal to ensure the output power of the transmitting channel meets system requirements. Simultaneously, the power telemetry from the detector and the temperature telemetry from the temperature sensor are sent to the baseband processing module for acquisition and analysis, and then transmitted to the host computer integrated control software running on the system management module for display as needed.
[0046] In this invention system, the radio frequency (RF) module can be replaced according to different frequency band requirements while keeping the baseband module unchanged. The settings for relevant RF module parameters can be performed on the host computer integrated control software running on the system management module. After replacing the RF module, only the RF operating frequency needs to be modified on the host computer integrated control software; the relevant configuration parameters are sent to the RF module via the baseband module through the system management module's network port to take effect.
[0047] In one embodiment, the baseband processing module includes a signal processing FPGA, a high-speed ADC, a high-speed DAC, and a memory chip. The baseband processing module is connected to the high-speed ADC and the high-speed DAC via a JESD204B interface. The high-speed ADC is used to convert the analog intermediate frequency signal output by the RF module into a digital signal, and the high-speed DAC is used to convert the digital signal modulated by the baseband processing module into an analog intermediate frequency signal. The memory chip is used to temporarily store the demodulated digital signal, which is then transmitted via the PCIe bus when called by the system management module.
[0048] In this embodiment, the baseband processing module consists of a signal processing FPGA, a high-speed ADC, a high-speed DAC, and a memory chip. The baseband processing module uses a JESD204B interface to receive signals from the high-speed ADC, realizing the reception of intermediate frequency (IF) signals from the RF module. The baseband processing module communicates with the system management module via Ethernet for control command and status transmission, enabling the configuration of high-speed demodulation function parameters and status reporting. The baseband processing module also uses a JESD204B interface to transmit the modulated IF signal through the high-speed DAC chip. The baseband processing module communicates with the system management module via a PCIe interface for large data transfer, internally supporting disk array read / write speeds up to 40Gbps. The baseband processing module demodulates the received digital signal converted by the ADC to a higher order and stores it in the memory chip, then sends it to the system management module via the PCIe interface as needed for disk storage. The stored / processed data includes:
[0049] 1. The data sent by the high-speed onboard equipment, also known as satellite-to-ground data, flows from the radio frequency module to the baseband module to the system control module. The function of the radio frequency module is to downconvert the radio frequency signal to an intermediate frequency signal. The function of the baseband module is to sample the intermediate frequency signal through an ADC to form a digital signal, which is then sent to the FPGA for demodulation. The demodulated data is then sent to the system control module for storage.
[0050] 2. Spaceborne high-speed equipment receiving test system - transmitting data outwards via RF module: data flow is disk array - baseband module - RF module;
[0051] 3. Simulates the functions of a satellite-borne computer – interacting with onboard high-speed equipment for remote control and telemetry data.
[0052] 4. Simulated onboard payload function - low-speed interface: Data flow is disk array <-> low-speed interface module <-> onboard high-speed equipment;
[0053] 5. Simulated onboard payload function - high-speed interface: The data flow is disk array <-> high-speed interface module <-> onboard high-speed equipment.
[0054] In one embodiment, the high-bandwidth bus on the VPX backplane is a PCIe bus. The system management module provides two PCIe x16 buses and one PCIe x8 bus for transmitting large amounts of data with the baseband processing module, the high-speed interface module, and the low-speed interface module, respectively.
[0055] In this embodiment, the system management module uses a high-performance processor, providing two PCIe x16 ports, one PCIe x8 port, and five network ports. Peripherals support displays, keyboards, mice, etc. Other software modules in the test system interact with the system management module via the PCIe interface to exchange large amounts of data, and via the network ports to exchange commands, configure parameters, and report status.
[0056] The core function of spaceborne high-speed equipment is to achieve high-speed downlink of satellite payload data. It stores the information of onboard payloads (such as cameras and SAR payloads) in its internal memory and transmits it to the ground station through the transmission channel when the satellite passes overhead. For this core function, the test system of this invention can receive the downlink high-speed data transmitted by the spaceborne high-speed equipment. Through frequency conversion of the radio frequency module and high-order demodulation of the baseband module, it can complete the rapid reception and parsing of the downlink high-speed data. On the other hand, it can simulate data interaction between various satellite payloads and satellite platforms and spaceborne high-speed equipment. Among them, the satellite payload interface (TLK2711, CXP, optical port, etc.) is supported by high-speed interface modules, while the satellite platform interface (CAN, RS422, RS485, etc.) is implemented by low-speed interface modules. The physical isolation design of the transmission channels of the two types of interface modules can ensure conflict-free transmission of interactive data.
[0057] Meanwhile, the testing system also has the function of simulating a spaceborne computer, capable of sending telemetry polling requests and remote control commands to the onboard high-speed equipment, receiving its telemetry return data, and also transmitting simulated payload data to the onboard high-speed equipment via the low-speed / high-speed interface module. During this process, the host computer integrated control software acts as the scheduling center for data interaction. When receiving a data read command, it reads the data to be sent from the disk array and transmits it to the low-speed / high-speed interface module via the PCIe interface. The module's built-in FPGA processes the data and then sends it to the onboard high-speed equipment through the corresponding interface. When receiving a data storage command, it receives the data transmitted by the onboard high-speed equipment through the interface module via the PCIe interface, processes it, and then saves it to disk via the disk array read / write module.
[0058] In one embodiment, both the low-speed interface module and the high-speed interface module have a built-in field-programmable gate array (FPGA) protocol processing unit. The FPGA protocol processing unit encapsulates an independent protocol processing soft core for each adapted low-speed and high-speed interface, which is used to automatically complete the protocol parsing, data framing and deframing operations of the corresponding interface.
[0059] In this embodiment, by embedding a field-programmable gate array (FPGA) protocol processing unit in both the low-speed and high-speed interface modules, and encapsulating an independent protocol processing soft core for each compatible interface, the technical barrier of protocol heterogeneity faced when combining the system management module with the high- and low-speed interface modules is precisely solved. Addressing the significant differences in physical layer protocols, frame structures, transmission rates, and timing between high- and low-speed interfaces, the independent soft core can automatically complete the parsing, framing, and deframing operations of heterogeneous protocols such as TLK2711, CXP, and CAN without modifying the hardware circuitry. This protocol-independent processing design based on FPGA software avoids the problem of traditional test equipment requiring customized hardware circuitry to adapt to different protocols, significantly improving the compatibility of the test equipment with multiple types of interfaces, reducing the frequency of hardware modifications, lowering the cost and cycle time losses caused by hardware customization, and ensuring the accuracy and real-time performance of heterogeneous protocol data parsing.
[0060] In one embodiment, the physical isolation of the transmission channels between the low-speed interface module and the high-speed interface module is achieved through independent slots on the VPX backplane. The low-speed interface module occupies the low-speed signal slot on the VPX backplane, and the high-speed interface module occupies the high-speed signal slot on the VPX backplane. When the system management module schedules, it allocates priority transmission rights to the instruction data of the low-speed interface module.
[0061] In this embodiment, physical isolation of the transmission channels between the low-speed and high-speed interface modules is achieved through an independent slot on the VPX backplane. The system management module allocates priority transmission permissions to the instruction data of the low-speed interface module, effectively overcoming the technical barriers of data flow management. Physical isolation prevents collisions between high-speed and low-speed data flows at the hardware level, addressing the issue that high-speed interface data throughput can easily cause bus congestion and affect the real-time performance of low-speed instructions. Priority scheduling ensures that even during high-speed data transmission of 2Gbps-40Gbps, low-speed data such as satellite remote control commands and telemetry polling can still receive deterministic, low-latency responses. This design overcomes the shortcomings of traditional test equipment modules, which are often simply spliced together, leading to data conflicts and reduced real-time performance. It ensures the dual requirements of high-speed data interaction and low-speed command control between the onboard equipment and the test system, improving the stability of data transmission and the timeliness of command response during testing.
[0062] In one embodiment, the automatic derivation of the test process after the user modifies key parameters includes: the user selecting a basic template matching the target spaceborne high-speed equipment from a standardized test scenario template library and modifying the key parameters; the key parameters include the target operating frequency, target data transmission rate, and target interface type of the spaceborne high-speed equipment; the host computer control software automatically extracts the module-related configuration requirements corresponding to the key parameters; the module-related configuration requirements include the frequency band range that the RF module needs to adapt to, the demodulation mode that the baseband module needs to enable, and the interface type that the high- and low-speed interface modules need to activate; verifying the matching of the related configuration requirements with the hardware capabilities of each module, and prompting for adjustment if there are any mismatches; after the verification is passed, the host computer control software automatically generates a test process containing timing scheduling rules; the timing scheduling rules specify the execution order of each module by the system management module.
[0063] In this embodiment, by automating the process of selecting a basic template, modifying key parameters, automatically extracting configuration requirements, verifying compatibility, and generating timing sequences, combined with a standardized test scenario template library, the core problems of long cycles and high costs associated with traditional one-to-one testing of new equipment are specifically addressed. Traditionally, new tasks require 2-3 months of hardware and software customization. In this embodiment, however, testers only need to modify key parameters such as the target frequency, rate, and interface type of the onboard equipment. The system can then automatically deduce associated configuration requirements such as RF band adaptation and baseband demodulation mode, verify hardware capabilities, and generate the scheduling sequence for the system management module, eliminating the need to develop test procedures from scratch. This design shortens the preparation cycle for new task testing from months to days, significantly reduces the frequency of test tooling development, improves equipment versatility, and avoids errors caused by manually writing process code, thereby reducing testing costs and risks.
[0064] In one embodiment, when the collected demodulation performance parameters exceed the corresponding preset threshold, the system management module generates an adjustment instruction and executes the adjustment without interrupting the current test process; the demodulation performance parameters include bit error rate, signal-to-noise ratio, and constellation diagram information.
[0065] In this embodiment, the system management module collects demodulation performance parameters such as bit error rate, signal-to-noise ratio, and constellation diagram information in real time. When the parameters exceed preset thresholds, adjustment commands are automatically generated to dynamically optimize the signal gain, frequency offset, and demodulation configuration of the RF module and baseband module without interrupting the test process. This successfully overcomes the technical barriers of adaptive testing and dynamic response. Traditional test systems require manual intervention to address potential signal fading and increased external interference that may occur during testing of high-speed spaceborne equipment, resulting in adaptation lag and test interruptions. This embodiment, however, forms a rapid closed loop of monitoring-decision-adjustment, integrating the originally independent RF module, baseband module, and system management module into a self-optimizing organic whole. This maintains optimal test conditions and ensures the continuity of the test process, significantly improving the test accuracy of spaceborne equipment under dynamic conditions and avoiding data parsing errors caused by parameter adaptation lag.
[0066] In one embodiment, after receiving the demodulated data transmitted by the system management module, the host computer control software displays the data spectrum, constellation diagram and telemetry parameters in real time, and stores the demodulated data and test logs to the disk array.
[0067] In this embodiment, the host computer control software receives demodulated data transmitted from the system management module, displays the data spectrum, constellation diagram, and telemetry parameters in real time, and stores the demodulated data and test logs to a disk array, improving test efficiency and reliability from a data management perspective. Traditional test systems often suffer from untimely data display and scattered storage that is prone to loss. This embodiment achieves real-time visualization and centralized storage of test data: the real-time display function allows testers to intuitively monitor demodulation performance (such as constellation diagram dispersion and signal-to-noise ratio changes) and promptly detect abnormal trends; the disk array storage ensures the secure retention of high-speed downlink data from 2Gbps to 40Gbps, supports subsequent retrieval of historical data by test time and device model, facilitates tracing the test process, troubleshooting the root cause of problems, reduces test duplication due to data loss or untimely monitoring, and improves test data management efficiency and traceability.
[0068] In one embodiment, the standardized test scenario template library is divided into basic templates according to the type of onboard high-speed equipment and the test stage; the type of onboard high-speed equipment includes onboard solid-state storage equipment and high-speed data transmission equipment; the test stage includes R&D testing, transfer testing and environmental testing.
[0069] In this embodiment, by dividing the standardized test scenario template library into basic templates according to the type of onboard high-speed equipment (onboard solid-state storage devices, high-speed data transmission devices) and the testing stage (R&D testing, transfer testing, environmental testing), the versatility of test equipment and the efficiency of adapting to new tasks are further enhanced. Addressing the problem of traditional test systems lacking standardized templates and requiring test parameters to be defined from scratch for new tasks, this embodiment pre-sets basic test parameters for different application scenarios (such as the standard speed of onboard solid-state storage devices and RF protection parameters for environmental testing). Testers do not need to re-examine equipment characteristics and test requirements; they can directly select the corresponding template to start configuration, significantly reducing the complexity of parameter configuration for new tasks. This design improves template reusability, further shortens the preparation time for new tasks, and ensures that test parameters for different devices and stages comply with industry standards, reducing test deviations caused by non-standard parameter definitions.
[0070] In one embodiment, during the process of scheduling each module to perform tests according to the test procedure, the system management module synchronously provides fault detection services. The fault detection services include real-time collection of status parameters of each module. When any status parameter exceeds the preset normal range, the system management module issues an alarm prompt through the host computer control software and displays the abnormal module and abnormal parameter value. The real-time collection of status parameters of each module includes: collecting the local oscillator lock-in status, AGC power value and temperature value of the RF module, collecting the frame synchronization status and memory chip utilization rate of the baseband processing module, and collecting the signal integrity parameters of the high and low speed interface modules.
[0071] In this embodiment, the system management module provides fault detection services synchronously when scheduling each module to perform tests. It collects real-time data on the RF module's local oscillator lock-in status, AGC power value, and temperature; the baseband processing module's frame synchronization status and memory chip utilization; and the high- and low-speed interface module's signal integrity parameters. When data exceeds these limits, an alarm is triggered by the host computer, and abnormal information is displayed. This effectively solves the shortcomings of traditional test systems where modules operate independently and faults are difficult to detect. In traditional testing, hardware module faults (such as RF local oscillator lock-in failure or baseband memory overflow) are prone to hidden spread, leading to distorted test results and difficulty in locating the problem. This embodiment achieves real-time monitoring of the status of all modules in the test system, enabling rapid location of abnormal modules and specific parameters (such as excessively high RF module temperature or baseband frame synchronization failure). This prevents fault escalation from affecting the test process, shortens troubleshooting time, ensures the stability and reliability of the test process, and reduces test rework costs caused by faults.
[0072] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0073] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A multifunctional, configurable, spaceborne high-speed equipment testing system, characterized in that, The system includes a system management module, a baseband processing module, a radio frequency module, a low-speed interface module, a high-speed interface module, and a host computer that is communicatively connected to the system management module. The baseband processing module, radio frequency module, low-speed interface module, and high-speed interface module are all connected to the system management module via the VPX backplane in the form of plug-in cards. They achieve data transmission with the system management module by relying on the high-bandwidth bus on the VPX backplane, and exchange instructions and status information with the system management module through the network interface. The radio frequency module is used to convert the radio frequency signal of the spaceborne high-speed equipment into an intermediate frequency signal and transmit it to the baseband processing module. It is also used to receive the signal gain command and frequency offset adjustment command issued by the system management module, convert the modulation signal output by the baseband processing module into a radio frequency signal that meets the reception requirements of the spaceborne high-speed equipment and send it. The baseband processing module is used to demodulate the intermediate frequency signal of the radio frequency module, transmit the demodulation performance parameters to the system management module in real time, and also to receive the demodulation configuration parameters issued by the system management module, modulate the data to generate a modulated signal, and output it to the radio frequency module. The transmission channels of the low-speed interface module and the high-speed interface module are physically isolated, and data can be sent and received without conflict through scheduling by the system management module. The host computer integrates control software with a built-in standardized test scenario template library, which is used to automatically derive test processes after the user modifies key parameters and send test process instructions to the system management module. The system management module is used to receive test process instructions from the host computer, collect demodulation performance parameters output by the baseband processing module in real time, generate adjustment instructions based on the relationship between the demodulation performance parameters and the preset threshold, dynamically adjust the signal gain and frequency offset of the RF module and the demodulation configuration parameters of the baseband processing module, and schedule each module to perform tests according to the test process. The automatic test derivation process after the user modifies key parameters includes: Users select a basic template from the standardized test scenario template library that matches the target spaceborne high-speed equipment and modify key parameters; the key parameters include the target operating frequency, target data transmission rate, and target interface type of the spaceborne high-speed equipment. The control software automatically extracts the module-related configuration requirements corresponding to the key parameters; the module-related configuration requirements include the frequency band range that the RF module needs to adapt to, the demodulation mode that the baseband module needs to enable, and the interface type that the high-speed and low-speed interface modules need to activate. Verify the compatibility between the associated configuration requirements and the hardware capabilities of each module; if any mismatch exists, prompt for an adjustment plan. After the verification is passed, the control software automatically generates a test process containing timing scheduling rules; the timing scheduling rules specify the execution order of each module scheduled by the system management module.
2. The system according to claim 1, characterized in that, Both the low-speed interface module and the high-speed interface module have built-in field-programmable gate array (FPGA) protocol processing units. Each FPGA protocol processing unit encapsulates an independent protocol processing soft core for each adapted low-speed and high-speed interface, which is used to automatically complete the protocol parsing, data framing, and deframing operations of the corresponding interface.
3. The system according to claim 1, characterized in that, The high-bandwidth bus on the VPX backplane is a PCIe bus. The system management module provides two PCIe x16 buses and one PCIe x8 bus, which are used to transmit large amounts of data with the baseband processing module, the high-speed interface module, and the low-speed interface module, respectively.
4. The system according to claim 1, characterized in that, When the collected demodulation performance parameters exceed the corresponding preset threshold, the system management module generates an adjustment instruction and executes the adjustment without interrupting the current test process; the demodulation performance parameters include bit error rate, signal-to-noise ratio and constellation diagram information.
5. The system according to claim 1, characterized in that, The standardized test scenario template library is divided into basic templates according to the type of spaceborne high-speed equipment and the test stage; the types of spaceborne high-speed equipment include on-board solid-state storage devices and high-speed data transmission devices; the test stages include R&D testing, transfer testing and environmental testing.
6. The system according to claim 1, characterized in that, During the process of scheduling each module to perform tests according to the test procedure, the system management module synchronously provides fault detection services. The fault detection services include real-time collection of the status parameters of each module. When any status parameter exceeds the preset normal range, the system management module issues an alarm prompt through the host computer control software and displays the abnormal module and abnormal parameter value.
7. The system according to claim 6, characterized in that, Real-time collection of status parameters for each module includes: The system collects the local oscillator lock-in status, AGC power value, and temperature value of the RF module; the frame synchronization status and memory chip utilization of the baseband processing module; and the signal integrity parameters of the high-speed and low-speed interface modules.
8. The system according to claim 1, characterized in that, After receiving the demodulated data transmitted by the system management module, the control software displays the data spectrum, constellation diagram and telemetry parameters in real time, and stores the demodulated data and test logs to the disk array.
9. The system according to claim 1, characterized in that, The transmission channels of the low-speed interface module and the high-speed interface module are physically isolated through independent slots on the VPX backplane. The low-speed interface module occupies the low-speed signal slot on the VPX backplane, and the high-speed interface module occupies the high-speed signal slot on the VPX backplane. When the system management module schedules, it allocates priority transmission permissions to the instruction data of the low-speed interface module.