Calibration method of signal channel in test equipment, signal synthesis method and device

By selecting a reference output path and a reference edge as calibration benchmarks in semiconductor testing equipment, calculating and recording the corresponding relationship of delay values ​​of signal channels, and performing delay compensation, the problem of poor signal channel equivalence is solved, and the accuracy of signal alignment and synthesis is achieved.

CN121955841APending Publication Date: 2026-05-01SHANGHAI JINGJI SEMICON TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI JINGJI SEMICON TECH CO LTD
Filing Date
2024-10-29
Publication Date
2026-05-01

AI Technical Summary

Technical Problem

In semiconductor testing equipment, the poor equivalence between signal channels leads to deviations in the test waveforms.

Method used

Select one signal channel as the reference output path, determine the reference edge as the calibration benchmark, and calculate and record the correspondence between the expected delay value and the actual delay value of each signal channel through the adjustable delay unit and delay lookup storage unit, and perform delay compensation to eliminate path skew.

Benefits of technology

Equivalence between signal channels is achieved, ensuring that the signals output from each signal channel are aligned, eliminating path skew problems, and improving the accuracy of signal synthesis.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a calibration method of a signal channel in test equipment, and a signal synthesis method and device, and the method comprises the steps: selecting a reference output path, and determining a reference edge of a reference signal of the reference output path; and the edge generation registers of the N signal channels respectively generate N calibration signals and transmit the N calibration signals to the corresponding adjustable delay units. A reference channel is determined from the N signal channels, channel deviation values of N-1 signal channels except the reference channel compared with the reference channel are obtained, corresponding reference expected delay values are obtained, actual delay values corresponding to the reference expected delay values are recorded as 0, and then corresponding relations between other expected delay values and other actual delay values are obtained. And recording the obtained corresponding relationship in the corresponding delay search storage unit. The adjustable delay unit delays the signal according to the expected delay value output by the delay search storage unit, so that the waveform of the signal output after each signal channel is delayed can be aligned, and the equivalence between the signal channels is realized.
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Description

Calibration methods, signal synthesis methods, and apparatus for signal channels in testing equipment Technical Field

[0001] This invention relates to the field of semiconductor testing technology, and in particular to a calibration method, signal synthesis method, and apparatus for a signal channel in a testing device. Background Technology

[0002] In the semiconductor technology field, Automated Test Equipment (ATE) is a machine used to automate the testing of chips. Depending on the chip's requirements, various test waveforms need to be generated and sent to different pins of the chip for testing. The period of each test waveform may be different. For example, a certain pin of a chip may require a specific test waveform (i.e., the desired waveform). To generate this specific test waveform, rising or falling edges need to be generated based on a basic system cycle UI (which can be understood as the basic waveform). This is achieved by using multiple different channels corresponding to the number of edges in each cycle of the test waveform, delaying the edges of this system cycle as needed, and then synthesizing the delayed waveforms generated by different channels. In other words, logical operations are performed on the delayed waveforms to obtain a test waveform with specific rising or falling edges, and finally, the test waveform is output to the corresponding pin of the chip through the channel pin.

[0003] Because the test waveform is generated according to the system cycle (UI), the assignment of a rising or falling edge within each cycle of the test waveform to any particular system cycle (UI) is uncertain before confirmation at time 0 (i.e., the reference time). Since the position at time 0 does not affect the overall test waveform, any path can potentially generate a rising or falling edge. Taking paths A and B as examples, it is required that paths A and B be equivalent (i.e., for waveforms within the same time period, the edge generated by path A is in the same position as the edge generated by path B). That is, any edge, whether generated by path A or path B, has the same effect (the time difference between the edge generation time and the reference time). However, actual hardware consists of two or more different paths. Even if each device and the traces between devices are designed identically, differences in devices and traces prevent the guarantee that every path will be exactly the same. The poor equivalence between paths A and B is generally due to the following two reasons: 1. The adjustable delay chain A in path A adjusts the delay value of the waveform edge for each system cycle, and the adjustable delay chain B in path B adjusts the delay value of the waveform edge for each system cycle. However, in practical applications, even if adjustable delay chains A and B are set to the same delay value, the actual delay time for the waveform edge of the same system cycle is still different.

[0004] 2. When neither adjustable delay chain A nor adjustable delay chain B is set with a delay (i.e., the delay value is 0), due to the differences in other devices and traces in path A and path B, even if the edges of the waveforms generated by the registers generated from the edges of paths A and B are generated from the edges of the registers, the time it takes for them to reach the final output terminal after passing through paths A and B respectively is still inconsistent. This is called path skew. Path skew refers to the time difference between two or more signals (data or clock) reaching the same endpoint after passing through different physical paths.

[0005] Because the equivalence between path A and path B is poor, the actual waveform synthesized by logical operations on the waveform output through path A and the waveform output through path B deviates from the expected waveform.

[0006] Therefore, it is necessary to propose a calibration method, signal synthesis method, and apparatus for the signal channel in a test device to solve the above problems. Summary of the Invention

[0007] The purpose of this invention is to provide a calibration method, signal synthesis method, and apparatus for signal channels in a test device, so as to improve the problem of poor equivalence between channels in existing test devices.

[0008] In a first aspect, the present invention provides a calibration method for signal channels in a test device, comprising: selecting at least one signal channel other than N signal channels as a reference output path, the reference output path outputting a reference signal, and determining a rising edge or falling edge of the reference signal as a reference edge to serve as a calibration reference for the N signal channels; edge generation registers in the N signal channels generating N calibration signals according to the clock cycle of the test device, the edge generation registers transmitting the calibration signals to an adjustable delay unit connected to the edge generation register in the corresponding signal channel, the signal channels corresponding one-to-one with the calibration signals, and N being a positive integer greater than 1; inputting a desired delay value of 0 to the adjustable delay unit, comparing the actual delay value of the signals output by the N signal channels after delaying the calibration signals with that of the actual delay value of the reference edge, and selecting the signal with the largest actual delay value. The channel is designated as the reference channel. Using the actual delay value corresponding to 0 for each signal channel when the expected delay value input to the adjustable delay unit is 0, the path skew value of N-1 signal channels (excluding the reference channel) compared to the reference channel is calculated. Based on the path skew value, the corresponding reference expected delay value is obtained, and the actual delay value corresponding to the reference expected delay value is recorded as 0. Based on the reference expected delay value and the corresponding actual delay value of the N-1 signal channels, the correspondence between other expected delay values ​​and other actual delay values ​​of the N-1 signal channels is obtained. The reference expected delay value and the corresponding actual delay value of the N-1 signal channels, as well as the correspondence between other expected delay values ​​and other actual delay values, are recorded in the delay lookup storage unit of the corresponding signal channel. The delay lookup storage unit is connected to the adjustable delay unit.

[0009] The beneficial effects of the calibration method of this invention are as follows: The reference edge of the reference output path is used as the calibration benchmark for the N signal channels. The signal channel with the largest actual delay value when the expected delay value is 0 is determined as the reference channel. Based on the path skew value between the N-1 signal channels and the reference channel, delay compensation is performed on the N-1 signal channels so that the signals output after passing through each channel can be aligned when the signals of the N-1 signal channels and the reference channel are not delayed. This eliminates the path skew problem between the N signal paths and establishes a correspondence between the expected delay value and the actual delay value of the N-1 signal channels. When the adjustable delay unit delays the signal according to the expected delay value output by the delay lookup storage unit, the signal waveforms output by each signal channel under the same delay can be aligned, thereby achieving equivalence between signal channels.

[0010] In one embodiment, after the edge generation register transmits the calibration signal to the adjustable delay unit connected to the edge generation register in the corresponding signal channel, and before inputting a desired delay value of 0 to the adjustable delay unit, and comparing the magnitude of the signal output by the N signal channels after delaying the calibration signal with the actual delay value of the reference edge, the method further includes: inputting at least three desired delay values ​​to the adjustable delay unit in each signal channel; the adjustable delay unit in each signal channel delays the calibration signal according to the desired delay values ​​to obtain a first delayed calibration signal; measuring the actual delay value of the first delayed calibration signal compared with the reference edge; and calculating and determining whether the correspondence between the desired delay value and the actual delay value of each signal channel conforms to a linear relationship based on the at least three desired delay values ​​of each signal channel and the actual delay values ​​corresponding to the three desired delay values.

[0011] Its beneficial effect is that, by using at least three sets of correspondences between expected delay values ​​and actual delay values, it is convenient to calculate and determine whether the correspondence between expected delay values ​​and actual delay values ​​conforms to a linear relationship, which serves as the basis for judgment in subsequent steps.

[0012] In one embodiment, any one of the N-1 signal channels is used as the target signal channel. If the correspondence between the expected delay value and the actual delay value of the target signal channel conforms to a linear relationship, the reference expected delay value of the target signal channel is obtained by the following steps: calculating the linearity of the adjustable delay unit of the target signal channel based on at least three expected delay values ​​and the corresponding actual delay values; obtaining the initial expected delay value of the target signal channel based on the path skew value and linearity of the target signal channel; and obtaining the reference expected delay value by calibrating the initial expected delay value.

[0013] Its beneficial effects are as follows: when the correspondence between the expected delay value and the actual delay value of the target signal channel conforms to a linear relationship, the initial expected delay value corresponding to the delay difference is calculated based on the linearity between the expected delay value and the actual delay value of the target signal channel. The signal after the target signal channel performs a delay based on the initial expected delay value can be aligned with the signal after the reference channel performs a delay based on the expected delay value of 0. The initial expected delay value is calibrated to obtain the reference expected delay value, thereby improving the accuracy of path skew compensation.

[0014] In one embodiment, the correspondence between other expected delay values ​​and other actual delay values ​​of the target signal channel is obtained through the following steps: the adjustable delay unit of the target signal channel performs a delay based on the maximum expected delay value to obtain a first initial actual delay value, and the adjustable delay unit of the target signal channel performs a delay based on the expected delay value being 0 to obtain a second initial actual delay value; based on the first initial actual delay value, the second initial actual delay value, and the channel skew value corresponding to the target signal channel, the maximum actual delay value corresponding to the maximum expected delay value is obtained; based on the reference expected value and linearity corresponding to the target signal channel, M intermediate expected delay values ​​corresponding to M intermediate actual delay values ​​of the target signal channel are calculated, where the intermediate actual delay values ​​are greater than 0 and less than the maximum actual delay value; the maximum expected delay value and the M intermediate expected delay values ​​are used together as other expected delay values, and the maximum actual delay value and the M intermediate actual delay values ​​are used together as other actual delay values, where M is a positive integer.

[0015] Its beneficial effect is that when the correspondence between the expected delay value and the actual delay value of the target signal channel conforms to a linear relationship, based on the baseline expected value, the maximum expected delay value, the maximum actual delay value and the set M intermediate actual delay values ​​of the target signal channel, the intermediate expected delay value corresponding to the M intermediate actual delay values ​​can be directly calculated without measurement.

[0016] In one embodiment, any one of the N-1 signal channels is used as the target signal channel. If the correspondence between the expected delay value and the actual delay value of a target signal channel in the N-1 signal channels does not conform to a linear relationship, the reference expected delay value and the reference actual delay value of the target signal channel are obtained by the following steps: selecting several predicted expected values ​​based on the path skew value; the adjustable delay unit of the target signal channel performs a delay based on the several predicted expected values ​​to obtain several predicted actual values; the predicted expected value corresponding to the predicted actual value that is equal to the path skew value is determined as the initial expected delay value; and the reference expected delay value is obtained by calibrating the initial expected delay value.

[0017] Its beneficial effects are as follows: when the correspondence between the expected delay value and the actual delay value of the target signal channel does not conform to a linear relationship, several predicted actual values ​​are measured by means of measurement. Among them, the predicted expected value corresponding to the predicted actual value that is equal to the path skew value is determined as the initial expected delay value. The signal after the target signal channel performs a delay based on the initial expected delay value can be aligned with the signal after the reference channel performs a delay based on the expected delay value of 0. The initial expected delay value is calibrated to obtain the reference expected delay value, thereby improving the accuracy of path skew compensation.

[0018] In one embodiment, the correspondence between other expected delay values ​​and other actual delay values ​​of the target signal channel is obtained through the following steps: the adjustable delay unit of the target signal channel performs a delay based on the maximum expected delay value to obtain a first initial actual delay value, and the adjustable delay unit of the target signal channel performs a delay based on the expected delay value being 0 to obtain a second initial actual delay value; based on the first initial actual delay value, the second initial actual delay value, and the channel skew value corresponding to the target signal channel, the maximum actual delay value corresponding to the maximum expected delay value is obtained; L intermediate expected delay values ​​are selected between the reference expected delay value and the maximum expected delay value of the target signal channel; the adjustable delay unit of the target signal channel performs a delay based on the L intermediate expected delay values ​​to obtain L intermediate actual delay values; the maximum expected delay value and the L intermediate expected delay values ​​are used together as other expected delay values; the maximum actual delay value and the L intermediate actual delay values ​​are used together as other actual delay values; and L is a positive integer greater than 1.

[0019] Its beneficial effect is that when the correspondence between the expected delay value and the actual delay value of the target signal channel does not conform to a linear relationship, L intermediate expected delay values ​​are selected between the reference expected delay value and the maximum expected delay value of the target signal channel. By measuring, the intermediate actual delay values ​​corresponding to the L intermediate expected delay values ​​can be obtained, which can ensure that the intermediate actual delay values ​​corresponding to the intermediate expected delay values ​​are more accurate.

[0020] In one embodiment, selecting L intermediate expected delay values ​​between the reference expected delay value and the maximum expected delay value of the target signal channel includes: dividing the reference expected delay value and the maximum expected delay value of the target signal channel into at least two intervals, selecting at least one intermediate expected delay value in each interval, and obtaining L intermediate expected delay values.

[0021] Its beneficial effect is that by dividing the large range between the baseline expected delay value and the maximum expected delay value into multiple intervals, and then selecting multiple intermediate expected delay values ​​in each interval, multiple intermediate expected delay values ​​with a wide distribution can be obtained, thus avoiding the value being too concentrated.

[0022] In one embodiment, obtaining a reference expected delay value by calibrating the initial expected delay value includes: the adjustable delay unit of the target signal channel performs a delay based on the initial expected delay value of the target signal channel to obtain the actual delay value corresponding to the initial expected delay value; the difference between the actual delay value corresponding to the expected delay value of the reference channel being 0 and the actual delay value corresponding to the initial expected delay value of the target signal channel is calculated to obtain a new path skew value of the target signal channel; if the new path skew value exceeds a set range, the initial expected delay value of the target signal channel is adjusted until the new path skew value of the target signal channel is within the set range; and the new initial expected delay values ​​corresponding to the new path skew values ​​within the set range are respectively determined as reference expected delay values.

[0023] Its beneficial effect is that the calibration process of the initial expected delay value improves the accuracy of the path skew calibration of the target signal channel.

[0024] In one embodiment, after obtaining the correspondence between other expected delay values ​​and other actual delay values ​​of the N-1 signal channels based on the reference expected delay value and the reference actual delay value, the method further includes: setting both the reference expected delay value and the actual delay value corresponding to the reference expected delay value of the reference channel to 0; obtaining a third initial actual delay value by performing a delay based on the maximum expected delay value by the adjustable delay unit of the reference channel; obtaining a fourth initial actual delay value by performing a delay when the expected delay value is 0 by the adjustable delay unit of the reference channel; and obtaining the maximum actual delay value corresponding to the maximum expected delay value based on the third initial actual delay value and the fourth initial actual delay value.

[0025] If the correspondence between the expected delay value and the actual delay value of the reference channel conforms to a linear relationship, then the intermediate expected delay value corresponding to the intermediate actual delay value of the reference channel is calculated based on the linearity of the adjustable delay unit of the reference channel. Based on the reference expected delay value of the reference channel and the corresponding actual delay value, maximum expected delay value, intermediate expected delay value, and intermediate actual delay value, the correspondence between different expected delay values ​​and actual delay values ​​of the reference channel is obtained. This correspondence is recorded in the delay lookup storage unit of the reference channel to complete the recording of the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage unit of the N signal channels. If the correspondence between the expected and actual delay values ​​is not linear, then P unmeasured intermediate expected delay values ​​are selected for the reference channel. The adjustable delay unit in the reference channel performs delays based on the P intermediate expected delay values ​​to obtain P intermediate actual delay values. Based on the reference channel's reference expected delay value, the corresponding actual delay value, the maximum expected delay value, the P intermediate expected delay values, and the P intermediate actual delay values, the correspondence between the different expected delay values ​​and actual delay values ​​of the reference channel is obtained. The correspondence between the different expected delay values ​​and actual delay values ​​of the reference channel is recorded in the delay lookup storage unit of the reference channel to complete the recording of the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage units of N signal channels, where P is a positive integer.

[0026] Its beneficial effects are as follows: If the correspondence between the expected delay value and the actual delay value of the reference channel conforms to a linear relationship, the correspondence between different expected delay values ​​and actual delay values ​​of the reference channel can be directly calculated based on the linear relationship of the reference channel, making the method of obtaining the correspondence faster; if the correspondence between the expected delay value and the actual delay value of the reference channel does not conform to a linear relationship, the correspondence between different expected delay values ​​and actual delay values ​​of the reference channel can be obtained through measurement, ensuring that the obtained correspondence is more accurate.

[0027] In one embodiment, after recording the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage units of N signal channels, the method further includes: the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage units of each signal channel includes multiple sets of one-to-one correspondences between expected delay values ​​and actual delay values; sequentially verifying whether the correspondence between each set of expected delay values ​​and actual delay values ​​in each signal channel is correct; if the verification delay value obtained by the adjustable delay unit based on the expected delay value in the current group is inconsistent with the actual delay value corresponding to the expected delay value in the current group in the delay lookup storage unit, then adjusting the correspondence between the expected delay value and actual delay value in the current group until the verification delay value obtained by the expected delay value in the current group is consistent with the actual delay value corresponding to the expected delay value in the delay lookup storage unit.

[0028] Its beneficial effect is that it sequentially verifies whether the correspondence between each set of expected delay values ​​and actual delay values ​​in the delay lookup storage unit of each signal channel is correct, and adjusts and verifies incorrect correspondences to ensure the accuracy of the correspondence between expected delay values ​​and actual delay values.

[0029] In one embodiment, the input expected delay value includes 0, the maximum expected value of the input signal channel, and any value between 0 and the maximum expected value of the input signal channel.

[0030] Its beneficial effects are as follows: the expected delay value is selected as 0, the maximum expected delay value, and at least one intermediate value between the two. The actual delay value corresponding to each expected delay value is measured. Based on the two endpoint values ​​and the intermediate value, it is possible to more accurately calculate and determine whether the expected delay value and the actual delay value conform to a linear relationship.

[0031] Secondly, the present invention provides a signal synthesis method for signal channels, employing a test device calibrated by the calibration method in any of the above embodiments. The signal synthesis method includes: edge generation registers in N signal channels generating N initial signals according to the clock cycle of the test device, with each signal channel corresponding to one of the initial signals, and N being a positive integer greater than 1; a delay lookup storage unit in each signal channel obtaining an expected delay value corresponding to the actual delay value required by the corresponding signal channel and outputting the expected delay value to the corresponding adjustable delay unit; the adjustable delay unit in each signal channel performing delay processing on the corresponding initial signal according to the expected delay value output by the corresponding delay lookup storage unit to obtain a delayed signal; and synthesizing the delayed signals of the N signal channels through a logic operation unit to obtain a synthesized signal.

[0032] The beneficial effect of the signal synthesis method of the present invention is that: the desired delay value corresponding to the required actual delay value is found by the delay lookup storage unit and sent to the corresponding adjustable delay unit. The adjustable delay unit performs delay processing on the initial signal according to the desired delay value, ensuring that the initial signal can obtain a delay effect that matches the required actual delay value, thereby eliminating the deviation between N signal channels.

[0033] Thirdly, the present invention provides a signal synthesis device for signal channels, applied in a test device having N signal channels. The signal synthesis device is calibrated using the calibration method in any of the above embodiments. The signal synthesis device includes: N edge generator registers, N adjustable delay chain units, N delay lookup storage units, and a logic operation unit, where N is a positive integer greater than 1. The N edge generator registers are respectively located on the N signal channels and connected to the adjustable delay units of the corresponding signal channels. The edge generator registers are used to generate an initial signal according to the clock cycle of the test device and transmit the initial signal to the corresponding adjustable delay unit. Each signal... The delay lookup storage unit of each channel has a built-in correspondence between the expected delay value and the actual delay value of the corresponding signal channel. The delay lookup storage unit is used to obtain the expected delay value corresponding to the actual delay value on the corresponding signal channel and output the expected delay value to the corresponding adjustable delay unit. Each adjustable delay unit is connected to a corresponding delay lookup storage unit. The adjustable delay unit is used to perform delay processing on the corresponding initial signal to obtain a delayed signal based on the expected delay value output by the corresponding delay lookup storage unit. The logic operation unit is connected to N adjustable delay units and is used to synthesize the delayed signals of N signal channels to obtain a synthesized signal. Attached Figure Description

[0034] Figure 1 is a schematic flowchart of the calibration method for the signal channel in the test equipment of the present invention.

[0035] Figure 2 shows 2-A to 2-E, which respectively illustrate the reference signal of the reference output path and the different signal waveforms obtained after the adjustable delay units A and B perform delay according to different desired delay values.

[0036] Figure 3 is a schematic diagram of the signal synthesis device for signal channels according to the present invention. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0038] To address the problems existing in the prior art, embodiments of the present invention provide a calibration method for signal channels in a test device. Referring to Figure 1, the calibration method includes: S1: Selecting at least one signal channel other than the N signal channels as a reference output path, the reference output path outputs a reference signal, and determining a rising edge or falling edge of the reference signal as a reference edge to serve as the calibration benchmark for the N signal channels.

[0039] S2: The edge generation register in the N signal channels generates N calibration signals according to the clock cycle of the test equipment. The edge generation register transmits the calibration signals to the adjustable delay unit connected to the edge generation register in the corresponding signal channel. The signal channels correspond one-to-one with the calibration signals, and N is a positive integer greater than 1.

[0040] S3: Input the desired delay value of 0 to the adjustable delay unit, compare the actual delay value of the output signal of the N signal channels after delaying the calibration signal with the reference edge, and determine the signal channel with the largest actual delay value as the reference channel. Using the actual delay value corresponding to the desired delay value of 0 input to the adjustable delay unit for each signal channel, calculate the path skew value of N-1 signal channels (excluding the reference channel) compared with the reference channel. Obtain the corresponding reference desired delay value based on the path skew value, and record the actual delay value corresponding to the reference desired delay value as 0.

[0041] S4: Based on the baseline expected delay value and the corresponding actual delay value of the N-1 signal channels, obtain the correspondence between other expected delay values ​​and other actual delay values ​​of the N-1 signal channels.

[0042] S5: Record the reference expected delay value and the corresponding actual delay value of the N-1 signal channels, as well as the correspondence between other expected delay values ​​and other actual delay values, in the delay lookup storage unit of the corresponding signal channel. The delay lookup storage unit is connected to the adjustable delay unit.

[0043] In this embodiment, the reference edge of the reference output path is used as the calibration reference for the N signal channels. A desired delay value of 0 is input to the adjustable delay unit to obtain the signals output by the N signal channels after delaying the calibration signal. The actual delay value of the signals output by the N signal channels is compared with that of the reference edge. The signal channel with the largest actual delay value is determined as the reference channel. The actual delay value reflects the true delay time of the calibration signal after transmission through the signal path. The path skew value between the N-1 signal channels and the reference channel is calculated. This path skew value is obtained based on the delay difference between the N-1 signal channels and the reference channel. Once the path skew value is obtained, the reference expected delay value for the N-1 signal channels can be derived. The actual delay value corresponding to the reference expected delay value is recorded as 0. When the expected delay value is set to 0, that is, when the delay value configured for the N-1 signal channels is 0, delay compensation is performed on the N-1 signal channels using the reference expected delay value. This ensures that the signal output by the N-1 signal channels when the expected delay value is 0 is aligned with the signal output by the reference channel when the expected delay value is 0, thus eliminating the path skew problem between the N signal channels. Based on the reference expected delay value and the corresponding actual delay value, the correspondence between other expected delay values ​​and other actual delay values ​​is obtained. The different expected delay values ​​and their corresponding actual delay values ​​for each signal channel are recorded in the corresponding delay lookup storage unit, forming multiple sets of correspondences. In this scheme, the adjustable delay unit of each signal channel delays the signal according to the expected delay value output by the delay lookup storage unit, so that the adjustable delay unit of each signal channel obtains the same actual delay effect matching the required delay value after performing the delay. That is, the signal waveforms after the adjustable delay unit of each signal channel delays according to the same expected delay value can be aligned, thereby realizing the equivalence between each signal channel.

[0044] As described above, the correspondence between the expected delay value and the actual delay value can be understood as follows: when the expected delay value is input to the adjustable delay unit, the delay performed by the adjustable delay unit on the signal transmitted in the signal channel is the actual delay value corresponding to the input expected delay value. These correspondences are stored in the delay lookup storage unit corresponding to each signal channel. When the same required delay value is set for N signal channels, the delay lookup storage unit of each signal channel will, based on the correspondence established in advance through the calibration process, find an expected delay value corresponding to the actual delay value that matches the required delay value, and configure this expected delay value to the adjustable delay unit. The adjustable delay unit adjusts the signal delay according to the expected delay value output by the delay lookup storage unit. This expected delay value enables the adjustable delay unit of the corresponding signal channel to produce an actual delay effect equal to the required delay value (i.e., the matching actual delay value). In other words, the signal waveforms after being delayed by the adjustable delay units of all signal channels according to the same expected delay value can be aligned, thereby achieving equivalence between the signal channels.

[0045] It should be noted that when storing the correspondence between the expected delay value and the actual delay value in this invention, the actual delay value can be used for storage, or other constants can be used for storage, as long as the stored constant can represent the delay value and the correspondence between the two.

[0046] When calibrating N signal channels, if a combination of at least one of the N signal channels is used as a reference output path, the calibration process itself will alter the output signal waveform of the signal channel; for example, the position of the rising edge or falling edge will change, making it unusable as a calibration reference. In this embodiment, the position of the rising edge or falling edge of the reference signal output from the reference output path outside the N signal channels will not change. Selecting one of the rising or falling edges as the reference edge provides a reliable and stable calibration benchmark.

[0047] It should be noted that a reference output path refers to a combination of one or more signal channels corresponding to a single signal output pin. A reference signal can be output through the signal output pin corresponding to the reference output path. In other words, at least one signal channel other than the N signal channels is selected as the reference output path. Here, one signal channel can be chosen as the reference output path, corresponding to one signal output pin, and the N signal channels can correspond to at least another signal output pin. Alternatively, multiple signal channels can be selected as multiple reference output paths, with each of the N signal channels calibrated with its corresponding reference output path. Multiple reference output paths can correspond to the same signal output pin, but the reference output path and the signal channel to be calibrated must correspond to different signal output pins. The signal channel to be combined must correspond to the same signal output pin.

[0048] In one embodiment, after the edge generation register transmits the calibration signal to the adjustable delay unit connected to the edge generation register in the corresponding signal channel, and before inputting a desired delay value of 0 to the adjustable delay unit, and comparing the magnitude of the signal output by the N signal channels after delaying the calibration signal with the actual delay value of the reference edge, the method further includes: inputting at least three desired delay values ​​to the adjustable delay unit in each signal channel; the adjustable delay unit in each signal channel delays the calibration signal according to the desired delay values ​​to obtain a first delayed calibration signal; measuring the actual delay value of the first delayed calibration signal compared with the reference edge; and calculating and determining whether the correspondence between the desired delay value and the actual delay value of each signal channel conforms to a linear relationship based on the at least three desired delay values ​​of each signal channel and the actual delay values ​​corresponding to the three desired delay values.

[0049] In one specific embodiment, the input expected delay value includes 0, the maximum expected value of the input signal channel, and any value between 0 and the maximum expected value of the input signal channel.

[0050] Taking the case where N is 2, with one signal channel being signal channel A and the other being signal channel B, as an example, the measurement of the correspondence between the expected delay value and the actual delay value is explained. Here, signal channel A has an adjustable delay unit A and a delay lookup memory unit A, and signal channel B has an adjustable delay unit B and a delay lookup memory unit B.

[0051] As shown in Figure 2-B, the desired delay value of adjustable delay unit A is set to 0, and a rising edge a1 is generated using signal channel A. The desired delay value of adjustable delay unit B is set to a larger value greater than 0, and a falling edge b1 is generated using signal channel B. This yields the first delay calibration signal when the desired delay value of adjustable delay unit A is 0. The actual delay value of this first delay calibration signal relative to the reference edge c is the actual delay value t1 of the rising edge a1 relative to the reference edge c in Figure 2-B. The actual delay value t1 is obtained based on the time difference between the rising edge a1 and the reference time of 0. It should be noted that the selection of the larger value of adjustable delay unit B is not specifically limited here, as long as the two edges, rising edge a1 and falling edge b1, do not affect each other. For example, the desired delay value of adjustable delay unit B can be the maximum desired delay value of adjustable delay unit B, or half of the maximum desired delay value of adjustable delay unit B, or other values.

[0052] As shown in Figure 2-C, the desired delay value of adjustable delay unit A is set to its maximum desired delay value TAmax_exp. A rising edge a2 is generated using signal channel A. The desired delay value of adjustable delay unit B is set to 0 or another value. A falling edge b2 is generated using signal channel B. This yields the first delay calibration signal when the desired delay value of adjustable delay unit A is TAmax_exp. The actual delay value of this first delay calibration signal relative to the reference edge c is the actual delay value t2 of the rising edge a2 relative to the reference edge c in Figure 2-C. The actual delay value t2 is obtained based on the time difference between the rising edge a2 and the reference time of 0. It should be noted that the selection of other values ​​for adjustable delay unit B is not specifically limited here, as long as the two edges, rising edge a2 and falling edge b2, do not affect each other. Furthermore, t2 minus t1 is calculated to obtain the maximum actual delay value TAmax_real of adjustable delay unit A. As shown in 2-D of Figure 2, the expected delay value of adjustable delay unit A is set to the intermediate expected delay value TAmid_exp, and a rising edge a3 is generated using signal channel A. The expected delay value of adjustable delay unit B is set to the maximum expected delay value TBmax_exp or other value, and a falling edge b3 is generated using signal channel B. Thus, the first delay calibration signal when the expected delay value of adjustable delay unit A is TAmid_exp can be obtained. At this time, the actual delay value of the first delay calibration signal compared to the reference edge c is the actual delay value t3 of the rising edge a3 relative to the reference edge c in Figure 2-D. The actual delay value t3 is obtained based on the time difference between the rising edge a3 and the reference time 0. It should be noted that the intermediate expected delay value TAmid_exp is any value between 0 and the maximum expected delay value TAmax_exp of the adjustable delay unit A. The selection of other values ​​for the adjustable delay unit B is not specifically limited here, as long as the delay values ​​of the rising edge a3 and falling edge b3 are independent of each other. Furthermore, the intermediate expected delay value TAmid_real of the adjustable delay unit A is obtained by calculating t3 minus t1.

[0053] Based on the data values ​​obtained from the above measurements, the linearity judgment step for signal channel A is executed: compare the first difference between (t3-t1) / (t2-t1) and TAmid_exp / TAmax_exp to see if it is within the set threshold range. If the first difference is not within the set threshold range, the correspondence between the expected delay value and the actual delay value of signal channel A does not conform to the linear relationship. If the first difference is within the set threshold range, different intermediate expected delay values ​​TAmid_exp are selected, that is, different intermediate expected delay values ​​TAmid_exp are selected between 0 and the maximum expected delay value TAmax_exp of the adjustable delay unit A. Then, the linearity judgment step is executed based on other intermediate expected delay values ​​TAmid_exp. If the first difference corresponding to other intermediate expected delay values ​​TAmid_exp is within the set threshold range, the correspondence between the expected delay value and the actual delay value of signal channel A conforms to the linear relationship.

[0054] As shown in Figure 2-E, the desired delay value of adjustable delay unit B is set to 0, and a rising edge a4 is generated using signal channel B. The desired delay value of adjustable delay unit A is set to a larger value greater than 0, and a falling edge b4 is generated using signal channel A. This yields the first delay calibration signal when the desired delay value of adjustable delay unit B is 0. The actual delay value of this first delay calibration signal relative to the reference edge c is the actual delay value t4 of the rising edge a4 relative to the reference edge c in Figure 2-E. The actual delay value t4 is obtained based on the time difference between the rising edge a4 and the reference time of 0. It should be noted that the selection of the larger value for adjustable delay unit A is not specifically limited here, as long as the two edges, rising edge a4 and falling edge b4, do not affect each other. For example, the desired delay value of adjustable delay unit A can be its maximum desired delay value, or half of its maximum desired delay value, or other values.

[0055] As shown in Figure 2-F, the desired delay value of adjustable delay unit B is set to its maximum desired delay value TBmax_exp. A rising edge a5 is generated using signal channel B. The desired delay value of adjustable delay unit A is set to 0 or another value. A falling edge b5 is generated using signal channel A. This yields the first delay calibration signal when the desired delay value of adjustable delay unit B is TBmax_exp. The actual delay value of this first delay calibration signal relative to the reference edge c is the actual delay value t5 of the rising edge a5 relative to the reference edge c in Figure 2-F. The actual delay value t5 is obtained based on the time difference between the rising edge a5 and the reference time 0. It should be noted that the selection of other values ​​for adjustable delay unit B is not specifically limited here, as long as the two edges, rising edge a5 and falling edge b5, do not affect each other. Furthermore, t5 minus t4 is calculated to obtain the maximum actual delay value TBmax_real of adjustable delay unit B.

[0056] As shown in Figure 2-G, the expected delay value of the adjustable delay unit B is set to the intermediate expected delay value TBmid_exp, and a rising edge a6 is generated using signal channel B. The expected delay value of the adjustable delay unit A is set to the maximum expected delay value TAmax_exp or other value, and a falling edge b6 is generated using signal channel A. Thus, the first delay calibration signal when the expected delay value of the adjustable delay unit B is TBmid_exp can be obtained. At this time, the actual delay value of the first delay calibration signal compared to the reference edge c is the actual delay value t6 of the rising edge a6 in Figure 2-G relative to the reference edge c. The actual delay value t6 is obtained based on the time difference between the rising edge a6 and the reference time 0. It should be noted that the intermediate expected delay value TBmid_exp is any value between 0 and the maximum expected delay value TBmax_exp of the adjustable delay unit B. The selection of other values ​​for the adjustable delay unit B is not specifically limited here, as long as the delay values ​​ensure that the rising edge a6 and falling edge b6 do not affect each other. Additionally, the intermediate actual delay value TAmid_real of the adjustable delay unit A is obtained by calculating t6 minus t4. Based on the data values ​​obtained from the above measurements, the linearity judgment step for signal channel B is executed: compare whether the second difference between (t6-t4) / (t5-t4) and TBmid_exp / TBmax_exp is within the set threshold range. If the second difference is not within the set threshold range, the correspondence between the expected delay value and the actual delay value of signal channel B does not conform to the linear relationship. If the second difference is within the set threshold range, different intermediate expected delay values ​​TBmid_exp are selected, that is, different intermediate expected delay values ​​TBmid_exp are selected between 0 and the maximum expected delay value TBmax_exp of the adjustable delay unit A. Then, the linearity judgment step is executed based on other intermediate expected delay values ​​TBmid_exp. If the second difference corresponding to other intermediate expected delay values ​​TBmid_exp is within the set threshold range, the correspondence between the expected delay value and the actual delay value of signal channel B conforms to the linear relationship.

[0057] In one embodiment, any one of the N-1 signal channels is used as the target signal channel. If the correspondence between the expected delay value and the actual delay value of the target signal channel in the N-1 signal channels conforms to a linear relationship, the reference expected delay value of the target signal channel is obtained by the following steps: calculating the linearity between the expected delay value and the actual delay value of the target signal channel based on at least three expected delay values ​​and the corresponding actual delay values ​​of the target signal channel; and obtaining the initial expected delay value of the target signal channel based on the path skew value and the linearity of the target signal channel.

[0058] By calibrating the initial expected delay value, a baseline expected delay value is obtained.

[0059] In one specific embodiment, the linearity is calculated as follows: the linearity W corresponding to the adjustable delay unit in the target signal channel is obtained by dividing the maximum actual delay value of the target signal channel (the maximum actual delay value is the difference between the actual delay value output when the target signal channel is configured with the maximum expected delay value and the actual delay value output when the target signal channel is configured with the expected delay value of 0) by the maximum expected delay value of the target signal channel; the path skew value of the target signal channel is divided by the linearity W to obtain the initial expected delay value T_set0 of the target signal channel. After T_set0 is calibrated, the reference expected delay value T_set0' is obtained. For example, in the example of signal channel A above, the linearity W_A of signal channel A is (t2-t1) / TAmax_exp; the path skew value of signal channel A is skewA, and the initial expected delay value TA_set0 of signal channel A is skewA / W_A. It should be noted that when calculating linearity, other expected delay values ​​can also be used, as well as the ratio between the actual delay values ​​corresponding to other expected delay values, which will not be elaborated here.

[0060] In one embodiment, the correspondence between other expected delay values ​​and other actual delay values ​​of the target signal channel is obtained through the following steps: the adjustable delay unit of the target signal channel performs a delay based on the maximum expected delay value to obtain a first initial actual delay value; the adjustable delay unit of the target signal channel performs a delay based on the expected delay value being 0 to obtain a second initial actual delay value; based on the first initial actual delay value, the second initial actual delay value, and the channel skew value corresponding to the target signal channel, the maximum actual delay value corresponding to the maximum expected delay value is obtained; based on the baseline expected value and linearity of the target signal channel, M intermediate expected delay values ​​corresponding to M intermediate actual delay values ​​of the target signal channel are calculated, where the intermediate actual delay values ​​are greater than 0 and less than the maximum actual delay value; the maximum expected delay value and the M intermediate expected delay values ​​are used together as other expected delay values; the maximum actual delay value and the M intermediate actual delay values ​​are used together as other actual delay values; M is a positive integer.

[0061] Specifically, when the first initial actual delay value and the second initial actual delay value are obtained, the difference between the first initial delay value and the second initial delay value can be calculated first. Then, the difference between this difference and the channel skew value corresponding to the target signal channel is used to obtain the maximum actual delay value corresponding to the maximum expected delay value. It should be noted that both the first initial actual delay value and the second initial actual delay value can be the actual delay values ​​compared to the reference edge after the calibration signal is delayed by the maximum expected delay value and the expected delay value of 0, respectively. For example, taking signal channel A in Figure 2 as an example, the first initial actual delay value is t2, the second initial actual delay value is t1, and the channel skew value of signal channel A is skewA. Then, the maximum actual delay value TmaxA_real corresponding to signal channel A is t2-t1-skewA.

[0062] Furthermore, the formula for calculating the intermediate expected delay value is as follows: Tmid_set = Tmid_real / W + T_set0'; where Tmid_set is the intermediate expected delay value, Tmid_real is the intermediate actual delay value, which can be determined according to the resolution of the delay amount required by the target signal channel (this delay amount resolution can correspond one-to-one with the resolution of the delay value output by the adjustable delay unit in the target signal channel, or it can be determined according to the resolution of the delay amount determined according to the requirements of the test signal output by the test equipment), T_set0' is the baseline expected delay value, and W is the linearity corresponding to the adjustable delay unit of the target signal channel.

[0063] Taking signal channel A in the above example, the intermediate expected delay value corresponding to any intermediate actual delay value TA_real of signal channel A is TAmid_set = TAmid_real / W_A + TA_set0'. Here, TAmid_set is the intermediate expected delay value of adjustable delay unit A in signal channel A, TAmid_real is the intermediate actual delay value of adjustable delay unit A in signal channel A, W_A is the linearity corresponding to adjustable delay unit A in target signal channel A, and T_set0' is the reference expected delay value of adjustable delay unit A in signal channel A.

[0064] If the expected delay value and the actual delay value of the target signal channel have a linear relationship, then no additional measurements are needed. The baseline expected delay value and other intermediate expected delay values ​​can be obtained directly through calculation, reducing measurement time and improving calibration efficiency. Intermediate expected delay values ​​corresponding to other intermediate actual delay values ​​are calculated using interpolation. The more expected delay values ​​and their corresponding actual delay values ​​there are, the more detailed the correspondence, the wider the delay range covered, and the more accurate the calibration results.

[0065] In another embodiment, any one of the N-1 signal channels is used as the target signal channel. If the correspondence between the expected delay value and the actual delay value of a target signal channel in the N-1 signal channels does not conform to a linear relationship, the reference expected delay value and the reference actual delay value of the target signal channel are obtained by the following steps: selecting several predicted expected values ​​based on the path skew value; the adjustable delay unit of the target signal channel performs delay according to the several predicted expected values ​​to obtain several predicted actual values; and determining the predicted expected value corresponding to the predicted actual value that is equal to the path skew value as the initial expected delay value. The predicted expected value includes the value that is equal to the path skew value and the value whose difference from the path skew value is within a preset range, that is, the predicted expected value is close to the path skew value.

[0066] By calibrating the initial expected delay value, a baseline expected delay value is obtained.

[0067] In this embodiment, selecting a value that is equal to or close to the path skew value as the expected prediction value can reduce measurement complexity, and the measured actual prediction value will be closer to or equal to the path skew value.

[0068] In another specific embodiment, the correspondence between other expected delay values ​​and other actual delay values ​​of the target signal channel is obtained by the following steps: the adjustable delay unit of the target signal channel performs a delay based on the maximum expected delay value to obtain a first initial actual delay value; the adjustable delay unit of the target signal channel performs a delay based on the expected delay value being 0 to obtain a second initial actual delay value; and the maximum actual delay value corresponding to the maximum expected delay value is obtained based on the first initial actual delay value, the second initial actual delay value, and the channel skew value corresponding to the target signal channel.

[0069] L intermediate expected delay values ​​are selected between the reference expected delay value and the maximum expected delay value of the target signal channel. The adjustable delay unit of the target signal channel performs delay according to the L intermediate expected delay values ​​to obtain L intermediate actual delay values. The maximum expected delay value and the L intermediate expected delay values ​​are used together as other expected delay values. The maximum actual delay value and the L intermediate actual delay values ​​are used together as other actual delay values. L is a positive integer greater than 1.

[0070] It should be noted that, in one implementation, when determining the correspondence between different expected delay values ​​and their corresponding actual delay values, the initial actual delay value can be determined according to the resolution of the delay amount required for each target signal channel of the test equipment (this delay amount resolution can correspond one-to-one with the resolution of the delay value output by the adjustable delay unit, or it can be determined according to the delay amount resolution determined by the requirements of the test signal output by the test equipment). The expected delay value is then input to the adjustable delay unit in each target signal channel according to each initial actual delay value. When the first delayed calibration signal output after the calibration signal is delayed by the adjustable delay unit in the target signal channel, and its delay value relative to the reference edge basically reaches the initial actual delay value, the expected delay value at this time is recorded. When the delay value of the first delayed calibration signal relative to the reference edge does not reach the initial actual delay value, different expected delay values ​​are continued to be input to the adjustable delay unit in each target signal channel until the delay value of the first delayed calibration signal relative to the reference edge basically reaches the initial actual delay value. In this way, the correspondence between the final recorded expected delay value and the actual delay value can be the correspondence between the initial actual delay value and the expected delay value that can output the initial actual delay value. Alternatively, when determining the correspondence between different expected delay values ​​and their corresponding actual delay values, the initial expected delay value can be input to the adjustable delay unit according to the resolution of the delay required for each target signal channel of the test equipment. When the calibration signal is delayed in the target signal channel by the adjustable delay unit and outputs the first delayed calibration signal, compared to the actual delay value of the reference edge, the relationship between the initial expected delay value and the actual delay value at this time is recorded. The recorded relationship between the expected delay value and the actual delay value at this time can be the relationship between the initial expected delay value and the actual delay value.

[0071] In one embodiment, selecting L intermediate expected delay values ​​between the reference expected delay value and the maximum expected delay value of the target signal channel includes: dividing the reference expected delay value and the maximum expected delay value of the target signal channel into at least two intervals, selecting at least one intermediate expected delay value in each interval, and obtaining L intermediate expected delay values.

[0072] In one embodiment, when measuring the actual delay value, the adjustable delay unit in the signal channel performs multiple measurements for the same desired delay value to obtain multiple actual measured delay values. The average of these multiple measured delay values ​​is then taken to obtain the actual delay value. In this embodiment, with all settings remaining constant, multiple actual measured delay values ​​are obtained for the same desired delay value through multiple measurements, and the average value is calculated to obtain the actual delay value, thereby eliminating the impact of random jitter in the system.

[0073] In one embodiment, a reference expected delay value is obtained by calibrating the initial expected delay value, including: the adjustable delay unit of the target signal channel performs a delay based on the initial expected delay value obtained from the path skew value, and obtains the actual delay value corresponding to the initial expected delay value; the difference between the actual delay value corresponding to the expected delay value of the reference channel being 0 and the actual delay value corresponding to the initial expected delay value of the target signal channel is calculated to obtain a new path skew value of the target signal channel; if the new path skew value exceeds the set range, the initial expected delay value of the target signal channel is adjusted until the new path skew value of the target signal channel is within the set range.

[0074] The new initial expected delay values ​​corresponding to the new path skew values ​​within the set range are respectively determined as the baseline expected delay values.

[0075] It should be noted that the calibration of the initial expected delay value in this embodiment is applicable to the calibration of the initial expected delay value obtained by using the path skew value and linearity, as well as the calibration of the predicted expected value obtained by predicting the actual value as the initial delay value.

[0076] In this embodiment, during the calibration process of the initial expected delay value, the difference between the actual delay value corresponding to the expected delay value of the reference channel being 0 and the actual delay value corresponding to the initial expected delay value of the target signal channel is calculated to obtain a new path skew value. If the new path skew value exceeds the set range, it means that the delayed signal of the target signal channel is not aligned with the delayed signal of the reference channel. By adjusting the initial expected delay value of the target signal channel until the new path skew value is within the set range, it is ensured that the signal obtained by the target signal channel after delay according to the initial expected delay value can be aligned with the signal obtained by the reference channel after delay according to the expected delay value of 0. That is, the actual delay effect of the target signal channel and the reference channel on the calibration signal is the same, thereby improving the accuracy of the path skew calibration of the target signal channel.

[0077] In one embodiment, after obtaining the correspondence between other expected delay values ​​and other actual delay values ​​of the N-1 signal channels based on the reference expected delay value and the reference actual delay value, the method further includes: setting both the reference expected delay value and the actual delay value corresponding to the reference expected delay value to 0; the adjustable delay unit of the reference channel performing a delay based on the maximum expected delay value to obtain a third initial actual delay value; and the adjustable delay unit of the reference channel performing a delay when the expected delay value is 0 to obtain a fourth initial actual delay value. Based on the third and fourth initial actual delay values, the maximum actual delay value corresponding to the maximum expected delay value is obtained. If the correspondence between the expected delay value and the actual delay value of the reference channel conforms to a linear relationship, the intermediate expected delay value corresponding to the intermediate actual delay value of the reference channel is calculated based on the linearity of the adjustable delay unit of the reference channel. Based on the reference expected delay value of the reference channel and the corresponding actual delay value, maximum expected delay value, maximum expected delay value, intermediate expected delay value, and intermediate actual delay value, the maximum expected ... The correspondence between different expected delay values ​​and actual delay values ​​is recorded in the delay lookup memory unit of the reference channel to complete the recording of the correspondence between expected and actual delay values ​​in the lookup memory units of N signal channels. If the correspondence between the expected and actual delay values ​​of the reference channel does not conform to a linear relationship, then P unmeasured intermediate expected delay values ​​of the reference channel are selected, and the adjustable delay unit in the reference channel performs delay based on the P intermediate expected delay values ​​respectively. P intermediate actual delay values ​​are obtained. Based on the reference expected delay value of the reference channel and the corresponding actual delay value, maximum expected delay value, P intermediate expected delay values, and P intermediate actual delay values, the correspondence between different expected delay values ​​and actual delay values ​​of the reference channel is obtained. The correspondence between different expected delay values ​​and actual delay values ​​of the reference channel is recorded in the delay lookup storage unit of the reference channel to complete the recording of the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage unit of N signal channels. P is a positive integer.

[0078] In this embodiment, the reference expected delay value and the actual value corresponding to the reference expected delay value of the reference channel are both recorded as 0. When the third initial actual delay value and the fourth initial actual delay value are obtained, the difference between the third initial actual delay value and the fourth initial actual delay value is calculated to obtain the maximum actual delay value corresponding to the maximum expected value. It should be noted that the third initial actual delay value and the fourth initial actual delay value can both be the actual delay value of the calibration signal after being delayed according to the maximum expected delay value and the expected delay value of 0, respectively, compared with the reference edge.

[0079] Other expected delay values ​​and other actual delay values ​​can be obtained as follows: At least three expected delay values ​​are input to the adjustable delay unit in the reference channel. The adjustable delay unit in the reference channel delays the calibration signal according to the expected delay values ​​to obtain the first delayed calibration signal. The actual delay value of the first delayed calibration signal compared to the reference edge is measured. Based on the at least three expected delay values ​​and the corresponding actual delay values ​​for each signal channel, the correspondence between the expected delay value and the actual delay value of each signal channel is calculated and determined to be linear. When the correspondence between the expected delay value and the actual delay value of the reference channel is linear, the linearity of the reference channel is calculated, which is to calculate the maximum actual delay value of the reference channel (the maximum actual delay value refers to the maximum expected delay configured for the reference channel). The linearity of the adjustable delay unit in the reference channel can be obtained by dividing the actual delay value output when the reference channel is configured with a desired delay value of 0 by the actual delay value output. This is calculated as W = (Treal_max - Treal_0) / Tmax_exp, where Treal_max is the actual delay value output when the maximum desired delay value is input to the adjustable delay unit of the reference channel, Treal_0 is the actual delay value output when the desired delay value is 0, and Tmax_exp is the maximum desired delay value. Once the linearity is obtained, the intermediate actual delay value can be calculated by dividing any intermediate actual delay value of the adjustable delay unit in the reference channel by the linearity. Taking signal channel B as an example (i.e., 2-E and 2-F in Figure 2), signal channel B serves as the reference channel; therefore, the linearity of this reference channel is W_B = (t5 - t4) / Tmax_exp. At this point, the ratio of any intermediate actual delay value to the linearity of signal channel B can be used to obtain the intermediate expected delay value corresponding to each intermediate actual delay value. That is, the expected delay value can be obtained according to the following formula: TBmid_set = TBmid_real / W_B, where TBmid_set represents the intermediate expected delay value corresponding to the intermediate actual delay value, TB_real represents the intermediate actual delay value, and W_B represents the linearity corresponding to the adjustable delay unit B in signal channel B. By recording the reference expected delay value and its corresponding actual delay value, maximum expected delay value, maximum expected delay value, intermediate expected delay value, and intermediate actual delay value, the correspondence between the expected delay value and the actual delay value of the reference channel can be obtained. It should be noted that the intermediate actual delay value of the reference channel can be determined according to the resolution of the delay amount required by the reference channel of the test equipment (the resolution of this delay amount can correspond one-to-one with the resolution of the delay value output by the adjustable delay unit).

[0080] When the correspondence between the expected delay value and the actual delay value of the reference channel does not conform to a linear relationship, it is necessary to obtain the correspondence between different expected delay values ​​and their corresponding actual delay values ​​through measurement. That is, P unmeasured intermediate expected delay values ​​of the reference channel can be selected, and the delay amount among the P intermediate expected delay values ​​can be consistent. In this way, P intermediate actual delay values ​​can be measured to establish the correspondence between different expected delay values ​​and their corresponding actual delay values. At this time, the measurement method can be the same as the method for determining the correspondence between different expected delay values ​​and their corresponding actual delay values ​​of the target channel, which will not be elaborated here.

[0081] In one embodiment, after recording the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage units of N signal channels, the method further includes: the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage units of each signal channel includes multiple sets of one-to-one correspondences between expected delay values ​​and actual delay values; sequentially verifying whether the correspondence between each set of expected delay values ​​and actual delay values ​​in each signal channel is correct; if the verification delay value obtained by the adjustable delay unit based on the expected delay value in the current set is inconsistent with the actual delay value corresponding to the expected delay value in the current set in the delay lookup storage unit, then adjusting the correspondence between the expected delay value and actual delay value in the current set; sequentially verifying whether the correspondence between each set of expected delay values ​​and actual delay values ​​in each signal channel is correct, until the verification delay value obtained by the expected delay value in the current set is consistent with the actual delay value corresponding to the expected delay value in the current set in the delay lookup storage unit, thereby completing the verification of the correspondence between expected delay values ​​and actual delay values.

[0082] In this embodiment, the correspondence between the expected delay value and the actual delay value of each group is checked one by one. If the correspondence between the expected delay value and the actual delay value is incorrect, the expected delay value or the actual delay value of the group can be increased or decreased accordingly. Then, the correspondence between the expected delay value and the actual delay value of the adjusted group is checked again. Through multiple verifications and adjustments, the accuracy of the correspondence between the expected delay value and the actual delay value of each group is ensured. For example, taking the verification of the correspondence between a set of expected delay values ​​and actual delay values ​​as an example, the required delay value is set, the actual delay value that matches the required delay value is found, the expected delay value corresponding to the matched actual delay value is configured to the adjustable delay unit, the new actual delay value of the waveform after the delay of the adjustable delay unit through the signal channel is measured, and it is determined whether the new actual delay value and the required delay value are consistent. If they are consistent, the correspondence between the expected delay value and the actual delay value is considered to be correct. If they are inconsistent, for example, the new actual delay value is larger than the required delay value, the expected delay value corresponding to the actual delay value that matches the required delay value in the correspondence is reduced. In this way, the actual delay value output by the adjustable delay unit can be reduced to achieve the required delay value. Alternatively, the same method can be used to determine whether the new actual delay value and the required delay value are consistent. If they are consistent, the correspondence between the expected delay value and the actual delay value is considered correct. If they are inconsistent, for example, if the new actual delay value is larger than the required delay value, the actual delay value in the correspondence is reduced, thereby updating the correspondence between the expected delay value and the actual delay value.

[0083] In one specific embodiment, after verifying the correspondence between the expected delay value and the actual delay value, the method further includes: by setting the same required actual delay value, the delay lookup storage unit of the N signal channels finds the expected delay value corresponding to the actual delay value according to the required actual delay value and outputs the expected delay value to the corresponding adjustable delay unit. The adjustable delay unit in each signal channel performs delay processing according to the input expected delay value, and the calibration delay unit of each signal channel performs delay processing according to the corresponding configured expected compensation value, thereby obtaining the test signals of the N signal channels. The waveforms of the test signals of the N signal channels are compared to see if they are consistent. If they are, the calibration of the N signal channels is completed; if not, the process returns to step S1.

[0084] This invention provides a signal synthesis method for signal channels, employing a test device calibrated using the calibration method described in any of the above embodiments. The signal synthesis method includes: edge generation registers in N signal channels generating N initial signals according to the clock cycle of the test device, with each signal channel corresponding to one of the initial signals, and N being a positive integer greater than 1; a delay lookup storage unit in each signal channel obtaining a desired delay value corresponding to the actual delay value required by the corresponding signal channel and outputting the desired delay value to the corresponding adjustable delay unit; the adjustable delay unit in each signal channel performing delay processing on the corresponding initial signal according to the desired delay value output by the corresponding delay lookup storage unit to obtain a delayed signal; and synthesizing the delayed signals of the N signal channels through a logic operation unit to obtain a synthesized signal.

[0085] In this embodiment, the delay lookup storage unit of each signal channel searches for the correspondence between different expected delay values ​​and actual delay values ​​according to the required actual delay value, and obtains the expected delay value corresponding to the actual delay value. The adjustable delay unit delays the initial signal according to the expected delay value output by the delay lookup storage unit, so that the adjustable delay unit of each signal channel obtains an actual delay effect that matches the required actual delay value after performing the delay, so as to ensure the alignment of the N signal channels. That is, when the adjustable delay units of the N signal channels are configured with the same expected delay value, after the initial signal is delayed by their respective adjustable delay units, the same edges in the initial signal are delayed by the same time, ensuring the consistency between the synthesized actual waveform and the expected waveform.

[0086] This invention provides a signal synthesis device for signal channels, applied in a test device. The test device has N signal channels. The signal synthesis device is calibrated using the calibration method described in any of the above embodiments. Referring to Figure 3, the signal synthesis device includes: N edge generator registers, N adjustable delay chain units, N delay lookup storage units, and a logic operation unit, where N is a positive integer greater than 1. The N edge generator registers are respectively located on the N signal channels and connected to the adjustable delay units of the corresponding signal channels. The edge generator registers are used to generate an initial signal according to the clock cycle of the test device and transmit the initial signal to the corresponding adjustable delay unit. Each signal... The delay lookup storage unit of each channel has a built-in correspondence between the expected delay value and the actual delay value of the corresponding signal channel. The delay lookup storage unit is used to obtain the expected delay value corresponding to the actual delay value on the corresponding signal channel and output the expected delay value to the corresponding adjustable delay unit. Each adjustable delay unit is connected to a corresponding delay lookup storage unit. The adjustable delay unit is used to perform delay processing on the corresponding initial signal to obtain a delayed signal based on the expected delay value output by the corresponding delay lookup storage unit. The logic operation unit is connected to N adjustable delay units and is used to synthesize the delayed signals of N signal channels to obtain a synthesized signal.

[0087] It should be noted that, in some embodiments, the above-mentioned signal channel correction device may be located on an FPGA (Field Programmable Gate Array) chip, but is not limited thereto, and the above-mentioned logic operation unit may include a waveform synthesis unit, a waveform edge elimination register, etc.; the above-mentioned delay lookup storage unit may include a lookup table in the FPGA, or other memory that implements storage functions, such as RAM (Random Access Memory), etc.

[0088] Through the above description of the embodiments, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0089] In the various embodiments of this invention, the functional units can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0090] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as flash memory, portable hard disk, read-only memory, random access memory, magnetic disk, or optical disk.

[0091] While embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations fall within the scope and spirit of the invention as defined in the claims. Furthermore, the invention described herein may have other embodiments and can be implemented or carried out in various ways. Unless otherwise defined, the technical or scientific terms used herein should be understood in their ordinary sense by one of ordinary skill in the art to which this invention pertains.

Claims

1. A calibration method for a signal channel in a testing device, characterized in that, The calibration method includes: selecting at least one signal channel other than the N signal channels as a reference output path, the reference output path outputting a reference signal, and determining a rising edge or falling edge of the reference signal as a reference edge to serve as the calibration benchmark for the N signal channels; the edge generation registers in the N signal channels generate N calibration signals according to the clock cycle of the test equipment, and the edge generation registers transmit the calibration signals to the adjustable delay units connected to the edge generation registers in the corresponding signal channels, the signal channels corresponding one-to-one with the calibration signals, and N being a positive integer greater than 1; inputting a desired delay value of 0 to the adjustable delay unit, comparing the signal output by the N signal channels after delaying the calibration signal with the actual delay value of the reference edge, and determining the signal channel with the largest actual delay value as the reference channel. The method involves using the actual delay value corresponding to the expected delay value of 0 input to the adjustable delay unit for each signal channel, calculating the path skew value of N-1 signal channels (excluding the reference channel) compared to the reference channel, obtaining the corresponding reference expected delay value based on the path skew value, and recording the actual delay value corresponding to the reference expected delay value as 0; obtaining the correspondence between other expected delay values ​​and other actual delay values ​​of the N-1 signal channels based on the reference expected delay value and the corresponding actual delay value; recording the reference expected delay value and the corresponding actual delay value of the N-1 signal channels, as well as the correspondence between other expected delay values ​​and other actual delay values, in the delay lookup storage unit of the corresponding signal channel, wherein the delay lookup storage unit is connected to the adjustable delay unit.

2. The calibration method according to claim 1, characterized in that, After the edge generation register transmits the calibration signal to the adjustable delay unit connected to the edge generation register in the corresponding signal channel, and before the expected delay value of 0 is input to the adjustable delay unit, and the signal output by the N signal channels after delaying the calibration signal is compared with the actual delay value of the reference edge, the method further includes: inputting at least three expected delay values ​​to the adjustable delay unit in each signal channel; the adjustable delay unit in each signal channel delays the calibration signal according to the expected delay values ​​to obtain a first delayed calibration signal; measuring the actual delay value of the first delayed calibration signal compared with the reference edge; and calculating and determining whether the correspondence between the expected delay value and the actual delay value of each signal channel conforms to a linear relationship based on the at least three expected delay values ​​and the actual delay values ​​corresponding to the three expected delay values ​​of each signal channel.

3. The calibration method according to claim 2, characterized in that, If any one of the N-1 signal channels is taken as the target signal channel, and the correspondence between the expected delay value and the actual delay value of the target signal channel conforms to a linear relationship, then the reference expected delay value of the target signal channel is obtained by the following steps: calculating the linearity of the adjustable delay unit of the target signal channel based on at least three expected delay values ​​and the corresponding actual delay values; obtaining the initial expected delay value of the target signal channel based on the path skew value and the linearity; and obtaining the reference expected delay value by calibrating the initial expected delay value.

4. The calibration method according to claim 3, characterized in that, The correspondence between other expected delay values ​​and other actual delay values ​​of the target signal channel is obtained through the following steps: the adjustable delay unit of the target signal channel performs a delay based on the maximum expected delay value to obtain a first initial actual delay value, and the adjustable delay unit of the target signal channel performs a delay based on the expected delay value being 0 to obtain a second initial actual delay value; based on the first initial actual delay value, the second initial actual delay value, and the channel skew value corresponding to the target signal channel, the maximum actual delay value corresponding to the maximum expected delay value is obtained; based on the reference expected value corresponding to the target signal channel and the linearity, M intermediate expected delay values ​​corresponding to M intermediate actual delay values ​​of the target signal channel are calculated, where the intermediate actual delay values ​​are greater than 0 and less than the maximum actual delay value; the maximum expected delay value and the M intermediate expected delay values ​​are used together as the other expected delay values; the maximum actual delay value and the M intermediate actual delay values ​​are used together as the other actual delay values, where M is a positive integer.

5. The calibration method according to claim 2, characterized in that, If any one of the N-1 signal channels is taken as the target signal channel, and the correspondence between the expected delay value and the actual delay value of the target signal channel does not conform to a linear relationship, then the reference expected delay value and the reference actual delay value of the target signal channel are obtained by the following steps: selecting several predicted expected values ​​based on the path skew value; the adjustable delay unit of the target signal channel performs a delay based on the several predicted expected values ​​to obtain several predicted actual values; the predicted expected value corresponding to the predicted actual value that is equal to the path skew value is determined as the initial expected delay value; and the reference expected delay value is obtained by calibrating the initial expected delay value.

6. The calibration method according to claim 5, characterized in that, The correspondence between other expected delay values ​​and other actual delay values ​​of the target signal channel is obtained through the following steps: the adjustable delay unit of the target signal channel performs a delay based on the maximum expected delay value to obtain a first initial actual delay value, and the adjustable delay unit of the target signal channel performs a delay based on the expected delay value being 0 to obtain a second initial actual delay value. Based on the first initial actual delay value, the second initial actual delay value, and the channel skew value corresponding to the target signal channel, the maximum actual delay value corresponding to the maximum expected delay value is obtained. L intermediate expected delay values ​​are selected between the reference expected delay value and the maximum expected delay value of the target signal channel. The adjustable delay unit of the target signal channel performs a delay based on the L intermediate expected delay values ​​to obtain L intermediate actual delay values. The maximum expected delay value and the L intermediate expected delay values ​​are used together as the other expected delay values. The maximum actual delay value and the L intermediate actual delay values ​​are used together as the other actual delay values, where L is a positive integer greater than 1.

7. The calibration method according to claim 6, characterized in that, Selecting L intermediate expected delay values ​​between the reference expected delay value and the maximum expected delay value of the target signal channel includes: dividing the reference expected delay value and the maximum expected delay value of the target signal channel into at least two intervals, and selecting at least one intermediate expected delay value in each interval to obtain L intermediate expected delay values.

8. The calibration method according to claim 3 or 5, characterized in that, The initial expected delay value is calibrated to obtain a reference expected delay value, including: the adjustable delay unit of the target signal channel performs a delay based on the initial expected delay value of the target signal channel to obtain the actual delay value corresponding to the initial expected delay value; the difference between the actual delay value corresponding to the expected delay value of the reference channel being 0 and the actual delay value corresponding to the initial expected delay value of the target signal channel is calculated to obtain a new path skew value of the target signal channel; if the new path skew value exceeds a set range, the initial expected delay value of the target signal channel is adjusted until the new path skew value of the target signal channel is within the set range; the new initial expected delay values ​​corresponding to the new path skew values ​​within the set range are respectively determined as reference expected delay values.

9. The calibration method according to claim 2, characterized in that, Based on the reference expected delay value and reference actual delay value of the N-1 signal channels, after obtaining the correspondence between other expected delay values ​​and other actual delay values ​​of the N-1 signal channels, the method further includes: setting both the reference expected delay value and the corresponding actual delay value of the reference channel to 0; the adjustable delay unit of the reference channel performing a delay based on the maximum expected delay value to obtain a third initial actual delay value; and the adjustable delay unit of the reference channel performing a delay when the expected delay value is 0 to obtain a fourth initial actual delay value. The actual delay value and the fourth initial actual delay value are used to obtain the maximum actual delay value corresponding to the maximum expected delay value. If the correspondence between the expected delay value and the actual delay value of the reference channel conforms to a linear relationship, the intermediate expected delay value corresponding to the intermediate actual delay value of the reference channel is calculated based on the linearity of the adjustable delay unit of the reference channel. Based on the reference expected delay value of the reference channel and the actual delay value, maximum expected delay value, maximum expected delay value, intermediate expected delay value, and intermediate actual delay value corresponding to the reference expected delay value, the different values ​​of the reference channel are obtained. The correspondence between expected and actual delay values ​​is recorded in the delay lookup storage unit of the reference channel, thus completing the recording of the correspondence between expected and actual delay values ​​in the lookup storage units of N signal channels. If the correspondence between the expected and actual delay values ​​of the reference channel does not conform to a linear relationship, then P unmeasured intermediate expected delay values ​​of the reference channel are selected, and the adjustable delay unit in the reference channel performs delay according to the P intermediate expected delay values ​​respectively. Then, P intermediate actual delay values ​​are obtained. Based on the reference expected delay value of the reference channel and the actual delay value, maximum expected delay value, P intermediate expected delay values, and P intermediate actual delay values, the correspondence between different expected delay values ​​and actual delay values ​​of the reference channel is obtained. The correspondence between different expected delay values ​​and actual delay values ​​of the reference channel is recorded in the delay lookup storage unit of the reference channel to complete the recording of the correspondence between expected delay values ​​and actual delay values ​​in the lookup storage unit of N signal channels, where P is a positive integer.

10. The calibration method according to claim 9, characterized in that, After recording the correspondence between the expected delay value and the actual delay value in the lookup storage unit of the N signal channels, the method further includes: the correspondence between the expected delay value and the actual delay value in the lookup storage unit of each signal channel includes multiple sets of one-to-one correspondences between expected delay values ​​and actual delay values; the method sequentially verifies whether the correspondence between each set of expected delay values ​​and actual delay values ​​in each signal channel is correct; if the verification delay value obtained by the adjustable delay unit based on the expected delay value in the current group is inconsistent with the actual delay value corresponding to the expected delay value in the current group in the delay lookup storage unit, the method adjusts the correspondence between the expected delay value and the actual delay value in the current group until the verification delay value obtained by the expected delay value in the current group is consistent with the actual delay value corresponding to the expected delay value in the current group in the delay lookup storage unit.

11. The calibration method according to any one of claims 2-7, 9 or 10, characterized in that, The input expected delay value includes 0, the maximum expected value of the input signal channel, and any value between 0 and the maximum expected value of the input signal channel.

12. A signal synthesis method for a signal channel, characterized in that, Using a test device calibrated by any one of the calibration methods described in claims 1-11, the signal synthesis method includes: an edge generation register in N signal channels generating N initial signals according to the clock cycle of the test device, wherein each signal channel corresponds one-to-one with the initial signal, and N is a positive integer greater than 1; a delay lookup storage unit in each signal channel obtaining an expected delay value corresponding to the actual delay value required by the corresponding signal channel and outputting the expected delay value to the corresponding adjustable delay unit; an adjustable delay unit in each signal channel performing delay processing on the corresponding initial signal according to the expected delay value output by the corresponding delay lookup storage unit to obtain a delayed signal; and synthesizing the delayed signals of the N signal channels by a logic operation unit to obtain a synthesized signal.

13. A signal synthesis apparatus for a signal channel, characterized in that, The signal synthesis device is applied in a test equipment having N signal channels. The signal synthesis device is calibrated using the calibration method described in any one of claims 1-11. The signal synthesis device includes: N edge generator registers, N adjustable delay chain units, N delay lookup memory units, and a logic operation unit, where N is a positive integer greater than 1. The N edge generator registers are respectively located on the N signal channels and connected to the corresponding adjustable delay units of the signal channels. The edge generator registers are used to generate an initial signal according to the clock cycle of the test equipment and transmit the initial signal to the corresponding adjustable delay unit. Each delay lookup memory unit of the signal channel has a built-in corresponding... The correspondence between the expected delay value and the actual delay value of the signal channel is defined. The delay lookup storage unit is used to obtain the expected delay value corresponding to the actual delay value on the corresponding signal channel and output the expected delay value to the corresponding adjustable delay unit. Each adjustable delay unit is connected to a corresponding delay lookup storage unit. The adjustable delay unit is used to perform delay processing on the corresponding initial signal to obtain a delayed signal based on the expected delay value output by the corresponding delay lookup storage unit. The logic operation unit is connected to the N adjustable delay units and is used to synthesize the delayed signals of the N signal channels to obtain a synthesized signal.