Distributed temperature real-time monitoring method for integrated chip micromodules

Abstract

The invention discloses an integrated chip micromodule distributed temperature real-time monitoring method, which belongs to the field of semiconductor device degradation monitoring, and comprises the following steps: extracting an integrated chip micromodule distributed temperature map; modeling for mapping the actual working temperature through a micro-module test vector; the invention discloses a method for realizing distributed temperature real-time monitoring and power consumption early warning of an integrated chip based on ATE. According to the method, the integrated chip is not invaded, and the performance and the time sequence of the integrated chip micromodule are not influenced; a device distributed temperature value which is difficult to obtain or obtained through an intrusive temperature sensor is measured through a test vector, and a device temperature and a transient power consumption value are obtained by using an artificial intelligence model; the problems of additional time sequence path interference, additional cost or power consumption caused by an intrusive temperature sensor to the design of the integrated chip are effectively solved, the heat distribution condition of the micro-module in the integrated chip can be fed back online in real time, and finally the current degradation level of a device is measured.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device degradation monitoring technology, and in particular to a method for distributed real-time temperature monitoring of integrated chip micro-modules. Background Technology

[0002] As the complexity of integrated chips continues to increase, the inherent deviations brought about by nanoscale processes and the combination of harsh working environments accelerate the chip aging process. Among them, HCI (hot carrier injection), NBTI (negative bias temperature instability), and TDDB (time dielectric breakdown) are the core causes of transistor aging. Under advanced processes, NBTI has become the dominant factor, and its degradation degree is closely related to parameters such as voltage, temperature, and signal probability (SP).

[0003] Monitoring and predicting the degradation level and lifetime of integrated circuits has become crucial for ensuring system reliability, but existing technologies still have many limitations. Traditional monitoring methods primarily face a trade-off between accuracy and invasiveness: failure prediction based on aging characterization circuits can only provide basic early warnings and suffers from poor stability, making it prone to misjudgments; while methods based on failure symptom monitoring can improve accuracy, they require setting up detection nodes deep within the chip, significantly interfering with chip performance, and are particularly unsuitable for complex structures such as multi-channel intelligent computing chips. The most widely used method is the mainstream model-based prediction method, but it also faces bottlenecks: non-lifetime degradation models rely on aging characteristic parameters such as path delay and threshold voltage as inputs, and the process of obtaining these parameters has the same invasiveness problem as failure symptom monitoring; lifetime degradation models are mostly constructed using machine learning, which can address the causes of aging, but directly detecting key input parameters such as SP requires embedding dedicated detection circuits, significantly impacting chip performance and increasing power consumption. Aging testing of advanced packaged devices also faces the problems of high cost and long cycles; the chiplet architecture further makes it difficult for post-package testing to cover the complete logic and interconnect degradation.

[0004] Chip aging is essentially a time-cumulative function of parameters such as temperature, voltage, and workload. Temperature is strongly correlated with the NBTI effect and directly determines the internal node stress state. Dynamic adjustments in thermal management technologies cause voltage and load to fluctuate drastically over time; relying solely on static physical parameters or pessimistic assumptions for modeling severely reduces prediction accuracy. The above research indicates that real-time thermal distribution monitoring is the core foundation for achieving proactive thermal management and avoiding thermal runaway-accelerated aging, directly determining the accuracy of integrated chip reliability and lifespan assessment. However, distributed temperature monitoring within integrated chips using built-in temperature sensors is insufficient to overcome the limitations imposed by power and temperature walls. A fast and accurate real-time distributed temperature monitoring method for integrated chip micro-modules is needed to assess the complete logic and interconnect degradation of integrated chips under non-invasive measurement conditions. Summary of the Invention

[0005] The purpose of this invention is to provide a method for real-time monitoring of the distributed temperature of an integrated chip micromodule, which solves the problem of traditional methods that are difficult to obtain or that obtain the distributed temperature value of the device through invasive temperature sensors. At the same time, it can provide online real-time feedback on the distributed temperature of the integrated chip micromodule, and ultimately realize the problems in real-time monitoring of integrated chip power consumption and estimation of degradation level.

[0006] To address the aforementioned technical problems, this invention provides a method for distributed real-time temperature monitoring of an integrated chip micromodule, comprising: Step 1: Extract the distributed temperature spectrum of the integrated chip micro-module; Step 2: Model the actual operating temperature by testing vector mapping through micro-modules; Step 3: A method for implementing distributed real-time temperature monitoring and power consumption warning of integrated chips based on ATE.

[0007] In one embodiment, the extraction of the distributed temperature spectrum of the integrated chip micromodule includes: when the integrated chip is running a specific micromodule input stimulus, generating a three-dimensional temperature feature spectrum through thermal distribution simulation software, and extracting the distributed temperature spectrum corresponding to the micromodule test vector using Python or other scripting languages.

[0008] In one implementation, the modeling method from the micro-module test vector to the actual operating temperature of the device is a multi-objective optimization modeling method. The input data consists of two parts: the micro-module category and the test vector corresponding to the micro-module. The output is the distributed temperature value of each module or region of the device.

[0009] In one implementation, the micro-module category includes processor blocks, memory blocks, transmission interface blocks, and signal conversion blocks.

[0010] In one implementation, the frequency of 0 and 1 flips in the test vector corresponding to the micro-module, the number of micro-modules activated simultaneously, and the interconnection state also need to be considered in the modeling.

[0011] In one embodiment, the integrated chip is connected to an automated test system via a device under test (DUT) test board. Test vectors are input to the corresponding micro-modules through the automated test system according to specified pins and routing paths to test the performance and parameters of specific modules of the device.

[0012] In one implementation, while testing the performance and parameters of specific modules of the device, input variables are collected and uploaded to the host computer via serial port, and the distributed temperature and transient power consumption of the device are estimated in real time based on the established model.

[0013] In one implementation, the real-time estimated distributed temperature and transient power consumption values ​​are substituted into the historical dataset to determine the current reliability status of the device and achieve power consumption warning.

[0014] This invention provides a method for real-time distributed temperature monitoring of integrated chip micromodules. Because it uses simulation modeling, it is non-invasive to the integrated chip itself and has no impact on the performance and timing of the integrated chip micromodules. It measures the distributed temperature values ​​of the device, which are difficult to obtain or can be acquired through invasive temperature sensors, using test vectors and employing an artificial intelligence model to obtain the device temperature and transient power consumption values. This invention effectively solves the problems of additional timing path interference, additional cost, or power consumption caused by invasive temperature sensors to integrated chip designs. Simultaneously, it can provide online real-time feedback on the thermal distribution of the micromodules inside the integrated chip, ultimately measuring the current degradation level of the device. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a distributed real-time temperature monitoring method based on an integrated chip micromodule proposed in this invention.

[0016] Figure 2 This is a functional module block diagram of the implementation of the distributed real-time temperature monitoring method based on ATE integrated chip micro-module proposed in this invention. Detailed Implementation

[0017] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the distributed real-time temperature monitoring method for integrated chip micromodules proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0018] This invention provides a distributed real-time temperature monitoring method for integrated chip micromodules based on ATE (Automatic Temperature Detection), the process of which is as follows: Figure 1 As shown, it includes the following two parts: S1: Modeling actual operating temperature by mapping test vectors through micromodules: The modeling approach for micro-module test vectors to distributed temperature is based on machine learning. The input data consists of two parts: the micro-module category and its corresponding test vector. The output is the distributed temperature of each region within the integrated chip micro-module. Since the relationship between the micro-module test vector and its corresponding actual operating temperature needs to consider the micro-module category simultaneously—different micro-modules and test vectors correspond to different temperature values ​​and transient power consumption values ​​in different regions—this project uses a widely applicable multi-objective optimization modeling algorithm to construct the model.

[0019] The extraction of distributed temperature profiles of integrated chip micro-modules is performed through simulation. When the integrated chip operates a specific micro-module input stimulus, a three-dimensional temperature feature profile is generated by thermal distribution simulation software. Then, the distributed temperature profile corresponding to the micro-module test vector is extracted using Python or other scripting languages.

[0020] To obtain the distributed temperature of the integrated chip micromodule under the influence of different functional vectors, several benchmark test stimuli were run to simulate and extract the distributed temperature spectrum caused by the functional test vectors. Then, a model was trained using the statistically obtained variables, with the functional test vector as the input and the distributed temperature as the output.

[0021] S2: A method for implementing distributed real-time temperature monitoring and power consumption warning of integrated chips based on ATE: Based on the ATE (Automatic Test Equipment) system, functional test vectors with self-generated or additional requirements are sent. The host computer software identifies and distinguishes the activation quantity and interconnection status of the sent test vectors, while preprocessing and analyzing the modeling input variables. The processed data is then substituted into the distributed temperature prediction model trained in S1 to measure the distributed temperature value DT' of the integrated chip micromodule in real time. This value is initially compared with the simulated distributed temperature DT0. If the comparison results are inconsistent (greater than ±2℃), the preprocessing weights need to be adjusted and the prediction re-enhanced. If the results are basically consistent (no greater than ±2℃), the real-time distributed temperature and transient power consumption values ​​of the integrated chip micromodule are obtained. These values ​​are then substituted into the device's historical dataset to reflect the current degradation level and reliability in real time.

[0022] Modeling the distributed temperature of integrated chip micromodules from test vectors requires analyzing the test vectors. The model input consists of two parts: the micromodule category and the corresponding specific test vector. Taking an integrated chip with basic functions as an example, the micromodule categories can be divided into four types: processor block, memory block, transmission interface block, and signal conversion block. Different test vectors for different micromodules result in different distributed temperature values ​​for the integrated chip; therefore, the micromodule category needs to be considered in the modeling. In addition, the frequency of 0 and 1 toggles in the test vector, the number of simultaneously activated micromodules, interconnect states (12 / 13 / 14 / 23 / 24 / 34 / 123 / 124 / 234 / 1234), and interconnect weights also need to be considered in the modeling. The model output is the distributed temperature change of each module of the integrated chip. The distributed temperature change of each module of the integrated chip is simulated using thermal distribution simulation software, such as ANSYS Icepak or other thermal distribution simulation software, to obtain the distributed temperature spectrum.

[0023] The interconnection weights of the micro-modules are calculated using an improved thermal contribution weighting method. Ohm's thermal law is as follows: QUOTE For micro modules i The resulting localized temperature rise (with ambient temperature as a reference); QUOTE For micro modules i Power consumption (unit: watts (W)); QUOTE For micro-modules i The thermal resistance (in °C / W) from the heat source to the reference point (such as the package housing or environment). According to the practical application of this invention, the duty cycle D of the excitation clock signal corresponding to the micromodule is introduced. i .

[0024] Available micro modules i The improved thermal contribution weight is: The method of the present invention will be further described in detail below: Taking an integrated chip with basic in-memory computing functions as an example, it contains at least four types of micro-modules: a processor block, a memory block, a transmission interface block, and a signal conversion block. Each micro-module is fully activated by repeatedly executing a test vector with different functions but a fixed toggling frequency. Repeatedly executing the same test vector helps to correlate the thermal distribution pattern obtained from software simulation with the test vector; repeatedly executing the test vector multiple times to fully activate each micro-module ensures that there is no mutual interference between micro-modules and that the thermal characteristics are more significant.

[0025] Figure 2 This is a functional block diagram of the implementation of an integrated chip micro-module distributed real-time temperature monitoring method based on ATE proposed in this invention. The ATE uses a widely used test system on the market, such as V93000 or J750HD, and integrates an ATPG module (Automatic Test Pattern Generation). Based on the characteristics of different micro-modules of the integrated chip, it sends corresponding test stimuli, such as computation, storage, transmission, and conversion, to the input pins of the integrated chip on the DUT (Device under Test). Simultaneously, the upper computer script software collects the input test vectors and identifies and classifies their type and interconnection status, thereby obtaining the input data required by the model.

[0026] Obtaining output data requires software simulation. Simulation software (ANSYS Icepak, FloTHERM, etc.) is used to simulate the thermal distribution of the integrated chip micromodule. While running the benchmark program, the simulation software obtains the thermal distribution map, and scripting tools such as Python record the distributed temperature values ​​of the integrated chip micromodule. Then, a scripting language is used to perform statistical processing on the input and output data, ensuring a one-to-one correspondence between the input and output data.

[0027] After conducting extensive experiments, a multi-objective optimization modeling algorithm was used to construct the model. The model input consists of specific test vectors and micro-module categories, and the model output is the distributed temperature value of the integrated chip micro-module. The final result is a model that maps the distributed temperature of the integrated chip micro-module to the test vectors.

[0028] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method for distributed real-time temperature monitoring using an integrated chip micromodule, characterized in that, include: Step 1: Extract the distributed temperature spectrum of the integrated chip micro-module; Step 2: Model the actual operating temperature by testing vector mapping through micro-modules; Step 3: A method for implementing distributed real-time temperature monitoring and power consumption warning of integrated chips based on ATE.

2. The method for distributed real-time temperature monitoring of integrated chip micromodules as described in claim 1, characterized in that, The extraction of the distributed temperature spectrum of the integrated chip micro-module includes: when the integrated chip is running a specific micro-module input stimulus, a three-dimensional temperature feature spectrum is generated by thermal distribution simulation software, and the distributed temperature spectrum corresponding to the micro-module test vector is extracted using Python or other scripting languages.

3. The method for distributed real-time temperature monitoring of an integrated chip micromodule as described in claim 1, characterized in that, The modeling method for the micro-module test vector to the actual operating temperature of the device is a multi-objective optimization modeling method. The input data consists of two parts: the micro-module category and the test vector corresponding to the micro-module. The output is the distributed temperature value of each module or region of the device.

4. The method for distributed real-time temperature monitoring of an integrated chip micromodule as described in claim 3, characterized in that, The micro-module categories include processor blocks, memory blocks, transmission interface blocks, and signal conversion blocks.

5. The method for distributed real-time temperature monitoring of an integrated chip micromodule as described in claim 3, characterized in that, The frequency of 0 and 1 flips in the test vector corresponding to the micro-module, the number of micro-modules activated simultaneously, and the interconnection state also need to be considered in the modeling.

6. The method for distributed real-time temperature monitoring of an integrated chip micromodule as described in claim 1, characterized in that, The integrated chip is connected to the automatic test system through the device under test test board. The test vector is input to the corresponding micro-module through the automatic test system according to the specified pin and routing path to test the performance and parameters of specific modules of the device.

7. The method for distributed real-time temperature monitoring of an integrated chip micromodule as described in claim 6, characterized in that, While testing the performance and parameters of specific modules of the device, the input variables are collected and uploaded to the host computer via serial port. Based on the established model, the distributed temperature and transient power consumption of the device are estimated in real time.

8. The method for distributed real-time temperature monitoring of an integrated chip micromodule as described in claim 7, characterized in that, By substituting the real-time estimated distributed temperature and transient power consumption values ​​into the historical dataset, the current reliability status of the device is determined, thus enabling power consumption early warning.

Images