A storage adaptation system and a storage adaptation control method

Abstract

This invention relates to the field of computer storage expansion technology, and discloses a storage adaptation system and storage adaptation control method, comprising: a host interface for communicating with a host system; multiple storage interfaces for connecting multiple storage devices; a power control module configured to provide time-sequential power supply to the multiple storage interfaces to stagger the power-on times of the multiple storage devices; and a main control module configured to respond to the host's device enumeration request through the host interface before all the multiple storage devices enter the ready state, causing the host to wait, thereby shielding the host from the differences in the ready times of the storage devices caused by the time-sequential power supply. This invention avoids power surges at the physical level by staggering power supply, and at the logical level by using the enumeration synchronization mechanism of the main control module to shield the host from the timing differences of physical power-on, ensuring that the host can fully identify all storage devices and ensuring the normal operation of the expansion function.

Description

Technical Field

[0001] This invention relates to the field of computer storage expansion technology, and in particular to a storage adaptation system and a storage adaptation control method. Background Technology

[0002] With the miniaturization of computer hardware, the M.2 interface has become a standard feature on motherboards. However, considering motherboard resource allocation and reliability requirements, its number is relatively limited. If you want to use the M.2 interface to expand multiple large-capacity SATA hard drives and build RAID (such as RAID 1 mirroring or RAID 0 striping) to improve data security or read / write performance, you will often face the problem of insufficient motherboard interfaces.

[0003] Existing expansion technologies face a difficult-to-resolve technical contradiction: high-capacity SATA hard drives often generate peak currents exceeding 1.5A during startup. If two hard drives are powered on simultaneously, the combined current can easily exceed 3A, causing the M.2 interface voltage to drop, triggering motherboard overcurrent protection, or even causing a system reset. To address the surge problem, the industry has a solution that uses RC circuits or delay chips to allow hard drives to "queue up" for power-on. However, this purely hardware-level delay significantly delays the readiness time of the second hard drive. Modern computers have extremely fast PCIe device enumeration and self-test speeds, often completing the scan before the second hard drive has finished initializing. This can cause the RAID controller to fail to correctly identify all member drives, leading to a RAID volume failure or even preventing the system from booting. Therefore, there is an urgent need for a solution that can both physically stagger startup times to protect the power supply and logically shield the host from this timing difference, ensuring complete identification of the storage system. Summary of the Invention

[0004] To address the contradiction between physical power supply limitations and logical identification timeliness in existing technologies, this invention provides a storage adaptation system and storage adaptation control method. Through a timing arbitration and enumeration synchronization approach, it achieves highly stable M.2 RAID or other adaptations.

[0005] The following is the technical solution of the present invention.

[0006] A storage adaptation system includes: a host interface for communicating with a host system; multiple storage interfaces for connecting multiple storage devices; a power control module configured to provide time-sequential power supply to the multiple storage interfaces to stagger the power-on times of the multiple storage devices; and a main control module configured to respond to a device enumeration request from the host via the host interface before all the multiple storage devices enter a ready state, thereby causing the host to wait and shielding the host from the differences in the ready times of the storage devices caused by the time-sequential power supply.

[0007] Preferably, the main control module is configured to return status information to the host system, instructing the host system to retry the device enumeration request, so that the host system can wait.

[0008] Preferably, the host interface is a PCIe interface; and the main control module is specifically configured to return a configuration request retry status (CRS) to the host system when responding to the configuration space access request initiated by the host system for the main control module, thereby causing the host system to retry the device enumeration request until the main control module confirms that all the multiple storage devices have entered the ready state.

[0009] Preferably, the power control module includes at least one switching circuit controlled by a delay signal. The switching circuit is disposed between the system input power supply and the power supply path of at least one of the plurality of storage interfaces to achieve delayed power supply to the at least one storage interface.

[0010] Preferably, the delay signal is generated by at least one of the following methods: generated by a hardware delay circuit, the hardware delay circuit including an RC charging and discharging network to provide a fixed delay duration; or output by the GPIO pin of the main control module, the main control module controlling the level change of the GPIO pin according to a preset delay program to generate the delay signal.

[0011] Preferably, the main control module is further configured to: after confirming that all of the plurality of storage devices have entered the ready state, and before stopping the return of the status information to the host system, construct a logical block address mapping table for the plurality of storage devices in the internal memory of the main control module according to a preset RAID configuration; and after the logical block address mapping table is constructed, stop returning the status information to the host system, and present the RAID logical volume as a single storage device to the host system.

[0012] Preferably, the system further includes a voltage detection unit configured to monitor the input voltage of the host interface in real time; wherein, the main control module is further configured to, when the voltage detection unit detects that the input voltage is lower than a preset safety threshold, control the power control module to preferentially cut off the power supply to one or more storage interfaces that are powered on last in the time-sequenced power supply, so as to ensure the stable operation of the storage devices that are powered on first.

[0013] Preferably, the system further includes: an indicator unit electrically connected to the main control module; wherein the main control module is further configured to control the indicator unit to indicate at least one of the following operating states through different display modes: the power control module is in the startup state of performing time-sequential power supply; the RAID logical volume has been built and is operating normally in the ready state; or at least one of the plurality of storage devices has failed in the error state.

[0014] Preferably, the system further includes: at least one jumper resistor connected to the main control module; wherein the main control module is configured to, during the power-on initialization phase, detect the level state formed by the at least one jumper resistor, and hardware lock the RAID mode of the plurality of storage devices to a preset mode according to the level state.

[0015] The present invention also provides a storage adaptation control method, applied to a scenario of adapting multiple storage devices to a host system, comprising: performing time-sequential power-on on the multiple storage devices; and responding to the host's device enumeration request to make the host wait before all the multiple storage devices enter the ready state, thereby shielding the host from the differences in the ready time of each storage device caused by the time-sequential power-on.

[0016] The above method solves the stability problem of multi-storage device RAID configuration under the power supply limitation of M.2 interface by combining physical time-sequential power-up with logical enumeration synchronization, thus ensuring the reliable operation of the system in a limited power supply environment.

[0017] Beneficial effects: This invention employs a time-sequential power supply strategy, effectively resolving the conflict between the limited power supply capacity of the M.2 interface and the high surge current (exceeding 3A after aggregation) during the startup of large-capacity hard drives. By controlling the staggered power-up of storage devices, the instantaneous peak current is distributed across different time periods, avoiding M.2 interface voltage drops, motherboard overcurrent protection triggering, or unexpected system resets caused by current overload. This achieves highly stable operation of multiple hard drives with limited hardware resources.

[0018] To address the "time lag" issue caused by physical latency, resulting in excessively fast host enumeration and slow hard drive readiness, this invention innovatively introduces an enumeration synchronization mechanism. The main control module actively makes the host "wait" during hard drive initialization, masking the physical boot latency differences. This ensures that all member disks are ready when the host system completes enumeration, fundamentally preventing RAID volume identification defects, BIOS errors, or system boot failures caused by some hard drives not being ready, thus guaranteeing the integrity of the storage logic.

[0019] Compared to traditional pure hardware RC delay solutions, this invention is completely transparent to the host system, achieving plug-and-play functionality without requiring modifications to BIOS settings or the installation of special drivers, and boasts extremely high compatibility. Furthermore, by combining voltage detection and intelligent arbitration mechanisms, the system can not only distinguish between "normal delay" and "real faults," but also prioritize power supply to core devices when input voltage is abnormal, significantly improving the robustness and intelligence of the storage adaptation system under complex operating conditions. Attached Figure Description

[0020] Figure 1 This is a system composition diagram of an embodiment of the present invention; Figure 2 This is a flowchart of a method according to an embodiment of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] It should be understood that in the various embodiments of the present invention, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0023] It should be understood that in this invention, "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0024] It should be understood that in this invention, "multiple" refers to two or more. "And / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "Contains A, B, and C", "Contains A, B, and C" means that all three A, B, and C are contained; "Contains A, B, or C" means that one of A, B, and C is contained; "Contains A, B, and / or C" means that any one, two, or three of A, B, and C are contained.

[0025] The technical solution of the present invention will be described in detail below with reference to specific embodiments. Embodiments may be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0026] Example 1: This embodiment provides a storage adaptation system, the overall architecture of which is as follows: Figure 1 As shown. The storage adapter system includes a host interface 100, multiple storage interfaces 200, a power control module 300, and a main control module 400.

[0027] The host interface 100 is used to communicate with the host system. In an M.2 RAID adapter system, the host interface 100 is typically an M.2 interface, which connects to the host system via a PCIe bus and is responsible for data transmission and device enumeration.

[0028] The plurality of storage interfaces 200 are used to connect multiple storage devices (not shown in the figure), such as SATA SSDs or SATA HDDs. In this embodiment, the storage adapter system may include two or more SATA interfaces to support the construction of multiple RAID modes such as RAID0 and RAID1.

[0029] The power control module 300 is configured to provide time-sequential power to the multiple storage interfaces 200 to stagger the power-on times of the multiple storage devices. Specifically, the power control module 300 receives system input power (e.g., 3.3V) from the host interface 100 and supplies power to each storage interface 200 sequentially according to a preset timing control strategy. For example, power can be supplied to the first storage interface first, and after it stabilizes, power can be supplied to the second storage interface, and so on. This time-sequential power supply mechanism can effectively distribute the instantaneous large current when multiple storage devices start up, avoiding problems such as voltage drops, motherboard overcurrent protection, or system resets caused by the current exceeding the power supply capacity limit of the M.2 interface (e.g., 3.3V / 2.5A). Through time-sequential power supply, the startup inrush current can be reduced by about 50%, significantly improving the power supply stability of the system.

[0030] The main control module 400 is configured to respond to the host's device enumeration request via the host interface 100 before all the storage devices enter the ready state, causing the host to wait. This shields the host from the differences in the ready times of the storage devices caused by the time-sequential power supply. The main control module 400 is typically a PCIe-to-SATA bridge chip, such as an ASMedia or JMicron series chip. During the initial power-up phase, when the host system initiates a device enumeration request for the storage adapter system via the PCIe bus, the main control module 400 does not immediately report complete device information to the host system. Instead, the main control module 400 utilizes the mechanism in the PCIe protocol that allows devices to return to a retry state, such as the Configuration Request Retry Status (CRS), to return a status message indicating a later retry to the host system. This causes the host system to "pause" and wait during the device enumeration phase, providing sufficient time for the main control module 400 to control the power control module 300 to complete the time-sequential power-up of all storage devices and the initialization of each storage device itself. Only after the main control module 400 confirms that all connected storage devices have been powered on and entered the "ready" state (e.g., by sending an IDENTIFY DEVICE command via the SATA bus and receiving a valid response) will the main control module 400 stop returning to the retry state and report complete device information to the host system. Through this logical synchronization mechanism, regardless of the physical power-on delay (e.g., hundreds of milliseconds or even seconds), the host system can always identify a complete and ready set of storage devices, avoiding problems such as incomplete device identification, RAID configuration failure, or system boot failure caused by the host completing the scan too early. This hardware and software collaborative mechanism ensures that multiple high-capacity storage devices can operate stably and be correctly identified by the host system in an M.2 interface with limited power supply.

[0031] Example 2: Based on Embodiment 1, this embodiment further specifies that the main control module returns status information to the host system to instruct the host system to retry the device enumeration request, so that the host waits.

[0032] Specifically, after the storage adapter system powers on and starts up, the master control module enters the initialization phase. During this phase, the master control module does not immediately report its readiness to the host system. When the host system initiates a device enumeration request to the storage adapter system via a host interface (e.g., a PCIe interface), the master control module does not immediately respond to confirm the device's existence or provide device configuration information. Instead, the master control module is configured to return a specific status message to the host system, instructing the host system to retry its device enumeration request later. This status message could be the Configuration Request Retry Status (CRS) in the PCIe protocol, or other similar signals used in specific communication protocols to indicate that a device is temporarily unavailable or is undergoing initialization.

[0033] By returning this type of status information, the master control module effectively "suspends" the host system's device enumeration process. Upon receiving the retry status information, the host system interprets it as the current device not yet ready to respond and will attempt enumeration again at a later time. This mechanism provides a valuable time window for the physical power-up and initialization of the backend storage devices, preventing the host system from mistakenly believing that some storage devices are non-existent or not ready due to premature scanning. For example, when the first storage device powers on and begins initialization, while the second storage device is still waiting for its scheduled power supply, the master control module, by returning the retry status, ensures that the host system does not complete enumeration before the second storage device is ready, thereby avoiding RAID configuration failures or system boot anomalies.

[0034] The advantage of this technical solution lies in its utilization of mechanisms already defined in existing communication protocols (such as PCIe), enabling effective control over the device enumeration process without requiring any modifications to the host system or its BIOS. This makes the storage adapter system transparent to the host system, greatly improving system compatibility and ease of use. Simultaneously, this logical waiting mechanism ensures that a complete storage system view is presented to the host system only after all storage devices have been physically powered on and initialized, thereby guaranteeing the correct construction and identification of RAID logical volumes.

[0035] Example 3: This embodiment, based on Embodiment 1, divides the 3.3V power supply into multiple paths, each supplying a different storage interface. For example, for the storage interface connected to the first storage device (such as SATA Port 1), its power supply path may not pass through a switching circuit, or it may pass through a constantly conducting switching circuit to achieve immediate power-on. For the storage interface connected to the second storage device (such as SATA Port 2), its power supply path connects to a switching circuit in series, such as a P-MOSFET switch. The gate of this P-MOSFET switch is connected to a delay control circuit, and its conduction or cutoff is controlled by a delay signal output by this delay control circuit.

[0036] With this configuration, when the system powers on, the first storage device can immediately receive power and begin startup. After a preset delay, the delay signal triggers the switching circuit to conduct, and only then does the second storage device receive power and begin startup. This time-sequential power supply mechanism effectively avoids the instantaneous high current surge generated when multiple storage devices power on simultaneously, thereby limiting the peak bus current to within the safe threshold (e.g., 2.5A) that the M.2 interface can withstand. For example, the peak current of a single SATA hard drive at startup may reach 1.5A; if two hard drives start simultaneously, the combined current will reach 3A, far exceeding the power supply capacity of the M.2 interface. Through the time-sequential power supply of this embodiment, it can be ensured that at any given moment, the total startup current will not exceed the safe threshold, thus effectively protecting the motherboard's power supply system and avoiding problems such as voltage drops, system resets, or motherboard overcurrent protection triggering caused by overcurrent, significantly improving system stability and reliability.

[0037] Example 4: This embodiment, based on the storage adapter system described in Embodiment 3, further defines the method for generating the delay signal. Specifically, the delay signal is used to control the on / off state of the switching circuit described in Embodiment 3, thereby achieving delayed power supply to a specific storage interface.

[0038] In the first generation method, the hardware delay circuit can be a simple RC charging and discharging network. For example, by selecting appropriate values ​​for the resistor (R) and capacitor (C), the charging or discharging time required for the capacitor can be precisely set, thereby triggering the switching circuit when a certain voltage threshold is reached. The advantages of this method are its simple circuit structure, low cost, and high stability, making it suitable for applications where delay accuracy requirements are not high or the delay duration is fixed. For example, an RC delay circuit can be set so that the power supply to the second SATA interface is delayed by 400 milliseconds (ms) after the first SATA interface is powered on, ensuring peak startup current is staggered.

[0039] In the second generation method, the delay signal is output from a general purpose input / output (GPIO) pin of the main control module. The firmware running inside the main control module can generate the required delay signal by controlling the level state of this GPIO pin (e.g., switching from low to high) according to a preset delay program. The advantage of this method is the high programmability and flexibility of the delay duration. For example, the main control module can dynamically adjust the delay duration based on the detected system load, the real-time power supply capability of the M.2 interface, or user configuration to adapt to different application environments and storage device types. For example, a longer delay (e.g., 500ms) can be set for enterprise-grade SSDs with high startup current, while a shorter delay (e.g., 300ms) can be set for ordinary consumer-grade SSDs. Furthermore, outputting the delay signal through the GPIO pin of the main control module can also implement more complex control logic, such as skipping the delay or ending the delay early under specific conditions, thereby further optimizing the system's startup efficiency and stability.

[0040] By using the two delay signal generation methods described above, this embodiment can flexibly achieve time-sequential power supply to the storage device, effectively dispersing the peak current during startup, further protecting the power supply stability of the M.2 interface, and providing a physical basis for subsequent logic synchronization.

[0041] Example 5: This embodiment provides a storage adaptation system, which, based on embodiment 2, further defines that after confirming that the storage device is ready, the main control module constructs a logical block address mapping table for the RAID logical volume and presents the RAID logical volume as a single storage device to the host.

[0042] Specifically, after confirming that all the multiple storage devices are in a ready state, and before stopping the return of status information to the host system, the main control module constructs a logical block address mapping table for the multiple storage devices in its internal memory according to a preset RAID configuration. The "preset RAID configuration" can include various modes such as RAID 0 (striping) and RAID 1 (mirroring). This configuration information can be pre-programmed into the firmware of the main control module or set via external jumper resistors. The "internal memory" can be RAM, ROM, or flash memory within the main control module, used for temporary or permanent storage of the logical block address mapping table. The "logical block address mapping table" records in detail the correspondence between the logical block addresses (LBAs) of the RAID logical volume and the physical block addresses on the multiple physical storage devices. For example, for RAID 0 mode, LBA 0 may map to physical block 0 of storage device A, LBA 1 to physical block 0 of storage device B, LBA 2 to physical block 1 of storage device A, and so on.

[0043] After the logical block address mapping table is constructed, the master control module stops returning status information to the host system (e.g., stops returning the PCIe Configuration Request Retry Status, CRS), and presents the RAID logical volume as a single storage device to the host system. This means that the master control module simulates itself as a single, fully configured RAID storage controller, and its external interface (i.e., the host interface) exposes only one logical storage device, rather than multiple independent physical storage devices. When the host system performs read / write operations on this logical storage device, the master control module, based on the constructed logical block address mapping table, translates the host's logical read / write requests into corresponding operations on the underlying physical storage device.

[0044] This embodiment achieves complete transparency to the host system by constructing and mapping the RAID logical volume internally within the main control module. The host system does not need to be aware of the number or type of the underlying physical storage devices, nor the physical process of their time-sequential power-on, nor does it require installing specific RAID drivers or performing complex BIOS settings. The host system only recognizes a single, ready, high-capacity storage device, greatly simplifying user operation and system integration, and improving system compatibility and ease of use. For example, in practical applications, after the user inserts this storage adapter system into the M.2 interface, the operating system can directly recognize and use a pre-built RAID storage volume without any manual configuration, thus shortening deployment time.

[0045] Example 6: The storage adapter system in this embodiment also includes a voltage detection unit configured to monitor the input voltage of the host interface in real time. The host interface, such as an M.2 interface, has limited power supply capabilities, and voltage drops may occur when the connected storage device starts up. The voltage detection unit continuously monitors the 3.3V input voltage of the M.2 interface through a voltage sensor or ADC (analog-to-digital converter) circuit integrated on the system PCB. For example, the voltage detection unit can use a high-precision voltage comparator or an ADC channel integrated within the main control module to sample the input voltage at a frequency of milliseconds or faster.

[0046] The main control module is electrically connected to the voltage detection unit and configured to receive voltage monitoring data from the voltage detection unit. When the voltage detection unit detects that the input voltage is lower than a preset safety threshold, the main control module will trigger a corresponding power management strategy. This preset safety threshold can be set according to the M.2 interface standard specifications and the characteristics of the connected storage device; for example, it can be set to 2.9V or 3.0V. When the input voltage drops below this threshold, it indicates that the system power supply may face an overload risk.

[0047] In this scenario, the main control module will control the power control module to preferentially cut off the power to one or more storage interfaces that are powered on last in the time-sequential power supply scheme. For example, in a time-sequential power supply scheme, if SATA Port1 powers on first and SATA Port2 powers on later, the main control module will preferentially cut off the power supply to SATA Port2 when the input voltage is detected to be lower than the safety threshold. Cutting off the power supply can be achieved by controlling the gate voltage of the switching circuit (such as a P-MOSFET) in the power control module, changing it from an on state to an off state.

[0048] This embodiment also includes an indicator unit electrically connected to the main control module. The main control module is further configured to control the indicator unit to indicate at least one of the following operating states through different display modes: a startup state in which the power control module is performing time-sequential power supply; a ready state in which the RAID logical volume has been built and is operating normally; or an error state in which at least one of the plurality of storage devices has failed.

[0049] The indicator unit can be one or more light-emitting diodes (LEDs), which visually display the system's operating status through different colors, flashing frequencies, or combinations thereof. For example, when the system is in a time-sequential power-on startup state, the indicator unit can be displayed as a solid orange light or flashing at a frequency of 1Hz per second to indicate to the user that the system is initializing and the devices are powering on. When the RAID logical volume is built and all storage devices are operating normally, the indicator unit can be displayed as a solid green light, indicating that the system is ready and accessible to the host. When at least one of the multiple storage devices fails (e.g., SMART detects a hard drive error, RAID volume degradation, or a hard drive going offline), the indicator unit can be displayed as a solid red light or flashing rapidly at a frequency of 5Hz per second to warn the user of a fault requiring inspection and maintenance.

[0050] By setting up the indicator unit, this embodiment can provide users or maintenance personnel with intuitive and real-time system status feedback. This not only allows users to quickly understand the current operating status of the system, such as whether it is starting up, running normally, or experiencing a fault, but also enables timely alarms when system anomalies occur, thereby improving system maintainability and user experience, and reducing the difficulty and time cost of troubleshooting. For example, in unattended scenarios such as industrial control or edge computing, the operating status of the equipment can be initially determined by observing the color and flashing pattern of the indicator unit, without the need to connect to a monitor or query through a software interface, greatly improving maintenance efficiency.

[0051] Example 7: This embodiment, based on Embodiment 1, further provides a storage adaptation system, which includes at least one jumper resistor connected to the main control module. The main control module is configured to, during the power-on initialization phase, detect the voltage level formed by the at least one jumper resistor and, based on the voltage level, hardware lock the RAID mode of the plurality of storage devices to a preset mode.

[0052] Specifically, the jumper resistors can exist in various forms, such as being connected to the GPIO pins of the main control module via pads, headers, or DIP switches on the PCB board. When the system powers on, the main control module reads the voltage levels of these GPIO pins during firmware loading and initialization. Different combinations of jumper resistors will result in different voltage levels. The main control module, based on a pre-stored mapping table, resolves these voltage levels to specific RAID modes, such as RAID 0 (striping), RAID 1 (mirroring), or JBOD (Just a Bunch Of Disks). Once the RAID mode is locked in this hardware manner, even if the RAID configuration information stored in the main control module's internal memory is lost or corrupted due to unforeseen circumstances (such as firmware corruption, power fluctuations, etc.), the main control module can reconstruct the RAID configuration according to the mode set by the jumper resistors, thereby ensuring data integrity and system reliability.

[0053] For example, two jumper resistors can be configured, creating four combinations based on their connected or disconnected states, each corresponding to one of the four RAID modes. When the main control module detects that jumper resistor A is connected and jumper resistor B is disconnected, it forces the RAID mode to be set to RAID 1. This hardware locking mechanism provides a data recovery method in case of software configuration failure, greatly enhancing the system's robustness and avoiding data corruption or RAID volume recognition issues caused by lost firmware parameters. In this way, users can quickly restore the RAID configuration without complex software operations, reducing maintenance costs and the risk of data loss.

[0054] Example 8: This embodiment provides a storage adaptation control method applied to scenarios where multiple storage devices are adapted to a single host system. This method solves the stability problem of multi-storage-device RAID configurations under M.2 interface power supply limitations by combining physical time-sequential power-up with logical enumeration synchronization, ensuring reliable system operation in a power-constrained environment. The storage adaptation control method of this embodiment is as follows: Figure 2 As shown, it includes the following steps: Step S100: Power on multiple storage devices in a timed manner.

[0055] In this step, the power control module in the storage adapter system sequentially powers multiple storage devices connected to the storage interface according to a preset timing sequence. For example, for two storage devices connected to SATA Port 1 and SATA Port 2, the power control module first turns on the power to SATA Port 1, enabling the first storage device to start. After the first storage device starts and its startup current drops to a steady state, for example, after a delay of approximately 400 milliseconds, the power control module then turns on the power to SATA Port 2, enabling the second storage device to start. This time-sequential power-on mechanism effectively avoids the instantaneous large current surge generated when multiple storage devices are powered on simultaneously, thereby limiting the total input current of the M.2 interface to a safe threshold (e.g., 2.5A), preventing the motherboard overcurrent protection from being triggered or the system from resetting due to current overload. By staggering power-on times, the startup inrush current can be reduced by approximately 50%, significantly improving the system's power supply stability.

[0056] Step S200: Before all the multiple storage devices enter the ready state, respond to the host's device enumeration request to make the host wait, thereby shielding the host from the difference in the ready time of each storage device caused by the timed power-on.

[0057] In this step, the master control module in the storage adapter system enters an "enumeration masking state" at the initial stage of system power-up. When the host system (e.g., the motherboard BIOS) initiates a device enumeration request through a host interface (e.g., a PCIe interface) to attempt to identify connected devices, the master control module does not immediately report its device information to the host system. Instead, the master control module utilizes the Configuration Request Retry Status (CRS) mechanism in the PCIe protocol to return a "retry later" status signal to the host system. This is equivalent to informing the host system that the current device is not yet ready and that the host system needs to pause the device enumeration process and wait. The master control module will continue to return the CRS status until it confirms that all storage devices have completed physical power-up, initialization, and entered the "Ready" state. In this way, regardless of the physical timing differences in power-up causing a significant difference in readiness time between storage devices (e.g., hundreds of milliseconds or even seconds), the host system is effectively "suspended" or "delayed" during the device enumeration phase, thus logically completely masking this timing difference. Once all storage devices are ready, the master control module will exit CRS status and report complete device information to the host system. This ensures that the host system can recognize all storage devices, avoiding the problem of the RAID controller failing to correctly identify all member disks due to the host completing the scan too early, thus leading to the conclusion that the RAID volume is damaged or the system cannot boot.

[0058] This application effectively solves the stability problem of multi-storage device RAID configurations in M.2 interface power-constrained environments by combining physical-level time-sequential power supply with logical-level enumeration synchronization mechanisms. It achieves transparent management of the host system, significantly improving system compatibility, robustness, and user experience. The technical solution provided in this application not only has significant advantages in current M.2 interface application scenarios but also offers innovative ideas and solutions for multi-device expansion under other power-constrained interfaces in the future, demonstrating broad application prospects and significant technological contributions.

[0059] Through the above description of the embodiments, those skilled in the art will understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the specific device can be divided into different functional modules to complete all or part of the functions described above.

[0060] In the embodiments provided in this application, it should be understood that the disclosed structures and methods can be implemented in other ways. For example, the structural embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another structure, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, or indirect coupling or communication connection between structures or units, and may be electrical, mechanical, or other forms.

[0061] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0062] Furthermore, in the embodiments of this application, the functional units can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0063] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0064] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A storage adaptation system, characterized in that, include: Host interface, used for communication with the host system; Multiple storage interfaces for connecting multiple storage devices; The power control module is configured to provide power to the multiple storage interfaces in a time-sequential manner to stagger the power-on times of the multiple storage devices. as well as The main control module is configured to respond to the host's device enumeration request through the host interface before all the multiple storage devices enter the ready state, so as to make the host wait, thereby shielding the host from the difference in the ready time of each storage device caused by the time-sequential power supply.

2. The storage adaptation system according to claim 1, characterized in that, The main control module is configured to return status information to the host system, instructing the host system to retry the device enumeration request, so that the host system can wait.

3. The storage adaptation system according to claim 2, characterized in that, The host interface is a PCIe interface; and the main control module is specifically configured to return a configuration request retry status (CRS) to the host system when responding to the configuration space access request initiated by the host system for the main control module, thereby causing the host system to retry the device enumeration request until the main control module confirms that all the multiple storage devices have entered the ready state.

4. The storage adaptation system according to claim 1, characterized in that, The power control module includes at least one switching circuit controlled by a delay signal. The switching circuit is disposed between the system input power supply and the power supply path of at least one of the plurality of storage interfaces to achieve delayed power supply to the at least one storage interface.

5. The storage adaptation system according to claim 4, characterized in that, The delayed signal is generated by at least one of the following methods: Generated by a hardware delay circuit, which includes an RC charging / discharging network to provide a fixed delay duration; or The delay signal is generated by the GPIO pin output of the main control module, which controls the level change of the GPIO pin according to a preset delay program.

6. The storage adaptation system according to claim 2, characterized in that, The main control module is also configured to: After confirming that all the multiple storage devices have entered the ready state, and before stopping the return of the status information to the host system, a logical block address mapping table of a RAID logical volume is constructed in the internal memory of the main control module for the multiple storage devices according to the preset RAID configuration. as well as After the logical block address mapping table is constructed, the status information returned to the host system is stopped, and the RAID logical volume is presented to the host system as a single storage device.

7. The storage adaptation system according to claim 1 or 4, characterized in that, The system also includes: A voltage detection unit is configured to monitor the input voltage of the host interface in real time; The main control module is further configured to, when the voltage detection unit detects that the input voltage is lower than a preset safety threshold, control the power control module to preferentially cut off the power supply to one or more storage interfaces that are connected to the power supply last in the time-sequenced power supply, so as to ensure the stable operation of the storage devices that are powered on first.

8. The storage adaptation system according to claim 6, characterized in that, The system also includes: The indicator unit is electrically connected to the main control module; The main control module is further configured to control the indicator unit to indicate at least one of the following operating states through different display modes: The power control module is currently in the process of starting up time-sequential power supply; The RAID logical volume has been built and is in a ready state of normal operation; or At least one of the plurality of storage devices is in a faulty state.

9. The storage adaptation system according to claim 1 or 6, characterized in that, The system also includes: At least one jumper resistor connected to the main control module; The main control module is configured to detect the voltage level formed by the at least one jumper resistor during the power-on initialization phase, and lock the RAID mode of the multiple storage devices to a preset mode based on the voltage level.

10. A storage adaptation control method, applied to the storage adaptation system as described in any one of claims 1-9, for adapting multiple storage devices to a host system, characterized in that, include: Power on the multiple storage devices in a time-sequential manner; as well as Before all the storage devices are in the ready state, the host's device enumeration request is responded to, causing the host to wait, thereby shielding the host from the differences in the ready times of the storage devices caused by the timed power-on.

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