image sensor

Abstract

The present disclosure relates to image sensors. The image sensors can include an image sensor pixel array and an image signal readout circuit coupled to the image sensor pixel array. The readout circuit can include an adaptive gain amplifier circuit configured to apply different gains to an image signal based on a signal amplitude of the image signal. An image correction circuit can be coupled to the amplifier circuit and can compensate for gain offsets between the image signals amplified by the different gains.

Description

Technical Field

[0001] This invention generally relates to imaging systems, such as systems having image sensors. Background Technology

[0002] Image sensors generate image data for use in electronic systems or devices. Image data can be generated by applying different gains to different image signals obtained from the pixels of the image sensor (e.g., depending on the signal amplitude of the different image signals). Summary of the Invention

[0003] According to a first aspect, an image sensor is provided, the image sensor comprising: an image sensor pixel array having a plurality of image sensor pixels; a conductive path coupled to and shared among the plurality of image sensor pixels; an amplifier circuit coupled to the conductive path and configured to receive a first image signal and a second image signal along the conductive path, amplify the first image signal using a first gain and amplify the second image signal using a second gain; and an image correction circuit coupled to the amplifier circuit and configured to compensate for gain offset between the amplified first image signal and the amplified second image signal.

[0004] According to a second aspect, an image sensor is provided, the image sensor comprising: an image sensor pixel array having image sensor pixel columns; a column path coupled to the image sensor pixel columns; an adjustable gain amplifier coupled to the column path; an analog-to-digital converter coupled to the adjustable gain amplifier; and a digital correction circuit coupled to the analog-to-digital converter and including a gain normalization circuit and a gain offset correction circuit.

[0005] According to a third aspect, an image sensor is provided, the image sensor comprising: an image sensor pixel array having a plurality of image sensor pixels; a conductive path coupled to and shared among the plurality of image sensor pixels; an amplifier circuit coupled to the conductive path and configured to receive an image signal on the conductive path and selectively amplify the image signal using a first gain or a second gain based on the signal amplitude of the image signal; a gain offset calibration circuit coupled to the amplifier circuit and configured to determine a gain offset value using a test signal provided to the amplifier circuit; and a gain offset correction circuit coupled to the amplifier circuit and configured to compensate for the gain offset using the determined gain offset value. Attached Figure Description

[0006] Figure 1 This is a schematic diagram of an exemplary system having one or more image sensors according to some implementation schemes.

[0007] Figure 2 This is a schematic diagram of an exemplary image sensor circuit having an image sensor pixel array and a readout circuit for the pixel array, according to some implementation schemes.

[0008] Figure 3 This is a schematic diagram of an exemplary column readout circuit with an adaptive gain amplifier circuit and a gain offset correction circuit according to some implementation schemes.

[0009] Figure 4 This is a graph showing exemplary gains and corresponding gain corrections performed by the readout circuit according to some implementation schemes.

[0010] Figure 5 This is a schematic diagram of an exemplary readout circuit with an adjustable amplifier, an analog-to-digital converter, and a digital correction circuit, according to some implementation schemes.

[0011] Figure 6 This is a flowchart illustrating an exemplary operation for adaptive gain compensation based on some implementation schemes. Detailed Implementation

[0012] An imaging system may include an image sensor. The image sensor may include an image sensor pixel array. Pixels of the pixel array generate image signals that are read out using readout circuitry of the image sensor. Depending on the signal amplitude of each image signal corresponding to the illumination level of the corresponding signal-generating pixel, the amplifier circuitry in the readout circuitry may amplify the image signals with different gain settings. While the readout circuitry can provide compensation to normalize the image signals amplified by different gain settings, thereby effectively aligning the gain characteristics of the gain settings to have the same gain slope, there may be other problems. As an example, a gain offset may exist between image signals amplified using different gain settings. Gain offset may be caused by switching the amplifier circuitry to apply different gain settings to the image signals, by calibration using test or calibration signals that do not take into account charge injection caused by transistor switching and / or by other circuit dynamics introduced when the actual image signal is output from the pixels and processed by the amplifier circuitry, and / or by other sources of mismatch effects when processing image signals with different gain settings.

[0013] To mitigate these issues, the readout circuitry may include a gain offset correction circuit and a gain offset calibration circuit. The gain offset calibration circuit, coupled to the amplifier circuitry, can generate a calibrated gain offset value during the calibration period using the amplifier circuitry. During the image signal readout period, depending on the gain applied to each image signal, the gain offset correction circuitry can use the generated gain offset value to correct the gain offset of the applicable image signal. In this way, the gain offset of the image signal caused by any mismatch source can be calibrated, and the calibrated value can be used for image correction.

[0014] Figure 1 An exemplary imaging system is shown, comprising one or more image sensors (e.g., having the aforementioned gain offset correction functionality). Figure 1 It is a functional block diagram of an exemplary imaging system (such as an electronic system) that uses an image sensor to capture images. Figure 1 The imaging system 10 may be a portable electronic device, such as a camera, cellular phone, tablet computer, webcam, camcorder, video surveillance system, vehicle imaging system, video game system with imaging capabilities, augmented reality and / or virtual reality system, unmanned aerial vehicle system (such as drone), industrial system, or any other desired imaging system or device for capturing image data.

[0015] Camera module 12 (sometimes referred to as an imaging module) is used to convert incident light into digital image data. Camera module 12 may include one or more lenses 14 and one or more image sensors 16. When capturing an image, light from the scene can be focused onto each image sensor 16 through one or more lenses 14. Image sensor 16 may include circuitry for converting analog pixel image signals into corresponding digital image data provided to storage and processing circuitry 18.

[0016] Storage and processing circuitry 18 may include one or more integrated circuits, each serving a data storage function and / or a data computation or processing function. As an example, one or more integrated circuits may include image processing circuitry (such as a digital signal processor), application-specific integrated circuits (ASICs), general-purpose processors, microprocessors, microcontrollers, storage devices (such as voltage-controlled memories and non-volatile memories), and / or other types of integrated circuits having a processor and / or memory.

[0017] The storage and processing circuitry 18 may be implemented using components separate from and / or part of the camera module 12. As an example, the storage and processing circuitry 18 may be implemented using circuitry that forms part of an integrated circuit, including the image sensor 16 or an integrated circuit within the camera module 12. When the storage and processing circuitry 18 is included on an integrated circuit different from the integrated circuit of the image sensor 16, the integrated circuit having the storage and processing circuitry 18 may be vertically stacked or packaged relative to the integrated circuit having the image sensor 16.

[0018] The processing circuitry 18 can be used to process and store image data acquired by the camera module 12. As an example, an image processing engine, an imaging mode selection engine, and / or other types of processing engines on the processing circuitry 18 can process the image data captured by the camera module 12. If needed, the processing circuitry 18 can provide the processed image data to external equipment (such as a computer, external display, or other device) using wired and / or wireless communication paths.

[0019] like Figure 2 As shown, image sensors (such as those included in...) Figure 1The image sensor 16 within the imaging system 10 may include an image sensor pixel array, such as a pixel array 20 containing image sensor pixels 22, which are sometimes referred to as image pixels or pixels. These pixels 22 may be arranged in rows and columns. A row of pixels or a column of pixels may sometimes be collectively referred to as a row of pixels. The image sensor 16 may include control and processing circuitry 24 (sometimes referred to herein as control circuitry 24) that controls the operation of the pixel array 20. The pixel array 20 may contain, for example, hundreds or thousands of rows and / or hundreds or thousands of columns of image sensor pixels 22. If desired, the pixel array 20 may be provided with a filter array having multiple visible color filter elements and / or invisible filter elements, each corresponding to and overlapping a respective pixel 22, thereby allowing a single image sensor to sample light of different colors and / or different groups of wavelengths.

[0020] Image sensor pixels 22 can be formed in a semiconductor substrate using complementary metal-oxide-semiconductor (CMOS) technology, charge-coupled device (CCD) technology, or any other suitable photosensitive device technology. Image sensor pixels 22 can be front-illuminated (FSI) image sensor pixels or back-illuminated (BSI) image sensor pixels.

[0021] The control circuit 24 may be coupled to a pixel control circuit, such as a row control circuit 26, which includes a row driver that provides control signals to the pixel rows in the pixel array 20, and may be coupled to a pixel readout circuit, such as a column readout and control circuit 28, which reads signals from the pixel rows in the pixel array 20.

[0022] The row control circuit 26 can receive row address and / or signal indicating the row address from the control circuit 24, and supply corresponding row control signals (such as reset control signals, anti-blur control signals, row selection or pixel selection control signals, charge transfer control signals, dual conversion gain control signals, and readout control signals) to the pixel 22 via conductive lines or conductive paths 30 (such as pixel row control paths). Specifically, each pixel row can receive different control signals via corresponding multiple control paths, such that each pixel row is coupled to multiple conductive paths 30. One or more conductive lines or conductive paths 32 (such as pixel column readout paths) can be coupled to each column of the pixel 22. The conductive paths 32 can be used to read out image signals from the pixel 22 and to supply bias signals (such as bias current or bias voltage) to the pixel 22. As an example, when performing a pixel readout operation, the row control circuit 26 can be used to select a pixel row in the pixel array 20, and the image signal generated by the selected image pixel 22 in that pixel row can be read out along the conductive path 32.

[0023] Column readout circuit 28 can receive image signals (such as analog pixel values ​​generated by pixel 22) via conductive path 32. Column readout circuit 28 may include memory or buffer circuitry for temporarily storing calibration signals (such as reset level signals, reference level signals, and / or other non-image signals) read from array 20 and image level signals read from array 20, amplifier circuitry, analog-to-digital converter (ADC) circuitry, bias circuitry, latching circuitry for selectively enabling or disabling portions of column readout circuit 28, and / or other circuitry coupled to one or more pixel columns in array 20 for operating pixel 22 and / or for reading image signals from pixel 22. The ADC circuitry in readout circuit 28 can convert the analog pixel values ​​received from array 20 into corresponding digital pixel values ​​(sometimes referred to as digital image data or digital pixel data).

[0024] Column readout circuit 28 can supply digital pixel data from pixels 22 in one or more pixel columns to Figure 1 The control and processing circuitry 24 and / or circuitry 18 in the image sensor 16 are used for further processing and / or storage. Specifically, the control and processing circuitry 24 may be formed by circuitry integrated with other circuitry of the image sensor 16 (such as row control circuitry 26 and / or column readout circuitry 28), and / or may be formed by discrete components (such as one or more integrated circuits separate from row control circuitry 26 and / or column readout circuitry 28). The circuitry of the control and processing circuitry 24 may include processing circuitry such as digital signal processors, application-specific integrated circuits, general-purpose processors, microprocessors, and / or microcontrollers, and may include storage circuitry such as voltage-controlled memories and / or non-volatile memories.

[0025] Figure 3 It is an exemplary image signal readout circuit (e.g., forming...) Figure 2 The functional block diagram of a portion of the column readout circuit 28. Figure 3 The example shows coupling to Figure 2 This is part of the column readout circuitry 28 for a row of pixels 22 (such as pixels 22-1, 22-2, etc.). In the exemplary configuration described herein as an example, the pixel line 22 may be... Figure 2 The pixel columns 21 of the array 20, and a portion of the readout circuitry 28 coupled to the pixels 22 in the pixel columns 21, can be referred to as the per-column readout circuitry. Therefore, each column of pixels 22 in the array 20 can be coupled to a different instance of the per-column readout circuitry via a corresponding column path 32. If needed, some portions of the per-column readout circuitry can be shared among multiple pixel columns.

[0026] like Figure 3As shown, pixels 22-1, 22-2 in pixel column 21, and typically any other pixels 22, are coupled to the readout circuit 28 via a pixel column path 32 shared by the pixels 22 in column 21. Column 21 (and typically...) Figure 2 Each pixel 22 of array 20 may include one or more photosensitive elements (such as photodiodes) that generate charge in response to incident light (i.e., illumination), one or more charge storage structures (such as capacitors and floating diffusion regions) that store part and / or all of the generated charge, transistors that control the flow of charge, supply voltage to different pixel elements, act as amplifiers (such as source followers), and otherwise actuate to operate pixel 22 in a desired manner, and / or may include other pixel elements. In some exemplary configurations described herein by way of example, pixel 22 may include at least a photosensitive element, a floating diffusion region, a charge transfer transistor coupled between the photosensitive element and the floating diffusion region, a source follower transistor having a gate terminal coupled to the floating diffusion region and having a source-drain terminal (i.e., source or drain terminal) coupled to the corresponding column path 32, and a pixel selection or row selection transistor coupled between the source follower transistor and path 32. Generally, any suitable pixel configuration may be used in conjunction with the embodiments described herein.

[0027] Pixels 22 in column 21 can be activated one at a time during the image signal readout period, such that the image signal provided by the activated pixels 22 can be output to the readout circuit 28 via column path 32, or more specifically, output to Figure 3 Each column of readout circuitry is shown. The image signal provided by the enabled pixel 22 can be based on a portion or all of the charge generated by the photosensitive element therein during a given integral or exposure period when the pixel 22 is illuminated by incident light.

[0028] In particular, Figure 3 Column path 32 can be coupled to amplifier circuitry such as adaptive gain amplifier circuitry 40. Amplifier circuitry 40 can be configured to exhibit two or more gain settings, thereby applying two or more corresponding gains to the received signal, such as an image signal and a test or calibration signal. As an example, amplifier circuitry 40 can process a first input image signal using a first gain setting by amplifying a first input image signal from a given pixel 22 using a first gain 40-1. As another example, amplifier circuitry can process a second input image signal using a second gain setting by amplifying a second input image signal from a given pixel 22 or a different pixel 22 using a second gain 40-2. If desired, amplifier circuitry 40 can have one or more additional gain settings with which the input image or test signal is applied at a corresponding gain.

[0029] In the exemplary configuration described herein, amplifier gain 40-1 can be a gain greater than amplifier gain 40-2. By using a first gain setting, amplifier circuit 40 can be configured to apply high gain 40-1 to any input image signal having a signal amplitude (sometimes referred to as signal amplitude) less than a threshold signal amplitude value on path 32 from pixel 22 in column 21. By using a second gain setting, amplifier circuit 40 can be configured to apply low gain 40-2 to any input image signal having a signal amplitude greater than a threshold signal amplitude value on path 32 from pixel 22 in column 21. In this way, amplifier circuit 40 can adaptively amplify the input image signal using a variable or adaptive gain based on the received signal amplitude indicating a pixel illumination level, where a higher signal amplitude indicates a higher illumination level and a lower signal amplitude indicates a lower illumination level. Therefore, by using high gain 40-1 to amplify low-light (or low-illumination) image signals (i.e., image signals with amplitudes below the threshold signal) and using low gain 40-2 to amplify high-light (or high-illumination) image signals (i.e., image signals with amplitudes above the threshold signal), amplifier circuit 40 can effectively extend the dynamic range of image data.

[0030] The use of two gain settings in amplifier circuit 40 is merely illustrative. If desired, amplifier circuit 40 can exhibit any number of adaptive gain settings, based on which the corresponding gain is applied to the input image signal across the signal amplitude range. In other words, amplifier circuit 40 can apply three levels of gain to the three signal amplitude ranges corresponding to low, medium, and high illumination, or four levels of gain to the four signal amplitude ranges, and so on.

[0031] Amplifier circuit 40 may include any suitable number of fixed-gain amplifiers and / or variable-gain amplifiers. Different amplifiers (such as fixed-gain amplifiers) of amplifier circuit 40 exhibiting different gains can be switched in use to exhibit different gains 40-1 and 40-2 of amplifier circuit 40. Additionally or alternatively, one or more amplifiers of amplifier circuit 40 (such as variable-gain amplifiers) may each be configured to exhibit different gains 40-1 and 40-2 of amplifier circuit 40 by adjusting switches, capacitors and / or other tunable components therein. In particular, adaptive gain amplifier circuit 40 may include a comparator that determines the signal amplitude of the received input signal to be amplified, determines the gain setting to be used based on the signal amplitude (e.g., by comparing the signal amplitude with a threshold signal amplitude value), and outputs an amplified version of the received input signal amplified using the determined gain setting as an output signal.

[0032] However, applying adaptive gain to image signals in the manner described above without considering other effects can sometimes degrade the signal-to-noise ratio (SNR) of the image data. In particular, different amplifier gains can cause different (non-linear) mappings from the input signal amplitude to the output signal amplitude. Although the amplifier gain can be effectively normalized relative to each other by selectively normalizing the amplified output signal using gain normalization circuit 41, gain offsets can still exist between signals applied with different amplifier gains. These gain offsets can be caused by inherent differences in the adaptive gain amplifier circuitry when applying different gain settings, by any mismatch between the conditions and context (such as charge injection from the switching transistor) of using different gain settings or switching between different gain settings, and / or by other sources. The presence of such gain offsets can lead to a deterioration in the SNR of the image data.

[0033] To mitigate these problems, improve the signal-to-noise ratio of the image data, and / or impart other advantages, the readout circuit 28 may include a gain offset correction circuit 42 (sometimes referred to as a gain offset compensation circuit 42) communicatively coupled to the amplifier circuit 40. The gain offset correction circuit 42 may selectively process at least some of the amplified signals output from the amplifier circuit 40 to compensate for gain offsets between image signals applied with different amplifier gains. As an example, the gain offset correction circuit 42 may include adders, subtractors, and / or other arithmetic circuitry that shift the amplified signal from the amplifier circuit by a gain offset value, thereby removing the mismatch between signals amplified by different gains. Depending on the desired configuration of the readout circuit 28, the gain offset correction circuit 42 may be implemented as an analog image signal correction circuit in the analog domain or as a digital image data correction circuit in the digital domain. If desired, the gain offset correction circuit 42 may be implemented using a lookup table or mapping table that maps input (digital) values ​​containing gain offsets to corresponding output values ​​without gain offsets.

[0034] Generally, the gain offset correction circuit 42 may include any suitable circuitry for selectively removing a gain offset that exists between a signal amplified using a first gain setting and a signal amplified using a second gain setting. If desired, the gain offset correction circuit 42 may be incorporated as part of other signal processing circuitry or image data correction circuitry (such as image correction circuit 46). As described above, processing of the amplified image signal output from amplifier circuit 40 may include normalization of at least some of the amplified image signal. As an example, such gain normalization or gain slope correction operation may be performed by a gain normalization circuit 41 implemented as part of image correction circuit 46. Normalization circuit 41 may be implemented using adders, subtractors, multipliers, dividers, and / or other arithmetic circuitry, may be implemented using lookup tables or mapping tables, and / or may be implemented in other ways to perform the normalization operations described herein.

[0035] In the exemplary configuration sometimes described herein as an example, the readout circuit 28 may include an analog-to-digital converter (ADC) circuit 44 coupled between the amplifier circuit 40 and the gain offset correction circuit 42, and typically between the amplifier circuit 40 and the image correction circuit 46. The ADC circuit 44 may receive amplified analog image signals (each amplified by a corresponding gain) output from the amplifier circuit 40 and may convert the analog image signals into digital image data. The ADC circuit 44 may output the digital image data to the downstream image correction circuit 46, which includes a gain normalization circuit 41 and a gain offset correction circuit 42. Thus, the correction circuit 46 may perform digital image data corrections, such as gain offset correction and gain normalization.

[0036] Figure 4 This is a graph showing the exemplary gain applied to different image signals and the exemplary effect of correction operations applied to different image signals. Figure 4 In the chart, the amplitude of the output image signal or data output by amplifier circuit 40 or image correction circuit 46 is plotted against the amplitude of the input image signal or data received by amplifier circuit 40. Figure 4 In the example, a larger signal amplitude (i.e., amplitude) can indicate higher illumination or high light conditions, while a smaller signal amplitude can indicate lower illumination or low light conditions.

[0037] like Figure 4 As shown, line 60 can represent the result of... Figure 3 The amplifier circuit 40 in the circuit employs a first high-gain setting for its input-output characteristics, such as when gain 40-1 is applied to the input signal. Line 62 can represent the input characteristics of the amplifier circuit 40. Figure 3 The amplifier circuit 40 in the middle applies a second low-gain setting to the input-output characteristics, such as when gain 40-2 is applied to the input image signal. (As mentioned above...) Figure 3 As described, the adaptive gain amplifier circuit 40 can use a comparator to detect whether the amplitude of the input image signal is higher or lower than a threshold (such as...). Figure 4 The threshold value VTH is used as a reference. In response to an input image signal amplitude less than the threshold (amplitude) value VTH, amplifier circuit 40 can apply a high gain, indicated by line 60, to produce a corresponding output signal amplitude. In response to an input image signal amplitude greater than the threshold (amplitude) value VTH, amplifier circuit 40 can apply a low gain, indicated by line 62, to produce a corresponding output signal amplitude. In other words, the threshold VTH can be the transition point between two gain settings.

[0038] exist Figure 4 In the example, when using high-gain amplification, the output signal can be corrected by downstream data correction circuitry (such as...). Figure 3The gain normalization circuit 41) in the middle normalizes and / or otherwise modifies line 60 (when modified) so that line 60 has the same slope as line 62. Therefore, the normalized version of line 60 in Figure 4 This is shown as line 60'. In other words, the gain normalization circuit 41 can selectively normalize the digital version of the image signal amplified using high gain 40-1 relative to the digital version of the image signal amplified using low gain 40-2, such that the normalized high-gain amplified image data (i.e., effectively having the input-output characteristics of line 60') exhibits the same gain slope as the low-gain amplified image data (i.e., having the input-output characteristics of line 62).

[0039] The line 60' indicating normalized high gain may still have a discontinuity relative to line 62. This discontinuity is referred to as gain offset in this paper, for example... Figure 4 The gain offset of 63 can cause an increase in the signal-to-noise ratio in the image data, especially when the amplitude of the input signal to the image data is close to the threshold VTH. Therefore, it may be necessary to correct, remove, or otherwise compensate for this gain offset.

[0040] Therefore, the gain offset correction circuit 42 can process the amplified (and digitized image data) version of the image signal by adding a fixed value corresponding to the magnitude of the gain offset 63 to the low-gain amplified version of the image signal indicated by line 62. This gain offset correction version of line 62 is shown as... Figure 4 Line 64 in the middle.

[0041] Configured as described above, the resulting image data can be corrected even when adaptive gain is applied, allowing the removal of any nonlinear artifacts and discontinuities caused by the adaptive gain. To properly compensate for the gain shift, the magnitude of the gain shift must be determined. Therefore, a calibration circuit can be provided to calibrate the image correction circuitry to perform the desired image data correction operation. In the exemplary configuration described herein, the image data correction operation may include correcting the gain shift from image data amplified with a second gain and normalizing image data amplified with a first gain.

[0042] Specifically, re-reference Figure 3 For example, calibration circuitry 48 may be coupled to amplifier circuitry 40, column path 32, gain normalization circuitry 41, and gain offset correction circuitry 42. Calibration circuitry 48 may be formed as part of readout circuitry 28 and may be shared among multiple instances of each column readout circuitry, with calibration performed for those instances. If desired, calibration circuitry 48 may be implemented as part of control and processing circuitry 24.

[0043] To perform gain normalization calibration, calibration circuit 48 can provide test signals to amplifier circuit 40 via path 50 during a first calibration period prior to the image signal readout period. The provided test signals can each exhibit different voltage levels. The test signals can be provided by calibration circuit 48 to the input of amplifier circuit 40, which will receive the image signal on path 32 during the image signal readout period.

[0044] As an example, two exemplary test signals with voltages to be amplified for each gain setting can be provided to amplifier circuit 40. Therefore, for each gain setting, calibration circuit 48 can receive two corresponding amplified versions of the test signals. Using two sets of input-output data points for each gain setting, calibration circuit 48 can determine the gain slope for each gain setting separately, such as for gains 40-1 and 40-2. Figure 4 The gain slopes of lines 60 and 62 in the diagram. For example, the gain slope determination can utilize linear interpolation. The calibration circuit 48 can also determine the normalized value 54 of the calibration based on different gain slopes. As an example, the normalized value 54 can be a scaling factor corresponding to the image data amplified using an image signal with a gain of 40-1, to normalize the high-gain amplified image data relative to the low-gain amplified image data.

[0045] During the image signal readout period, the gain normalization circuit 41 can access the normalization value 54 on the corresponding storage circuit of the image sensor 16, and can selectively apply the normalization value 54 to the image data corresponding to the image signal amplified by the gain 40-1 by scaling the image data with the normalization value 54 or otherwise mapping the image data to the corresponding normalized image data.

[0046] To perform gain offset correction calibration, calibration circuit 48 can provide test signals to amplifier circuit 40 via path 50 during a second calibration period prior to the image signal readout period. During the second calibration period following the first calibration period, calibration circuit 48 can provide test signals, each exhibiting a different voltage level, to the input of amplifier circuit 40, which will receive the image signal on path 32 during the image signal readout period. Amplifier circuit 40 can amplify or otherwise process these test voltages in the same manner as the image signal voltage received on path 32. As an example, test voltages below a threshold are amplified by gain 40-1, and test voltages above the threshold are amplified by gain 40-2. If gain 40-1 is used to amplify the test signal, calibration circuit 48 can receive an amplified version of the test signal provided by the output of amplifier circuit 40, for example, after further digitization by ADC circuit 44 and selective normalization by normalization circuit 41.

[0047] Based on the test signal provided by the calibration circuit 48 and the amplified, digitized, and selectively normalized version of the test signal received by the calibration circuit 48, the calibration circuit 48 can determine the gain offset value for each transition point between different gains.

[0048] The calibration circuit 48 can determine the gain offset value between the first and second gains in any suitable manner, such as gain 40-1 (after normalization) and gain 40-2. In some exemplary configurations sometimes described herein as examples, the calibration circuit 48 can provide a test signal ramped across multiple input test voltages, such that the version of the first input test voltage closest to the input threshold voltage and amplified by the first gain is determined, and the version of the second input test voltage closest to the input threshold voltage and amplified by the second gain is determined. The difference between the corresponding output image data of the first and second input test voltages can indicate or provide an estimate of the gain offset value.

[0049] use Figure 4 As an example, calibration circuit 48 can provide at least an input test voltage V1 to amplifier circuit 40, which is amplified by amplifier circuit 40 using gain 40-1, digitized by ADC circuit 44, normalized by gain normalization circuit 41, and can receive high-gain amplified and normalized image data with image data value V1' corresponding to the input test voltage V1. Calibration circuit 48 can also provide at least an input test voltage V2 to amplifier circuit 40, which is amplified by amplifier circuit 40 using gain 40-2 and digitized by ADC circuit 44, and can receive low-gain amplified image data with image data value V2' corresponding to the input test voltage V2. Calibration circuit 48 can determine the magnitude of gain offset 63 (i.e., the gain offset value between gain 40-1 (after normalization) and gain 40-2) based on the difference between image data values ​​V1' and V2'. As the difference between the voltages V1 and V2 corresponding to the input test signal decreases, the difference between image data values ​​V1' and V2' provides a more accurate estimate of the gain offset value. Additional or alternative information may be used to determine the gain offset value if needed.

[0050] Figure 5 It is a combination Figure 3 A schematic diagram illustrating an exemplary implementation of the type of readout circuitry for each column. Specifically, each column readout circuitry may include an adjustable (gain) amplifier 70, for example, implementing... Figure 3The amplifier circuit 40 is included. The amplifier 70 may have an input coupled to a pixel column path 32 and may be configured to receive one or more image signals via the pixel column path 32, such as a first image signal from a first pixel 22-1 and a second image signal from a second pixel 22-2. Each column readout circuit may include a comparator 72 having a first input coupled to the output of the amplifier 70, which provides an amplified version of the received input image signal (such as an image signal amplified by a first gain 40-1). The comparator 72 may have a second input coupled to a reference voltage source providing a threshold voltage VTH. Based on a comparison of the voltage (amplitude) of the amplified image signal with the threshold voltage VTH, the output of the comparator 72, coupled to the adjustable amplifier 70 via path 73, provides an indication of whether the amplified image signal voltage is greater than or less than the threshold voltage. The adjustable gain amplifier 70 can (continue) amplify the input image signal using a first gain based on a control signal received from comparator 72 indicating that the amplified image signal voltage is less than a threshold voltage, and can switch to using a second gain less than the first gain to amplify the input image signal based on a control signal received from comparator 72 indicating that the amplified image signal voltage is greater than a threshold voltage.

[0051] Each column readout circuit may include implementations Figure 3 The ADC circuit 44 in the image includes an analog-to-digital converter (ADC) 74 with an input coupled to the output of amplifier 70. ADC 74 converts amplified analog image signals received at its input into digital image data and provides digital image data at its output. Each column readout circuit may include implementations... Figure 3 The image correction circuit 46 in the image correction circuit 46 contains a digital correction circuit 76. Specifically, the digital correction circuit 76 can perform gain normalization and gain offset correction using calibration values ​​stored in a storage circuit 78 coupled to the digital correction circuit 76. The storage circuit 78 can store... Figure 3 The normalized value 54 and the gain offset value 56 are described in the document. In some exemplary configurations described as examples herein, circuits 76 and 78 may be shared across multiple instances of each column of readout circuits, and different normalized values ​​54 and different gain offset values ​​56 may be stored and used for each instance of each column of readout circuits.

[0052] The output of comparator 72 can also be coupled to digital correction circuit 76 via path 75. Therefore, comparator 72 can similarly provide digital correction circuit 76 with an indication of whether the amplified image signal voltage is greater than or less than a threshold voltage. Based on this received indication, digital correction circuit 76 can perform the desired correction operation. As an example, correction circuit 76 can perform normalization of the image data from ADC 74 corresponding to an amplified image signal whose voltage is less than a threshold voltage by scaling the image data from ADC 74 with a calibrated normalized value stored in storage circuit 78. As an example, correction circuit 76 can perform gain offset correction of the image data corresponding to an amplified image signal whose voltage is greater than a threshold voltage by adding a calibrated gain offset value stored in storage circuit 78 to the image data from ADC 74. By performing these correction operations, each readout circuit can effectively exhibit linear and discontinuous input-output gain characteristics, even when multiple gain settings are switched in use.

[0053] like Figure 5 As shown, by coupling the first input of comparator 72 to the output of amplifier 70, variability in gain settings can be considered. However, if desired, the first input of comparator 72 can be coupled to the input of amplifier 70 instead of the output of amplifier 70.

[0054] Figure 6 This is a flowchart illustrating an exemplary operation for compensating for adaptive gain. Combined with... Figure 6 These exemplary operations described can be performed by an image sensor (such as combined with...) Figures 1 to 5 The image sensor described is used for execution.

[0055] In box 80, the image sensor can perform calibration operations to obtain gain normalization settings and gain offset settings. The gain normalization setting can be defined by one or more calibrated normalization values ​​to be selectively applied to image data or image signals using one or more gain amplifications that are normalized relative to other gains. The gain offset setting can be defined by one or more calibrated gain offset values ​​to be selectively applied to image data or image signals using one or more gain amplifications that exhibit discontinuities relative to other gains.

[0056] As an example, this can be achieved by combining the first and second calibration time periods. Figure 3 and Figure 4 At least some of the operations in the described operation are executed in box 80.

[0057] In box 82, the image sensor can selectively perform gain normalization and gain offset correction based on the obtained gain normalization and gain offset settings, or more specifically based on gain normalization and gain offset values ​​that define these settings. As an example, this can be achieved by performing image signal readout time periods combined with the first and second calibration time periods. Figures 3 to 5 At least some of the operations described are performed in block 80. During the image signal readout time period, the image signal from pixel 22 can be read out and received by the corresponding readout circuit of each column, and in combination with... Figures 3 to 5 The method of description is used for processing.

[0058] Various implementations of an image sensor with readout circuitry have been described, the readout circuitry having adaptive gain amplifier circuitry and gain offset compensation functionality.

[0059] As a first example, an image sensor may include: an image sensor pixel array having a plurality of image sensor pixels; a conductive path coupled to and shared among the plurality of image sensor pixels; an amplifier circuit coupled to the conductive path and configured to receive a first image signal and a second image signal along the conductive path, and amplify the first image signal using a first gain; and an image correction circuit coupled to the amplifier circuit and configured to compensate for gain offset between the first amplified image signal and the second amplified image signal.

[0060] If necessary, the first image signal may have a signal amplitude less than a threshold, and the second image signal may have a signal amplitude greater than a threshold. If necessary, the first gain may be greater than the second gain.

[0061] If desired, the image correction circuitry can be configured to compensate for gain offset by applying a gain offset value to image data associated with the second amplified image signal. If desired, the image sensor may include a calibration circuitry coupled to the amplifier circuitry and configured to determine the gain offset value and provide the determined gain offset value to the image correction circuitry. If desired, the calibration circuitry can be configured to provide a test signal to the amplifier circuitry, receive a version of the test signal amplified by the amplifier circuitry, and determine the gain offset value based on the amplified version of the received test signal. If desired, the amplified version of the received test signal may include a first test signal amplified using a first gain and a second test signal amplified using a second gain, and the gain offset value may be determined based on the difference between the first and second amplified test signals. If desired, the calibration circuitry can be configured to determine the gain offset value during a calibration period prior to the amplifier circuitry receiving the first and second image signals.

[0062] If needed, the image correction circuit can be configured to perform gain normalization on image data corresponding to an image signal including a first image signal amplified using a first gain. If needed, the image correction circuit can be configured to compensate for gain offset by applying a gain offset value to image data corresponding to an image signal including a second image signal amplified using a second gain.

[0063] If desired, the image sensor may include an analog-to-digital converter circuit coupled between the amplifier circuit and the image correction circuit, and the image correction circuit may include a digital image data correction circuit configured to compensate for gain offset.

[0064] If necessary, the image correction circuit may include an analog image signal correction circuit configured to compensate for gain offset.

[0065] As a second example, the image sensor may include an image sensor pixel array having image sensor pixel columns, a column path coupled to the image sensor pixel columns, an adjustable gain amplifier coupled to the column path, an analog-to-digital converter coupled to the adjustable gain amplifier, and a digital correction circuit coupled to the analog-to-digital converter and including gain normalization circuitry and gain offset correction circuitry.

[0066] If desired, the image sensor may include a comparator having an output coupled to an adjustable gain amplifier. If desired, the output of the comparator may be coupled to a gain offset correction circuit. If desired, the image sensor may include storage circuitry that stores calibrated gain offset values ​​and is coupled to the gain offset correction circuitry.

[0067] As a third example, an image sensor may include: an image sensor pixel array having a plurality of image sensor pixels; a conductive path coupled to and shared among the plurality of image sensor pixels; an amplifier circuit coupled to the conductive path and configured to receive an image signal on the conductive path and selectively amplify the image signal using a first gain or a second gain based on the signal amplitude of the image signal; a gain offset calibration circuit coupled to the amplifier circuit and configured to determine a gain offset value using a test signal provided to the amplifier circuit; and a gain offset correction circuit coupled to the amplifier circuit and configured to compensate for the gain offset using the determined gain offset value.

[0068] If necessary, a second gain can be used to amplify the image signal based on a signal amplitude greater than a threshold, and the gain offset correction circuit can be configured to compensate for the gain offset by adding a gain offset value to the image data corresponding to the image signal amplified using the second gain.

[0069] If needed, a first gain can be used to amplify the image signal based on a signal amplitude less than a threshold. The amplifier circuit can be configured to receive an additional image signal on a conductive path and to use a second gain to amplify the additional signal based on a signal amplitude greater than a threshold. A gain offset correction circuit can be configured to compensate for gain offset by adding a gain offset value to the image data corresponding to the additional image signal amplified using the second gain. If needed, the image sensor may include a gain normalization circuit coupled to the amplifier circuit and configured to normalize the image data corresponding to the image signal amplified using the first gain relative to the image data corresponding to the additional image signal.

[0070] Those skilled in the art will understand that exemplary embodiments of the present invention can be practiced without some or all of these specific details. In other instances, well-known operations have not been described in detail to avoid unnecessarily obscuring embodiments of the invention.

[0071] The above description is merely illustrative and various modifications can be made to the described implementation scheme. The above implementation scheme can be implemented individually or in any combination.

Claims

1. An image sensor, the image sensor comprising: An image sensor pixel array having a plurality of image sensor pixels; A conductive path, which is coupled to and shared among the plurality of image sensor pixels; An amplifier circuit coupled to the conductive path and configured to receive a first image signal and a second image signal along the conductive path, amplify the first image signal using a first gain and amplify the second image signal using a second gain; and An image correction circuit is coupled to the amplifier circuit and configured to compensate for the gain offset between the amplified first image signal and the amplified second image signal.

2. The image sensor according to claim 1, wherein the first image signal has a signal amplitude less than a threshold, and wherein the second image signal has a signal amplitude greater than the threshold.

3. The image sensor according to claim 2, wherein the first gain is greater than the second gain.

4. The image sensor of claim 1, wherein the image correction circuit is configured to compensate for the gain offset by applying a gain offset value to image data associated with the amplified second image signal.

5. The image sensor according to claim 4, further comprising: A calibration circuit, coupled to the amplifier circuit and configured to determine the gain offset value and provide the determined gain offset value to the image correction circuit.

6. The image sensor of claim 5, wherein the calibration circuit is configured to provide a test signal to the amplifier circuit, receive a version of the test signal amplified by the amplifier circuit, and determine the gain offset value based on the received version of the amplified test signal.

7. The image sensor of claim 6, wherein the amplified version of the received test signal comprises a first test signal amplified using the first gain and a second test signal amplified using the second gain, and wherein the gain offset value is determined based on the difference between the amplified first test signal and the amplified second test signal.

8. The image sensor of claim 5, wherein the calibration circuit is configured to determine the gain offset value during a calibration period prior to the amplifier circuit receiving the first image signal and the second image signal.

9. The image sensor of claim 1, wherein the image correction circuit is configured to perform gain normalization for image data corresponding to an image signal including the first image signal amplified using the first gain.

10. The image sensor of claim 9, wherein the image correction circuit is configured to compensate for the gain offset by applying a gain offset value to image data corresponding to an image signal including the second image signal amplified using the second gain.

11. The image sensor according to claim 1, further comprising: An analog-to-digital converter circuit is coupled between the amplifier circuit and the image correction circuit, wherein the image correction circuit includes a digital image data correction circuit configured to compensate for the gain offset.

12. The image sensor of claim 1, wherein the image correction circuit includes an analog image signal correction circuit configured to compensate for the gain offset.

13. An image sensor, the image sensor comprising: An image sensor pixel array, wherein the image sensor pixel array has columns of image sensor pixels; A column path, wherein the column path is coupled to the pixel column of the image sensor; An adjustable gain amplifier, the adjustable gain amplifier being coupled to the column path; An analog-to-digital converter, the analog-to-digital converter being coupled to the adjustable gain amplifier; and A digital correction circuit, coupled to the analog-to-digital converter, includes a gain normalization circuit and a gain offset correction circuit.

14. The image sensor according to claim 13, further comprising: A comparator having an output coupled to the adjustable gain amplifier.

15. The image sensor of claim 14, wherein the output of the comparator is coupled to the gain offset correction circuit.

16. The image sensor according to claim 15, further comprising: A storage circuit that stores the calibrated gain offset value and is coupled to the gain offset correction circuit.

17. An image sensor, the image sensor comprising: An image sensor pixel array having a plurality of image sensor pixels; A conductive path, which is coupled to and shared among the plurality of image sensor pixels; An amplifier circuit coupled to the conductive path and configured to receive an image signal on the conductive path and selectively amplify the image signal using a first gain or a second gain based on the signal amplitude of the image signal; A gain offset calibration circuit, which is coupled to the amplifier circuit and configured to determine a gain offset value using a test signal provided to the amplifier circuit; and A gain offset correction circuit, which is coupled to the amplifier circuit and configured to compensate for gain offset using a determined gain offset value.

18. The image sensor of claim 17, wherein the image signal is amplified using the second gain based on a signal amplitude greater than a threshold, and wherein the gain offset correction circuit is configured to compensate for the gain offset by adding the gain offset value to image data corresponding to the image signal amplified using the second gain.

19. The image sensor of claim 17, wherein the image signal is amplified using the first gain based on the signal amplitude being less than a threshold, wherein the amplifier circuit is configured to receive an additional image signal on the conductive path, and to amplify the additional image signal using the second gain based on the signal amplitude of the additional image signal being greater than the threshold, and wherein the gain offset correction circuit is configured to compensate for the gain offset by adding the gain offset value to image data corresponding to the additional image signal amplified using the second gain.

20. The image sensor of claim 19, further comprising: A gain normalization circuit, coupled to the amplifier circuit, is configured to normalize the image data corresponding to the image signal amplified using the first gain relative to the image data corresponding to the additional image signal.

Images