Micro-led, micro-led display panel and epitaxial structure

By using a multi-layer epitaxial structure and electrically parallel connection microLED design, the problem of decreased luminous efficiency of microLEDs was solved, achieving higher luminous efficiency and uniform current distribution, thus improving the overall performance of microLEDs.

CN122139464APending Publication Date: 2026-06-02JADE BIRD DISPLAY (SHANGHAI) LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
JADE BIRD DISPLAY (SHANGHAI) LTD
Filing Date
2023-11-09
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

As the spacing and size of microLEDs become smaller, their luminous efficiency decreases, and existing technologies struggle to effectively improve it.

Method used

The microLED employs a multilayer epitaxial structure design, including a substrate, multiple epitaxial layers, and a light-emitting layer. The microLED structure is electrically connected in parallel to improve luminous efficiency, and the electrical connections are isolated by a dielectric material isolation layer to enhance conductivity and optical performance.

Benefits of technology

This improved the luminous efficiency of microLEDs, enhanced the uniformity of current distribution and light extraction efficiency, and improved the output performance of microLEDs.

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Abstract

A microLED (300) includes: a bonding layer (210) disposed on the bottom of the microLED; a first P-type semiconductor layer (311) formed on the bonding layer (210) and electrically connected to the bonding layer (210); a first light-emitting layer (321) formed on the first P-type semiconductor layer (311); an N-type semiconductor layer (330) formed on the first light-emitting layer (321); a second light-emitting layer (322) formed on the N-type semiconductor layer (330); and a second P-type semiconductor layer (312) formed on the second light-emitting layer (322); wherein the first P-type semiconductor layer (311) and the second P-type semiconductor layer (312) are electrically connected to a first electrode (351), and the N-type semiconductor layer (330) is electrically connected to a second electrode (352).
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Description

Technical Field

[0001] This disclosure relates to the manufacturing technology of light-emitting diodes (LEDs), and more particularly, to a microLED, a microLED display panel, and an epitaxial structure. Background Technology

[0002] Inorganic micropixel light-emitting diodes (also known as micro LEDs, micro-LEDs, or μ-LEDs) are becoming increasingly important for various applications such as self-emissive microdisplays, visible light communication, and optogenetics. Compared to traditional LEDs, micro LEDs exhibit better strain relaxation, higher light extraction efficiency, and more uniform current distribution, resulting in superior output performance. Micro LEDs also offer other advantages over traditional LEDs, such as better thermal performance, faster response times, a wider operating temperature range, higher resolution, a wider color gamut, higher contrast, lower power consumption, and the ability to operate at higher current densities.

[0003] MicroLEDs consist of a light-emitting mesa and electrical connections to electrodes, allowing for control of the microLED. As the spacing and size of microLEDs become increasingly smaller, their luminous efficiency may decrease significantly. Summary of the Invention

[0004] This disclosure provides a microLED. The microLED includes: a bonding layer disposed on the bottom of the microLED; a first P-type semiconductor layer formed on the bonding layer and electrically connected to the bonding layer; a first light-emitting layer formed on the first P-type semiconductor layer; an N-type semiconductor layer formed on the first light-emitting layer; a second light-emitting layer formed on the N-type semiconductor layer; and a second P-type semiconductor layer formed on the second light-emitting layer; wherein the first P-type semiconductor layer and the second P-type semiconductor layer are electrically connected to a first electrode, and the N-type semiconductor layer is electrically connected to a second electrode.

[0005] This disclosure also provides a microLED display panel, comprising: an integrated circuit (IC) backplane, the IC backplane including a bottom pad array including a plurality of bottom pads; and a microLED array formed on the IC backplane, the microLED array including a plurality of microLEDs. One of the plurality of microLEDs is electrically connected to one of the plurality of bottom pads, and each microLED includes: a bonding layer bonded to the IC backplane; a first P-type semiconductor layer formed on and electrically connected to the bonding layer; a first light-emitting layer formed on the first P-type semiconductor layer; an N-type semiconductor layer formed on the first light-emitting layer; a second light-emitting layer formed on the N-type semiconductor layer; and a second P-type semiconductor layer formed on the second light-emitting layer; wherein the first P-type semiconductor layer and the second P-type semiconductor layer are electrically connected to a first electrode, and the N-type semiconductor layer is electrically connected to a second electrode.

[0006] This disclosure also provides an epitaxial structure, the epitaxial structure comprising: a substrate disposed at the bottom of the epitaxial structure; an intermediate layer formed on the substrate; a first P-type epitaxial layer formed on the intermediate layer; a first light-emitting layer formed on the first P-type epitaxial layer; an N-type epitaxial layer formed on the first light-emitting layer; a second light-emitting layer formed on the N-type epitaxial layer; and a second P-type epitaxial layer formed on the second light-emitting layer. Attached Figure Description

[0007] Embodiments and aspects of this disclosure will be set forth in the following detailed description and accompanying drawings. Various features shown in the drawings are not drawn to scale.

[0008] Figure 1 A cross-sectional view of an exemplary epitaxial structure in some embodiments of this disclosure is shown.

[0009] Figure 2 Some embodiments of this disclosure are shown. Figure 1 The diagram shows a structural representation of an example process for transferring an epitaxial structure to a silicon wafer.

[0010] Figure 3 A top view of an example microLED in some embodiments of this disclosure is shown.

[0011] Figure 4 Some embodiments of this disclosure are shown, such as Figure 3 The diagram shows a cross-sectional view of the microLED along the A-A' direction.

[0012] Figure 5 These are schematic illustrations in some embodiments of this disclosure. Figure 4The circuit diagram shown shows the two light-emitting layers connected in parallel.

[0013] Figure 6 A top view of another example microLED in some embodiments of this disclosure is shown.

[0014] Figure 7 Some embodiments of this disclosure are shown. Figure 6 The diagram shows a cross-sectional view of the microLED along the B-B' direction.

[0015] Figure 8 These are schematic illustrations in some embodiments of this disclosure. Figure 7 The circuit diagram shown shows the two light-emitting layers connected in parallel.

[0016] Figure 9 A cross-sectional structural diagram of an exemplary microLED display panel in some embodiments of this disclosure is shown.

[0017] Figure 10 A cross-sectional view of another exemplary microLED display panel is shown in some embodiments of this disclosure.

[0018] Figure 11 A top view of an exemplary microLED display panel is shown in some embodiments of this disclosure. Detailed Implementation

[0019] Reference will now be made specifically to exemplary embodiments. Examples of these exemplary embodiments are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, where the same numbers in different figures denote the same or similar elements unless otherwise stated. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with this disclosure. Rather, these implementations are merely examples of apparatuses and methods consistent with the aspects of this disclosure recounted in the appended claims. Specific aspects of this disclosure will now be described in more detail. If any terminology and definitions provided herein conflict with those incorporated by reference, the terminology and definitions provided herein shall prevail.

[0020] This disclosure provides a microLED for improving luminous efficiency. The microLED includes multiple light-emitting layers.

[0021] Figure 1 A cross-sectional view of an exemplary extensional structure 100 in some embodiments of this disclosure is shown. For example... Figure 1As shown, the epitaxial structure 100 includes a substrate 150 disposed at the bottom of the epitaxial structure 100. In some embodiments, the substrate 150 is made of sapphire. The epitaxial structure 100 also includes an intermediate layer 140 formed on the substrate 150. When the epitaxial structure is transferred to a silicon wafer to form a microLED, the intermediate layer 140 and the substrate 150 are removed. In some embodiments, for sapphire-based epitaxial (EPI) wafers and Si-based EPI wafers, the intermediate layer 140 includes a buffer layer and an unintentional doped (UID) layer. The buffer layer is formed on the substrate 150, and the UID layer is formed on the buffer layer. In this embodiment, the materials of the buffer layer and the UID layer are GaN, and the UID layer is an undoped layer. For GaAs-based EPI wafers, the intermediate layer 140 includes an etch stop layer and a buffer layer. The buffer layer is formed on the substrate 150, and the etch stop layer is formed on the buffer layer. In this embodiment, the material of the buffer layer is GaAs, and the material of the etch stop layer is Al. 0.15 GaInP. The epitaxial structure 100 also includes multiple epitaxial layers and two light-emitting layers. Reference Figure 1 The epitaxial structure 100 includes a first P-type epitaxial layer 111 formed on an intermediate layer 140; a first light-emitting layer 121 formed on the first P-type epitaxial layer 111; an N-type epitaxial layer 130 formed on the first light-emitting layer 121; a second light-emitting layer 122 formed on the N-type epitaxial layer 130; and a second P-type epitaxial layer 112 formed on the second light-emitting layer 122. This structure allows the epitaxial structure 100 to have multiple light-emitting layers. Therefore, the microLED including the epitaxial structure 100 can improve luminous efficiency. In some embodiments, both the first light-emitting layer 121 and the second light-emitting layer 122 include at least one quantum well layer. In some embodiments, the first P-type epitaxial layer 111 and the second P-type epitaxial layer 112 are P-GaN, and the N-type epitaxial layer 130 is N-GaN.

[0022] Figure 2 Some embodiments of this disclosure are shown. Figure 1 The diagram shows a structural representation of an example process for transferring an epitaxial structure to a silicon wafer. (Reference) Figure 1 and Figure 2 ,Will Figure 1 The epitaxial structure 100 shown is inverted and mounted on the bonding layer 210. Therefore, a second P-type epitaxial layer 112 is disposed on the bonding layer 210 and electrically connected to it. The bonding layer 210 is also disposed on the silicon wafer 220. In some embodiments, the material of the bonding layer 210 is a metal. For example, the material may include: Al, Au, Rh, Ag, Cr, Ti, Pt, Sn, Cu, etc. The material may also include one or more metal alloys, such as AuSn, TiW, etc. Figure 2As shown, during the transfer process, the substrate 150 and the intermediate layer 140 are removed. For example, for a sapphire-based EPI wafer, the sapphire substrate 150 can be removed using laser lift-off (LLO), and the intermediate layer 140 can be etched using inductively coupled plasma (ICP), reactive ion etching (RIE), or ion beam etching (IBE). For a Si-based EPI wafer, the Si substrate 150 can be removed using one or more of the following methods: grinding, polishing, dry etching (ICP, RIE, or IBE), or wet etching (e.g., mixing HNO3 and HF), and the intermediate layer 140 can be etched using ICP, RIE, or IBE. For a GaAs-based EPI wafer, the GaAs substrate 150 can be removed using wet etching (e.g., mixing NH4OH and H2O2), and the intermediate layer 140 (i.e., the etch stop layer) can be etched using HCl or a mixture of HCl and H3PO4. After the conversion process is completed, the resulting layered structure can be used to manufacture microLEDs.

[0023] In some embodiments, the first light-emitting layer 121 and the second light-emitting layer 122 emit light of the same color. In some embodiments, the first light-emitting layer 121 and the second light-emitting layer 122 emit light of different colors.

[0024] Figure 3 A top view of an example microLED in some embodiments of this disclosure is shown. Figure 4 Some embodiments of this disclosure are shown, such as Figure 3 The diagram shows a cross-sectional view of the microLED along the A-A' direction. MicroLED 300 is composed of... Figure 2 The layered structure shown is used. (Reference) Figure 3 and Figure 4 The microLED 300, from top to bottom, includes a first P-type semiconductor layer 311, a first light-emitting layer 321, an N-type semiconductor layer 330, a second light-emitting layer 322, a second P-type semiconductor layer 312, and a bonding layer 340. The second P-type semiconductor layer 312 is electrically connected to the bonding layer 340. The first P-type semiconductor layer 311 and the second P-type semiconductor layer 312 are electrically connected to a first electrode (e.g., a P-pad, further described below). The N-type semiconductor layer 330 is electrically connected to a second electrode (e.g., an N-pad, further described below). Therefore, the two light-emitting layers (e.g., the first light-emitting layer 321 and the second light-emitting layer 322) can be considered to be electrically connected in parallel.

[0025] refer to Figure 4In this embodiment, the microLED 300 further includes a connection structure 370 that electrically connects the first P-type semiconductor layer 311 and the second P-type semiconductor layer 312 to the first electrode. The top of the connection structure 370 is electrically connected to the first P-type semiconductor layer 311, and the bottom of the connection structure 370 is electrically connected to the bonding layer 340. Since the second P-type semiconductor layer 312 is electrically connected to the bonding layer 340, both the first P-type semiconductor layer 311 and the second P-type semiconductor layer 312 are electrically connected to the bonding layer 340. The bonding layer 340 is also bonded to the integrated circuit (IC) backplane 350 via a bottom pad 351, which serves as the first electrode (e.g., a P-pad). In this embodiment, the bottom pad 351 is a P-pad.

[0026] In some embodiments, the microLED 300 further includes a top conductive layer 360 covering the microLED 300. The top conductive layer 360 is formed on the surface of the microLED 300. The top conductive layer 360 is electrically connected to the N-type semiconductor layer 330. The top conductive layer 360 is also electrically connected to a second electrode (e.g., an N-pad). For example, in this embodiment, the top pad 352 is disposed on the IC backplane 350 and serves as the second electrode (e.g., an N-pad). In some embodiments, the bottom pad 351 and the top pad 352 can be connected to the internal circuitry of the IC backplane 350 and can control the on / off state of the bottom pad 351 and the top pad 352. In some embodiments, the N-type semiconductor layer 330 includes a second N-type semiconductor layer 332 formed on the second light-emitting layer 322 and a first N-type semiconductor layer 331 formed on the second N-type semiconductor layer 332. The second N-type semiconductor layer 332 extends outward from the first N-type semiconductor layer 331, and the extended top surface of the second N-type semiconductor layer 332 is electrically connected to the top conductive layer 360. During manufacturing, the N-type semiconductor layer 330 can be etched to a stop to form the first N-type semiconductor layer 331 and the second N-type semiconductor layer 332. The first P-type semiconductor layer 311, the first light-emitting layer 321, and the first N-type semiconductor layer 331 form a first light-emitting mesa. The second N-type semiconductor layer 332, the second light-emitting layer 322, and the second P-type semiconductor layer 312 form a second light-emitting mesa. In some embodiments, the connection structure 370 is a metal structure disposed on one side of the mesa structure. In some embodiments, the top conductive layer 360 is a thin layer of transparent conductive oxide (TCO), such as an indium tin oxide (ITO) layer, an antimony-doped zinc oxide (AZO) layer, an antimony-doped tin oxide (ATO) layer, a fluorine-doped tin oxide (FTO) layer, etc.

[0027] In some embodiments, the microLED 300 further includes a dielectric material 380, which fills the space between the top conductive layer 360 and the mesa structure (including the first and second light-emitting mesa) and around the connection structure 370 to isolate accidental electrical connections between the top conductive layer 360, the mesa structure, and the connection structure 370. The dielectric material 380 is transparent. The material of the dielectric material 380 may be selected from one or more of SiO2, SiON, Al2O3, or SiN.

[0028] Figure 5 These are schematic illustrations in some embodiments of this disclosure. Figure 4 The circuit diagram shown illustrates two light-emitting layers connected in parallel. A diode can be considered as a light-emitting mesa comprising light-emitting layers (e.g., first light-emitting layer 321 and second light-emitting layer 322). Figure 5 As shown, the first light-emitting layer 321 and the second light-emitting layer 322 are connected in parallel. A driver 510 can be connected to the micro-LEDs 300 and configured to control each micro-LED 300 individually. In some embodiments, the driver 510 can be integrated into the IC backplane 350.

[0029] Figure 6 A top view of another example microLED in some embodiments of this disclosure is shown. Figure 7 Some embodiments of this disclosure are shown. Figure 6 The diagram shows a cross-sectional view of the microLED along the B-B' direction. The microLED 600 is composed of... Figure 2 The layered structure shown is used. (Reference) Figure 6 and Figure 7 The microLED 600, from top to bottom, includes a first P-type semiconductor layer 611, a first light-emitting layer 621, an N-type semiconductor layer 630, a second light-emitting layer 622, a second P-type semiconductor layer 612, and a bonding layer 640. The second P-type semiconductor layer 612 is electrically connected to the bonding layer 640. The first P-type semiconductor layer 611 and the second P-type semiconductor layer 612 are electrically connected to a first electrode (e.g., a P-pad, which will be further described below). The N-type semiconductor layer 630 is electrically connected to a second electrode (e.g., an N-pad, which will be further described below). Therefore, the two light-emitting layers (e.g., the first light-emitting layer 621 and the second light-emitting layer 622) can be considered to be electrically connected in parallel.

[0030] refer to Figure 7In this embodiment, the microLED 600 further includes a connection structure 670 that electrically connects the N-type semiconductor layer 630 to the bottom pad 651 of the IC backplane 650, i.e., the second electrode (e.g., the N-pad). In this embodiment, the bottom pad 651 is an N-pad. The top of the connection structure 670 is electrically connected to the N-type semiconductor layer 630, and the bottom of the connection structure 670 is electrically connected to the bottom pad 651, i.e., the second electrode. In some embodiments, the N-type semiconductor layer 630 includes a second N-type semiconductor layer 632 formed on the second light-emitting layer 622, and a first N-type semiconductor layer 631 formed on the second N-type semiconductor layer 632. The second N-type semiconductor layer 632 extends outward from the first N-type semiconductor layer 631, and the extended top surface of the second N-type semiconductor layer 632 is electrically connected to the connection structure 670. During the manufacturing process, the N-type semiconductor layer 630 can be etched to a stop to form the first N-type semiconductor layer 631 and the second N-type semiconductor layer 632. A first P-type semiconductor layer 611, a first light-emitting layer 621, and a first N-type semiconductor layer 631 form a first light-emitting mesa. A second N-type semiconductor layer 632, a second light-emitting layer 622, and a second P-type semiconductor layer 612 form a second light-emitting mesa. In some embodiments, the connection structure 670 is a metal structure disposed on one side of the mesa structure.

[0031] In some embodiments, the microLED 600 further includes a top conductive layer 660 covering the microLED 600. The top conductive layer 660 is formed on the surface of the microLED 600. In this embodiment, the top conductive layer 660 electrically connects the first P-type semiconductor layer 611 and the second P-type semiconductor layer 612 to a first electrode (e.g., a P-pad). For example, in this embodiment, the top pad 652 is disposed on the IC backplane 650 and serves as the first electrode (e.g., a P-pad). In some embodiments, the bottom pad 651 and the top pad 652 can be connected to the internal circuitry of the IC backplane 650 and can control the on / off state of the bottom pad 651 and the top pad 652. In this embodiment, the top conductive layer 660 is formed on the top surface of the first P-type semiconductor layer 611 and electrically connected to the first P-type semiconductor layer 611. The bottom of the top conductive layer 660 is electrically connected to the bonding layer 640. Since the second P-type semiconductor layer 612 is electrically connected to the bonding layer 640, the first P-type semiconductor layer 611 and the second P-type semiconductor layer 612 are electrically connected to the top conductive layer 660 through the bonding layer 640. In some embodiments, the top conductive layer 660 is a transparent conductive oxide (TCO) thin layer, such as an indium tin oxide (ITO) layer, an antimony-doped zinc oxide (AZO) layer, an antimony-doped tin oxide (ATO) layer, a fluorine-doped tin oxide (FTO) layer, etc.

[0032] In some embodiments, the microLED 600 further includes a dielectric material 680 filled between the top conductive layer 660 and the mesa structure (including the first and second light-emitting mesa) and around the connection structure 670 to isolate accidental electrical connections between the top conductive layer 660, the mesa structure, and the connection structure 670. The dielectric material 680 is transparent. The material of the dielectric material 680 may be selected from one or more of SiO2, SiON, Al2O3, or SiN.

[0033] Figure 8 These are schematic illustrations in some embodiments of this disclosure. Figure 7 The circuit diagram shown illustrates two light-emitting layers connected in parallel. A diode can be considered as a light-emitting mesa comprising light-emitting layers (e.g., first light-emitting layer 621 and second light-emitting layer 622). Figure 8 As shown, the first light-emitting layer 621 or the second light-emitting layer 622 are electrically connected in parallel. A driver 810 can be connected to the microLEDs 600 and configured to control each microLED 600 individually. In some embodiments, the driver 810 can be integrated into the IC backplane 650.

[0034] Figure 9 A cross-sectional structural diagram of an exemplary microLED display panel in some embodiments of this disclosure is shown. The microLED display panel 900 includes a microLED array comprising a plurality of microLEDs 910 and an IC backplane 940. The plurality of microLEDs 910 are disposed on the IC backplane 940. For ease of illustration, Figure 9 Two adjacent microLEDs 910 are shown. It is understood that the microLED display panel 900 may include more microLEDs 910. For details regarding the microLEDs 910, please refer to the section above. Figures 3 to 5 The description of the microLED 300 shown will not be repeated here. It is understood that the microLED 910 can also be configured as described above. Figures 6 to 8 The aforementioned microLED 600.

[0035] like Figure 9 As shown, the top conductive layer 911 of the microLED 910 is interconnected with each of the plurality of microLEDs 910. That is, the top conductive layer 911 is continuously formed on top of the microLED array and connected to each microLED 910. The microLED display panel 900 also includes reinforcement pads 930 disposed on the top conductive layer 911 between adjacent microLEDs 910. The reinforcement pads 930 are interconnected to improve the conductivity of the top conductive layer 911. In some embodiments, the reinforcement pads 930 have a mesh structure.

[0036] The microLED display panel 900 also includes an isolation structure 920 disposed on the top conductive layer 911 and between adjacent microLEDs 910 to isolate optical crosstalk between adjacent microLEDs 910.

[0037] like Figure 9 As shown, in this embodiment, the isolation structure 920 has a conical structure. That is, the top surface of the isolation structure 920 is smaller than the bottom surface of the isolation structure 920. In some embodiments, such as Figure 9As shown, the isolation structure 920 has a triangular cross-section. In some embodiments, the isolation structure 920 includes an isolation core 922 disposed on a reinforcing pad 930 and a reflective layer 921 formed on the surface of the isolation core 922. The isolation core 922 is configured to form a suitable angle with the reflective layer 921. In some embodiments, the material of the isolation core 922 is not metal, while the material of the reflective layer 921 is metal. For example, the material of the isolation core 922 is an isolation material for absorbing light. The material of the reflective layer 921 can be any material with high reflectivity, such as Au, Ag, an omnidirectional reflector (ODR), a distributed Bragg reflector (DBR), etc.

[0038] In some embodiments, the microLED 910 includes two light-emitting layers, the top of the isolation structure 920 is higher than the top of the upper light-emitting layer, and the bottom of the isolation structure 920 is disposed on the top conductive layer 911. Therefore, the isolation structure 920 can isolate optical crosstalk between adjacent microLEDs 910.

[0039] In some embodiments, the microLED display panel 900 further includes a plurality of microlenses 950 disposed above a plurality of microLEDs 910, wherein one of the microlenses 950 corresponds to one of the microLEDs 910.

[0040] Figure 10 A cross-sectional view of another exemplary microLED display panel according to some embodiments of this disclosure is shown. The microLED display panel 1000 includes a microLED array and an IC backplane 1040, the microLED array including a plurality of microLEDs 1010. The plurality of microLEDs 1010 are disposed on the IC backplane 1040. For ease of illustration, Figure 10 Two adjacent microLEDs 1010 are shown. It will be understood that the microLED display panel 1000 may include more microLEDs 1010. For details regarding the microLEDs 1010, please refer to the section above. Figures 3 to 5 The description of the microLED 300 shown will not be repeated here. It is understood that the microLED 1010 can also be configured as described above. Figures 6 to 8 The aforementioned microLED 600.

[0041] like Figure 10As shown, the top conductive layer 1011 of the microLED 1010 is interconnected with each of the plurality of microLEDs 1010. That is, the top conductive layer 1011 is continuously formed on top of the microLED array and connected to each microLED 1010. The microLED display panel 1000 also includes reinforcement pads 1030 disposed on the top conductive layer 1011 between adjacent microLEDs 1010. The reinforcement pads 1030 are interconnected to improve the conductivity of the top conductive layer 1011. In some embodiments, the reinforcement pads 1030 have a mesh structure.

[0042] The microLED display panel 1000 also includes an isolation structure 1020 disposed on the top conductive layer 1011 and between adjacent microLEDs 1010 to isolate optical crosstalk between adjacent microLEDs 1010.

[0043] like Figure 10 As shown, in this embodiment, the isolation structure 1020 is a cylindrical structure, meaning that the area of ​​the upper surface of the isolation structure 1020 is the same as the area of ​​the lower surface. In some embodiments, the material of the isolation structure 1020 can be any material with high reflectivity, such as Al, Rh, Au, Ag, etc.

[0044] In some embodiments, the microLED 1010 includes two light-emitting layers, the top of the isolation structure 1020 is higher than the top of the upper light-emitting layer, and the bottom of the isolation structure 1020 is disposed on the reinforcement pad 1030. Therefore, the isolation structure 1020 can isolate optical crosstalk between adjacent microLEDs 1010.

[0045] In some embodiments, the microLED display panel 1000 further includes a plurality of microlenses 1050 disposed above a plurality of microLEDs 1010, wherein one of the microlenses 1050 corresponds to one of the microLEDs 1010.

[0046] Figure 11 A top view structural diagram of an exemplary microLED display panel according to some embodiments of the present disclosure is shown. (Reference) Figure 11The microLED display panel 1100 includes a microLED array 1110 and an IC backplane 1120. The microLED array 1110 is located on the IC backplane 1120, forming the image display area of ​​the microLED display panel 1100. The remaining area of ​​the IC backplane 1120 not covered by the microLED array 1110 is formed as a non-functional area. The IC backplane 1120 is formed on the back of the microLED array 1110, and a portion of it extends beyond the microLED array 1110, i.e., it is not covered by the microLED array 1110. The microLED array 1110 includes a plurality of microLEDs 1111 arranged in an array. The IC backplane 1120 is configured to control the plurality of microLEDs 1111. The IC backplane 1120 may include a bottom pad array (not shown) corresponding to the microLED array 1110. The bottom pad array includes a plurality of bottom pads (e.g., Figure 4 Bottom pad 351, Figure 7 Bottom pad 651 in Figure 9 Bottom pad 941, or Figure 10 The bottom pad 1041 corresponds to one microLED 1111. One microLED among multiple microLEDs is electrically connected to one bottom pad.

[0047] In some embodiments, the IC backplane 1120 further includes top connection pads 1121. Top conductive layer (e.g.) Figure 1 Top conductive layer 360 Figure 7 Top conductive layer 660 in Figure 9 The top conductive layer 911 or Figure 10 The top conductive layer 1011 is connected to the top connection pad 1121 and can be further connected to external circuitry (e.g., Figure 5 Drive 510 or Figure 8 (Driver 810 in the middle).

[0048] Each microLED described herein (e.g., microLEDs 300, 600, 910, 1010) is extremely small. MicroLEDs can be used in microLED display panels. The light-emitting area of ​​a microLED display panel (e.g., microLED display panel 1100) is very small, such as 1mm × 1mm, 3mm × 5mm, etc. In some embodiments, the light-emitting area is the area of ​​the microLED array in the microLED display panel. The microLED display panel includes one or more microLEDs forming a pixel array with microLEDs as pixels, such as a 1600 × 1200, 680 × 480, or 1920 × 1080 pixel array. The diameter of each microLED is in the range of approximately 200nm to 2μm. An IC backplane, such as IC backplane 1120, is formed on the back side of the microLED array 1110, and the IC backplane is electrically connected to the microLED array 1110. The IC backplane 1120 acquires signals such as image data from the outside via signal lines to control the corresponding microLEDs 1111 to emit or not emit light.

[0049] Those skilled in the art will understand that the microLED display panel is not limited to the structure described above, and may include more or fewer components than shown in the figure, or may combine some components, or may use different components.

[0050] It is important to note that the relational terms used in this document, such as “first” and “second”, are used only to distinguish one entity or operation from another, and do not require or imply any actual relationship or order between these entities or operations. Furthermore, words such as “including,” “having,” “containing,” and “comprising,” as well as other similar forms, should have the same meaning and are open-ended; one or more items following any of these words do not imply an exhaustive list of those items, nor do they imply limitation to only one or more of the listed items.

[0051] Unless otherwise specified, the term "or" as used herein covers all possible combinations except where it is impractical. For example, if a database is declared to contain A or B, then unless otherwise specified or impractical, the database may include A, or B, or A and B. As a second example, if a database is declared to contain A, B, or C, then unless otherwise specified or impractical, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0052] In the foregoing description, numerous specific details have been described with reference to embodiments, which may vary from embodiment to embodiment. Certain adjustments and modifications may be made to the described embodiments. Other embodiments will be readily apparent to those skilled in the art from the description and practice of the invention disclosed herein. The description and examples should be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims. The sequence of steps shown in the figures is also for illustrative purposes only and is not intended to limit to any particular order of steps. Therefore, those skilled in the art will understand that these steps may be performed in a different order when implementing the same method.

[0053] Exemplary embodiments have been disclosed in the accompanying drawings and description. However, various changes and modifications can be made to these embodiments. Therefore, although specific terms are used, they are used in a general and descriptive sense only and not for limiting purposes.

Claims

1. A micro-LED, characterized in that, include: A bonding layer disposed at the bottom of the microLED; A first P-type semiconductor layer formed on the bonding layer and electrically connected to the bonding layer; A first light-emitting layer formed on the first P-type semiconductor layer; An N-type semiconductor layer formed on the first light-emitting layer; A second light-emitting layer is formed on the N-type semiconductor layer; as well as A second P-type semiconductor layer formed on the second light-emitting layer; The first P-type semiconductor layer and the second P-type semiconductor layer are electrically connected to the first electrode, and the N-type semiconductor layer is electrically connected to the second electrode.

2. The microLED according to claim 1, characterized in that, It also includes a connection structure that electrically connects the first P-type semiconductor layer and the second P-type semiconductor layer to the first electrode.

3. The microLED according to claim 2, characterized in that, The connection structure is electrically connected to the second P-type semiconductor layer and the bonding layer.

4. The microLED according to claim 2, characterized in that, It also includes a top conductive layer covering the microLED, the top conductive layer being electrically connected to the N-type semiconductor layer.

5. The microLED according to claim 4, characterized in that, The N-type semiconductor layer includes a first N-type semiconductor layer formed on a first light-emitting layer and a second N-type semiconductor layer formed on the first N-type semiconductor layer. The first N-type semiconductor layer extends outward from the second N-type semiconductor layer, and the top surface of the first N-type semiconductor layer is electrically connected to the top conductive layer.

6. The microLED according to claim 1, characterized in that, It also includes a connection structure that electrically connects the N-type semiconductor layer to the second electrode.

7. The microLED according to claim 6, characterized in that, It also includes a top conductive layer covering the microLED, which electrically connects the second P-type semiconductor layer to the first electrode.

8. The microLED according to claim 7, characterized in that, The top conductive layer is electrically connected to the bonding layer.

9. The microLED according to any one of claims 1 to 8, characterized in that, The first light-emitting layer and the second light-emitting layer are configured to emit light of the same color.

10. The microLED according to any one of claims 1 to 8, characterized in that, The first light-emitting layer and the second light-emitting layer are configured to emit light of different colors.

11. A micro-LED display panel, characterized in that, include: An integrated circuit (IC) backplane includes a bottom pad array, the bottom pad array comprising a plurality of bottom pads; as well as A microLED array formed on the IC backplane, the microLED array comprising multiple microLEDs; Wherein, one of the plurality of microLEDs is electrically connected to one of the plurality of bottom pads, and each of the plurality of microLEDs includes: The bonding layer bonded to the IC backplane; A first P-type semiconductor layer formed on the bonding layer and electrically connected to the bonding layer; A first light-emitting layer formed on the first P-type semiconductor layer; An N-type semiconductor layer formed on the first light-emitting layer; A second light-emitting layer formed on the N-type semiconductor layer; and A second P-type semiconductor layer formed on the second light-emitting layer; The first P-type semiconductor layer and the second P-type semiconductor layer are electrically connected to the first electrode, and the N-type semiconductor layer is electrically connected to the second electrode.

12. The microLED display panel according to claim 11, characterized in that, The microLED also includes a top conductive layer covering the microLED, and the top conductive layer of the microLED is interconnected with the top conductive layer of each of the plurality of microLEDs.

13. The microLED display panel according to claim 12, characterized in that, It also includes reinforcing pads disposed on the top conductive layer and between adjacent microLEDs to improve the conductivity of the top conductive layer.

14. The microLED display panel according to claim 13, characterized in that, It also includes an isolation structure disposed on the top conductive layer and between adjacent microLEDs to isolate optical crosstalk between adjacent microLEDs.

15. The microLED display panel according to claim 14, characterized in that, The isolation structure has a conical structure.

16. The microLED display panel according to claim 15, characterized in that, The isolation structure includes an isolation core disposed on the reinforcing pad and a reflective layer formed on the surface of the isolation core.

17. The micro-LED display panel according to claim 14, characterized in that, The isolation structure has a cylindrical shape.

18. The microLED display panel according to any one of claims 11 to 17, characterized in that, Also includes: Multiple microlenses are respectively disposed above the multiple microLEDs, and one of the multiple microlenses corresponds to one of the multiple microLEDs.

19. An epitaxial structure, characterized in that, Its features include: The substrate located at the bottom of the epitaxial structure; An intermediate layer formed on the substrate; The first P-type epitaxial layer is formed on the intermediate layer; A first light-emitting layer formed on the first P-type epitaxial layer; An N-type epitaxial layer formed on the first light-emitting layer; A second light-emitting layer formed on the N-type epitaxial layer; and A second P-type epitaxial layer is formed on the second light-emitting layer.

20. The epitaxial structure according to claim 19, characterized in that, The substrate is made of sapphire.

21. The epitaxial structure according to claim 19, characterized in that, Both the first light-emitting layer and the second light-emitting layer include at least one quantum well layer.