High-speed temperature-resistant data reading system, method, device, equipment, medium and product

Abstract

The application relates to the technical field of well logging, in particular to a high-speed temperature-resistant data reading system, method, device, equipment, medium and product, wherein the system comprises a processing unit, an encoding circuit, an analog-digital conversion circuit and an impedance matching circuit; a simplified media independent interface of the processing unit is connected to the encoding circuit; the encoding circuit is coupled to the analog-digital conversion circuit through the impedance matching circuit; and the temperature-resistant performance and reading rate of the data reading system can be improved.

Description

Technical Field

[0001] This invention relates to the field of well logging technology, and in particular to a high-speed, high-temperature resistant data reading system, method, apparatus, equipment, medium, and product. Background Technology

[0002] For selecting a solution to read large-capacity logging data, the commonly used solutions are CAN communication and USB communication. However, the CAN communication solution has too low a communication rate, making it unsuitable for rapid reading of large amounts of data; the USB communication solution has too short a communication distance, and data communication is affected beyond the preset distance. There are technical problems in this field regarding the poor temperature resistance and low reading rate of data reading systems. Summary of the Invention

[0003] This invention provides a high-speed, high-temperature resistant data reading system, method, apparatus, equipment, medium, and product, which solves the technical problems of poor temperature resistance and low reading rate in data reading systems.

[0004] In a first aspect, the present invention provides a high-speed, temperature-resistant data reading system, the system comprising: a processing unit, an encoding circuit, an analog-to-digital conversion circuit, and an impedance matching circuit; a simplified media-independent interface of the processing unit is connected to the encoding circuit; the encoding circuit is coupled to the analog-to-digital conversion circuit through the impedance matching circuit.

[0005] In some embodiments, the impedance matching circuit includes: a first resistor and a second resistor connected in series between a power supply and ground, wherein a first end of the first resistor is connected to the power supply, a second end of the first resistor is connected to the second resistor, and a second end of the second resistor is grounded; a third resistor and a fourth resistor connected in series between the second end of the first resistor and ground, wherein a first end of the third resistor is connected to the second end of the first resistor, a second end of the third resistor is connected to the first end of the fourth resistor, and a second end of the fourth resistor is grounded; and a coupling capacitor, the first end of which is connected to the first end of the fourth resistor.

[0006] In some embodiments, the encoding circuit is coupled to the analog-to-digital converter circuit via an impedance matching circuit, including: a first end of the coupling capacitor is connected to the encoding circuit; and a second end of the coupling capacitor is connected to the analog-to-digital converter circuit.

[0007] In some embodiments, the impedance matching circuit includes a plurality of third resistors, a fourth resistor, and a coupling capacitor; each third resistor is connected in parallel to the second end of the first resistor.

[0008] Secondly, the present invention provides a high-speed high-temperature data processing method based on any of the above-mentioned high-speed high-temperature data reading systems. The method includes: acquiring data to be sent; performing FCS checksum calculation on the data to be sent to obtain the FCS checksum of the data to be sent; encapsulating the data to be sent using TCP layer and IP layer, and adding an Ethernet protocol header; and adding the FCS checksum of the data to be sent to the Ethernet protocol header.

[0009] In some embodiments, the method further includes: encoding the data to be transmitted into 4B / 5B and outputting a 100BASE-FX signal; and converting the 100BASE-FX signal into an unbalanced signal for output.

[0010] Thirdly, the present invention provides a high-speed high-temperature resistant data processing device based on any of the above-mentioned high-speed high-temperature resistant data reading systems. The device includes: a verification module for acquiring data to be sent, performing FCS checksum calculation on the data to be sent, and obtaining the FCS checksum of the data to be sent; an encapsulation module for encapsulating the data to be sent using TCP layer and IP layer, and adding an Ethernet protocol header; and an adding module for adding the FCS checksum of the data to be sent to the Ethernet protocol header.

[0011] Fourthly, the present invention provides a computer device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of any of the above-mentioned high-speed temperature-resistant data processing methods.

[0012] Fifthly, the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above-described high-speed temperature-resistant data processing methods.

[0013] In a sixth aspect, the present invention provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described high-speed temperature-resistant data processing methods.

[0014] This invention provides a high-speed, high-temperature resistant data reading system, method, apparatus, device, medium, and product. The system includes: a processing unit, an encoding circuit, an analog-to-digital conversion circuit, and an impedance matching circuit. A simplified media independent interface of the processing unit is connected to the encoding circuit. The encoding circuit is coupled to the analog-to-digital conversion circuit through the impedance matching circuit. This invention can improve the temperature resistance and reading speed of the data reading system. Attached Figure Description

[0015] The invention will now be described in more detail with reference to embodiments and the accompanying drawings:

[0016] Figure 1This is a schematic diagram of the structure of a high-speed, high-temperature resistant data reading system provided in an embodiment of this application;

[0017] Figure 2 This is a flowchart illustrating a high-speed, high-temperature data processing method provided in an embodiment of this application.

[0018] Figure 3 This is a schematic diagram of the structure of a high-speed, high-temperature resistant data processing device provided in an embodiment of this application;

[0019] Figure 4 This is a schematic diagram of a high-speed data reading method device adapted to high-temperature environments provided in an embodiment of this application;

[0020] Figure 5 This is a circuit diagram of a 4B / 5B encoding circuit provided in an embodiment of this application;

[0021] Figure 6 This is a schematic diagram of an EOC digital-to-analog converter circuit provided in an embodiment of this application;

[0022] Figure 7 This is a schematic diagram of a digital-to-analog converter impedance matching network circuit provided in an embodiment of this application.

[0023] In the accompanying drawings, the same parts are referred to by the same reference numerals, and the drawings are not drawn to scale. Detailed Implementation

[0024] To enable those skilled in the art to better understand the present invention and to fully understand and implement the process of how the present invention uses technical means to solve technical problems and achieve corresponding technical effects, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. The embodiments of the present invention and the various features therein can be combined with each other without conflict, and the resulting technical solutions are all within the protection scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases the steps shown or described may be executed in a different order than that shown here.

[0027] For selecting a solution to read large-capacity logging data, the commonly used solutions are CAN communication and USB communication. However, the CAN communication solution has too low a communication rate, making it unsuitable for rapid reading of large amounts of data; the USB communication solution has too short a communication distance, and data communication is affected beyond the preset distance. There are technical problems in this field regarding the poor temperature resistance and low reading rate of data reading systems.

[0028] The technical solution of this application will be described below with reference to specific embodiments.

[0029] Example 1

[0030] Figure 1 This is a schematic diagram of the structure of a high-speed, high-temperature resistant data reading system provided in an embodiment of this application. Figure 1 As shown in the technical solution of this embodiment, a high-speed temperature-resistant data reading system is provided. The system includes: a processing unit, an encoding circuit, an analog-to-digital conversion circuit, and an impedance matching circuit; the simplified media independent interface of the processing unit is connected to the encoding circuit; the encoding circuit is coupled to the analog-to-digital conversion circuit through the impedance matching circuit.

[0031] The technical problem this embodiment aims to solve is how to construct a high-speed, temperature-resistant data reading system. In large-capacity logging applications, related data reading systems such as CAN communication schemes have low speeds, and USB communication schemes suffer from short communication distances, inability to support multi-endpoint communication, and sensitivity to environmental temperatures. Therefore, constructing a system that can adapt to the high-temperature environment of logging and read data at high speed is key to achieving efficient logging data reading.

[0032] The technical solution of this embodiment constructs a system by setting up a processing unit, an encoding circuit, an analog-to-digital converter circuit, and an impedance matching circuit. The processing unit's simplified media-independent interface connects to the encoding circuit, thus conforming to common network encoding standards. The encoding circuit is coupled to the analog-to-digital converter circuit through the impedance matching circuit to resist link interference, improve communication quality, adapt to the high-temperature environment in well logging, and achieve high-speed data reading. The processing unit can be a central processing unit; the encoding circuit, for example, is a 4B / 5B encoding circuit used to output digitally encoded signals adapted for network communication; the analog-to-digital converter circuit, such as an EOC digital-to-analog converter circuit, is used to simulate a network communication router to achieve multi-endpoint serial communication; and the impedance matching circuit is used to resist link interference across the entire ambient temperature range.

[0033] This system can operate effectively in high-temperature environments, such as when the internal temperature of the logging instrument can reach up to 150 degrees Celsius, overcoming the temperature sensitivity issue of traditional USB communication solutions. Secondly, the system possesses high-speed data reading capabilities, with a theoretical maximum data reading rate of 72 Mbps, a significant improvement over the 1 Mbps maximum communication rate of CAN communication solutions. Furthermore, the system supports multi-endpoint serial communication, achieved through an EOC digital-to-analog converter circuit simulating a network communication router, solving the problem of USB communication solutions' inability to effectively support multi-endpoint communication. Finally, through the coordinated operation of its various components, the system outputs a continuous data stream conforming to TCP / IP specifications. This stream can not only be directly connected to a computer network interface but can also be extended to wireless communication via an external wireless network router, greatly improving the convenience and flexibility of data transmission after reading, providing an efficient and stable solution for reading large-capacity logging data.

[0034] Example 2

[0035] Based on the above embodiments, the impedance matching circuit includes: a first resistor and a second resistor connected in series between the power supply and ground, wherein the first end of the first resistor is connected to the power supply, the second end of the first resistor is connected to the second resistor, and the second end of the second resistor is grounded; a third resistor and a fourth resistor connected in series between the second end of the first resistor and ground, wherein the first end of the third resistor is connected to the second end of the first resistor, the second end of the third resistor is connected to the first end of the fourth resistor, and the second end of the fourth resistor is grounded; and a coupling capacitor, the first end of which is connected to the first end of the fourth resistor.

[0036] The technical problem this embodiment aims to solve is how to construct an impedance matching circuit in a high-speed, high-temperature resistant data reading system. During the reading of large-capacity logging data, in order to achieve stable and high-speed data transmission, an impedance matching circuit that can effectively resist link interference in high-temperature environments is needed.

[0037] The technical solution of this embodiment uses a first resistor and a second resistor connected in series between the power supply and ground. The first end of the first resistor is connected to the power supply, and the second end of the first resistor is connected to the second resistor. The second end of the second resistor is grounded. A third resistor and a fourth resistor are connected in series between the second end of the first resistor and ground. The first end of the third resistor is connected to the second end of the first resistor, and the second end of the third resistor is connected to the first end of the fourth resistor. The second end of the fourth resistor is grounded. A coupling capacitor is also included, with its first end connected to the first end of the fourth resistor. This circuit structure enables data link communication matching between digital and analog circuits, thereby reducing communication interference and ensuring reliable data transmission under the required operating temperature.

[0038] In large-capacity logging applications, this impedance matching circuit plays a crucial role in high-temperature environments. For example, when the logging instrument is in a high-temperature environment (-45°C to 150°C), it can effectively resist link interference. Through reasonable resistor series and coupling capacitor settings, the stability of data transmission is greatly improved. Because there are many interference factors in such environments, this circuit structure can reduce signal distortion and noise interference caused by temperature and other factors, ensuring the accuracy of data transmission. Simultaneously, it can match the data link of the analog-to-digital circuit, enabling better coordination between the various parts of the entire data reading system. For high-speed data transmission, a stable link is fundamental. This impedance matching circuit provides a strong guarantee for achieving the theoretical maximum data reading rate of 72Mbps, and can ensure that the system can operate continuously at the highest rate for 2 hours in high-temperature environments, effectively improving the efficiency and reliability of large-capacity logging data reading.

[0039] Example 3

[0040] Based on the above embodiments, the encoding circuit is coupled to the analog-to-digital conversion circuit through an impedance matching circuit, including: the first end of the coupling capacitor is connected to the encoding circuit; the second end of the coupling capacitor is connected to the analog-to-digital conversion circuit.

[0041] The technical problem this embodiment aims to solve is how to couple the encoding circuit and the analog-to-digital conversion circuit based on an impedance matching circuit. In a large-capacity logging data reading system, the coupling method between the encoding circuit and the analog-to-digital conversion circuit is crucial for accurate data transmission and normal system operation. A suitable coupling method based on an impedance matching circuit is needed to ensure stable data transmission between the two.

[0042] The technical solution of this embodiment achieves coupling by connecting the first end of the coupling capacitor to the encoding circuit and the second end to the analog-to-digital conversion circuit. This utilizes the coupling capacitor in the impedance matching circuit as a bridge connecting the encoding circuit and the analog-to-digital conversion circuit, allowing for better adaptation to circuit characteristics and reducing signal reflection issues during signal transmission, thereby achieving stable data transmission. For example, during system operation, the digital encoded signal output from the 4B / 5B encoding circuit can be more effectively transmitted to the EOC digital-to-analog conversion circuit through this coupling method.

[0043] In large-capacity logging applications, this coupling method ensures the accuracy and stability of data transmission between the encoding circuit and the analog-to-digital conversion circuit. Reducing signal reflection is crucial for high-speed data transmission. The coupling capacitors effectively guarantee signal quality during data transmission from the encoding circuit to the analog-to-digital conversion circuit, preventing data errors or loss caused by signal reflection. This facilitates high-speed data reading, ensuring a theoretical maximum data reading rate of 72 Mbps. Furthermore, this coupling method operates stably in high-temperature environments. Combined with the system's high-temperature resistant design, it allows the system to operate continuously at its maximum rate for 2 hours in ambient temperatures ranging from -45°C to 150°C, providing key technical support for the efficient and stable reading of large-capacity logging data.

[0044] Example 4

[0045] Based on the above embodiments, the impedance matching circuit includes multiple third resistors, fourth resistors, and coupling capacitors; each third resistor is connected in parallel to the second end of the first resistor.

[0046] The technical problem this embodiment aims to solve is how to couple multiple interfaces of the encoding circuit and the analog-to-digital conversion circuit based on an impedance matching circuit. In a large-capacity logging data reading system, the encoding circuit and the analog-to-digital conversion circuit have multiple interfaces. To ensure efficient system operation and accurate data transmission, an effective coupling method is needed to handle the connections between these multiple interfaces.

[0047] The technical solution of this embodiment uses multiple third resistors, fourth resistors, and coupling capacitors, with each third resistor connected in parallel to the second terminal of the first resistor. This design effectively couples multiple interfaces of the encoding circuit and multiple interfaces of the analog-to-digital conversion circuit. The combination of multiple resistors and coupling capacitors better matches the circuit characteristics between different interfaces, achieving stable data transmission between multiple interfaces.

[0048] In large-capacity logging applications, this coupling method targeting multiple interfaces significantly improves system flexibility and data transmission reliability. For logging systems with multiple endpoints, stable connections between the interfaces of the encoding circuit and the analog-to-digital converter circuit are crucial. This coupling method allows the system to better support multi-endpoint serial communication, avoiding data transmission failures caused by interface connection issues. For example, when multiple logging tools are connected in series, data can be stably transmitted between the encoding circuit and the analog-to-digital converter circuit through each interface, ensuring efficient operation even under complex multi-endpoint operating modes. Simultaneously, this coupling method also helps the system maintain stability in high-temperature environments. Combined with the system's high-temperature resistant design, it enables continuous operation at the highest rate for 2 hours in ambient temperatures ranging from -45°C to 150°C, effectively improving the overall performance of large-capacity logging data reading.

[0049] Example 5

[0050] Figure 2 This is a flowchart illustrating a high-speed, high-temperature data reading method provided in an embodiment of this application. Figure 2 As shown, in the technical solution of this embodiment, a high-speed high-temperature data processing method based on any of the high-speed high-temperature data reading systems in the above embodiments is provided. The method includes: acquiring data to be sent; performing FCS checksum calculation on the data to be sent to obtain the FCS checksum of the data to be sent; encapsulating the data to be sent using TCP layer and IP layer, and adding an Ethernet protocol header; and adding the FCS checksum of the data to be sent to the Ethernet protocol header.

[0051] The technical problem this embodiment aims to solve is how to perform high-speed, high-temperature-resistant data processing. In large-capacity logging applications, a method is needed that can efficiently process data in high-temperature environments while ensuring data accuracy and integrity to meet the requirements of logging data reading.

[0052] The technical solution of this embodiment obtains the data to be sent, performs FCS checksum calculation on the data, and obtains the FCS checksum of the data to be sent. Then, the data to be sent is encapsulated at the TCP layer and IP layer, and an Ethernet protocol header is added. Finally, the FCS checksum of the data to be sent is added to the Ethernet protocol header. This data processing method can ensure the integrity and accuracy of the data and comply with the requirements of network communication protocols, so that the data can be recognized by ordinary TCP / IP communication protocols, thereby achieving efficient data processing.

[0053] In large-capacity logging environments, the accuracy and integrity of data processing are paramount. FCS checksum calculations effectively detect errors during data transmission, ensuring data reliability. TCP and IP layer encapsulation, along with the addition of an Ethernet header, ensures the processed data conforms to network communication standards, allowing direct access to computer network interfaces or wireless communication via external wireless network routing. This not only facilitates data transmission and sharing but also ensures stable operation even in high-temperature environments. The system can operate continuously at its highest speed for 2 hours in ambient temperatures ranging from -45°C to 150°C, with a theoretical maximum data read rate of 72Mbps. This high-speed, temperature-resistant data processing method provides a solid guarantee for the rapid reading and effective utilization of large-capacity logging data, significantly improving the efficiency and quality of logging data processing.

[0054] Example 6

[0055] Based on the above embodiments, the method further includes: encoding the data to be transmitted into 4B / 5B and outputting a 100BASE-FX signal; converting the 100BASE-FX signal into an unbalanced signal for output.

[0056] The technical problem to be solved in this embodiment is how to perform high-speed high-temperature data processing.

[0057] The technical solution of this embodiment encodes the data to be transmitted using 4B / 5B encoding to output a 100BASE-FX signal, and then converts the 100BASE-FX signal into an unbalanced signal for output. Combined with the data processing steps in the previous embodiments, such as FCS checksum calculation, TCP and IP layer encapsulation, and Ethernet header addition, high-speed, temperature-resistant data processing is achieved. 4B / 5B encoding ensures that the data conforms to common network coding standards, while the output and conversion of the 100BASE-FX signal facilitates high-speed data transmission.

[0058] In large-capacity logging applications, 4B / 5B encoding ensures the data format meets network communication requirements, and the output 100BASE-FX signal provides a foundation for high-speed data transmission. Converting it to an unbalanced signal output further optimizes signal transmission and improves data transmission efficiency. Combined with other data processing steps, such as FCS checksum calculation, data accuracy is guaranteed, and TCP and IP layer encapsulation and the addition of an Ethernet header enable smooth network access. The entire data processing process exhibits excellent high-temperature resistance, capable of continuous operation at maximum speed for 2 hours in ambient temperatures ranging from -45°C to 150°C, with a theoretical maximum data read rate of 72Mbps, comprehensively enhancing the performance of large-capacity logging data reading and processing.

[0059] Example 7

[0060] Figure 3 This is a schematic diagram of the structure of a high-speed, high-temperature resistant data reading device provided in an embodiment of this application, as shown below. Figure 3 As shown, in the technical solution of this embodiment, a high-speed high-temperature data processing device based on any of the high-speed high-temperature data reading systems in the above embodiments is provided. The device includes: a verification module, used to acquire data to be sent, perform FCS checksum calculation on the data to be sent, and obtain the FCS checksum of the data to be sent; an encapsulation module, used to encapsulate the data to be sent using TCP layer and IP layer, and add an Ethernet protocol header; and an adding module, used to add the FCS checksum of the data to be sent to the Ethernet protocol header.

[0061] The technical problem this embodiment aims to solve is how to perform high-speed, high-temperature-resistant data processing. In large-capacity logging applications, a method is needed that can efficiently process data in high-temperature environments while ensuring data accuracy and integrity to meet the requirements of logging data reading.

[0062] The technical solution of this embodiment obtains the data to be sent, performs FCS checksum calculation on the data, and obtains the FCS checksum of the data to be sent. Then, the data to be sent is encapsulated at the TCP layer and IP layer, and an Ethernet protocol header is added. Finally, the FCS checksum of the data to be sent is added to the Ethernet protocol header. This data processing method can ensure the integrity and accuracy of the data and comply with the requirements of network communication protocols, so that the data can be recognized by ordinary TCP / IP communication protocols, thereby achieving efficient data processing.

[0063] In large-capacity logging environments, the accuracy and integrity of data processing are paramount. FCS checksum calculations effectively detect errors during data transmission, ensuring data reliability. TCP and IP layer encapsulation and the addition of an Ethernet header ensure that the processed data conforms to network communication standards, allowing direct access to computer network interfaces or wireless communication via external wireless network routing. This not only facilitates data transmission and sharing but also ensures stable operation even in high-temperature environments. The system can operate continuously at its highest speed for 2 hours in ambient temperatures ranging from -45°C to 150°C, with a theoretical maximum data read rate of 72Mbps. This high-speed, temperature-resistant data processing method provides a solid guarantee for the rapid reading and effective utilization of large-capacity logging data, significantly improving the efficiency and quality of logging data processing. Other technical features of this embodiment correspond to those of the above embodiments and will not be repeated here.

[0064] Example 8

[0065] In this embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory. The processor executes the computer program to implement the steps of any of the high-speed, high-temperature data processing methods described in the above embodiments.

[0066] In the technical solution of this embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of any of the high-speed temperature-resistant data processing methods described in the above embodiments.

[0067] In the technical solution of this embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of any of the high-speed temperature-resistant data processing methods described above.

[0068] The technical problem this embodiment aims to solve is how to perform high-speed, high-temperature-resistant data processing. In large-capacity logging applications, a method is needed that can efficiently process data in high-temperature environments while ensuring data accuracy and integrity to meet the requirements of logging data reading.

[0069] The technical solution of this embodiment obtains the data to be sent, performs FCS checksum calculation on the data, and obtains the FCS checksum of the data to be sent. Then, the data to be sent is encapsulated at the TCP layer and IP layer, and an Ethernet protocol header is added. Finally, the FCS checksum of the data to be sent is added to the Ethernet protocol header. This data processing method can ensure the integrity and accuracy of the data and comply with the requirements of network communication protocols, so that the data can be recognized by ordinary TCP / IP communication protocols, thereby achieving efficient data processing.

[0070] In large-capacity logging environments, the accuracy and integrity of data processing are paramount. FCS checksum calculations effectively detect errors during data transmission, ensuring data reliability. TCP and IP layer encapsulation and the addition of an Ethernet header ensure that the processed data conforms to network communication standards, allowing direct access to computer network interfaces or wireless communication via external wireless network routing. This not only facilitates data transmission and sharing but also ensures stable operation even in high-temperature environments. The system can operate continuously at its highest speed for 2 hours in ambient temperatures ranging from -45°C to 150°C, with a theoretical maximum data read rate of 72Mbps. This high-speed, temperature-resistant data processing method provides a solid guarantee for the rapid reading and effective utilization of large-capacity logging data, significantly improving the efficiency and quality of logging data processing. Other technical features of this embodiment correspond to those of the above embodiments and will not be repeated here.

[0071] The processor may include, but is not limited to, one or more processors or microprocessors. Each processor may be implemented as an Application Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), controller, microcontroller, microprocessor, or other electronic component, for performing the methods in the above embodiments. The computer-readable storage medium may be implemented by any type of volatile or non-volatile storage device or a combination thereof, and may include, but is not limited to, random access memory (RAM), read-only memory (ROM), flash memory, EPROM memory, EEPROM memory, registers, computer storage media (e.g., hard disk, floppy disk, solid-state drive, removable disk, CD-ROM, DVD-ROM, Blu-ray disc, etc.).

[0072] Computer-readable storage media may also store at least one computer-executable program / instruction, such as computer-readable instructions. Computer-readable storage media include, but are not limited to, volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory. Computer-readable storage media may include, for example, read-only memory (ROM), hard disk, flash memory, etc. For example, a non-transitory computer-readable storage medium may be connected to a computing device such as a computer, and then, when the computing device executes the computer-readable instructions stored on the computer-readable storage medium, the various methods described above can be performed.

[0073] In addition, the computer device may also include (but is not limited to) a data bus, an input / output (I / O) bus, a display, and input / output devices (e.g., a keyboard, mouse, speakers, etc.). The processor can communicate with external devices via the I / O bus through a wired or wireless network. In one embodiment, the at least one computer-executable instruction may also be compiled into or comprise a software product / computer program product, wherein one or more computer-executable instructions, when executed by the processor, perform the steps of the various functions and / or methods in the embodiments described herein.

[0074] Example 9

[0075] Based on the above embodiments, this embodiment provides an application example.

[0076] This application example provides a high-speed data reading method adapted to high-temperature environments.

[0077] This application example relates to the field of oil and gas geological exploration and measurement technology, specifically a high-temperature, high-speed data acquisition method. Currently, the most commonly used solutions for acquiring large-capacity logging data are CAN communication and USB communication.

[0078] Currently, most storage logging tool reading solutions use CAN and USB communication schemes, which present the following technical problems:

[0079] CAN communication scheme: The communication rate is too low, with a maximum communication rate of only 1Mbps, which cannot adapt to the rapid reading of large amounts of data.

[0080] USB communication solution: The communication distance is too short; communication data will be affected when the distance exceeds 5 meters; it cannot support multi-endpoint communication well, and cannot quickly read multiple logging tools connected in series; its circuit characteristics are sensitive to the ambient operating temperature and cannot adapt well to the requirements of the field environment operating temperature.

[0081] Currently, TCP / IP, as a superior communication solution, has been successfully deployed in numerous fields due to its advantages such as high communication speed, support for multi-endpoint device interconnection, long-distance communication (up to 100 meters), and rapid use of unified network ports. However, its application in the well logging field is currently limited. The main reason is that its TCP / IP protocol stack has a high workload, its peripheral circuitry is complex, and its overall system power consumption is high. Furthermore, it places high demands on the operating frequency of the central processing chip, which cannot meet the high-temperature circuit requirements of the well logging field (when the instrument needs to read data after logging, the internal temperature of well logging instruments equipped with insulated bottles can reach up to 150 degrees Celsius).

[0082] How to leverage the advantages of TCP / IP communication while avoiding its negative impacts is a technical problem that urgently needs to be solved in this field, and it is the key and core inventive point of this technical design.

[0083] To address the aforementioned issues, this application example provides a high-temperature resistant, high-speed data communication method and device based on TCP / IP communication technology.

[0084] This application example proposes a method and apparatus for high-temperature, high-speed data reading, comprising: a central processing unit (or processing unit) connected to a 4B / 5B encoding circuit via a reduced media independent interface (RMII) to conform to common network encoding standards; the output 4B / 5B encoding circuit connected to an EOC digital-to-analog converter circuit to simulate a network communication router and achieve multi-endpoint serial communication; an impedance matching circuit for the EOC digital-to-analog converter circuit to resist link interference and improve communication quality across the entire ambient temperature range; a polling-based response software algorithm for each endpoint to reduce system load; and a simplified processing algorithm to simulate the TCP / IP protocol, abandoning the commonly used TCP / IP data stream algorithm. This allows the central processing unit to operate under high temperature and low operating frequency conditions and output a continuous data stream conforming to TCP / IP specifications.

[0085] This application example provides a response-based polling communication method acceptable to the standard TCP / IP specification. Unlike the concurrent operation mode of ordinary TCP / IP, the algorithm in this application example establishes separate endpoint communication channels in the system as needed, controls the flow of communication data, and specifies the ACK return channel. This establishes a feasible operating mode for a simplified simulation of the TCP / IP stack.

[0086] This application example provides a simplified algorithm adapted to the TCP / IP specification. The standard TCP / IP protocol is defined as a reliable protocol established over unreliable hardware communication links. Software ensures the reliability of communication data through the message headers of each bearer layer and the TCP / IP sending mechanism. The algorithm must possess these reliability characteristics, be seamlessly recognized by computer network communication ports, reduce the load on standard TCP / IP protocols, run on low-frequency central processing units, and establish the necessary conditions for operation in high-temperature environments.

[0087] In the high-temperature resistant high-speed data reading device of this application example, the central processing unit circuit, including the high-temperature resistant CPU processing chip, is connected to the 4B / 5B encoding circuit through the Reduced Media Independent Interface (RMII), and has a built-in analog TCP / IP stack algorithm with extremely low load occupancy.

[0088] The 4B / 5B encoding circuit includes: a 4B / 5B encoding circuit whose data input terminal is connected to the central processing unit, and after being configured by peripheral circuits, outputs a digital encoding signal adapted to network communication;

[0089] The EOC digital-to-analog converter circuit includes a 4B / 5B digital signal digital-to-analog converter circuit, which is used to simulate a network communication router and realize multi-endpoint serial communication.

[0090] The coupling impedance matching circuit includes a pure resistive impedance matching network for data link communication matching of digital-analog circuits, which can reduce communication interference and reliably transmit data under the required ambient operating temperature.

[0091] The effect of this application example:

[0092] (1) It can perform fast data reading and processing on site, with a theoretical maximum data reading rate of 72Mbps. The maximum value of the clock frequency of the processing unit is less than or equal to the preset frequency.

[0093] (2) It has the advantages of ordinary TCP / IP communication protocol and can fully guarantee the reliability of communication data;

[0094] (3) The output data stream can be recognized by the ordinary TCP / IP communication protocol, can be directly connected to the computer network interface, and can also be extended to wireless communication with the help of the external wireless network router.

[0095] (4) It completely avoids the disadvantages of ordinary network TCP / IP communication and can work continuously for 2 hours at the highest speed in an ambient temperature range of -45 degrees to 150 degrees.

[0096] Figure 4 This is a schematic diagram of a high-speed data reading method device adapted to high-temperature environments in this application example; Figure 5 A circuit diagram of a 4B / 5B encoding circuit; Figure 6 This is a schematic diagram of the EOC digital-to-analog converter circuit; Figure 7 This is a schematic diagram of an impedance matching network circuit for digital-to-analog conversion.

[0097] A high-speed data reading method adapted to high-temperature environments (e.g.) Figure 4 As shown), the design is based on the seven-layer TCP / IP protocol architecture, where (1) the seventh to third layers are implemented by software algorithms, (2) the second layer is implemented by the central processing unit peripherals to implement the data link layer, (3) the physical layer uses 4B / 5B encoding circuit chips to output digital encoding signals adapted to network communication, and (4) the EOC communication unit is used to simulate a network communication router to realize multi-endpoint serial communication.

[0098] The circuit diagram of the 4B / 5B encoding circuit (e.g.) Figure 5As shown, pin 3 of chip U3 is connected to one end of resistor R6, pin 4 of chip U3 is connected to one end of resistor R7, pin 5 of chip U3 is connected to one end of resistor R8, pin 8 of chip U3 is connected to one end of resistor R9, pin 9 of chip U3 is connected to the MDIR_N network, pin 10 of chip U3 is connected to the MDIR_P network, pin 11 of chip U3 is connected to the MDIT_N network, pin 12 of chip U3 is connected to the MDIT_P network, and pin 14 of chip U3 is connected to one end of capacitor C22. +3.3VE, pin 16 of chip U3 is connected to one end of resistor R10, pin 17 of chip U3 is connected to the LED_LINK network, pin 19 of chip U3 is connected to the EMDIO network and one end of resistor R11, pin 20 of chip U3 is connected to the EMDC network, pin 21 of chip U3 is connected to one end of capacitor C23 and +3.3VE, pin 23 of chip U3 is connected to the EREF_CLK network, pin 24 of chip U3 is connected to the LED_SPEED network, and pin 25 of chip U3 is connected to the EMDC network. Pin 26 is connected to one end of resistor R12. Pin 27 of chip U3 is connected to the ECRS_DV network, one end of resistors R17 and R18. Pin 28 of chip U3 is connected to the ERXERR network. Pin 29 of chip U3 is connected to one end of resistors R13 and R14. Pin 30 of chip U3 is connected to one end of resistor R15. Pin 31 of chip U3 is connected to one end of resistor R16. Pins 1, 2, 13, and 15 of chip U3 are also connected to the ERXERR network. Pins 18, 22, 25, and 32 of chip U3 are left floating. One end of resistor R9, one end of resistor R11, one end of resistor R12, one end of resistor R17, and one end of resistor R14 are connected to +3.3VE. Pins 6, 7, and 33 of chip U3, one end of capacitor C22, one end of resistor R10, one end of capacitor C23, one end of resistor R18, and one end of resistor R13 are connected to digital ground DGND.

[0099] The schematic diagram of the EOC digital-to-analog converter circuit (as shown in the figure) Figure 6In the diagram, pin 1 of chip U4 is connected to ferrite bead E1; pin 2 of chip U4 is connected to one end of capacitor C36; pin 3 of chip U4 is connected to one end of capacitor C37; pin 9 of chip U4 is connected to the TD_N network; pin 10 of chip U4 is connected to the TD_P network; pin 11 of chip U4 is connected to the RD_N network; pin 12 of chip U4 is connected to the RD_P network; pins 13 and 14 of chip U4 are connected to one end of capacitor C40 and digital ground DGND; pin 15 of chip U4 is connected to one end of capacitor C40, one end of capacitor C39, one end of capacitor C38, and positive voltage +3.3VE. Pin 16 of chip U4 is connected to one end of resistor R36*. Pin 4 of chip U4, one end of resistor R37, and one end of ferrite bead E2 are connected to analog ground AGND. One end of ferrite bead E1 is connected to capacitor C35 and voltage +3.3VE. One end of ferrite bead E2, one end of capacitor C35, pin 6 of chip U4, pin 7 of chip U4, pin 17 of chip U4, pin 13 of chip U4, pin 14 of chip U4, one end of capacitor C38, one end of capacitor C39, one end of capacitor C40, and one end of capacitor C35 are connected to digital ground DGND. One end of resistor R36* is connected to capacitor C36 and CC SDIO network. One end of resistor R37 is connected to one end of capacitor C37.

[0100] The digital-to-analog converter impedance matching network circuit (such as...) Figure 7 In the diagram, one end of capacitor C26 is connected to the first resistor R25 and the voltage +3.3VE; one end of coupling capacitor C27 is connected to one end of the third resistor R27; one end of the fourth resistor R27* is connected to the MDIT_P network; one end of capacitor C27 is connected to the TD_P network; one end of capacitor C28 is connected to one end of resistor R28; one end of resistor R28* is connected to the MDIT_N network; one end of capacitor C28 is connected to the TD_N network; one end of capacitor C29 is connected to one end of resistor R29; one end of resistor R29* is connected to the MDIR_P network; and capacitor C29... One end is connected to the RD_P network, one end of capacitor C30 is connected to one end of resistor R30, one end of resistor R30* is connected to the MDIR_N network, one end of capacitor C30 is connected to the RD_N network, one end of the first resistor R25 is connected to one end of the second resistor R26, one end of resistor R27, one end of resistor R28, one end of resistor R29 and one end of resistor R30, one end of capacitor C26, one end of the second resistor R26, one end of resistor R27*, one end of resistor R28*, one end of resistor R29* and one end of resistor R30* are connected to digital ground DGND.

[0101] A high-speed data reading method adapted to high-temperature environments, implemented using a simulated TCP / IP stack algorithm with extremely low occupancy, includes: Step 1: Discarding the network occupancy table, calculating the data lifetime of the link layer, and the data routing fragmentation process of the ordinary TCP / IP protocol stack, while retaining the sliding window synchronous data transmission function in the TCP / IP protocol stack to ensure the integrity of communication data; Step 2: Decomposing the ordinary TCP / IP protocol stack, retaining only ARP protocol stack processing; Step 3: Preparing the data to be sent and calculating the 'FCS checksum'; Step 4: Encapsulating the data in two layers: the first layer is the TCP layer, adding a TCP protocol header (fixed 40-byte length); the second layer is the IP layer, adding an IP protocol header (fixed 40-byte length); Step 5: Adding an Ethernet protocol header for the data link layer, identifying each sending terminal through the MAC address of the Ethernet frame header; Step 6: Adding the calculated 'FCS checksum' to the protocol header.

[0102] This solution involves a fast data reading method based on TCP / IP technology. While leveraging all the advantages of TCP / IP communication, it also addresses the shortcomings of TCP / IP communication methods, such as complex circuit structure and insufficient temperature performance. This allows the commonly used TCP / IP communication method to be deployed in the well logging industry, where temperature requirements are high.

[0103] In the embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0104] It should be noted that, in this invention, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element limited by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0105] While the embodiments disclosed in this invention are as described above, the above content is merely for the purpose of facilitating understanding of this invention and is not intended to limit the invention. Any person skilled in the art to which this invention pertains may make any modifications and changes in form and detail of the implementation without departing from the spirit and scope disclosed in this invention; however, the scope of patent protection of this invention shall still be determined by the scope defined in the appended claims.

Claims

1. A high-speed, high-temperature resistant data reading system, characterized in that, The system includes: a processing unit, an encoding circuit, an analog-to-digital conversion circuit, and an impedance matching circuit; The simplified media-independent interface of the processing unit is connected to the encoding circuit; The encoding circuit is coupled to the analog-to-digital converter circuit through the impedance matching circuit.

2. The high-speed, high-temperature resistant data reading system according to claim 1, characterized in that, The impedance matching circuit includes: A first resistor and a second resistor are connected in series between the power supply and ground, wherein the first end of the first resistor is connected to the power supply, the second end of the first resistor is connected to the second resistor, and the second end of the second resistor is grounded. A third resistor and a fourth resistor are connected in series between the second terminal of the first resistor and ground, wherein the first terminal of the third resistor is connected to the second terminal of the first resistor, the second terminal of the third resistor is connected to the first terminal of the fourth resistor, and the second terminal of the fourth resistor is grounded. The coupling capacitor has its first end connected to the first end of the fourth resistor.

3. The high-speed, high-temperature resistant data reading system according to claim 2, characterized in that, The encoding circuit is coupled to the analog-to-digital conversion circuit through the impedance matching circuit, including: The first end of the coupling capacitor is connected to the encoding circuit. The second end of the coupling capacitor is connected to the analog-to-digital converter circuit.

4. The high-speed, high-temperature resistant data reading system according to claim 3, characterized in that, The impedance matching circuit includes multiple third resistors, fourth resistors, and coupling capacitors; Each of the third resistors is connected in parallel to the second terminal of the first resistor.

5. A high-speed high-temperature data processing method based on any one of the high-speed high-temperature data reading systems of claims 1 to 4, characterized in that, The method includes: Obtain the data to be sent, perform FCS checksum calculation on the data to be sent, and obtain the FCS checksum of the data to be sent. The data to be sent is encapsulated at the TCP layer and IP layer, and an Ethernet protocol header is added; Add the FCS checksum of the data to be sent to the Ethernet header.

6. The high-speed temperature-resistant data processing method according to claim 5, characterized in that, The method further includes: The data to be transmitted is encoded in 4B / 5B and output as a 100BASE-FX signal. The 100BASE-FX signal is converted into an unbalanced signal for output.

7. A high-speed high-temperature data processing device based on any one of the high-speed high-temperature data reading systems of claims 1 to 4, characterized in that, The device includes: The verification module is used to acquire the data to be sent, perform FCS checksum calculation on the data to be sent, and obtain the FCS checksum of the data to be sent. The encapsulation module is used to encapsulate the data to be sent using the TCP layer and the IP layer, and to add an Ethernet protocol header; An add module is used to add the FCS checksum of the data to be sent to the Ethernet protocol header.

8. A computer device, comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the steps of the high-speed temperature-resistant data processing method according to any one of claims 5 or 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the steps of the high-speed, high-temperature data processing method according to any one of claims 5 or 6.

10. A computer program product, comprising a computer program, characterized in that, When executed by a processor, the computer program implements the steps of the high-speed, high-temperature data processing method according to any one of claims 5 or 6.

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