Serialization method, device and equipment of chip layout data and medium
By employing a preset variable-length encoding format and delimiter insertion method in chip layout data transmission, the problem of excessive layout data volume is solved, achieving more efficient data transmission and faster parsing speed.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HUAXINCHENG (HANGZHOU) TECH CO LTD
- Filing Date
- 2026-05-08
- Publication Date
- 2026-06-05
Smart Images
Figure CN122160018A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit design technology, and in particular to methods, apparatus, devices and media for serializing chip layout data. Background Technology
[0002] As chip manufacturing processes continue to advance, chip layouts are becoming increasingly complex, with both the number of polygons and the number of sides within each polygon increasing. Consequently, in distributed computing architectures, the amount of data transferred between different computing units is also increasing dramatically. The current Oasis standard's signed integer representation, such as... Figure 1 As shown, C indicates whether the following byte is part of the integer (1: yes; 0: no); S indicates the sign of the integer (1: negative; 0: positive); Significand indicates the absolute value of the integer and is in least significant order (Byte 0 represents the least significant digit, Byte 1 is slightly higher, and so on). For example, -8192 would be represented as 10000001 10000000 00000001, where the 1 at the beginning of each byte indicates that there are more bytes to represent this integer, so the last byte of all integers must start with 0. The last bit of the first byte is 1, so this is a negative number. The only significant digit is the last bit of the third type. Therefore, the absolute value is 2. (6+7) =8192. 0 would be represented as 00000000. Although any combination of 8 bits is possible when looking at a single byte, some byte combinations are illegal when combined with preceding and following bytes. For example, in 1000000110000001 00000000, the second byte starts with 1, so the third byte must represent the same integer as the second byte. Considering that the third byte starts with 0, it is the last byte of the integer group, therefore the highest bit of the integer is in this byte, which contradicts the fact that the significance of the third byte is 0. For example, in 00000000 00000001, the first byte starts with 0, so it is the last byte of some integer (which is actually 0); therefore, the second byte represents a complete integer. From the standard, it represents "-0", which is obviously redundant when "+0" is present.
[0003] In summary, reducing the amount of layout data during chip layout data transmission is a technical problem that needs to be solved. Summary of the Invention
[0004] In view of this, the purpose of this invention is to provide a method, apparatus, device, and medium for serializing chip layout data, which can reduce the amount of layout data during chip layout data transmission. The specific solution is as follows: In a first aspect, this application discloses a method for serializing chip layout data, including: Obtain chip layout data to be serialized, wherein the chip layout data to be serialized includes geometric information of one or more layout polygons, and the geometric information includes multiple integer parameters that define the geometric shape information of the polygons; The integer parameter representation of the polygon is converted into a byte sequence according to a preset variable-length encoding format to construct an initial binary data stream; wherein, the preset variable-length encoding format is set such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit. Once all integer parameters of the same polygon have been converted, a preset delimiter byte is inserted at the corresponding position in the initial binary data stream until all polygons have been converted to generate the target binary data stream.
[0005] Optionally, the integer parameter representation includes integer values representing the coordinates of polygon vertices.
[0006] Optionally, the preset sign bit position is the least significant bit in the byte containing the least significant bit.
[0007] Optionally, the byte value of the preset separator byte is 00000001 or 10000000.
[0008] Optionally, the most significant bit of each byte in the preset variable-length encoding format is used to indicate whether the current byte sequence is the last byte sequence represented by the integer parameter.
[0009] Optionally, the most significant bit is 0 or 1; Correspondingly, if the most significant bit is 1, it indicates that the current byte sequence is not the last byte sequence; If the most significant bit is 0, it indicates that the current byte is the last byte in the sequence.
[0010] Optionally, the method for serializing the chip layout data further includes: Upon receiving the target binary data stream, parse the target binary data stream and identify the preset delimiter bytes; The target binary data stream is divided into byte sequence segments corresponding to each polygon in the map based on the delimiter byte, and then decoded to obtain integer parameter representations.
[0011] Secondly, this application discloses a chip layout data serialization device, comprising: The data acquisition module is used to acquire chip layout data to be serialized. The chip layout data to be serialized includes geometric information of one or more layout polygons. The geometric information includes multiple integer parameters that define the geometric shape information of the polygons. The serialization module is used to convert the integer parameter representation of the layout polygon into a byte sequence according to a preset variable-length encoding format to construct an initial binary data stream; wherein, the preset variable-length encoding format is set such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit. The separator insertion module is used to insert a preset separator byte at the corresponding position in the initial binary data stream after all integer parameter representations of the same polygon have been converted, until all polygons have been converted to generate the target binary data stream.
[0012] Thirdly, this application discloses an electronic device, including: Memory, used to store computer programs; A processor is configured to execute the computer program to implement the steps of the aforementioned disclosed method for serializing chip layout data.
[0013] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the aforementioned disclosed chip layout data serialization method.
[0014] Therefore, this application discloses a method for acquiring chip layout data to be serialized, wherein the chip layout data to be serialized includes geometric information of one or more layout polygons, and the geometric information includes multiple integer parameter representations defining the geometric shape information of the polygons; the integer parameter representations of the layout polygons are converted into byte sequences according to a preset variable-length encoding format to construct an initial binary data stream; wherein the preset variable-length encoding format is configured such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit; after all integer parameter representations of the same layout polygon have been converted, a preset delimiter byte is inserted at the corresponding position in the initial binary data stream until all layout polygons have been converted to generate a target binary data stream. Therefore, by using a preset variable-length encoding format to convert the integer parameter representation, the larger the integer, the more bytes it occupies, and the smaller the integer, the fewer bytes it occupies. Compared with the traditional fixed-length encoding, the average storage space of each integer is reduced, directly reducing the total amount of data. Moreover, the preset variable-length encoding format sets the byte containing the most significant bit at the beginning of the sequence, the byte containing the least significant bit at the end of the sequence, and the sign bit in the byte containing the least significant bit. This setting allows the parser to read and assemble integers sequentially without needing to reverse the byte order or use additional buffers as required by the OASIS standard (least significant bit first). Thus, in distributed computing, faster parsing speed means shorter data processing latency. Finally, the preset separator byte is inserted after all integer parameter representations of the same polygon have been converted, serving as a structural boundary marker, eliminating the need for the length count integer for each polygon. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0016] Figure 1 This is a schematic diagram of a signed integer representation in the Oasis standard disclosed in this application; Figure 2 This is a flowchart of a chip layout data serialization method disclosed in this application; Figure 3 This is a schematic diagram of a signed integer representation of a preset variable-length encoding format disclosed in this application; Figure 4 This is a schematic diagram of a chip layout data serialization device disclosed in this application; Figure 5 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation
[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.
[0018] As chip manufacturing processes continue to advance, chip layouts are becoming increasingly complex, with both the number of polygons and the number of sides within each polygon increasing. Consequently, in distributed computing architectures, the amount of data transferred between different computing units is also increasing dramatically. The current Oasis standard's signed integer representation, such as... Figure 1 As shown, C indicates whether the following byte is part of the integer (1: yes; 0: no); S indicates the sign of the integer (1: negative; 0: positive); Significand indicates the absolute value of the integer and is little-endian (Byte0 represents the least significant digit, Byte1 slightly higher, and so on). For example, -8192 would be represented as 10000001 10000000 00000001, where the 1 at the beginning of each byte indicates that there is another byte to represent this integer, so the last byte of all integers must start with 0. The last bit of the first byte is 1, so this is a negative number. The only significant digit is the last bit of the third type. Therefore, the absolute value is 2(6+7)=8192. 0 would be represented as 00000000. Although any combination of 8 bits is possible when looking at a single byte, some byte combinations are illegal when combined with the preceding and following bytes. For example, in 1000000110000001 00000000, the second byte starts with 1, so the third byte must represent the same integer as the second byte. Considering that the third byte starts with 0, it is the last byte in the group of the integer, therefore the highest bit of the integer is in this byte. This contradicts the fact that the significance and integer of the third byte are both 0. For example, in 00000000 00000001, the first byte starts with 0, so it is the last byte of some integer (which is actually 0); therefore, the second byte represents a complete integer. From the standard, it represents "-0", which is obviously redundant when "+0" is present.
[0019] To address this, the present invention provides a serialization scheme for chip layout data, which can reduce the amount of layout data during the transmission of chip layout data.
[0020] Reference Figure 2 As shown in the figure, this application discloses a method for serializing chip layout data, including: Step S11: Obtain the chip layout data to be serialized. The chip layout data to be serialized includes the geometric information of one or more layout polygons. The geometric information includes multiple integer parameter representations that define the polygon geometry. The integer parameter representations include integer values representing the coordinates of the polygon vertices.
[0021] In this embodiment, the chip layout data to be serialized is the complete geometric information generated by the photolithography mask. Each layout polygon is fully defined by a set of integer parameters, which include at least: the X and Y coordinate sequences of the vertices, the start and end indices of each edge, and the process layer number to which the polygon belongs. Furthermore, the polygon can be further associated with integer attributes such as data type identifiers and electrical port numbers, without specific limitations.
[0022] During the data acquisition phase, a list of polygons is read from the design file in GDSII or OASIS format, and its geometric information is extracted as a continuous stream of integer parameters.
[0023] Step S12: Convert the integer parameter representation of the polygon of the layout into a byte sequence according to a preset variable-length encoding format to construct an initial binary data stream; wherein, the preset variable-length encoding format is set such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit.
[0024] In this embodiment, the most significant bit of each byte in the preset variable-length encoding format is used to indicate whether the current byte sequence is the last byte sequence represented by an integer parameter. The most significant bit is 0 or 1; correspondingly, if the most significant bit is 1, it indicates that the current byte sequence is not the last byte sequence; if the most significant bit is 0, it indicates that the current byte sequence is the last byte sequence. The preset sign bit position is the least significant bit in the byte containing the least significant bit.
[0025] Because the integer parameters (vertices coordinates) used to define the geometry of polygons in chip layout data have a wide range of values and are widely distributed, using a fixed-length integer representation (32-bit or 64-bit) would waste storage space for a large number of small parameters. Furthermore, in photolithography, some coordinate values may exceed the preset fixed-length range. Therefore, a preset variable-length encoding format is used to represent integers of any size with the fewest possible bytes, achieving efficient use of storage space. Simultaneously, format rules ensure that the encoded byte stream can be uniquely and accurately deserialized into the original integer. Therefore, the rules for the preset variable-length encoding format are as follows: First, the byte sequence is constructed; the encoding of an integer parameter is formed by sequentially concatenating one or more bytes. Each byte (8 bits) in the format undertakes a corresponding task. The most significant bit of each byte is denoted as C, where C=1 indicates that there are more bytes following this integer; C=0 indicates that the current byte is the last byte encoded for this integer. The remaining 7 lower-order bits (bits 0 to 6) of each byte are data bits, used to represent the absolute value (i.e., the magnitude) of the integer parameter; this part is called the data area. The sign information of the integer is represented by a separate sign bit, denoted as S. S=0 represents a positive integer or zero; S=1 represents a negative integer. After the above byte sequence is constructed, the byte order rules differ from the OASIS standard as follows: First, in this scheme, the most significant bit takes precedence, meaning the byte containing the most significant bit of the integer is located at the beginning of the entire byte sequence. That is, in the binary absolute value representation of the integer parameter, the most significant bit (MSB) is encoded at the beginning of the data area of the first byte. The least significant bits are shared with the sign bit; that is, the byte containing the least significant bit of the integer parameter is located at the end of the entire byte sequence, and the sign bit (S) is fixed in a predetermined position within that last byte. In one specific implementation, the sign bit occupies the least significant bit (bit 0) of that byte.
[0026] In this embodiment, the specific encoding process for converting a certain integer parameter representation of the polygon in the layout into a byte sequence according to a preset variable-length encoding format is as follows: Determine the sign S and absolute value abs of the integer parameter representation.
[0027] Convert the absolute value abs to its binary representation.
[0028] Starting from the most significant bit (MSB) of the binary representation, divide it into groups of 7 bits (because each byte's data area is 7 bits), and fill the data area of consecutive bytes from left to right.
[0029] Set a continuation bit C for each byte: except for the last byte which is set to C=0, all other bytes are set to C=1.
[0030] After the data area of the last byte is filled, the sign value S is filled in at the preset sign bit position (bit 0).
[0031] Taking the encoding of the integer -8192 as an example, the process of converting it into a byte sequence according to the preset variable-length encoding format is as follows: The symbol S = 1 (negative number), and the absolute value abs = 8192.
[0032] The binary representation of 8192 is 10 0000 0000 0000 (14 bits in total).
[0033] Divide into groups of 7 bits, starting from the MSB: (1)(0000000)(0000000). Three groups of 7 bits are needed, therefore 3 bytes are required.
[0034] Fill the data area and set the continuation bit C: Byte 1 (first byte): Data area is 0000001 (the first group 1 starting from MSB is stored on the right in the 7-bit data area, padded with zeros on the left), C=1. The value of this byte is: 1(C) 0000001(data)->10000001.
[0035] Byte 2 (intermediate byte): Data area is 0000000, C=1. The value of this byte is: 1(C) 0000000(data)->10000000.
[0036] Byte 3 (last byte): The data area is 0000000, C=0, and the sign bit S=1 is placed in the preset 0th bit. The value of this byte is: 0 (C) 0000000(data)1(S)->00000001.
[0037] Ultimately, -8192 is encoded into a three-byte sequence: 10000001 10000000 00000001, which is the initial binary data stream.
[0038] Step S13: After all integer parameters of the same layout polygon have been converted, a preset delimiter byte is inserted at the corresponding position in the initial binary data stream until all layout polygons have been converted to generate the target binary data stream.
[0039] In this embodiment, the byte value of the preset delimiter byte is 00000001 or 10000000. Because the preset variable-length encoding format specifies the position of the sign bit and the rules for the continuation bit (C bit), byte values such as 00000001 and 10000000 cannot be the starting byte of a valid integer. Therefore, 00000001 and 10000000, as delimiter bytes, do not need to be considered for confusion with real integer data during deserialization. This allows a byte to represent an additional special character without adding extra bits, saving time when serializing delimited numeric strings.
[0040] In this embodiment, after all integer parameters of the same polygon are converted, 00000001 and 10000000 are used to represent the left parenthesis and the right parenthesis respectively, so as to serialize the hierarchical structure, distinguish different polygons, and generate the target binary data stream.
[0041] In this embodiment, after generating the target binary stream for data transmission, upon receiving the target binary data stream, the target binary data stream is parsed, and a preset delimiter byte is identified. Based on the delimiter byte, the target binary data stream is segmented into byte sequence segments corresponding to each polygon in the map, to decode and obtain integer parameter representations. It is understood that, to save space, serializing integer strings requires that a single integer support integers of arbitrary size. Therefore, a variable-length form is needed to represent the minimum semantics with one byte; that is, an abstract number or symbol must be represented by at least one byte. The process of segmenting the integer string during the parsing of the target binary data stream involves splitting an integer string into n different integer strings as required. For example, when serializing an array of two integers, knowing that the integer strings represent arrays, you can split the integer strings by serializing the array length. For instance, serializing two arrays {1, 2, 3, ..., 10} and {10, 9, 8, ..., 1} would result in the integer strings: 10 (size of the first array), 1, 2, ..., 10, 10 (size of the second array), 10, 9, 8, ..., 1. However, during deserialization, the array size is usually invalid metadata; the array size is known after deserialization. Using bytes to represent the separator allows serialization as 1, 2, ..., 10, "separator", 10, 9, ..., 1, saving the size of at least one integer in this example.
[0042] This shows that the preset variable-length encoding format of this scheme is designed as follows: Figure 3As shown, the separators (two in total) are 00000001 and 10000000. In the part representing the number, the difference from the current standard is that the addresses of the high and low bits are swapped, and the sign bit is placed in the last byte. For example, in the new design, -8192 will be represented as 1000000110000000 00000001. The parsing of integer strings follows the following pseudocode: If (the current byte is the first byte OR the previous byte is a separator OR the previous byte is the last byte of some integer) { If (the current byte is 00000001 or 10000000) The current byte is the corresponding delimiter. Else: The current byte is the beginning of an integer. } else { The current byte is an integer byte. }
[0043] This increases the expressive power of the sequence, allowing the left and right parentheses to be represented by delimiters, thus serializing the hierarchical structure, and the serialization length is no longer than the original design.
[0044] Therefore, this application discloses a method for acquiring chip layout data to be serialized, wherein the chip layout data to be serialized includes geometric information of one or more layout polygons, and the geometric information includes multiple integer parameter representations defining the geometric shape information of the polygons; the integer parameter representations of the layout polygons are converted into byte sequences according to a preset variable-length encoding format to construct an initial binary data stream; wherein the preset variable-length encoding format is configured such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit; after all integer parameter representations of the same layout polygon have been converted, a preset delimiter byte is inserted at the corresponding position in the initial binary data stream until all layout polygons have been converted to generate a target binary data stream. Therefore, by using a preset variable-length encoding format to convert the integer parameter representation, the larger the integer, the more bytes it occupies, and the smaller the integer, the fewer bytes it occupies. Compared with the traditional fixed-length encoding, the average storage space of each integer is reduced, directly reducing the total amount of data. Moreover, the preset variable-length encoding format sets the byte containing the most significant bit at the beginning of the sequence, the byte containing the least significant bit at the end of the sequence, and the sign bit in the byte containing the least significant bit. This setting allows the parser to read and assemble integers sequentially without needing to reverse the byte order or use additional buffers as required by the OASIS standard (least significant bit first). Thus, in distributed computing, faster parsing speed means shorter data processing latency. Finally, the preset separator byte is inserted after all integer parameter representations of the same polygon have been converted, serving as a structural boundary marker, eliminating the need for the length count integer for each polygon.
[0045] like Figure 4 As shown, the present invention also discloses a chip layout data serialization device, comprising: Data acquisition module 11 is used to acquire chip layout data to be serialized, the chip layout data to be serialized includes geometric information of one or more layout polygons, the geometric information includes multiple integer parameters that define the geometric shape information of the polygons; The serialization module 12 is used to convert the integer parameter representation of the layout polygon into a byte sequence according to a preset variable-length encoding format to construct an initial binary data stream; wherein, the preset variable-length encoding format is set such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit. The separator insertion module 13 is used to insert a preset separator byte at the corresponding position in the initial binary data stream after all integer parameter representations of the same layout polygon have been converted, until all layout polygons have been converted to generate the target binary data stream.
[0046] Therefore, it is evident that variable-length encoding and delimiter insertion improve data processing throughput and energy efficiency. Directly executing high-order bit-first encoding and automatic boundary marking ensures highly compact data and eliminates redundant length information while achieving extremely low-latency streaming processing. This is suitable for real-time, efficient compression and transmission of massive layout data in chip design toolchains or distributed computing nodes.
[0047] Furthermore, embodiments of this application also disclose an electronic device, Figure 5 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. Figure 5 The content herein shall not be construed as any limitation on the scope of use of this application.
[0048] Figure 5 This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of this application. Specifically, the electronic device 20 may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the chip layout data serialization method disclosed in any of the foregoing embodiments. Alternatively, the electronic device 20 in this embodiment may specifically be an electronic computer.
[0049] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.
[0050] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.
[0051] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon can include operating system 221, computer program 222, etc., and the storage method can be temporary storage or permanent storage.
[0052] The operating system 221 manages and controls the various hardware devices and computer programs 222 on the electronic device 20 to enable the processor 21 to perform calculations and processing on the massive amounts of data 223 in the memory 22. The operating system 221 can be Windows Server, Netware, Unix, Linux, etc. The computer program 222, in addition to including a computer program capable of performing the chip layout data serialization method executed by the electronic device 20 as disclosed in any of the foregoing embodiments, may further include computer programs capable of performing other specific tasks. The data 223 may include data received by the electronic device from external devices, as well as data collected by its own input / output interface 25.
[0053] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned serialization method for chip layout data. Specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.
[0054] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.
[0055] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application. The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly in hardware, software modules executed by a processor, or a combination of both. The software module may be located in random access memory (RAM), memory, read-only memory (ROM), electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, removable disks, CD-ROMs (Compact Disc-Read Only Memory), or any other form of storage medium known in the art.
[0056] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0057] The solution provided by the present invention has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A method for serializing chip layout data, characterized in that, include: Obtain chip layout data to be serialized, wherein the chip layout data to be serialized includes geometric information of one or more layout polygons, and the geometric information includes multiple integer parameters that define the geometric shape information of the polygons; The integer parameter representation of the polygon is converted into a byte sequence according to a preset variable-length encoding format to construct an initial binary data stream; wherein, the preset variable-length encoding format is set such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit. Once all integer parameters of the same polygon have been converted, a preset delimiter byte is inserted at the corresponding position in the initial binary data stream until all polygons have been converted to generate the target binary data stream.
2. The method for serializing chip layout data according to claim 1, characterized in that, The integer parameter representation includes integer values representing the coordinates of the polygon vertices.
3. The method for serializing chip layout data according to claim 1, characterized in that, The preset sign bit position is the lowest bit in the byte containing the least significant bit.
4. The method for serializing chip layout data according to claim 1, characterized in that, The byte value of the preset separator byte is 00000001 or 10000000.
5. The method for serializing chip layout data according to claim 1, characterized in that, In the preset variable-length encoding format, the most significant bit of each byte is used to indicate whether the current byte sequence is the last byte sequence represented by the integer parameter.
6. The method for serializing chip layout data according to claim 5, characterized in that, The most significant bit is 0 or 1; Correspondingly, if the most significant bit is 1, it indicates that the current byte sequence is not the last byte sequence; If the most significant bit is 0, it indicates that the current byte is the last byte in the sequence.
7. The method for serializing chip layout data according to any one of claims 1 to 6, characterized in that, Also includes: Upon receiving the target binary data stream, parse the target binary data stream and identify the preset delimiter bytes; The target binary data stream is divided into byte sequence segments corresponding to each polygon in the map based on the delimiter byte, and then decoded to obtain integer parameter representations.
8. A serialization device for chip layout data, characterized in that, include: The data acquisition module is used to acquire chip layout data to be serialized. The chip layout data to be serialized includes geometric information of one or more layout polygons. The geometric information includes multiple integer parameters that define the geometric shape information of the polygons. The serialization module is used to convert the integer parameter representation of the layout polygon into a byte sequence according to a preset variable-length encoding format to construct an initial binary data stream; wherein, the preset variable-length encoding format is set such that the byte containing the most significant bit of each byte sequence is located at the beginning of the sequence, the byte containing the least significant bit is located at the end of the sequence, and the sign bit is located at a preset sign bit position in the byte containing the least significant bit. The separator insertion module is used to insert a preset separator byte at the corresponding position in the initial binary data stream after all integer parameter representations of the same polygon have been converted, until all polygons have been converted to generate the target binary data stream.
9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the chip layout data serialization method as described in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that, Used to store a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the serialization method for chip layout data as described in any one of claims 1 to 7.