A method for stripping nano-pattern based on double-layer photoresist exposed by electron beam

Abstract

The application relates to the field of semiconductor micro-nano processing technology, in particular to a nano-pattern stripping method based on electron beam exposure double-layer photoresist, which comprises the following steps: sequentially spin-coating a bottom layer glue and a top layer glue on a substrate and drying the two respectively, exposing the top layer glue by using electron beam lithography, and obtaining a top layer glue lithography pattern after treatment. By using a calibration method of the lateral etching rate of the bottom layer glue, a linear relationship between the developing time and the undercut width is obtained; taking the top layer glue lithography pattern as a mask, the developing time is calculated according to the linear relationship according to the target undercut width, the bottom layer glue is subjected to lateral immersion etching development, the required undercut pattern is obtained, a metal layer is formed by depositing metal on the obtained pattern, the top layer glue and the bottom layer glue are sequentially removed to complete stripping, and the required nano-pattern is obtained. The application realizes high-resolution and high-fidelity nano-pattern transfer by precisely regulating and controlling the undercut structure, and is especially suitable for devices with strict requirements on the edge sharpness of metal patterns.

Description

Technical Field

[0001] This invention relates to the fields of semiconductor micro-nano fabrication and superconducting optoelectronic devices, and in particular to a method for nano-patterning stripping based on electron beam exposure of double-layer photoresist. Background Technology

[0002] Superconducting infrared detectors (represented by superconducting nanowire single-photon detectors, SNSPDs) have demonstrated outstanding performance advantages in quantum information, lidar, and bioimaging in recent years. Their device performance largely depends on the fabrication precision of nanoscale superconducting patterns. The working principle of SNSPDs involves holding nanoscale superconducting materials below their critical temperature and forming patterns with compact, tortuous geometries. After absorbing photons, the superconducting nanowires generate localized normal-state regions (hot spots), allowing the optical pulse response to be read through circuit changes. Since key indicators such as detection efficiency, dark count rate, and timing jitter of superconducting nanowires are closely related to the width uniformity and edge quality of the nanowires, nanoscale dimensional deviations and edge defects can significantly degrade device performance. Therefore, high-precision, highly repeatable nanopattern fabrication technology is a core aspect of superconducting infrared detector manufacturing.

[0003] In the context of the above applications, extremely stringent technical requirements are imposed on the fabrication of nanopatterns: the pattern linewidth must reach 250-500nm, the film thickness 70-200nm, the pattern spacing 100-500nm, the pattern edges must be free of burrs and residues, the dimensional deviation must be controlled within ±10nm, and the process must be adapted to the needs of mass production to ensure the infrared coupling performance and superconductivity consistency of the detector.

[0004] In the field of semiconductor micro / nano fabrication, lift-off is a common method for fabricating metal nanopatterns. This process first forms a patterned photoresist structure on a substrate, then deposits a metal thin film using physical vapor deposition techniques such as electron beam evaporation. Subsequently, a resist remover is used to dissolve the photoresist, ultimately obtaining a metal coating on the substrate consistent with the photolithographic pattern. To achieve high-resolution nanopattern fabrication, a single-layer resist lift-off process is typically employed, using ZEP520A high-resolution electron beam photoresist. ZEP520A is a non-chemically amplified positive electron beam resist with ultra-high resolution, high sensitivity, and excellent resistance to dry etching, making it one of the industry's recognized high-performance electron beam photoresists.

[0005] However, single-layer photoresist stripping processes have significant physical limitations in practical applications. During electron beam exposure, when high-energy incident electrons pass through the photoresist layer and interact with the interface of the underlying superconducting thin film, forward and backscattering are inevitably generated. This scattering effect leads to the formation of a trapezoidal sidewall structure with a "wide top and narrow bottom" after photoresist development, known as the top-cutting phenomenon. With the presence of top-cut sidewalls, metal atoms subsequently deposited by electron beam evaporation will simultaneously adhere to the top, bottom, and sidewalls of the photoresist. Since the metal layer and photoresist layer are continuously connected at the sidewalls, the edges of the metal pattern are prone to tearing during stripping, forming significant edge burr defects and causing a large deviation between the actual linewidth and the designed linewidth. Furthermore, as the metal deposition thickness increases, the continuous metal film layer on the top-cut sidewalls is prone to "film adhesion," significantly reducing the thoroughness of stripping and making it difficult to meet the yield requirements for mass production in large-area fabrication.

[0006] To overcome these problems, engineers have explored various improvement approaches. For example, optimizing exposure dose or development time to correct pattern distortion is a parameter compensation method. While this method can alleviate dimensional deviations to some extent, it is essentially an empirical adjustment and cannot fundamentally eliminate the sidewall slope problem caused by electron scattering. For narrow-line nanopatterns with a linewidth of 300 nm and a pattern spacing on the order of 100 nm, the improvement effect is extremely limited. Another approach is to replace the single-layer photoresist with one of different properties, or to adjust process parameters such as photoresist thickness, pre-baking temperature, and developer concentration, in order to obtain steeper or more favorable sidewall morphologies. However, these parameter adjustments are also fundamentally constrained by the physical laws of electron scattering, making it difficult to achieve an ideal lift-off sidewall structure while maintaining resolution.

[0007] Because single-layer photoresist systems cannot fundamentally solve the lift-off defects caused by top-cut sidewalls, engineers began to explore dual-layer photoresist structures. In this structure, the bottom layer uses a photoresist that is easily etched laterally, forming a top-wide, bottom-narrow undercut profile after development. This allows the subsequently deposited metal film to naturally break at the sidewalls, thereby improving lift-off quality. However, traditional dual-layer photoresist solutions (such as PMMA / MMA) have revealed new problems in practical applications: there is a certain degree of miscibility between the bottom and top layers of photoresist. In dense 100 nm-level nanolinewidth scenarios, the pattern accuracy and controllability of the undercut structure are far from satisfactory, failing to meet the ±10 nm dimensional tolerance requirements.

[0008] Therefore, there is an urgent need to provide a nanoscale exfoliation process that suppresses electron scattering defects and has high process repeatability to meet the high fidelity and high consistency requirements of high-performance superconducting infrared detectors for the fabrication of metal patterns. Summary of the Invention

[0009] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a nano-patterning stripping method based on electron beam exposure of double-layer photoresist, which solves the problem that the nano-patterning stripping process in the prior art is difficult to meet the high-fidelity preparation requirements of metal patterns for superconducting infrared detectors.

[0010] To achieve the above and other related objectives, the present invention is obtained through the following technical solution.

[0011] The first aspect of this invention is to provide a method for calibrating the lateral corrosion rate of LOR3A undercoat, comprising the following steps:

[0012] S1: Prepare a series of standard samples with the same process conditions: spin-coat the bottom layer adhesive LOR3A and the top layer adhesive ZEP520A sequentially on a clean substrate, wherein the spin-coating speed and time of LOR3A and ZEP520A, and the soft baking temperature and time are all based on preset process conditions; define a line array on the top layer adhesive using electron beam exposure, with the exposure dose fixed at a preset value; divide the obtained samples into several groups, immerse them in a developer of preset concentration for gradient development, and the development time of each group is a different preset duration to obtain standard samples under different development times;

[0013] S2: Measure the undercut width of each standard sample: Measure the distance that the bottom adhesive LOR3A is laterally recessed to both sides, i.e., the undercut width;

[0014] S3: Establish a standard curve: Plot a relationship curve with development time as the x-axis and undercut width as the y-axis; the development time and undercut width satisfy the following relationship: Where W is the target undercut width; V is the transverse etching rate of the underlayer adhesive under a specific process; and t is the development time.

[0015] S4: Based on the required undercut width of the target graphic, substitute the undercut width value into the quantitative relationship described in step S3 to calculate the required development time;

[0016] S5: When the process conditions change, repeat steps S1 to S3 to calibrate the new standard curve and quantitative relationship, and then determine the development time according to step S4.

[0017] A second aspect of the present invention provides a method for nanopatterning lift-off based on electron beam exposure of a double-layer photoresist, the lift-off method comprising the following steps:

[0018] (1) Spin-coat the substrate with the base coat LOR3A and dry it;

[0019] (2) Spin-coat the top coat onto the base coat and let it dry;

[0020] (3) Electron beam lithography is used to expose the top resist layer;

[0021] (4) The exposed top resist is developed, fixed, and dried to obtain the top resist photolithography pattern;

[0022] (5) Using the calibration method of the transverse etching rate of the LOR3A bottom resist described above, the linear relationship between development time and undercut width is obtained as W=V×t; then, using the top resist photolithography pattern as a mask, the required development time is calculated by substituting the target undercut width into the linear relationship, and the bottom resist is transversely etched and developed according to the development time to obtain the required undercut pattern.

[0023] (6) Deposit metal on the obtained pattern to form a metal layer;

[0024] (7) Remove the top layer adhesive and the bottom layer adhesive in sequence to complete the peeling process and obtain the desired nano-pattern.

[0025] As described above, the nano-patterning lift-off method based on electron beam exposure of double-layer photoresist of the present invention has the following beneficial effects:

[0026] (1) This invention provides a nano-patterning lift-off method based on electron beam exposure of a double-layer photoresist. This method innovatively introduces an LOR3A undercut structure, utilizing the lateral etching of the bottom resist to form a controllable undercut profile, thereby achieving physical isolation between the metal deposition layer and the photoresist sidewalls. This eliminates metal sidewall adhesion at the structural root, completely solving the edge burrs and dimensional distortion problems caused by top-cutting sidewalls in single-layer resist processes. Experimental results show that the linewidth fidelity of the metal pattern can reach over 95% after using this method.

[0027] (2) Unlike traditional empirical parameter adjustment methods, this invention establishes a quantitative calibration relationship between "undercut width and development time" for the first time. This transforms the undercut width control, which originally relied on the experience of process engineers, into a predictable and repeatable engineering-based precise adjustment method, significantly enhancing the repeatability and consistency of the process in the mass production of superconducting infrared detectors. Based on the above quantitative calibration, this method can accurately match the undercut width according to the target pattern size (linewidth 250-500nm, interval 100-500nm), while avoiding peeling residue caused by insufficient undercutting and adhesive layer collapse caused by excessive undercutting.

[0028] (3) The metal pattern obtained by the present invention has regular edges and no residue, which effectively avoids the widening of the superconducting transition edge and the decrease in infrared absorption efficiency caused by process defects, and provides key process guarantee for the stability of the core performance of the superconducting infrared detector and the consistency of the device. Attached Figure Description

[0029] Figure 1This is a schematic diagram of the undercut width-development time under different line widths for the LOR3A underlayer adhesive transverse etching rate calibration method in Examples 1-3 of the present invention.

[0030] Figure 2 This is a schematic diagram of the undercut width-development time at different undercut temperatures for the LOR3A undercoat lateral etching rate calibration method in Examples 3-4 of the present invention.

[0031] Figure 3 This is a flowchart illustrating the peeling process of the double-layer adhesive undercut structure in Embodiment 5 of the present invention;

[0032] Figure 4 This is a SEM image of the undercut structural adhesive sidewall after development of the double-layer adhesive in Embodiment 5 of the present invention;

[0033] Figure 5 This is a SEM image of the gold structure prepared by the double-layer adhesive peeling process in Example 5 of the present invention (design width 300 nm, design gap 100 nm).

[0034] Figure 6 This is an AFM scan 3D structural image of the sample obtained by peeling off the double-layer adhesive in Example 5 of the present invention;

[0035] Figure 7 This is an AFM scan step image of a single square of the sample obtained by peeling off the double-layer adhesive in Example 5 of the present invention;

[0036] Figure 8 The images show the absorption spectra of the absorber prepared in Example 5 of this invention, where the left image is the absorption spectrum test image of the gold absorber structure prepared by the double-layer adhesive process, and the right image is the FDTD simulated absorption spectrum.

[0037] Figure 9 This is a flowchart illustrating the burr formation caused by top-cutting and sidewall peeling of a single-layer ZEP520A in Comparative Example 1 of the present invention.

[0038] Figure 10 This is a SEM image of the pattern obtained after peeling off a single layer of ZEP520A in Comparative Example 1 of this invention;

[0039] Figure 11 This is an AFM scan 3D structural image of the sample obtained by peeling off a single layer of ZEP520A in Comparative Example 1 of this invention;

[0040] Figure 12 This is an AFM scan step diagram of a single square of the sample obtained by peeling off a single layer of adhesive in Comparative Example 1 of this invention. Detailed Implementation

[0041] To make the inventive objectives, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to embodiments. Those skilled in the art can easily understand other advantages and effects of this invention from the content disclosed in this specification.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0043] When using “including,” “having,” and “contains” as described herein, the intention is to cover non-exclusive inclusion, unless an explicit qualifying term such as “only,” “consisting of,” etc., is used, in which case another component may be added.

[0044] In this invention, the terms "preferredly," "more preferably," "better," and "even better" refer to embodiments of the invention that provide certain beneficial effects under certain circumstances. However, other embodiments may also be preferred under the same or other circumstances. Furthermore, the description of one or more preferred embodiments does not imply that other embodiments are unavailable, nor is it intended to exclude other embodiments from the scope of the invention. That is, in this invention, "preferredly," "more preferably," "better," and "even better" are merely descriptions of more effective implementations or examples, but do not constitute a limitation on the scope of protection of the invention.

[0045] In this invention, terms such as "further," "even more," and "particularly" are used for descriptive purposes and indicate differences in content, but should not be construed as limiting the scope of protection of this invention.

[0046] In this invention, "at least one" means one or more, such as one, two, or more. "Multiple" or "several" means at least two, such as two, three, etc., and "multi-layered" means at least two layers, such as two layers, three layers, etc., unless otherwise explicitly specified. In the description of this invention, "several" means at least one, such as one, two, etc., unless otherwise explicitly specified.

[0047] When a numerical range is disclosed herein, the range is considered continuous and includes the minimum and maximum values ​​of the range, as well as every value between the minimum and maximum values. Furthermore, when the range refers to integers, it includes every integer between the minimum and maximum values ​​of the range. Additionally, when multiple ranges are provided to describe a feature or characteristic, the ranges may be combined. In other words, unless otherwise specified, all ranges disclosed herein should be understood to include any and all subranges to which they are incorporated.

[0048] Unless otherwise specified, all steps of this invention may be performed sequentially or randomly. For example, the method includes steps (a) and (b), indicating that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, the method may also include step (c), indicating that step (c) may be added to the method in any order. For example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.

[0049] Unless otherwise stated, a singular term may include a plural term and should not be understood as having a quantity of one.

[0050] In this invention, "above" or "below" both include the number itself. For example, "below 1" includes 1.

[0051] In this invention, room temperature refers to 0~40°C, including but not limited to 10~40°C, or further to 20~30°C.

[0052] In this invention, the undercut refers to the sidewall morphology formed after photoresist development, where the bottom opening width is greater than the top opening width, i.e., an inverted trapezoidal or overhang cross-sectional structure that is narrower at the top and wider at the bottom. In a two-layer resist system, the undercut width is usually defined as the difference between the opening radius of the bottom resist and the opening radius of the top resist, i.e., the horizontal distance by which the bottom resist is laterally etched beyond the edge of the top resist on one side.

[0053] In this invention, the top cut refers to the sidewall morphology formed after photoresist development, where the "top opening width is greater than the bottom opening width," that is, a trapezoidal cross-sectional structure that is "wider at the top and narrower at the bottom."

[0054] Existing double-layer adhesive solutions generally lack precise calibration methods for the lateral etching rate of the bottom adhesive, resulting in extremely poor controllability of the undercut width: insufficient undercut leads to difficult peeling, and the metal layer and adhesive layer cannot be effectively separated; excessive undercut causes the adhesive layer of narrow line patterns to lose effective support and collapse, leading to pattern collapse or detachment. This uncontrollability of the undercut width is tolerable in conventional micron-level linewidth processes, but it completely fails under the stringent requirements of linewidths of 250-500nm and spacing of 100-500nm, making it impossible to achieve a precise match between the undercut width and the pattern size.

[0055] Against this backdrop, the ZEP520A / LOR3A dual-layer resist combination becomes the preferred choice for this application scenario. ZEP520A, as the top layer resist, ensures high-resolution imaging of the nanopattern, while LOR3A, as the bottom peelable photoresist, forms lateral etching during development, producing an undercut profile conducive to peeling. There is no significant mutual solubility between the LOR series photoresist and the top layer resist. Compared to traditional dual-layer resist solutions, the ZEP520A / LOR3A combination can improve the top-cutting defects of single-layer resists to some extent, enhancing the edge quality of the pattern. However, this combination still faces a core technical bottleneck: the lateral etching rate of the bottom LOR3A resist during development lacks a clear quantitative pattern, making precise control of the undercut width impossible. The conventional method of predicting the undercut width empirically fails completely under the stringent requirements of a linewidth of 250-500nm and an interval of 100-500nm, making it impossible to achieve a precise match between the undercut width and the pattern size. Because the corrosion degree of the underlying adhesive is uncontrollable, the size and morphology of the openings in the underlying layer exhibit significant randomness, a problem particularly prominent in nanoscale pattern fabrication. If the undercut width is too small, burr defects will still occur at the edges of the metal pattern after peeling; if the undercut width is too large, the narrow-line pattern will lack sufficient support, causing the adhesive layer to collapse and resulting in complete pattern failure. If these problems cannot be effectively solved, they will severely restrict the fabrication precision and yield of nanopatterns for superconducting infrared detectors, thereby affecting the infrared coupling performance and superconductivity consistency of the detector, fundamentally restricting the stable operation of the device.

[0056] This application targets superconducting infrared detectors, which have extremely high requirements for the dimensional accuracy, edge quality, and batch consistency of nanopatterns. Therefore, this application creatively breaks away from the limitations of traditional empirical parameter tuning and proposes for the first time a strategy for controlling the undercut width based on the precise calibration of the lateral etching rate of the LOR3A undercoat. Unlike existing technologies that rely solely on empirical estimation or trial-and-error adjustments, this application establishes a quantitative mapping relationship between the lateral etching rate of the undercoat and the development time through systematic experiments. This transforms the originally uncontrollable random etching process into a predictable and designable engineering parameter, thereby achieving precise control of the undercut width. The proposed calibration method not only solves the core technical bottleneck faced by the ZEP520A / LOR3A combination at the nanoscale but also fills the technical gap in the quantitative control of undercut width in high-precision nanopatterning exfoliation processes, providing a fundamental solution to meet the stringent requirements of linewidth of 250-500 nm and dimensional deviation of ±10 nm.

[0057] This invention aims to overcome the shortcomings of existing superconducting infrared detector micro-nano fabrication processes, such as low precision, poor yield, and uncontrollability. Addressing the "top-cut" sidewall effect caused by forward and backscattering of the electron beam in single-layer adhesive processes, this invention creatively introduces a double-layer adhesive bottom-cut structure, fundamentally eliminating metal edge burrs and dimensional distortion, and significantly improving the linewidth fidelity of nano-patterns.

[0058] To address the issues of metal adhesion, incomplete stripping, and pattern residue caused by photoresist sidewall coverage during the deposition of thick metal layers in single-layer or traditional double-layer resist systems, this invention utilizes a controllable undercut profile formed by the lateral etching of the bottom resist to physically isolate the metal deposition layer from the photoresist sidewall, ensuring that the metal layer naturally breaks off at the sidewall, thereby completely solving the stripping failure problem.

[0059] To address the problems of poor process repeatability and low consistency in large-area fabrication caused by existing processes relying on experience-based debugging and lacking quantitative calibration methods for undercut structures, this invention pioneers a precise calibration method for the lateral etching rate of the LOR3A undercoat. This transforms the empirical relationship between undercut width and development time into a predictable and repeatable quantitative model. For nanostructures with a pattern spacing of 100 nm, the undercut width can be precisely controlled within the 80-90 nm range, meeting the dimensional deviation requirement of ±10 nm. This ensures pattern fidelity and batch consistency, fully meeting the needs of superconducting infrared detectors for high-performance nanopattern fabrication.

[0060] The first aspect of this invention is to provide a method for calibrating the lateral corrosion rate of LOR3A undercoat, comprising the following steps:

[0061] S1: Prepare a series of standard samples with the same process conditions: spin-coat the bottom layer adhesive LOR3A and the top layer adhesive ZEP520A sequentially on a clean substrate, wherein the spin-coating speed and time of LOR3A and ZEP520A, and the soft baking temperature and time are all based on preset process conditions; define a line array on the top layer adhesive using electron beam exposure, with the exposure dose fixed at a preset value; divide the obtained samples into several groups, immerse them in a developer of preset concentration for gradient development, and the development time of each group is a different preset duration to obtain standard samples under different development times;

[0062] S2: Measure the undercut width of each standard sample: Measure the distance that the bottom adhesive LOR3A is laterally recessed to both sides, i.e., the undercut width;

[0063] S3: Establish a standard curve: Plot a relationship curve with development time as the x-axis and undercut width as the y-axis; the development time and undercut width satisfy the following relationship: Where W is the target undercut width; V is the transverse etching rate of the underlayer adhesive under a specific process; and t is the development time.

[0064] S4: Based on the required undercut width of the target graphic, substitute the undercut width value into the quantitative relationship described in step S3 to calculate the required development time;

[0065] S5: When the process conditions change, repeat steps S1 to S3 to calibrate the new standard curve and quantitative relationship, and then determine the development time according to step S4.

[0066] A second aspect of the present invention provides a method for nanopatterning lift-off based on electron beam exposure of a double-layer photoresist, the lift-off method comprising the following steps:

[0067] (1) Spin-coat the substrate with the base coat LOR3A and dry it;

[0068] (2) Spin-coat the top coat onto the base coat and let it dry;

[0069] (3) Electron beam lithography is used to expose the top resist layer;

[0070] (4) The exposed top resist is developed, fixed, and dried to obtain the top resist photolithography pattern;

[0071] (5) Using the calibration method of the transverse etching rate of the LOR3A bottom resist described above, the linear relationship between development time and undercut width is obtained as W=V×t; then, using the top resist photolithography pattern as a mask, the required development time is calculated by substituting the target undercut width into the linear relationship, and the bottom resist is transversely etched and developed according to the development time to obtain the required undercut pattern.

[0072] (6) Deposit metal on the obtained pattern to form a metal layer;

[0073] (7) Remove the top layer adhesive and the bottom layer adhesive in sequence to complete the peeling process and obtain the desired nano-pattern.

[0074] By introducing the LOR3A undercut structure, the contact between the metal deposition layer and the photoresist sidewalls is completely isolated, eliminating edge burrs and dimensional distortion.

[0075] In some embodiments of the present invention, the thickness of the bottom adhesive in step (1) and the thickness of the metal layer in step (6) satisfy the following relationship: Wherein, H1 is the thickness of the underlayer adhesive, and h is the thickness of the metal layer. The thickness of the metal layer here refers to the total thickness of all deposited metals, which in this application is the total thickness of the titanium and gold layers. The thickness of the underlayer adhesive (H1) and the thickness of the metal to be deposited (h) must satisfy the above-mentioned matching relationship to ensure sufficient clearance during the stripping process. If this matching relationship is not satisfied: when H1 < 2×h, the clearance is insufficient, the metal layer cannot be effectively separated from the underlayer adhesive, leading to difficult stripping, metal residue, and damage to the edge quality of the pattern; when H1 > 4×h, the excessive thickness of the underlayer adhesive easily induces increased electron scattering, resulting in pattern size distortion, linewidth error exceeding ±10nm, and increasing the risk of adhesive layer collapse, failing to meet the fabrication requirements of the superconducting infrared detector.

[0076] In some embodiments of the present invention, in step (1), the substrate is a silicon substrate;

[0077] In some embodiments of the present invention, in step (1), the coating thickness of the bottom adhesive is 290-310 nm; for example, 290-300 nm or 300-310 nm.

[0078] In some embodiments of the present invention, in step (1), the drying temperature is 140-160°C, for example, 140-150°C or 150-160°C; the drying time is 290-310s, for example, 290-300s or 300-310s;

[0079] In some embodiments of the present invention, in step (1), the spin coating speed is 2900-3100 rpm, for example, 2900-3000 rpm or 3000-3100 rpm; the time is 40-50 s, for example, 40-45 s or 45-50 s;

[0080] In some embodiments of the present invention, in step (2), the top adhesive is ZEP520A; the high contrast characteristics of ZEP520A are used to accurately replicate the design mask pattern at the nanoscale.

[0081] In some embodiments of the present invention, in step (2), the coating thickness of the top adhesive is 300-360 nm; for example, 300-330 nm or 330-360 nm.

[0082] In some embodiments of the present invention, in step (2), the drying temperature is 170-190°C, for example, 170-180°C or 180-190°C; the drying time is 170-190s, for example, 170-180s or 180-190s;

[0083] In some embodiments of the present invention, in step (2), the spin coating speed is 5900-6100 rpm, for example, 5900-6000 rpm; the time is 50-70 s, for example, 50-60 s or 60-70 s.

[0084] In some embodiments of the present invention, in step (3), the exposure dose is 310-350 μC / cm. 2 For example, 310-330μC / cm², 330-350μC / cm².

[0085] In some embodiments of the present invention, in step (4), the developing and fixing are performed using ZEP520 standard developing solution and fixing solution, and the drying is performed using high-purity nitrogen gas.

[0086] In some embodiments of the present invention, in step (4), the developing time is 50-70 seconds. For example, 50-60 seconds or 60-70 seconds;

[0087] In some embodiments of the present invention, in step (6), the deposition method is electron beam evaporation. Electron beam evaporation is well-known in the art and can be performed using methods known in the art.

[0088] In some embodiments of the present invention, in step (6), the deposited metal is Cr, Au, Ag, Cu, Ni, Pt, Ti, Co or W.

[0089] In some embodiments of the present invention, in step (7), the stripping process uses acetone or isopropanol. Specifically, the stripping process is operated as follows:

[0090] S1. Soak in N-methylpyrrolidone (NMP) at 50-70℃ for 20-35 minutes, followed by ultrasonic cleaning for 2-5 minutes;

[0091] S2. Replace with isopropanol and perform ultrasonic cleaning for 2-5 minutes;

[0092] S3. Confirm the complete peeling by observing under a microscope. If there are still areas that have not been completely peeled off, repeat step S1 until the peeling is complete.

[0093] In some embodiments of the present invention, in step S1, the soaking temperature is 50-60℃ or 60-70℃; the soaking time is 20-27 min or 27-35 min; and the washing time is 2-3 min or 3-5 min.

[0094] In some embodiments of the present invention, the cleaning time in step S2 is 2-3 min or 3-5 min.

[0095] The present invention will be further illustrated by the following examples, but these examples do not limit the scope of the invention.

[0096] When numerical ranges are given in the embodiments, it should be understood that, unless otherwise stated in the present invention, both endpoints of each numerical range and any value between the two endpoints may be selected. Unless otherwise defined, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. All reagents or instruments whose manufacturers are not specified are conventional products that can be purchased commercially. In addition to the specific methods, equipment, and materials used in the embodiments, based on the knowledge of the prior art possessed by one of ordinary skill in the art and the description of this invention, any prior art methods, equipment, and materials similar to or equivalent to those described, used, and materials in the embodiments of this invention may be used to implement this invention.

[0097] The photoresist LOR3A used in this invention is manufactured by Nippon Kayaku; the developer used in conjunction with it is AZ300MIF, manufactured by Merck Performance Materials GmbH.

[0098] The photoresist ZEP520A of this invention is manufactured by Zeon Corporation, and the developer used in conjunction with it is o-xylene.

[0099] Line width fidelity testing method: The actual processed lines are characterized using a scanning electron microscope, and the actual line width (CD) is measured. actual Then compare this value with the design line width (CD) on the design drawing. design The comparison is performed, and the fidelity F is calculated according to the following formula:

[0100] .

[0101] Preparation yield refers to the ratio of the number of qualified nano-metal patterns to the total number of patterns. The specific calculation formula is as follows:

[0102] ;

[0103] Where Y represents the preparation yield; N qualified N represents the number of qualified nanometal patterns produced. total This represents the total number of patterns. In this application, a qualified nanometal pattern is defined as one with a target linewidth of 300 nm and an allowable dimensional deviation of no more than ±10 nm.

[0104] Lateral corrosion rate calibration example

[0105] Example 1

[0106] This embodiment provides a method for calibrating the lateral corrosion rate of LOR3A underlayer adhesive, including the following steps:

[0107] S1: Prepare a series of standard samples with the same process conditions: Spin-coat the bottom layer resist LOR3A and the top layer resist ZEP520A sequentially onto a clean substrate. For LOR3A, the spin-coating speed was 3000 rpm for 45 s, followed by soft baking at 150℃ for 300 s. For ZEP520A, the spin-coating speed was 6000 rpm for 60 s, followed by soft baking at 180℃ for 180 s. Electron beam exposure was used to define a 100 nm wide line array on the top layer resist, with a fixed exposure dose of 340 μC / cm². The exposed top layer resist was developed at room temperature for 60 s using o-xylene as the developer, then fixed with isopropanol at room temperature for 60 s, and finally the surface was purged with a nitrogen gun to obtain the top layer resist photolithography pattern. The resulting samples were divided into several groups and immersed in a 2.38% 300MIF developer solution for gradient development at development times of 10 s, 15 s, 20 s, and 25 s, respectively. Standard samples were obtained at different development times. The substrate was a silicon substrate, and the substrate was cleaned as follows: at room temperature, the substrate was placed in acetone and ultrasonically immersed at a frequency of 0.48 kHz for 5 minutes to remove impurities from the silicon wafer surface; then the substrate was transferred to isopropanol (IPA) and ultrasonically immersed at a frequency of 0.48 kHz for 5 minutes to remove residual acetone and impurities; finally, the substrate was removed and the surface was dried using a nitrogen gun.

[0108] S2: Measure the undercut width of each standard sample: Observe the cross-section of the standard sample using a scanning electron microscope and measure the distance that the bottom adhesive LOR3A recedes laterally to both sides, i.e., the undercut width;

[0109] S3: Establish a standard curve: Plot a relationship curve with development time as the x-axis and undercut width as the y-axis, such as... Figure 1 As shown; the developing time and the undercut width satisfy the following relationship: Where W is the target undercut width; V is the lateral etching rate of the bottom adhesive under a specific process; t is the development time; after fitting, the lateral etching rate V in this embodiment is 15.9 nm / s;

[0110] S4: Based on the required undercut width of the target graphic, substitute the undercut width value into the quantitative relationship described in step S3 to calculate the required development time.

[0111] Example 2

[0112] This embodiment provides a method for calibrating the lateral etching rate of the LOR3A underlayer adhesive, which differs from Embodiment 1 in that: in step (1), electron beam exposure is used to define a line array with a width of 200 nm on the top layer adhesive. The resulting relationship curve in step S3 is shown below. Figure 1 As shown, the developing time and the undercut width satisfy the following relationship: Where W is the target undercut width; V is the lateral etching rate of the bottom adhesive under a specific process; t is the development time; after fitting, the lateral etching rate V in this embodiment is 20.1 nm / s.

[0113] Example 3

[0114] This embodiment provides a method for calibrating the lateral etching rate of the LOR3A underlayer adhesive, which differs from Embodiment 1 in that: in step (1), electron beam exposure is used to define a line array with a width of 500 nm on the top layer adhesive. The resulting relationship curve in step S3 is shown below. Figure 1 As shown, the developing time and the undercut width satisfy the following relationship: Where W is the target undercut width; V is the lateral etching rate of the bottom adhesive under a specific process; t is the development time; after fitting, the lateral etching rate V in this embodiment is 21.4 nm / s.

[0115] In conjunction with Examples 1-3, and in combination with Figure 10 It can be seen that, under fixed process conditions, the undercut width and the development time are highly linearly correlated. Through this calibration curve, process engineers can reverse-calculate the precise development time t based on the target undercut requirements, thus achieving a leap from "experience-based debugging" to "quantitative design".

[0116] Example 4

[0117] This embodiment provides a method for calibrating the lateral corrosion rate of the LOR3A undercoat, which differs from Embodiment 3 in that the softening temperature of the LOR3A undercoat in step (1) is 200°C; therefore, the relationship curve plotted in step S3 is as follows: Figure 2 As shown, the developing time and the undercut width satisfy the following relationship: Where W is the target undercut width; V is the lateral etching rate of the bottom adhesive under a specific process; t is the development time; after fitting, the lateral etching rate V in this embodiment is 13.6 nm / s.

[0118] It should be noted that the relationship curve corresponding to the softening temperature of 150℃ in Example 3 is as follows: Figure 2 As shown.

[0119] like Figure 2 As shown, at a linewidth of 500 nm, increasing the softening temperature significantly enhances the density of the LOR3A film. When the softening temperature is increased from 150℃ to 200℃, the lateral etching rate decreases from 21.4 nm / s to 13.6 nm / s, a reduction of 36%. By increasing the softening temperature, the etching rate of the underlying adhesive can be effectively slowed down, thereby providing a wider process window when processing large areas or complex patterns, preventing adhesive layer collapse caused by over-cutting, and demonstrating significant industrial application value.

[0120] Examples of Nanopatterning Exfoliation Method

[0121] Example 5

[0122] This embodiment provides a method for nanopattern lift-off based on electron beam exposure of a double-layer photoresist, such as... Figure 3 As shown, the peeling method includes the following steps:

[0123] (1) Spin-coating the bottom layer LOR3A onto the cleaned substrate at a spin speed of 3000 rpm for 45 s, followed by soft baking at 150°C for 300 s to obtain an LOR3A layer with a thickness of approximately 300 nm. The substrate is a silicon substrate. The cleaning operation of the substrate is as follows: at room temperature, the substrate is placed in acetone and immersed in ultrasonic at a frequency of 0.48 kHz for 5 minutes to remove impurities on the surface of the silicon wafer. Then, the substrate is transferred to isopropanol (IPA) and immersed in ultrasonic at a frequency of 0.48 kHz for 5 minutes to remove residual acetone and impurities. Finally, the substrate is removed and the surface is dried using a nitrogen gun.

[0124] (2) Subsequently, the top coat ZEP520A was spin-coated onto the bottom coat LOR3A at a spin speed of 6000 rpm for 60 s, and then softened at 180°C for 180 s to obtain a ZEP520A layer with a thickness of approximately 330 nm.

[0125] (3) An array of lines with a width of 300 nm was defined on the top layer adhesive by electron beam exposure, and the exposure dose was fixed at 340 μC / cm².

[0126] (4) After exposure, o-xylene was used as the developer to develop the top resist at room temperature for 60s, then isopropanol was used for fixing at room temperature for 60s, and finally the surface was purged with a nitrogen gun to obtain the top resist photolithography pattern.

[0127] (5) Using the calibration method for the transverse etching rate of the LOR3A undercoat as described in Example 1, a linear relationship between development time and undercut width was obtained. Where V is 15.9 nm / s; then, using the top resist photolithography pattern as a mask, the required development time is calculated by substituting the target undercut width into the linear relationship, and the bottom resist is transversely etched and developed according to the development time to obtain the required undercut pattern; that is, the top resist photolithography pattern is immersed in a 2.38% concentration 300MIF developer for 10s.

[0128] (6) Deposit metal on the obtained pattern to form a metal layer, the total thickness of the metal layer h being 80 nm. The deposition method is electron beam evaporation. Specifically, firstly, a titanium (Ti) layer with a thickness of 10 nm is deposited using electron beam evaporation as an adhesion layer, and then gold (Au) with a thickness of 70 nm is deposited on the adhesion layer to form the metal layer;

[0129] (7) Remove the top and bottom adhesives sequentially to complete the exfoliation process and obtain the desired nano-pattern. The exfoliation process is as follows: first, soak in N-methylpyrrolidone (NMP) heated to 60°C for 30 minutes, then perform ultrasonic cleaning for 3 minutes, and then switch to isopropanol for ultrasonic cleaning for 3 minutes.

[0130] The desired nanopatterns were characterized, and the results are as follows: Figure 4-8 As shown, where,

[0131] like Figure 4 As shown, the colloidal sidewalls of the undercut structure prepared after development are relatively smooth, indicating that the double-layer adhesive process of this application can form a regular undercut profile, which provides a good structural basis for the natural separation of the metal layer and the adhesive layer during subsequent metal deposition, avoids sidewall adhesion and edge burrs, and thus ensures the edge quality of the nano-pattern after peeling.

[0132] like Figure 5As shown, the designed width of the nanopattern is 300 nm, and the actual width obtained after exfoliation ranges from 295.9 nm to 301.5 nm, with minimal deviation. The designed gap is 100 nm, and the actual gap obtained after exfoliation is approximately 106.1 nm, with consistent and uniform gaps between adjacent patterns. This indicates that the exfoliation method of this application can obtain nanopatterns with highly consistent design dimensions and uniform spacing, meeting the stringent requirements of superconducting infrared detectors for pattern size deviation ≤ ±10 nm and consistency, thus verifying the superiority of this method in nanometer precision control.

[0133] like Figure 6 As shown, each square in the nanopattern obtained after exfoliation is a neat raised structure with no burrs on the edges, indicating that the pattern obtained by the exfoliation method of this application has good quality and can meet the requirements of superconducting infrared detectors for smooth and defect-free pattern edges.

[0134] like Figure 7 As shown, the height of the nano-patterned platform obtained after peeling is consistent with the film thickness, and the thickness distribution is uniform. This indicates that the peeling method of this application can achieve complete transfer of the metal layer and thickness uniformity, providing stable film thickness consistency for the superconducting infrared detector and ensuring the superconducting performance of the device.

[0135] The fidelity of the nanopatterns obtained by the above exfoliation method is 98%.

[0136] The yield of nanopatterns obtained by the above exfoliation method is 99%.

[0137] To verify the reliability of the gold absorber prepared using the double-layer adhesive peeling method described in this application, with the theoretical linewidth of the gold lines fixed at 300 nm, the gaps between the gold elements in the pattern were set to 100 nm, 200 nm, 300 nm, 500 nm, and 700 nm, respectively. The actual absorption spectra of the gold absorber under each gap were tested, and the absorption spectra under the corresponding gaps were simulated using the FDTD method (the simulation data for the 200 nm gap is not included). The results are as follows: Figure 8 As shown.

[0138] like Figure 8 As shown, the absorption spectrum is almost completely consistent with the FDTD simulation, indicating that the gold absorber structure prepared by the double-layer adhesive peeling method described in this application has a high degree of consistency with the theoretical design in terms of actual absorption characteristics. This verifies the reliability and accuracy of this method in the fabrication of nanopatterns for superconducting infrared detectors and can meet the requirements of the device for infrared coupling performance.

[0139] Example 6

[0140] The difference between this embodiment and Embodiment 5 lies in the values ​​of the exposure dose and the development time of the underlying adhesive, as shown in Table 1. The exposure doses were 310 μC / cm², 320 μC / cm², 330 μC / cm², 340 μC / cm², and 350 μC / cm², with a theoretical linewidth of 300 nm. The underlying adhesive development times were 10 s, 15 s, 20 s, and 25 s, respectively. The actual linewidths of the stripped patterns under different development times and exposure doses are shown in Table 1.

[0141] Table 1 shows the actual linewidths corresponding to different development times and exposure doses in Example 6.

[0142]

[0143] As shown in Table 1, the linewidth of the final metal pattern is controlled by both the exposure dose and the substrate development time. At low doses, the actual linewidth is easily smaller than the design value, while increasing the dose or extending the substrate development time will cause the actual linewidth to increase. For a design target of 300 nm with a required dimensional deviation of ≤±10 nm, this invention identified two optimal parameter combinations: one with an exposure dose of 340 μC / cm² and a substrate development time of 10 s (high efficiency), and the other with an exposure dose of 310 μC / cm² and a substrate development time of 15 s (high robustness). Within the process window of 310–340 μC / cm² exposure dose and 10–15 s substrate development time, the prepared metal pattern exhibits the highest edge smoothness and the smallest linewidth deviation, with the actual linewidth closely matching the design linewidth and a dimensional deviation of ≤±10 nm. Furthermore, the gold absorber structure prepared using this process exhibits an absorption spectrum that perfectly matches the simulation, perfectly meeting the high-precision fabrication requirements of superconducting infrared detectors for nanoscale metal patterns.

[0144] Comparative Example

[0145] Comparative Example 1

[0146] This comparative example provides a nanopattern stripping method, which differs from Example 5 in that the nanopattern design width is 300 nm and the design gap is 100 nm, and includes the following steps:

[0147] (1) Spin-coat ZEP520A photoresist onto the cleaned substrate at a spin speed of 6000 rpm for 60 s, followed by soft baking at 180°C for 180 s to obtain a ZEP520A layer with a thickness of 390 nm. The substrate is a silicon substrate. The cleaning operation of the substrate is as follows: at room temperature, the substrate is placed in acetone and immersed in ultrasonic at a frequency of 0.48 kHz for 5 minutes to remove impurities on the surface of the silicon wafer. Then the substrate is transferred to isopropanol (IPA) and immersed in ultrasonic at a frequency of 0.48 kHz for 5 minutes to remove residual acetone and impurities. Finally, the substrate is removed and the surface is dried with a nitrogen gun.

[0148] (2) An array of lines with a width of 100 nm was defined on the top resist by electron beam exposure, and the exposure dose was fixed at 340 μC / cm².

[0149] (3) The exposed ZEP520A layer was developed at room temperature for 60s using o-xylene as the developer, then fixed at room temperature for 60s using isopropanol, and finally the surface was purged with a nitrogen gun to obtain the photolithographic pattern.

[0150] (4) Deposit metal on the obtained pattern to form a metal layer with a total thickness h of 80 nm. The deposition method is electron beam evaporation. Specifically, firstly, a titanium (Ti) layer with a thickness of 10 nm is deposited using electron beam evaporation as an adhesion layer, and then gold (Au) with a thickness of 70 nm is deposited on the adhesion layer to form the metal layer;

[0151] (5) Remove the photoresist ZEP520A sequentially to complete the stripping process and obtain the desired nano-pattern.

[0152] The obtained nanopatterns were characterized, and the results are as follows: Figure 9-12 As shown. Among them,

[0153] like Figure 9 As shown in the figure, the process of creating burrs after peeling due to the top-cut sidewall structure when using a single-layer ZEP520A photoresist illustrates that the top-cut sidewall in the single-layer photoresist process causes the metal deposition layer to be continuously connected to the sidewall of the photoresist layer. During peeling, the metal edge is torn to form burrs, which further reveals the necessity of using a double-layer photoresist bottom-cut structure in this application to eliminate the metal adhesion on the sidewall from the root.

[0154] like Figure 10As shown, after peeling with a single layer of ZEP520A photoresist, the originally designed grid structure pattern was distorted and transformed into a "bone-like" pattern. This indicates that the single-layer ZEP520A peeling process cannot maintain the shape fidelity of the nano-pattern and has a serious pattern distortion problem. It is difficult to meet the high-fidelity fabrication requirements of superconducting infrared detectors for metal patterns. This further illustrates the necessity of introducing a double-layer photoresist undercut structure to suppress pattern distortion and improve peeling quality.

[0155] like Figure 11 As shown, each square structure in the peeled nanopattern has raised burrs on its edge. This indicates that the single-layer adhesive peeling process is difficult to obtain nanopatterns with smooth edges and has obvious edge burr defects. It cannot meet the requirements of superconducting infrared detectors for the preparation of patterns without burrs on the edges. This further verifies the necessity of using a double-layer adhesive undercut structure to eliminate edge burrs in this application.

[0156] like Figure 12 As shown in the step diagram, the film thickness in the central area of ​​the square meets the design value, while the thickness of the raised burrs at the edge is 2 to 3 times the normal coating thickness. This indicates that the single-layer adhesive peeling process not only causes edge burr defects, but also abnormally thickens the metal accumulation at the burrs, which seriously degrades the pattern quality. This further highlights the importance of the double-layer adhesive undercut structure of this application for obtaining flat, burr-free nano-patterns.

[0157] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for calibrating the lateral corrosion rate of LOR3A undercoat, characterized in that: Includes the following steps: S1: Prepare a series of standard samples with the same process conditions: spin-coat the bottom layer adhesive LOR3A and the top layer adhesive ZEP520A sequentially on a clean substrate, wherein the spin-coating speed and time of LOR3A and ZEP520A, and the soft baking temperature and time are all based on preset process conditions; define a line array on the top layer adhesive using electron beam exposure, with the exposure dose fixed at a preset value; divide the obtained samples into several groups, immerse them in a developer of preset concentration for gradient development, and the development time of each group is a different preset duration to obtain standard samples under different development times; S2: Measure the undercut width of each standard sample: Measure the distance that the bottom adhesive LOR3A is laterally recessed to both sides, i.e., the undercut width; S3: Establish a standard curve: Plot a relationship curve with development time as the x-axis and undercut width as the y-axis; the development time and undercut width satisfy the following relationship: Where W is the target undercut width; V is the transverse etching rate of the underlayer adhesive under a specific process; and t is the development time. S4: Based on the required undercut width of the target graphic, substitute the undercut width value into the quantitative relationship described in step S3 to calculate the required development time; S5: When the process conditions change, repeat steps S1 to S3 to calibrate the new standard curve and quantitative relationship, and then determine the development time according to step S4.

2. A method for nanopatterning lift-off based on electron beam exposure of a double-layer photoresist, characterized in that, The peeling method includes the following steps: (1) Spin-coat the substrate with the base coat LOR3A and dry it; (2) Spin-coat the top coat onto the base coat and let it dry; (3) Electron beam lithography is used to expose the top resist layer; (4) The exposed top resist is developed, fixed, and dried to obtain the top resist photolithography pattern; (5) Using the calibration method of the transverse etching rate of the LOR3A bottom resist as described in claim 1, the linear relationship between development time and undercut width is obtained as W=V×t; then, using the top resist photolithography pattern as a mask, the required development time is calculated by substituting the target undercut width into the linear relationship, and the bottom resist is transversely etched and developed according to the development time to obtain the required undercut pattern. (6) Deposit metal on the obtained pattern to form a metal layer; (7) Remove the top layer adhesive and the bottom layer adhesive in sequence to complete the peeling process and obtain the desired nano-pattern.

3. The peeling method according to claim 2, characterized in that: The thickness of the bottom adhesive in step (1) and the thickness of the metal layer in step (6) satisfy the following relationship: Where H1 is the thickness of the bottom adhesive and h is the thickness of the metal layer.

4. The peeling method according to claim 2, characterized in that: It also includes one or more of the following features: 11) In step (1), the substrate is a silicon substrate; 12) In step (1), the coating thickness of the bottom adhesive is 290-310 nm; 13) In step (1), the drying temperature is 140-160℃ and the drying time is 290-310s; 14) In step (1), the spin coating speed is 2900-3100 rpm and the time is 40-50 s.

5. The peeling method according to claim 2, characterized in that: It also includes one or more of the following features: 21) In step (2), the top adhesive is ZEP520A; 22) In step (2), the coating thickness of the top adhesive is 300-360 nm; 23) In step (2), the drying temperature is 170-190℃ and the drying time is 170-190s; 24) In step (2), the spin coating speed is 5900-6100 rpm and the time is 50-70 s.

6. The peeling method according to claim 2, characterized in that: In step (3), the exposure dose is 310-350 μC / cm. 2 .

7. The peeling method according to claim 5, characterized in that: In step (4), the developing and fixing processes use ZEP520 standard developing solution and fixing solution, and the drying process uses high-purity nitrogen gas.

8. The peeling method according to claim 2, characterized in that: In step (4), the development time is 50-70 seconds.

9. The peeling method according to claim 2, characterized in that: In step (6), the deposition method is electron beam evaporation technology; and / or, in step (6), the deposited metal is Cr, Au, Ag, Cu, Ni, Pt, Ti, Co or W.

10. The peeling method according to claim 2, characterized in that: In step (7), the stripping process uses acetone or isopropanol.

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