Circuit automatic design method based on large language model distillation and self-evolution
By employing a large language model distillation and self-evolving automatic circuit design method, we have solved the challenges of multiple performance indicators in analog and power circuit design, and achieved an efficient and stable automated circuit design process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIANGTAN UNIV
- Filing Date
- 2026-05-13
- Publication Date
- 2026-06-12
AI Technical Summary
Analog and power circuit design faces numerous challenges in meeting stringent performance requirements. The design space relies heavily on engineers' experience, and simulation results are scarce, leading to time-consuming automated circuit design and performance degradation.
An automatic circuit design method based on large language model distillation and self-evolution is adopted. Candidate netlists are generated, simulated, repaired and optimized through a generative strategy model. Combined with Pareto ranking and preference optimization training, the design goal is gradually approached.
It improves the efficiency and accuracy of circuit design, reduces invalid simulations, enhances the coverage, stability and diversity of training samples, prevents performance degradation, and realizes fast and efficient automated circuit design.
Smart Images
Figure CN122197812A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of artificial intelligence, and in particular to an automatic circuit design method based on large language model distillation and self-evolution. Background Technology
[0002] Analog and power circuit design typically requires meeting multiple stringent performance specifications simultaneously, such as the output voltage accuracy and conversion efficiency of DC-DC converters, the gain and bandwidth of amplifiers, and the oscillation frequency of oscillators. The design space encompasses both the circuit connection methods (topology) and the specific values of each component (such as resistor values and capacitor capacitance), heavily relying on engineers' experience and extensive iterations of simulation and debugging. When performance requirements are stringent and interdependent, effective simulation results guiding model learning are scarce, and models are prone to performance degradation across different circuit tasks. Furthermore, the time-consuming iterative design attempts create a technical bottleneck in automated circuit design. Summary of the Invention
[0003] To address the aforementioned technical problems, this invention provides a simple algorithmic method for automatic circuit design based on large language model distillation and self-evolution.
[0004] The technical solution of this invention to solve the above-mentioned technical problems is: an automatic circuit design method based on large language model distillation and self-evolution, comprising the following steps:
[0005] Step 1: Input circuit type and design target specifications;
[0006] Step 2: Construct a reference netlist set and perform initial supervised fine-tuning of the generated strategy model based on circuit type and design target specifications;
[0007] Step 3: Generate several candidate netlists in batches for each design task and perform simulations to calculate the accuracy and compliance criteria of each candidate netlist.
[0008] Step 4: For candidate netlists that do not meet the standards, calculate the degree of constraint violation, attempt automatic repair within the repair budget, and determine whether the candidate netlists after automatic repair meet the standards;
[0009] Step 5: For the qualified candidate netlists, construct a comprehensive performance vector and perform Pareto ranking and diversity screening;
[0010] Step 6: Select high-quality and low-quality samples, and form high-quality and low-quality sample pairs. Use these pairs for preference optimization training. Resample the designed task that is difficult to execute based on the historical goal achievement rate.
[0011] Step 7: Execute security strategy optimization; after each update, perform acceptance simulation. If the updated generation strategy model is lower than the previous generation strategy model in terms of target achievement rate or preset engineering quality indicators, roll back to the previous generation strategy model; otherwise, accept this update.
[0012] Step 8: Repeat steps 3 to 7 until the stopping condition is met, and output the final generated netlist.
[0013] In the above-mentioned automatic circuit design method based on large language model distillation and self-evolution, in step 1, the circuit type is used to determine the following three types of information, thereby limiting the candidate netlist that the generation strategy model can generate;
[0014] The first type of information is the range of allowed components and parameters, including the types of components that can be used and their value ranges;
[0015] The second type of information is circuit ports and connection constraints, including the definition of the circuit's external interface, the rules for mandatory or prohibited connections between components, circuit connectivity requirements, and structural constraints for normal operation of the simulator. The set of all legal netlists is determined based on the circuit ports and connection constraints.
[0016] The third category of information is performance indicators and simulation measurement configuration, including key electrical indicators, engineering quality indicators, measurement methods and optimization directions for each key electrical indicator;
[0017] The design target specifications include target values for key electrical indicators, constraints on engineering quality indicators, and simulation operation configurations;
[0018] In the target value vector of key electrical indicators, the first The target values for key electrical indicators are: , No. Simulation and measured values of key electrical indicators ;
[0019] The constraint range of engineering quality indicators is used to specify the acceptable range or one-sided limit of engineering quality indicators;
[0020] The simulation run configuration includes power supply voltage, input excitation signal, load conditions, measurement time window and steady-state judgment rules to ensure the repeatability of simulation results for the same design target specifications.
[0021] In the above-described automatic circuit design method based on large language model distillation and self-evolution, step 2 involves collecting a batch of reference netlists with valid topologies for each circuit type, forming a reference netlist set. These reference netlists cover the basic topology of the circuit type and serve as initial samples for the generative policy model's learning. Through supervised fine-tuning, the generative policy model acquires the basic ability to generate reference netlists with valid topologies.
[0022] ;
[0023] in, Circuit type; The loss function for supervising fine-tuning; For circuit type The following is a set of reference netlists; for The number of samples; For reference netlist; To design target specifications; It is a logarithmic function; The parameter set is Generative strategy model; The parameter set is The generation strategy model is in a given circuit type and design target specifications Generate reference netlist under the following conditions The probability of.
[0024] In the above-mentioned automatic circuit design method based on large language model distillation and self-evolution, in step 3, the first... The key electrical indicators, defined by the normalization factor, relative error, and single indicator accuracy, are as follows:
[0025] ;
[0026] ;
[0027] ;
[0028] In the formula, For the first Target values for key electrical indicators; An index for key electrical indicators; For the first Simulated and measured values of key electrical indicators; Indicates taking the absolute value; For the first Normalization factors for key electrical indicators; It is a constant; For the first The relative error of a key electrical indicator; For the first Accuracy of key electrical indicators; This is a truncation function;
[0029] Standard mark The calculation method is as follows: the relative error of all key electrical indicators does not exceed the tolerance. When all engineering quality indicators meet the constraints, the candidate netlist is judged to be qualified. Otherwise, the candidate netlist will be deemed unqualified. ;
[0030] Target achievement rate The calculation method is as follows:
[0031] ;
[0032] in, The total number of candidate netlists; Indexes to the candidate netlist; Indicates the first The criteria for a candidate list to meet the requirements; For target achievement rate.
[0033] In the above-mentioned automatic circuit design method based on large language model distillation and self-evolution, the formula for calculating the degree of constraint violation in step 4 is as follows:
[0034]
[0035] in, Candidate netlist The degree of violation of constraints; Candidate netlist; This is a function to find the maximum value. For the first The relative error of a key electrical indicator; For tolerance; The penalty weight for indicator deviation; It is a constant; Indicates taking the absolute value; An index for key electrical indicators; For the first The minimum value of each project quality indicator; For the first Measured values of each project quality indicator; For the first The maximum value of each project quality indicator; An index for engineering quality indicators;
[0036] For candidate netlists that do not meet the requirements, within the repair budget, the component parameters are automatically searched and adjusted to attempt to make the candidate netlists meet the design objectives. The repair process is as follows:
[0037] ;
[0038] in, The combination of component parameters to be adjusted; The allowed parameter value space for the circuit type; Indicates adoption The corresponding candidate netlist at that time To adopt The degree of constraint violation in the corresponding candidate netlist at that time; This represents the cumulative number of times the simulator was actually invoked during the repair process. Never exceed , To repair the budget; Indicates constraints; Represents the variable that minimizes the objective function; Within the parameter value space allowed by the circuit type The combination of component parameters that minimizes the objective function under the condition of satisfying the repair budget constraint.
[0039] In the above-mentioned automatic circuit design method based on large language model distillation and self-evolution, step 5 involves normalizing each engineering quality index to a score between 0 and 1. If the engineering quality index and the score are positively correlated, the score of the corresponding engineering quality index is calculated using the following formula:
[0040] ;
[0041] in, For the first The scores of each project quality indicator; For the first The minimum value of each project quality indicator; For the first Measured values of each project quality indicator; For the first The maximum value of each project quality indicator; An index for engineering quality indicators; This is a truncation function;
[0042] If the project quality indicators are negatively correlated with the score, the score for the corresponding project quality indicator is calculated using the following formula:
[0043] ;
[0044] The accuracy rates of all key electrical indicators are concatenated with the scores of engineering quality indicators to obtain the comprehensive performance vector of the candidate netlist:
[0045] ;
[0046] in, This is the overall performance vector of the candidate netlist; The accuracy rate of the first key electrical indicator; For the first Accuracy of key electrical indicators; The number of key electrical indicators; The score for the first engineering quality indicator; For the first The scores of each project quality indicator; For the quantity of engineering quality indicators;
[0047] For all candidate netlists under the same design target specification, they are first sorted according to Pareto dominance, i.e., if the... The candidate netlists are no worse than the first one in all performance dimensions. If a candidate netlist is better than the first one in at least one performance dimension, then it is called the first netlist. The candidate netlist dominates the first There are 10 candidate netlists; then, only the candidate netlists in the same Pareto layer are calculated for crowding distance, and candidate netlists with larger crowding distances are preferentially retained to ensure the diversity of training samples:
[0048] ;
[0049] in, Indicates the first Crowding distance of candidate netlists; Indicates the first After sorting by the performance dimension, compared with the first... The successor samples adjacent to the candidate netlist in the th... Scores on each performance dimension; Indicates the first After sorting by the performance dimension, compared with the first... The predecessor samples adjacent to the candidate network list are in the first... Scores on each performance dimension; For the first Maximum normalized score across all performance dimensions; For the first Minimum normalized score across each performance dimension; It is a constant; This is an index for the performance dimension.
[0050] In the aforementioned automatic circuit design method based on large language model distillation and self-evolution, step 6 involves selecting the candidate netlist closest to the target from all non-target candidate netlists as a negative sample. The candidate network list with the best ranking among the qualified candidate network lists is used as the positive sample. negative samples and positive samples Pairing samples into superior and inferior pairs; using these superior and inferior pairs for preference optimization training, the loss function for preference optimization training is as follows:
[0051] ;
[0052] in, The loss function represents the preference optimization training; It is a logarithmic function; Use the Sigmoid activation function; The scaling factor is the logarithmic probability difference; The parameter set is Generative strategy model; The parameter set is The generation strategy model for a given circuit type and design target specifications Generate positive samples under the condition of The probability of; The parameter set is The generation strategy model for a given circuit type and design target specifications Generating negative samples under the condition The probability of;
[0053] After the preference optimization training is completed, the task difficulty and sampling probability are determined based on the historical goal achievement rate of each design task. In the next round of training, the sampling probability of design tasks with low historical goal achievement rate is increased.
[0054] The specific process of step 7 in the above-mentioned automatic circuit design method based on large language model distillation and self-evolution is as follows:
[0055] Step 71: Starting with the previous generation strategy model, generate a netlist online and perform simulation. Use the simulation results to update the parameters using the near-end strategy optimization method to obtain the updated generation strategy model.
[0056] Step 72: Perform performance acceptance on the baseline design task set; the standard for passing performance acceptance is: the target achievement rate of the updated generation strategy model on the baseline design task set is not lower than that of the generation strategy model before the update, and the overall performance of the preset engineering quality indicators is not lower than that of the generation strategy model before the update; if the performance acceptance fails, roll back to the generation strategy model before the update; if the performance acceptance passes, accept the updated generation strategy model.
[0057] Step 73: After the performance acceptance is passed, randomly select a number of design tasks from outside the baseline design task set for sampling inspection; if the target achievement rate or the accuracy of key electrical indicators is found to have degraded compared with the generation strategy model before the update on the sampled task, roll back to the generation strategy model before the update, and include the sampled design tasks into the baseline design task set for continuous monitoring in subsequent training.
[0058] Step 74: When consecutive When the wheel passes performance acceptance, the tolerance threshold is tightened to move closer to a more precise design goal.
[0059] In the above-mentioned automatic circuit design method based on large language model distillation and self-evolution, the core idea of the near-end policy optimization method in step 71 is to allow the generated policy model to adjust its own parameters according to the good or bad signals of simulation feedback, while limiting the magnitude of each adjustment to prevent the performance of the generated policy model from collapsing due to an overly aggressive update, and to calculate the probability ratio of the generated policy model before the update and the generated policy model after the update to be at the same output position.
[0060] The loss function of the near-end policy optimization method is:
[0061] ;
[0062] in, The loss function for the near-end policy optimization method; This indicates taking the expectation over all sampling locations; The function is for finding the minimum value; This is the probability ratio between the previous generation strategy model and the updated generation strategy model at the same output position. This is the advantage estimate; This is the clipping threshold; This is a truncation function.
[0063] In the above-mentioned automatic circuit design method based on large language model distillation and self-evolution, step 74, the method for tightening the tolerance threshold is as follows: if continuous If the wheel passes the performance test, then , This will be the tolerance threshold to be used in the next phase. To tighten the proportional coefficient, To find the maximum value function, The tolerance threshold currently in use. This is the minimum allowable tolerance limit; otherwise .
[0064] The beneficial effects of this invention are as follows:
[0065] 1. This invention utilizes a reference netlist set to perform initial supervised fine-tuning of the generation strategy model, enabling the generation strategy model to acquire the basic ability to generate valid candidate netlists as early as possible, thereby reducing invalid candidate netlists and invalid simulations.
[0066] 2. This invention defines the degree of constraint violation and performs automatic repair on non-compliant candidate netlists within the repair budget. It can reuse candidate results that are close to meeting the standards and re-incorporate the repaired compliant candidate netlists into the compliant netlist set, thereby improving the effective sample output rate.
[0067] 3. This invention performs Pareto ranking on qualified candidate netlists and uses crowding distance for diversity screening within the same Pareto layer. It does not require pre-fixing the weights of each indicator, and can simultaneously take into account the achievement of key electrical indicators and the performance of engineering quality indicators, while improving the coverage of training samples.
[0068] 4. This invention improves the sampling probability of design tasks with low historical target achievement rates in subsequent training by using a difficult task resampling mechanism based on historical target achievement rates, so that the generation strategy model can continuously focus on design tasks that were difficult to pass acceptance in the past.
[0069] 5. This invention, through online performance acceptance after updates, random rollback, and coordinated control of gradually tightening tolerance thresholds, can suppress performance degradation during training, enabling the generated strategy model to gradually approach a more accurate design goal while maintaining stability. Attached Figure Description
[0070] Figure 1 This is the overall flowchart of the present invention.
[0071] Figure 2 This is a comparison diagram of the complete method of the present invention, prior art, and ablation settings. Detailed Implementation
[0072] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0073] like Figure 1 As shown, the automatic circuit design method based on large language model distillation and self-evolution includes the following steps:
[0074] Step 1: Input circuit type and design target specifications.
[0075] The circuit type indicates the category of the circuit to be designed (e.g., DC-DC converter, amplifier, oscillator), and is used to determine the following three types of information, thereby limiting the candidate netlists that the generation strategy model can generate;
[0076] The first type of information is the range of permitted components and parameters, including the types of components that can be used (resistors, capacitors, inductors, diodes, transistors, or controlled sources, etc.) and their value ranges.
[0077] The second type of information is circuit ports and connection constraints, including the definition of the circuit's external interface, the rules for mandatory or prohibited connections between components, circuit connectivity requirements, and structural constraints for normal operation of the simulator. The set of all legal netlists is determined based on the circuit ports and connection constraints.
[0078] The third category of information is performance indicators and simulation measurement configuration, including key electrical indicators (such as output voltage, oscillation frequency, etc.), engineering quality indicators (such as efficiency, ripple, etc.), and the measurement method and optimization direction of each key electrical indicator (the larger the better or the smaller the better).
[0079] The design target specifications include target values for key electrical indicators, constraints on engineering quality indicators, and simulation operation configurations;
[0080] In the target value vector of key electrical indicators, the first The target values for key electrical indicators are: , No. Simulation and measured values of key electrical indicators ;
[0081] The constraint range of engineering quality indicators is used to specify the acceptable range or one-sided limit of engineering quality indicators (such as efficiency, ripple, overshoot, bandwidth, noise, etc.).
[0082] The simulation run configuration includes power supply voltage, input excitation signal, load conditions, measurement time window and steady-state judgment rules to ensure the repeatability of simulation results for the same design target specifications.
[0083] For example: when the circuit type For DC-DC converters, key electrical parameters include output voltage, ripple voltage, and overshoot voltage. Engineering quality constraints include lower limits for conversion efficiency and upper limits for ripple and overshoot. Simulation configurations include input voltage, load conditions, and measurement time windows. When the circuit type... When it is an amplifier, key electrical parameters include voltage gain, phase margin, etc. Engineering quality constraints include power consumption limit, noise limit or stability constraint, etc. Simulation configuration can include power supply voltage, bias conditions and test signal configuration.
[0084] Step 2: Construct a reference netlist set and perform initial supervised fine-tuning of the generation strategy model based on circuit type and design target specifications.
[0085] For each circuit type, a set of reference netlists with valid topologies is collected and constitutes a reference netlist collection. These reference netlists cover the basic topology of the circuit type and serve as initial samples for the generative policy model's learning. Through supervised fine-tuning, the generative policy model acquires the basic ability to generate reference netlists with valid topologies.
[0086] ;
[0087] in, Circuit type; The loss function for supervising fine-tuning; For circuit type The following is a set of reference netlists; for The number of samples; For reference netlist; To design target specifications; It is a logarithmic function; The parameter set is Generative strategy model; parameter set This includes trainable parameters in large language models, such as network weights, bias terms, embedding parameters, and output layer parameters. The parameter set is The generation strategy model for a given circuit type and design target specifications Generate reference netlist under the following conditions The probability of . Minimize during training. This makes the generation strategy model more inclined to generate legitimate circuit structures similar to the reference netlist.
[0088] Step 3: Generate several candidate netlists in batches for each design task and perform simulations to calculate the accuracy and compliance criteria of each candidate netlist.
[0089] For the first The key electrical indicators, defined by the normalization factor, relative error, and single indicator accuracy, are as follows:
[0090] ;
[0091] ;
[0092] ;
[0093] In the formula, For the first Target values for key electrical indicators; An index for key electrical indicators; For the first Simulated and measured values of key electrical indicators; Indicates taking the absolute value; For the first Normalization factors for key electrical indicators; It is a constant; For the first The relative error of a key electrical indicator; For the first Accuracy of key electrical indicators; This is a truncation function;
[0094] Standard mark The calculation method is as follows: the relative error of all key electrical indicators does not exceed the tolerance. When all engineering quality indicators meet the constraints, the candidate netlist is judged to be qualified. Otherwise, the candidate netlist will be deemed unqualified. ;
[0095] Target achievement rate The calculation method is as follows:
[0096] ;
[0097] in, The total number of candidate netlists; Indexes to the candidate netlist; Indicates the first The criteria for a candidate list to meet the requirements; For target achievement rate.
[0098] Step 4: For candidate netlists that do not meet the standards, calculate the degree of constraint violation, attempt automatic repair within the repair budget, and determine whether the candidate netlists after automatic repair meet the standards.
[0099] The formula for calculating the degree of constraint violation is:
[0100]
[0101] in, Candidate netlist The degree of violation of constraints; Candidate netlists; This is a function to find the maximum value. For the first The relative error of a key electrical indicator; For tolerance; The penalty weight for indicator deviation is used to balance the degree of violation of key electrical indicators and process constraints; It is a constant; Indicates taking the absolute value; An index for key electrical indicators; For the first The minimum value of each project quality indicator; For the first Measured values of each project quality indicator; For the first The maximum value of each project quality indicator; An index for engineering quality indicators;
[0102] For candidate netlists that do not meet the requirements, within the repair budget, the component parameters are automatically searched and adjusted to attempt to make the candidate netlists meet the design objectives. The repair process is as follows:
[0103] ;
[0104] in, The combination of component parameters to be adjusted; The allowed parameter value space for the circuit type; Indicates adoption The corresponding candidate netlist at that time To adopt The degree of constraint violation in the corresponding candidate netlist at that time; This represents the cumulative number of times the simulator was actually invoked during the repair process. Never exceed , To repair the budget; Indicates constraints; Represents the variable that minimizes the objective function; Within the parameter value space allowed by the circuit type The combination of component parameters that minimizes the objective function under the condition of satisfying the repair budget constraint.
[0105] Step 5: For the qualified candidate netlists, including the candidate netlists that meet the criteria from the initial generation and the candidate netlists that meet the criteria after automatic repair in Step 4 and are re-incorporated into the qualified netlist set, construct a comprehensive performance vector and perform Pareto ranking and diversity screening.
[0106] After automatic repair in step 4, the qualified candidate netlists are re-integrated into the qualified netlist set, and together with the initially generated qualified candidate netlists, they participate in subsequent comprehensive performance vector construction, Pareto ranking, and diversity screening.
[0107] For candidate netlists that have been generated and whose topology is valid but has not yet met the requirements, this invention does not discard them directly. Instead, it performs an on-budget search on the parameters of adjustable components while keeping the topology unchanged. If the netlist meets the design target specifications after repair, it is re-incorporated into the set of qualified netlists and participates in subsequent training. This transforms candidate results that were originally close to meeting the requirements but would have been discarded into valid samples.
[0108] Each engineering quality indicator is normalized to a score between 0 and 1. If the engineering quality indicator and the score are positively correlated (i.e., the higher the measured value of the engineering quality indicator, the better), then the score of the corresponding engineering quality indicator is calculated using the following formula:
[0109] ;
[0110] in, For the first The scores of each project quality indicator; For the first The minimum value of each project quality indicator; For the first Measured values of each project quality indicator; For the first The maximum value of each project quality indicator; An index for engineering quality indicators; This is a truncation function;
[0111] If the project quality index is negatively correlated with the score (i.e., the smaller the measured value of the project quality index, the better), then the score for the corresponding project quality index is calculated using the following formula:
[0112] ;
[0113] The accuracy rates of all key electrical indicators are concatenated with the scores of engineering quality indicators to obtain the comprehensive performance vector of the candidate netlist:
[0114] ;
[0115] in, This is the overall performance vector of the candidate netlist; The accuracy rate of the first key electrical indicator; For the first Accuracy of key electrical indicators; The number of key electrical indicators; The score for the first engineering quality indicator; For the first The scores of each project quality indicator; For the quantity of engineering quality indicators;
[0116] For all candidate netlists under the same design target specification, they are first sorted according to Pareto dominance, i.e., if the... The candidate netlists are no worse than the first one in all performance dimensions. If a candidate netlist is better than the first one in at least one performance dimension, then it is called the first netlist. The candidate netlist dominates the first There are 10 candidate netlists; then, only the candidate netlists in the same Pareto layer are calculated for crowding distance, and candidate netlists with larger crowding distances are preferentially retained to ensure the diversity of training samples:
[0117] ;
[0118] in, Indicates the first Crowding distance of candidate netlists; Indicates the first After sorting by the performance dimension, compared with the first... The successor samples adjacent to the candidate netlist in the th... Scores on each performance dimension; Indicates the first After sorting by the performance dimension, compared with the first... The predecessor samples adjacent to the candidate network list are in the first... Scores on each performance dimension; For the first Maximum normalized score across all performance dimensions; For the first Minimum normalized score across each performance dimension; It is a constant; This is an index for the performance dimension. Crowding distance is only used for diversity filtering within the same Pareto level and does not participate in Pareto dominance determination.
[0119] Step 6: Select high-quality and low-quality samples, and form a superior-inferior sample pair. Use the superior-inferior sample pair for preference optimization training; and resample the designed task with difficulty based on the historical goal achievement rate.
[0120] Select the candidate network list that is closest to meeting the standard from all the candidate network lists that do not meet the standard as a negative sample. The candidate network list with the best ranking among the qualified candidate network lists is used as the positive sample. negative samples and positive samples Pairing samples into superior and inferior pairs; using these superior and inferior pairs for preference optimization training, the loss function for preference optimization training is as follows:
[0121] ;
[0122] in, The loss function represents the preference optimization training. The meaning is: by adjusting the parameters This enables the generative strategy model to generate positive samples. The probability of generating a negative sample is higher than that of generating a negative sample. The probability of this is used to guide the generative strategy model to learn towards a better design direction. It is a logarithmic function; Use the Sigmoid activation function; This is a scaling factor for the logarithmic probability difference, used to adjust the difference between positive and negative samples in preference optimization. The impact; The parameter set is Generative strategy model; The parameter set is The generation strategy model is in a given circuit type and design target specifications Generate positive samples under the condition The probability of; The parameter set is The generation strategy model is in a given circuit type and design target specifications Generating negative samples under the condition The probability of.
[0123] After the preference optimization training is completed, the task difficulty and sampling probability are determined based on the historical goal achievement rate of each design task. In the next round of training, the sampling probability of design tasks with low historical goal achievement rate is increased.
[0124] The difficulty of the design task is measured by the historical goal achievement rate; the lower the historical goal achievement rate, the greater the difficulty of the design task.
[0125] ;
[0126] ;
[0127] in, For design tasks The difficulty level; Design tasks for the next round of training The probability of being selected; For a certain design task The difficulty level; For design tasks Historical target achievement rate; It is a constant; This is a difficulty amplification factor; the larger the value, the more it emphasizes that the design task was historically difficult to pass acceptance.
[0128] For design tasks that have historically had a low target achievement rate and have consistently been difficult to complete, their probability of being selected in the next round of training will be increased for focused practice. Therefore, difficult task resampling does not involve uniform sampling of all design tasks, but rather dynamically adjusts the task sampling distribution based on historical target achievement rates, giving design tasks that have long been difficult to pass acceptance more training opportunities.
[0129] Step 7: Execute security strategy optimization; after each update, perform acceptance simulation. If the updated generation strategy model is lower than the previous generation strategy model in terms of target achievement rate or preset engineering quality indicators, roll back to the previous generation strategy model; otherwise, accept this update.
[0130] The specific process of step 7 is as follows:
[0131] Step 71: Starting with the previous generation strategy model, generate a netlist online and perform simulation. Use the simulation results to update the parameters using the near-end strategy optimization method to obtain the updated generation strategy model.
[0132] The core idea of the near-end policy optimization method is to allow the generative policy model to adjust its own parameters based on the good or bad signals of simulation feedback, while limiting the magnitude of each adjustment to prevent the performance of the generative policy model from crashing due to an overly aggressive update, and to calculate the probability ratio of the generative policy model before and after the update to be at the same output position.
[0133] The loss function of the near-end policy optimization method is:
[0134] ;
[0135] in, The loss function for the near-end policy optimization method; This indicates taking the expectation over all sampling locations; The function is for finding the minimum value; This is the probability ratio between the previous generation strategy model and the updated generation strategy model at the same output position. This is the advantage estimate, representing how good or bad the current output is relative to the average level (positive values indicate that the current output is better than the average, negative values indicate that it is worse, and the larger the absolute value, the more significant the difference). The cropping threshold, typically set to 0.1 to 0.2, is used to... Forced restrictions Within this range—meaning that no matter how good the simulation feedback is, the change in the generated policy model by a single update will not exceed this range, thus ensuring training stability; This is a truncation function.
[0136] Step 72: Perform performance acceptance on the baseline design task set; the criteria for passing performance acceptance are: the target achievement rate of the updated generation strategy model on the baseline design task set is not lower than that of the generation strategy model before the update, and the overall performance of the preset engineering quality indicators is not lower than that of the generation strategy model before the update; if the performance acceptance fails, roll back to the generation strategy model before the update; if the performance acceptance passes, accept the updated generation strategy model.
[0137] Step 73: After performance acceptance, randomly select several design tasks from outside the baseline design task set for sampling inspection. If the target achievement rate or the accuracy of key electrical indicators is found to have degraded compared to the previous generation strategy model on the sampled tasks, roll back to the previous generation strategy model and include the sampled design tasks in the baseline design task set for continuous monitoring in subsequent training. This step is to prevent the generation strategy model from performing well only on the baseline design task set but degrading on other design tasks.
[0138] Step 74: When consecutive When the wheel passes performance acceptance, the tolerance threshold is tightened to move closer to a more precise design goal.
[0139] The method for tightening the tolerance threshold is: if continuous If the wheel passes the performance test, then , This will be the tolerance threshold to be used in the next phase. To tighten the proportional coefficient, To find the maximum value function, The tolerance threshold currently in use. This is the minimum allowable tolerance level. This is to prevent the tolerance from being tightened indefinitely to an unattainable degree; otherwise .
[0140] Step 8: Repeat steps 3 to 7 until the stopping condition is met (such as reaching the maximum number of rounds or the target achievement rate reaching a preset level), and output the final generated netlist.
[0141] The complete method of this invention was compared with baseline controls, staged models, and ablation settings, and the results are as follows: Figure 2 As shown. Figure 2 The horizontal axis represents, in order, the base model, the anchor-supervised fine-tuning model, the phased model that only performs preference optimization, the complete method of this invention, the ablation setting that removes Pareto ranking, and the ablation setting that removes automatic repair; the vertical axis represents the corresponding indicator values. The three indicators in the figure are the sample-level target achievement rate, feasibility, and average efficiency (average engineering efficiency of the compliant samples).
[0142] Depend on Figure 2 It can be seen that the complete method of this invention is optimal in both sample-level target achievement rate and average efficiency. In terms of feasibility, it is tied for the best with the anchor-supervised fine-tuning model and the ablation setting without automatic repair. Among them, the ablation results of the two ablation settings without Pareto ranking and without automatic repair are lower than those of the complete method of this invention, indicating that Pareto ranking and automatic repair play important roles in balancing multi-index performance, effective sample reuse, and overall training stability, respectively.
Claims
1. An automatic circuit design method based on large language model distillation and self-evolution, characterized in that, Includes the following steps: Step 1: Input circuit type and design target specifications; Step 2: Construct a reference netlist set and perform initial supervised fine-tuning of the generation strategy model based on circuit type and design target specifications; Step 3: Generate several candidate netlists in batches for each design task and perform simulations to calculate the accuracy and compliance criteria of each candidate netlist. Step 4: For candidate netlists that do not meet the standards, calculate the degree of constraint violation, attempt automatic repair within the repair budget, and determine whether the candidate netlists after automatic repair meet the standards; Step 5: For the qualified candidate netlists, construct a comprehensive performance vector and perform Pareto ranking and diversity screening; Step 6: Select high-quality samples and low-quality samples. The high-quality samples and low-quality samples form a high-low sample pair. Use the high-low sample pair for preference optimization training. And based on historical target achievement rates, tasks that are difficult to execute were resampled. Step 7: Execute security strategy optimization; after each update, perform acceptance simulation. If the updated generation strategy model is lower than the previous generation strategy model in terms of target achievement rate or preset engineering quality indicators, roll back to the previous generation strategy model; otherwise, accept this update. Step 8: Repeat steps 3 to 7 until the stopping condition is met, and output the final generated netlist.
2. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, In step 1, the circuit type is used to determine the following three types of information, thereby limiting the candidate netlists that the generation strategy model can generate. The first type of information is the range of allowed components and parameters, including the types of components that can be used and their value ranges; The second type of information is circuit ports and connection constraints, including the definition of the circuit's external interface, the rules for mandatory or prohibited connections between components, circuit connectivity requirements, and structural constraints for normal operation of the simulator. The set of all legal netlists is determined based on the circuit ports and connection constraints. The third category of information is performance indicators and simulation measurement configuration, including key electrical indicators, engineering quality indicators, measurement methods and optimization directions for each key electrical indicator; The design target specifications include target values for key electrical indicators, constraints on engineering quality indicators, and simulation operation configurations; In the target value vector of key electrical indicators, the first The target values for key electrical indicators are: , No. Simulation and measured values of key electrical indicators ; The constraint range of engineering quality indicators is used to specify the acceptable range or one-sided limit of engineering quality indicators; The simulation run configuration includes power supply voltage, input excitation signal, load conditions, measurement time window and steady-state judgment rules to ensure the repeatability of simulation results for the same design target specifications.
3. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, In step 2, for each circuit type, a batch of reference netlists with valid topologies are collected and formed into a reference netlist set. The reference netlists cover the basic topology of the circuit type and serve as initial samples for the generative strategy model to learn. Through supervised fine-tuning, the generative strategy model acquires the basic ability to generate reference netlists with valid topologies. ； in, Circuit type; The loss function for supervising fine-tuning; For circuit type The following is a set of reference netlists; for The number of samples; For reference netlist; To design target specifications; It is a logarithmic function; The parameter set is Generative strategy model; The parameter set is The generation strategy model is in a given circuit type and design target specifications Generate reference netlist under the following conditions The probability of.
4. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, In step 3, the first The key electrical indicators, defined by the normalization factor, relative error, and single indicator accuracy, are as follows: ； ； ； In the formula, For the first Target values for key electrical indicators; An index for key electrical indicators; For the first Simulated and measured values of key electrical indicators; Indicates taking the absolute value; For the first Normalization factors for key electrical indicators; It is a constant; For the first The relative error of a key electrical indicator; For the first Accuracy of key electrical indicators; This is a truncation function; Standard mark The calculation method is as follows: the relative error of all key electrical indicators does not exceed the tolerance. When all engineering quality indicators meet the constraints, the candidate netlist is judged to be qualified. Otherwise, the candidate netlist will be deemed unqualified. ; Target achievement rate The calculation method is as follows: ； in, The total number of candidate netlists; Indexes to the candidate netlist; Indicates the first The criteria for a candidate list to meet the requirements; For target achievement rate.
5. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, In step 4, the formula for calculating the degree of constraint violation is: ； in, Candidate netlist The degree of violation of constraints; Candidate netlist; This is a function to find the maximum value. For the first The relative error of a key electrical indicator; For tolerance; The penalty weight for indicator deviation; It is a constant; Indicates taking the absolute value; An index for key electrical indicators; For the first The minimum value of each project quality indicator; For the first Measured values of each project quality indicator; For the first The maximum value of each project quality indicator; An index for engineering quality indicators; For candidate netlists that do not meet the requirements, within the repair budget, the component parameters are automatically searched and adjusted to attempt to make the candidate netlists meet the design objectives. The repair process is as follows: ； in, The combination of component parameters to be adjusted; The allowed parameter value space for the circuit type; Indicates adoption The corresponding candidate netlist at that time To adopt The degree of constraint violation in the corresponding candidate netlist at that time; This represents the cumulative number of times the simulator was actually invoked during the repair process. Never exceed , To repair the budget; Indicates constraints; Represents the variable that minimizes the objective function; Within the parameter value space allowed by the circuit type The combination of component parameters that minimizes the objective function under the condition of satisfying the repair budget constraint.
6. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, In step 5, each engineering quality indicator is normalized to a score between 0 and 1. If the engineering quality indicator and the score are positively correlated, the score of the corresponding engineering quality indicator is calculated according to the following formula: ； in, For the first The scores of each project quality indicator; For the first The minimum value of each project quality indicator; For the first Measured values of each project quality indicator; For the first The maximum value of each project quality indicator; An index for engineering quality indicators; This is a truncation function; If the project quality indicators are negatively correlated with the score, the score for the corresponding project quality indicator is calculated using the following formula: ； The accuracy rates of all key electrical indicators are concatenated with the scores of engineering quality indicators to obtain the comprehensive performance vector of the candidate netlist: ； in, This is the overall performance vector of the candidate netlist; The accuracy rate of the first key electrical indicator; For the first Accuracy of key electrical indicators; The number of key electrical indicators; The score for the first engineering quality indicator; For the first The scores of each project quality indicator; For the quantity of engineering quality indicators; For all candidate netlists under the same design target specification, they are first sorted according to Pareto dominance, i.e., if the... The candidate netlists are no worse than the first one in all performance dimensions. If a candidate netlist is better than the first one in at least one performance dimension, then it is called the first netlist. The candidate netlist dominates the first There are 10 candidate netlists; then, only the candidate netlists in the same Pareto layer are calculated for crowding distance, and candidate netlists with larger crowding distances are preferentially retained to ensure the diversity of training samples: ； in, Indicates the first Crowding distance of candidate netlists; Indicates the first After sorting by the performance dimension, compared with the first... The successor samples adjacent to the candidate netlist in the th... Scores on each performance dimension; Indicates the first After sorting by the performance dimension, compared with the first... The predecessor samples adjacent to the candidate network list are in the first... Scores on each performance dimension; For the first Maximum normalized score across all performance dimensions; For the first Minimum normalized score across each performance dimension; It is a constant; This is an index for the performance dimension.
7. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, In step 6, the candidate network list closest to meeting the standard is selected from all the candidate network lists that did not meet the standard as a negative sample, and the candidate network list with the best ranking in the candidate network list that met the standard is selected as a positive sample. The negative and positive samples are paired to form a superior-inferior sample pair; the superior-inferior sample pair is used for preference optimization training; the loss function for preference optimization training is as follows: ； in, The loss function represents the preference optimization training; It is a logarithmic function; Use the Sigmoid activation function; The scaling factor is the logarithmic probability difference; The parameter set is Generative strategy model; The parameter set is The generation strategy model is in a given circuit type and design target specifications Generate positive samples under the condition of The probability of; The parameter set is The generation strategy model is in a given circuit type and design target specifications Generating negative samples under the condition The probability of; After the preference optimization training is completed, the task difficulty and sampling probability are determined based on the historical goal achievement rate of each design task. In the next round of training, the sampling probability of design tasks with low historical goal achievement rate is increased.
8. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 1, characterized in that, The specific process of step 7 is as follows: Step 71: Starting with the previous generation strategy model, generate a netlist online and perform simulation. Use the simulation results to update the parameters using the near-end strategy optimization method to obtain the updated generation strategy model. Step 72: Perform performance acceptance on the baseline design task set; the standard for passing performance acceptance is: the target achievement rate of the updated generation strategy model on the baseline design task set is not lower than that of the generation strategy model before the update, and the overall performance of the preset engineering quality indicators is not lower than that of the generation strategy model before the update; if the performance acceptance fails, roll back to the generation strategy model before the update; if the performance acceptance passes, accept the updated generation strategy model. Step 73: After the performance acceptance is passed, randomly select several design tasks from outside the baseline design task set for spot checks; If the target achievement rate or the accuracy of key electrical indicators is found to have degraded compared with the previous generation strategy model in the sampling task, the model will be rolled back to the previous generation strategy model, and the extracted design task will be included in the baseline design task set for continuous monitoring in subsequent training. Step 74: When consecutive When the wheel passes performance acceptance, the tolerance threshold is tightened to move closer to a more precise design goal.
9. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 8, characterized in that, In step 71, the core idea of the near-end strategy optimization method is to allow the generated strategy model to adjust its own parameters according to the good or bad signals of simulation feedback, while limiting the magnitude of each adjustment to prevent the performance of the generated strategy model from collapsing due to an overly aggressive update, and to calculate the probability ratio of the generated strategy model before the update and the generated strategy model after the update to be at the same output position. The loss function of the near-end policy optimization method is: ； in, The loss function for the near-end policy optimization method; This indicates taking the expectation over all sampling locations; The function is for finding the minimum value; This is the probability ratio between the previous generation strategy model and the updated generation strategy model at the same output position. This is the advantage estimate; This is the clipping threshold; This is a truncation function.
10. The automatic circuit design method based on large language model distillation and self-evolution as described in claim 8, characterized in that, In step 74, the method for tightening the tolerance threshold is as follows: if continuous If the wheel passes the performance test, then , This will be the tolerance threshold to be used in the next phase. To tighten the proportional coefficient, To find the maximum value function, The tolerance threshold currently in use. This is the minimum allowable tolerance limit; otherwise .