Data storage device and computing system

Abstract

This application discloses a data storage device and a computing system. The data storage device includes an inverted page table, which contains mapping information between the physical addresses of a first memory included in the data storage device for processing data from a host device and the logical addresses of at least a portion of a storage region of a second memory larger than the first memory. Virtual storage can be provided to the host device, and by expanding the size of the physical memory recognized by the host device, the data processing performance of the host device can be improved.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0187855, filed with the Korean Intellectual Property Office on December 17, 2024, which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of this disclosure relate to a data storage device and a computing system. Background Technology

[0004] A computing system may include a processor and memory. The processor performs data processing, and the memory provides the storage area required by the processor to process data. The processor can be allocated storage areas of memory and uses the allocated storage areas to perform data processing.

[0005] Depending on the specific circumstances, the processor can perform data processing for multiple applications, and in this case, it can allocate storage areas for each of the multiple applications and perform data processing for each.

[0006] When a processor performs data processing based on multiple applications, the following problem may occur: due to memory size limitations, the available storage area may be insufficient, and when the storage area required for data processing is large, it may be difficult to use the allocated memory for data processing. Summary of the Invention

[0007] The embodiments of this disclosure are intended to provide measures that can improve the data processing performance of a processor by expanding the size of the physical storage area that can be allocated to the processor performing data processing in a computing system.

[0008] In an embodiment, a data storage device may include: a first memory; a second memory; and a controller configured to provide a storage virtual memory with a size corresponding to at least a portion of the storage area of ​​the second memory, and configured to process page requests from a host device to the first memory using an inverted page table, the inverted page table including mapping information between logical addresses of the storage virtual memory and physical addresses of the first memory.

[0009] In one embodiment, a data storage device may include: a first memory; and a controller configured to provide a storage virtual memory of a size corresponding to at least a portion of a storage area of ​​a second memory, and to process page requests from a host device using an inverted page table, wherein the second memory is different from the first memory, and the inverted page table includes mapping information between logical addresses of the storage virtual memory and physical addresses of the first memory.

[0010] In an embodiment, a computing system may include: a data storage device including a first memory; and a host device configured to perform data processing using the data storage device, wherein the host device identifies a storage virtual memory with a size corresponding to at least a portion of a storage area of ​​a second memory as physical memory, and performs data processing by using an inverted page table, the second memory being different from the first memory, the inverted page table including mapping information between logical addresses of the storage virtual memory and physical addresses of the first memory.

[0011] According to embodiments of this disclosure, by expanding the physical size of processor-recognizable memory, the processor load and latency can be reduced and data processing performance can be improved when the processor processes memory allocation requests and page requests. Attached Figure Description

[0012] Figure 1 This is a diagram illustrating a schematic configuration of a data storage device according to an embodiment of the present disclosure.

[0013] Figure 2 This is a diagram illustrating a schematic configuration of a data storage device providing virtual memory according to an embodiment of the present disclosure.

[0014] Figure 3 This is a diagram illustrating a schematic configuration of a data storage device for storing virtual memory according to an embodiment of the present disclosure.

[0015] Figure 4 This is a diagram illustrating a scheme for configuring a data storage device to store a virtual memory according to an embodiment of the present disclosure.

[0016] Figure 5 This is a diagram illustrating the operation of a data storage device providing a storage virtual memory 400 according to an embodiment of the present disclosure.

[0017] Figure 6 This is a diagram illustrating the operation when a page request miss occurs when the data storage device is using storage virtual memory, according to an embodiment of the present disclosure.

[0018] Figure 7 This is a diagram illustrating an example of processing page requests when a data storage device uses storage virtual memory, according to an embodiment of the present disclosure.

[0019] Figure 8A and Figure 8B This is a diagram illustrating the operation of a data storage device according to an embodiment of the present disclosure using an inverted page table to check usage status information.

[0020] Figure 9These are illustrations showing various examples of storage virtual memory according to embodiments of the present disclosure. Detailed Implementation

[0021] In the following description of examples or embodiments of this disclosure, reference will be made to the accompanying drawings, in which specific examples or embodiments that may be implemented are illustrated by way of example, and in which the same reference numerals and symbols may be used to represent even if the same or similar components are shown in different drawings. Furthermore, in the following description of examples or embodiments of this disclosure, detailed descriptions of well-known functions and components incorporated herein will be omitted where it is determined that such detailed descriptions might make the subject matter of some embodiments of this disclosure more unclear. Terms such as “comprising,” “having,” “including,” “constituting,” “made of,” and “formed from” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Unless the context clearly indicates otherwise, as used herein, the singular forms are intended to include the plural forms.

[0022] This document may use terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” to describe elements of this disclosure. Each of these terms is not used to define the nature, order, sequence, or number of elements, but is only used to distinguish the corresponding element from other elements.

[0023] When referring to the first element as "connected or joined," "in contact or overlapping," etc., it should be understood that the first element can not only be "directly connected or joined" or "directly contact or overlap" with the second element, but also that a third element can be "inserted" between the first and second elements, or that the first and second elements can be "connected or joined," "in contact or overlapping," etc., through a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or joined," "in contact or overlapping," etc., with each other.

[0024] When using time-relative terms such as “after,” “following,” “next,” or “before” to describe a process or operation of an element or configuration, or a flow or step in an operation, processing, or manufacturing method, these terms may be used to describe discontinuous or non-sequential processes or operations unless used in conjunction with the terms “direct” or “immediate.”

[0025] Furthermore, when referring to any size, relative size, etc., it should be assumed that the numerical values ​​or corresponding information of an element or feature (e.g., level, range, etc.) include tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no relevant description is specified. Additionally, the term "may" fully encompasses all the meanings of the term "able to".

[0026] Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0027] Figure 1 This is a diagram illustrating a schematic configuration of a data storage device according to an embodiment of the present disclosure.

[0028] Reference Figure 1 The data storage device 100 may include at least one memory. For example, such as Figure 1 As shown in the example, the data storage device 100 may include a first memory 110 and a second memory 120. One of the first memory 110 and the second memory 120 may be located outside the data storage device 100.

[0029] The first memory 110 and the second memory 120 may be of the same or different types.

[0030] For example, the first memory 110 can be volatile memory, and the second memory 120 can be non-volatile memory.

[0031] The first memory 110 may be, for example, DRAM, SDRAM, DDR SDRAM, or LPDDR SDRAM, but embodiments of this disclosure are not limited thereto. The second memory 120 may be NAND flash memory, 3D NAND flash memory, or NOR flash memory, but embodiments of this disclosure are not limited thereto. In some embodiments, at least one of the first memory 110 and the second memory 120 may be one of various types of memory, such as resistive RAM, phase-change memory (PCRAM), magnetoresistive memory (MRAM), ferroelectric memory, and spin-transfer torque magnetic memory. In other embodiments, at least one of the first memory 110 and the second memory 120 may be selector-only memory (SOM), an emerging type of memory. An SOM is a memory whose memory cells consist only of selectors (e.g., transistors). In other embodiments, at least one of the first memory 110 and the second memory 120 may be internal processing-in-memory, internal analog computing memory (ACiM), etc., that includes computing or data processing functions.

[0032] The data storage device 100 may include a controller that controls the operation of at least one of the first memory 110 and the second memory 120. The controller controlling the first memory 110 and the controller controlling the second memory 120 may be integrated together or configured separately. At least a portion of the functions of the controller may be performed by an external device, and the first memory 110 or the second memory 120 may operate under the control of the external device.

[0033] Based on a request from an external device, the data storage device 100 can allocate a storage area of ​​the first memory 110. For example, the data storage device 100 can receive an allocation request from the host device 200 and allocate at least a portion of the storage area of ​​the first memory 110. The host device 200 and the data storage device 100 can be collectively referred to as a computing system.

[0034] For example, host device 200 can be a computer, ultra-mobile PC (UMPC), workstation, personal digital assistant (PDA), tablet computer, mobile phone, smartphone, e-book reader, portable multimedia player (PMP), portable game console, navigation device, black box, digital camera, digital multimedia broadcasting (DMB) player, smart TV, digital audio recorder, digital audio player, digital image recorder, digital image player, digital video recorder, digital video player, storage device constituting a data center, one of various electronic devices constituting a home network, one of various electronic devices constituting a telematics network, radio frequency identification (RFID) device, mobile device capable of driving or driving autonomously under human control (e.g., vehicle, robot, or drone), etc. Optionally, host device 200 can be a virtual / augmented reality device that provides 2D or 3D virtual reality images or augmented reality images. Furthermore, host device 200 can be any of various electronic devices that require data storage device 100 to store data.

[0035] The host device 200 may include at least one operating system. The operating system can manage and control all functions and operations of the host device 200, and can control the interoperability between the host device 200 and the data storage device 100. Based on the mobility of the host device 200, the operating system can be divided into general-purpose operating systems and mobile operating systems.

[0036] Based on a request from the host device 200, the data storage device 100 can allocate a storage area of ​​the first memory 110. When a page request for requested data is received from the host device 200, the data storage device 100 can provide the host device 200 with a page stored at the address corresponding to the page request.

[0037] When the storage area of ​​the first memory 110 is insufficient, the data storage device 100 can store at least a portion of the data stored in the first memory 110 in the second memory 120 and manage it. For example, the data storage device 100 can store infrequently used data in the second memory 120. When a page request for data stored in the second memory 120 is received, the data storage device 100 can load the data stored in the second memory 120 into the first memory 110 and then provide the requested data to the host device 200.

[0038] The data storage device 100 can provide virtual memory, enabling the host device 200 to recognize the physical size of the first memory 110 as larger than its actual size when executing allocation requests and data processing. The host device 200 can send allocation requests and page requests to the data storage device 100 based on the size of the virtual memory.

[0039] Figure 2 This is a diagram illustrating a schematic configuration of a data storage device providing virtual memory according to an embodiment of the present disclosure.

[0040] Reference Figure 2 The data storage device 100 may include a first memory 110 and a second memory 120. The data storage device 100 may also provide a virtual memory 300. The size of the virtual memory 300 may be larger than the actual size of the first memory 110. The size of the first memory 110 may be smaller than the size of the second memory 120.

[0041] The addresses in virtual memory 300 can correspond to addresses of storage areas included in first memory 110 or storage areas included in second memory 120. When host device 200 sends allocation requests and page requests using addresses in virtual memory 300, data storage device 100 can allocate storage areas by checking the correspondence between the received addresses in virtual memory 300, first memory 110, and second memory 120. Then, data storage device 100 provides the page requested by the host device 200.

[0042] The host device 200 may include a processor 210 and a memory management unit (MMU) 220. The processor 210 may perform calculations, etc., based on data processing of the host device 200. In order to perform data processing according to multiple applications running on the host device 200, the processor 210 may request the allocation of a storage area from the data storage device 100 and use the allocated storage area to perform data processing.

[0043] To handle memory region allocation requests and page requests from processor 210, memory management unit 220 can manage the mapping between virtual addresses from processor 210 and physical addresses used by data storage device 100. When a virtual address is received from processor 210, memory management unit 220 can check the physical address of data storage device 100 mapped to that virtual address. Memory management unit 220 can then send the physical address translated from the virtual address to data storage device 100.

[0044] Data storage device 100 can receive a physical address mapped to a virtual address provided by memory management unit 220 and check the storage area corresponding to that physical address. Data storage device 100 can use virtual memory 300 to check the storage area in first memory 110 mapped to that physical address. For example, virtual memory 300 may include logical addresses, and the physical address of first memory 110 can be accessed using the logical address corresponding to the physical address sent by host device 200. In this example, data storage device 100 can provide data from the storage area of ​​first memory 110 to host device 200.

[0045] When the storage area mapped to the virtual memory 300 does not exist in the first memory 110, the data storage device 100 can check the storage area in the second memory 120 that is mapped to the virtual memory 300. The data storage device 100 can then load the data from the second memory 120 into the first memory 110 and provide the data to the host device 200.

[0046] Since the data storage device 100 uses the virtual memory 300 to allocate storage areas and provides the storage areas to the host device 200, assuming that the virtual memory 300 is larger than the first memory 110, the host device 200 can perform data processing when a storage area is requested to be allocated.

[0047] Furthermore, by enabling the host device 200 to recognize the virtual memory 300 as physical memory included in the data storage device 100, the data storage device 100 according to embodiments of the present disclosure can expand the size of the virtual memory 300 recognized by the host device 200 and reduce the load on the host device 200 when performing data processing.

[0048] Figure 3 This is a diagram illustrating a schematic configuration of a data storage device for storing virtual memory according to an embodiment of the present disclosure.

[0049] Reference Figure 3 The data storage device 100 may include a first memory 110 and a second memory 120. The first memory 110 may be volatile memory, and the second memory 120 may be non-volatile memory. The size of the second memory 120 may be larger than the size of the first memory 110. Despite the above description, Figure 3 The data storage device 100 shown includes a first memory 110 and a second memory 120, but in other embodiments, the type and number of memories included in the data storage device 100 may differ.

[0050] The data storage device 100 may include a storage memory management unit (SCMMU) 130. The storage memory management unit 130 can manage the mapping relationship between the storage virtual memory 400 provided to the host device 200 and the first memory 110 and the second memory 120.

[0051] For example, the memory management unit 130 can generate and manage an inverted page table that includes mapping information between logical addresses in the storage virtual memory 400 and physical addresses in the first memory 110. The memory management unit 130 can use the inverted page table to manage the mapping relationship between the storage virtual memory 400 and the first memory 110.

[0052] The data storage device 100 can provide the virtual storage memory 400 to the host device 200, and use the inverted page table managed by the storage memory management unit 130 to manage the mapping relationship between the virtual storage memory 400 and the memory in the data storage device 100.

[0053] The host device 200 may include a processor 210 and a memory management unit 220. The memory management unit 220 can detect the storage area represented by the storage virtual memory 400 in the data storage device 100. When a virtual address is received from the processor 210, the memory management unit 220 can send the physical address mapped to that virtual address to the data storage device 100. The data storage device 100 can check the logical address mapped to that physical address in the storage virtual memory 400 and use that logical address to check the storage area of ​​the first memory 110.

[0054] Data storage device 100 can process allocation requests and page requests from host device 200, wherein host device 200 accesses data storage device 100 through storage virtual memory 400, and data storage device 100 can provide data (pages) stored in the storage area of ​​the first memory 110 corresponding to the virtual address provided by host device 200 to host device 200.

[0055] When data storage device 100 provides virtual storage memory 400 managed using an inverted page table to host device 200, host device 200 can perceive that the size of the physical memory provided by data storage device 100 has been expanded. Since host device 200 detects that the virtual storage memory 400 appears to be larger than the actual physical memory size of data storage device 100, it can reduce or avoid the additional load caused by insufficient actual physical memory size detected by host device 200 when processing data.

[0056] The memory management unit 220 of the host device 200 recognizes the virtual memory 400 as a large physical memory and executes allocation requests and page requests when the storage area required by the host device application is large. Therefore, even if the storage area required by the application is large, it is possible to allocate contiguous addresses and process requests from the processor (210).

[0057] For example, data storage device 100 may generate an inverted page table that maps logical addresses of at least a portion of the storage regions of second memory 120 to physical addresses of first memory 110. This inverted page table can be used to provide storage for virtual memory 400.

[0058] Figure 4 This is a diagram illustrating a scheme for configuring a data storage device to store a virtual memory according to an embodiment of the present disclosure.

[0059] Reference Figure 4 The second memory 120 of the data storage device 100 may include multiple storage areas. At least a portion of the multiple storage areas of the second memory 120 may be used to configure the storage virtual memory 400.

[0060] For example, the second memory 120 may include a first storage area SA1 and a second storage area SA2. The storage virtual memory 400 can be configured using the first storage area SA1 of the second memory 120.

[0061] The memory management unit 130 can generate an inverted page table by mapping the logical address associated with the first memory region SA1 of the second memory 120 and the physical address of the first memory 110. The memory management unit 130 can use the inverted page table to provide a virtual memory 400 with a size corresponding to the size of the first memory region SA1 of the second memory 120.

[0062] For example, when the size of the second memory 120 is 512G and the size of the first storage area SA1 is 256G, the size of the storage virtual memory 400 provided using the inverted page table can be 256G. The memory management unit 220 of the host device 200 can recognize the size of the physical memory provided by the data storage device 100 as 256G. Since the memory management unit 220 recognizes the size of the physical memory provided by the data storage device 100 as 256G and executes allocation requests and page requests to read data from the allocated storage area, even if the processor 210 of the host device 200 performs data processing that requires a large storage area, it can easily perform data processing using the storage area provided by the storage virtual memory 400.

[0063] In this way, the data storage device 100 can expand the size of the physical memory provided by the data storage device 100 while providing the virtual storage memory 400 to the host device 200 using an inverted page table.

[0064] The memory management unit 220 of the host device 200 can send page requests to the data storage device 100 using at least one page table, which includes mapping information between virtual addresses provided by the host device 200 and logical addresses based on the storage virtual memory 400.

[0065] Data storage device 100 may use at least one page table and an inverted page table to process page requests received from host device 200.

[0066] Figure 5 This is a diagram illustrating the operation of a data storage device 100 that provides a virtual memory 400 according to an embodiment of the present disclosure.

[0067] Reference Figure 5 The data storage device 100 may include a first memory 110, a second memory 120, and a storage memory management unit 130. The data storage device 100 may provide a storage virtual memory 400 using an inverted page table, which includes mapping information between logical addresses of at least a portion of the storage regions of the second memory 120 and physical addresses of the first memory 110. The host device 200 may detect the extended physical memory of the data storage device 100 through the storage virtual memory 400.

[0068] The host device 200 may include a processor 210 and a memory management unit 220. The memory management unit 220 may request the data storage device 100 to allocate storage areas for each application executed by the processor 210. The memory management unit 220 may use page tables to manage information about the storage areas allocated by the data storage device 100.

[0069] The memory management unit 220 can detect or identify the size of the physical memory represented by the storage virtual memory 400 in the data storage device 100 and process requests from the processor 210. The memory management unit 220 can send physical addresses to the data storage device 100 through the page table for each application running in the host device 200.

[0070] For example, processor 210 can provide a virtual address to memory management unit 220. Memory management unit 220 can send the physical address corresponding to the virtual address to data storage device 100 via a page table. Memory management unit 130 of data storage device 100 can check the physical address of the logical address of the first memory 110 mapped to the storage virtual memory 400 via an inverted page table, which is associated with the received physical address.

[0071] The storage management unit 130 can use an inverted page table to provide data (pages) of corresponding storage areas in the first memory 110 to the host device 200. When no data exists in the storage area mapped using the inverted page table in the first memory 110, the storage management unit 130 can load data from the second memory 120 into the first memory 110 and provide the loaded data to the host device 200. Since the storage management unit 130 checks for mismatched data in the first memory 110 corresponding to the address provided by the host device 200 within the data storage device 100, and the address is provided to the host device 200, the host device 200 can use the data storage device 100 to perform data processing without increasing its load.

[0072] When a page request misses in the memory management unit 220 of the host device 200 or a page request misses in the storage memory management unit 130 of the data storage device 100, the error handler of the host device 200 can perform an error handling operation. The error handling operation can be performed in different ways depending on the type of page miss.

[0073] Figure 6 This is a diagram illustrating the operation when a page request miss occurs when the data storage device is using storage virtual memory, according to an embodiment of the present disclosure.

[0074] Reference Figure 6 The storage memory management unit 130 of the data storage device 100 can provide a storage virtual memory 400 whose size corresponds to the size of at least a portion of the storage area of ​​the second memory 120 by using an inverted page table, which includes mapping information between the logical addresses of at least a portion of the storage area of ​​the second memory 120 and the physical addresses of the first memory 110.

[0075] The memory management unit 220 of the host device 200 can receive a virtual address from the processor 210 and send the physical address mapped to the virtual address to the data storage device 100 through the page table.

[0076] The data storage device 100 can check the logical address of the storage virtual memory 400 mapped to the received physical address, and can provide the data of the first memory 110 at the physical address indicated by the logical address to the host device 200.

[0077] Data storage device 100 can use an inverted page table to check the mapping information between the logical addresses of the storage virtual memory 400 and the physical addresses of the first memory 110. Data storage device 100 can use the inverted page table to check the storage area of ​​the first memory 110 and provide the data in the first memory 110 to the host device 200.

[0078] When a miss occurs during the process of the data storage device 100 searching for the physical address of the first memory 110 using the inverted page table, an error handling operation can be performed. For example, when a miss occurs, the hypervisor error handler 500 included in the host device 200 performs the error handling operation.

[0079] Data storage device 100 can send misses occurring during page request processing to host device 200, and error handling operations can be performed by the hypervisor error handler 500 of host device 200, wherein the missed data is checked in second memory 120 and the corresponding data is loaded into first memory 110. According to the error handling operation, the data can be loaded into the physical address of first memory 110, thereby updating the inverted page table.

[0080] Since the data storage device 100 effectively provides an expanded size of physical memory that the host device 200 can recognize (e.g., data may reside in the physical addresses of the first memory 110 or the second memory 120), misses can be reduced when the host device 200 performs searches using page tables. Furthermore, when a miss occurs in the host device 200's memory management unit 220 during a page table search, error handling operations can be performed by the host device 200's page fault handler 600.

[0081] For page misses with a low probability of occurrence in the page table, page fault handler 600 can perform error handling operations. For page misses in the inverted page table managed by storage memory management unit 130, hypervisor error handler 500 can perform error handling operations. The error handling performed by page fault handler 600 differs from that performed by hypervisor error handler 500 when a page miss occurs in the page table. When page fault handler 600 performs an error handling operation (e.g., to search for a missed page in second memory 120), the missed page can be loaded into first memory 110, and the inverted page table can be updated.

[0082] The embodiments of this disclosure can expand the perceived size of the physical memory recognized by the host device 200 by using the storage virtual memory 400 provided by the storage memory management unit 130 of the data storage device 100, thereby improving the data processing performance of the host device 200. Furthermore, when a page miss occurs, the embodiments of this disclosure can perform error handling operations using the hypervisor error handler 500 or the page error handler 600 according to the type of page miss, thereby efficiently handling the page miss.

[0083] Page misses in data storage device 100 can occur in various types, and the handling scheme for misses can vary depending on each type of miss.

[0084] Figure 7 This is a diagram illustrating an example of processing page requests when a data storage device uses storage virtual memory, according to an embodiment of the present disclosure.

[0085] Reference Figure 7 The processor 210 of the host device 200 can handle multiple processes and manage a page table for each of the multiple processes. When handling page requests for each of the multiple processes, the processor 210 can use virtual addresses. The memory management unit 220 can use the page table in the processor 210 to check the physical address mapped to the virtual address and send the physical address obtained from the page table to the data storage device 100.

[0086] The data storage device 100 may include a first memory 110, a second memory 120 and a storage memory management unit 130, and may provide a storage virtual memory 400 associated with at least a portion of the storage area of ​​the second memory 120.

[0087] Data storage device 100 can perform processing based on page requests from host device 200, that is, using the physical address received from host device 200 and finding the associated logical address in storage virtual memory 400.

[0088] Data storage device 100, which processes page requests from host device 200, may hit or miss during the table search process.

[0089] For example, when a page request is processed, and the page table in processor 210 is hit, and the inverted page table in data storage device 100 is hit, data storage device 100 can provide the page indicated by the hit logical address in storage virtual memory 400 to host device 200.

[0090] When a page request is processed and the page table is hit, but the inverted page table is not hit, the data storage device 100 can load the page stored in the second memory 120 into the first memory 110 and provide the loaded page to the host device 200. The data storage device 100 can update the inverted page table based on the loaded page.

[0091] When a page request is processed and a page table miss occurs, but an inverted page table hit occurs, the data storage device 100 can provide the page in the first memory 110 that is pointed to by the physical address of the logical address that is hit in the inverted page table to the host device 200.

[0092] When a page request is processed and a page request is not found in the page table and the inverted page table, the data storage device 100 can load the page stored in the second memory 120 into the first memory 110 and provide the loaded page to the host device 200.

[0093] When both the page table and the inverted page table are missed, the hypervisor error handler 500 (not shown) of the host device 200 can perform error handling operations. According to the error handling operations, pages stored in the second memory 120 can be loaded into the first memory 110 and provided to the host device 200, and the page table and the inverted page table can be updated.

[0094] The memory management unit 220 of the host device 200 can send page requests to the data storage device 100 using a page table, and can also send page requests when the size of the physical memory implemented by the storage virtual memory 400 provided by the data storage device 100 is identified.

[0095] When a page miss occurs based on a page request, the host device 200 can reduce the load on the host device 200 in handling the miss situation and improve the data processing performance of the host device 200 because the first memory 110 and the second memory 120 can be used to provide the page.

[0096] Furthermore, by using an inverted page table, the storage memory management unit 130 of the data storage device 100 can efficiently manage the storage area used by each process of the host device 200 and facilitate the provision of the necessary storage area in response to host requests.

[0097] Figure 8A and Figure 8B This is a diagram illustrating the operation of a data storage device according to an embodiment of the present disclosure using an inverted page table to check usage status information.

[0098] Reference Figure 8A The processor 210 of the host device 200 can handle multiple processes. These multiple processes can be processes executed by multiple applications respectively, or processes executed by a single application.

[0099] Each process executed by an application can be called a virtual machine (VM), and a storage area of ​​data storage device 100 can be allocated to each virtual machine.

[0100] The storage area allocated to each virtual machine can be as follows: Figure 8A The example shown illustrates this. For instance, each storage region can be used by a single application, by multiple applications, or, depending on the specific circumstances, may not be used at all. When storage regions allocated to each of multiple applications are combined and represented on a single plane, the storage regions can be represented by dividing them into used regions, unused regions, and shared regions. Information about used regions, shared regions, and unused regions can be referred to as usage type information.

[0101] The data storage device 100 can use usage type information and inverted page table to check the usage status information of each storage area.

[0102] Reference Figure 8B The data storage device 100 can use an inverted page table to check usage type information based on whether a storage area is used by multiple applications. The data storage device 100 can check the usage status of each storage area, and can identify areas that are actually in use, unused, and frequently used. For example, among storage areas in use and shared storage areas, the data storage device 100 can check areas storing frequently used "hot" data. The data storage device 100 can also check areas storing less frequently used "cold" data. Furthermore, the data storage device 100 can also check areas allocated to at least one application and areas storing data that is rarely accessed or untouched.

[0103] The data storage device 100 can efficiently use and provide storage areas by performing new allocations or deallocations on storage areas of the first memory 110 using usage status information, wherein the usage status information is checked based on usage type information and an inverted page table.

[0104] In this way, embodiments of this disclosure can improve the data processing performance of the host device 200 by handling page requests from the host device 200 while the storage memory management unit 130 provides the storage virtual memory 400. The storage memory management unit 130 can be implemented in the data storage device 100 as described above, but alternatively, the corresponding functionality can be provided by the host device 200. The type and number of memories included in the data storage device 100 can be implemented in various ways.

[0105] Figure 9 These are illustrations showing various examples of storage virtual memory according to embodiments of the present disclosure.

[0106] Reference Figure 9 Type 1 represents an example where the virtual storage 400 is implemented by the host device 200, and Type 2 and Type 3 represent examples where the virtual storage 400 is implemented by the data storage device 100.

[0107] Referring to Type 1, the functions of memory management unit 220 and storage memory management unit 130 can be implemented in host device 200. The functions of storage memory management unit 130 can be provided by integrating them with the functions of memory management unit 220, or they can be implemented separately.

[0108] The memory management unit 220 can request pages by providing a physical address to the memory management unit 130 based on the mapping relationship between virtual addresses and physical addresses, similar to the operation of using virtual memory.

[0109] The storage memory management unit 130 can provide the host device 200 with the virtual storage memory 400, and the storage memory management unit 130 can manage the mapping relationship between the logical addresses of at least a portion of the storage areas of the second memory 120 and the physical addresses of the first memory 110. In the second memory 120, the storage areas used when providing the virtual storage memory 400 can operate synchronously with the first memory 110, but the remaining storage areas can operate asynchronously.

[0110] Based on the example of type 1, a computing system using storage virtual memory 400 can be provided, wherein the functionality of storage memory management unit 130 is added while maintaining the configuration of the memory management unit 220 of host device 200 and data storage device 100.

[0111] In the Type 2 example, data storage device 100 may include a first memory 110 and a second memory 120. A storage memory management unit 130 is implemented within the data storage device 100, and storage virtual memory 400 may be provided to the host device 200. Storage memory management unit 130 may use an inverted page table to manage the mapping information between logical addresses of at least a portion of the storage regions of the second memory 120 and physical addresses of the first memory 110, in order to configure storage virtual memory 400.

[0112] The storage memory management unit 130 may provide storage virtual memory 400, for example, by using a portion of a second memory 120 located outside the data storage device 100 or by including a non-volatile memory separate from the external second memory 120.

[0113] In the example of type 3, in a structure where the first memory 110 and the second memory 120 are included within the data storage device 100, the storage virtual memory 400 detected by the host device 200 is managed by the storage memory management unit 130. The storage virtual memory 400 and the second memory 120 can be used to expand and provide the amount of physical memory recognized by the host device 200. In some embodiments, the first memory 110 included in the data storage device 100 can be used as a cache.

[0114] Furthermore, the above embodiments can be further extended when a finer stratification of the memory included in the data storage device 100 is required. For example, when a finer stratification of the memory from the third to the Nth level is required in addition to the first and second levels, the configuration of the data storage device 100 can be extended. In the case of type 1, the additional memory management unit 220 or the storage memory management unit 130 can be configured in an overlapping manner. In the cases of types 2 and 3, larger memory can be configured to extend to lower levels.

[0115] According to the embodiments of the present disclosure described above, a storage memory management unit 130 disposed between the memory management unit 220 of the host device 200 and the first memory 110 of the data storage device 100 can provide the host device 200 with a storage virtual memory 400 based on the second memory 120 to increase the apparent size of the physical memory identified by the memory management unit 220.

[0116] Because the host device 200 uses the memory size of the expanded data storage device 100, the data processing performance of the host device 200 can be improved. Since a larger, more efficient physical memory is provided for the host device 200, the load on the host device 200 during operation can be prevented, thereby improving the performance of the computing system.

[0117] Although various embodiments of this disclosure have been described with particular and varying details for illustrative purposes, those skilled in the art will understand that various modifications, additions, and substitutions can be made based on what is disclosed or shown in this disclosure without departing from the spirit and scope of this disclosure as defined in the following claims.

Claims

1. A data storage device, comprising: First memory; Second memory; as well as The controller provides a virtual memory of size corresponding to at least a portion of the storage area of ​​the second memory, and uses an inverted page table to process page requests from the host device to the first memory, the inverted page table including mapping information between the logical addresses of the virtual memory and the physical addresses of the first memory.

2. The data storage device of claim 1, wherein, The controller processes the page request by receiving a virtual address from the host device, checking the logical address mapped to the virtual address in the storage virtual memory, and checking the physical address mapped to the logical address in the first memory.

3. The data storage device of claim 1, wherein, The controller processes the page request using at least one page table and the inverted page table, the page table including mapping information between the virtual address of the host device and the logical address according to the storage virtual memory.

4. The data storage device of claim 3, wherein, When a page requested by the host device matches a hit in at least one page table and a hit in the inverted page table, the controller provides the host device with the page indicated by the logical address in the storage virtual memory corresponding to the hit.

5. The data storage device according to claim 3, wherein, When a page requested by the host device matches a hit in at least one of the page tables but is not hit in the inverted page table, the controller provides the loaded page to the host device by loading the page from the second memory into the first memory and updates the inverted page table.

6. The data storage device according to claim 3, wherein, When a page requested by the host device is not found in at least one page table and matches a hit in the inverted page table, the controller provides the host device with the page indicated by the physical address of the first memory, which is mapped to the inverted page table.

7. The data storage device according to claim 3, wherein, When a page requested by the host device is not found in at least one page table and is not found in the inverted page table, the controller loads the page stored in the second memory into the first memory and provides the loaded page to the host device.

8. The data storage device according to claim 3, wherein, When a page requested by the host device is not found in at least one page table and the inverted page table, the hypervisor error handler included in the host device performs an error handling operation.

9. The data storage device according to claim 3, wherein, The controller checks the usage type information of the physical address of the first memory based on the at least one page table, and checks the usage status information of the physical address of the first memory based on the usage type information and the inverted page table.

10. The data storage device according to claim 9, wherein, The usage type information includes information about usage, sharing, and unused data, and the usage status information includes information about hot data, cold data, and unaccessed data.

11. The data storage device according to claim 1, wherein, The controller receives the page request sent by the host device, and the host device identifies the physical memory corresponding to the size of the virtual storage memory.

12. The data storage device according to claim 1, wherein, The controller receives a page request sent by the host device, and the host device identifies a physical memory corresponding to the size obtained by adding the size of the first memory to the size of the storage virtual memory.

13. The data storage device according to claim 1, wherein, The size of the second memory is greater than the size of the first memory.

14. A data storage device, comprising: First memory; as well as The controller provides a storage virtual memory with a size corresponding to at least a portion of the storage area of ​​the second memory, and processes page requests from the host device using an inverted page table, wherein the second memory is different from the first memory, and the inverted page table includes mapping information between logical addresses of the storage virtual memory and physical addresses of the first memory.

15. The data storage device according to claim 14, wherein, The second memory is located outside the data storage device.

16. A computing system, comprising: A data storage device, including a first memory; as well as The host device uses the data storage device to perform data processing. The host device identifies a virtual memory of size corresponding to at least a portion of the storage area of ​​the second memory as physical memory, and performs data processing using an inverted page table, the second memory being different from the first memory, the inverted page table including mapping information between the logical address of the virtual memory and the physical address of the first memory.

17. The computing system according to claim 16, wherein, In the event of a miss when using the inverted page table for data processing, the host device uses the hypervisor error handler to perform error handling operations.

18. The computing system according to claim 17, wherein, When a page request for the physical memory is missed, the host device uses a page fault handler to perform an error handling operation.

19. The computing system according to claim 16, wherein, The host device identifies the size of the first memory and the size of the storage virtual memory as the size of the physical memory.

20. The computing system according to claim 16, wherein, The second memory is located outside the data storage device.

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