Intelligent data management method and system for chip production

Abstract

This invention discloses an intelligent data management method and system for chip manufacturing, relating to the field of chip technology. The key technical solution includes the following steps: collecting target data processing efficiency and target task configuration information for the chip manufacturing process; processing and analyzing the target data processing efficiency and target task configuration information to obtain a target data task set; obtaining an intelligent data control process based on the target data task set; obtaining the node evaluation value of chip manufacturing data at the data processing node based on the node processing status; obtaining the process evaluation value of chip manufacturing data in the intelligent data control process based on the node evaluation value; and outputting the process control efficiency of chip manufacturing data in the intelligent data control process based on the process evaluation value. The effect is to effectively improve the intelligence level of chip manufacturing data management.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and more specifically, to an intelligent data management method and system for chip production. Background Technology

[0002] As chip manufacturing processes continue to evolve towards the nanometer scale, the complexity and sophistication of production processes are constantly increasing. This has led to an explosive growth in the amount of data generated during chip production, with increasingly diverse data types covering multiple dimensions, including equipment operating parameters, process control data, quality inspection results, and task scheduling information. Traditional data management methods largely rely on manual collection and decentralized processing, which suffers from problems such as untimely data collection, low processing efficiency, and a mismatch between task configuration and data processing capabilities. These methods are ill-suited to the real-time, accurate, and collaborative requirements of modern chip manufacturing.

[0003] Existing data management solutions often lack a holistic consideration of data processing efficiency and task allocation, resulting in idle and wasted data processing resources in some production stages, while critical stages experience processing delays due to insufficient resources, impacting overall production progress and product quality. Most solutions fail to establish standardized data control processes, and the lack of unified execution standards across data processing nodes leads to poor consistency in data processing results, difficulty in tracing anomalies, and an inability to quantitatively evaluate control effectiveness, hindering the continuous optimization of production processes. Summary of the Invention

[0004] In view of the shortcomings of the existing technology, the purpose of this invention is to provide an intelligent data management method and system for chip production.

[0005] To achieve the above objectives, the present invention provides the following technical solution: An intelligent data management method for chip manufacturing, comprising the following steps: Collect target data processing efficiency and target task configuration information during the chip manufacturing process; The target data task set is obtained by processing and analyzing the target data processing efficiency and target task configuration information; An intelligent data management process is derived based on the target data task set; wherein, the intelligent data management process includes data processing nodes and node processing standard parameters corresponding to the data processing nodes; When managing and processing the entire chip production chain data according to the intelligent data management and control process, the node processing monitoring parameters of the chip production data at the data processing node are obtained; the node processing monitoring parameters are analyzed with the corresponding node processing standard parameters of the data processing node to determine the node processing status of the chip production data at the data processing node. The node evaluation value of chip production data at the data processing node is obtained based on the node processing status; the process evaluation value of chip production data in the intelligent data management process is obtained based on the node evaluation value; and the process management efficiency of chip production data in the intelligent data management process is output based on the process evaluation value.

[0006] An intelligent data management system for chip manufacturing includes: Acquisition module: Acquires target data processing efficiency and target task configuration information during the chip manufacturing process; Processing module: Processes and analyzes the target data processing efficiency and target task configuration information to obtain the target data task set; Components: An intelligent data management process is obtained based on the target data task set; wherein, the intelligent data management process includes data processing nodes and node processing standard parameters corresponding to the data processing nodes; Analysis module: When managing and processing data across the entire chip production chain according to the intelligent data management and control process, it acquires the node processing monitoring parameters of chip production data at the data processing nodes; it analyzes the node processing monitoring parameters with the corresponding node processing standard parameters of the data processing nodes to determine the node processing status of chip production data at the data processing nodes. Output module: Obtains the node evaluation value of chip production data at the data processing node based on the node processing status; obtains the process evaluation value of chip production data in the intelligent data management process based on the node evaluation value; outputs the process management efficiency of chip production data in the intelligent data management process based on the process evaluation value.

[0007] Compared with the prior art, the present invention has the following beneficial effects: This invention collects target data processing efficiency and target task configuration information from the chip manufacturing process, processes and analyzes these two data sets to generate a target data task set, thus matching data processing efficiency with task configuration. It can rationally allocate data processing resources according to the actual needs of each production stage, avoiding resource waste and efficiency bottlenecks, ensuring data processing aligns with the process characteristics and task rhythm of chip manufacturing, and effectively improving overall data processing efficiency. The intelligent data management and control process built based on the target data task set clearly defines each data processing node and its corresponding node processing standard parameters, providing a standardized and regulated basis for end-to-end data management and control. It can promptly detect anomalies in the data processing process, ensuring the continuity and reliability of chip manufacturing data processing. Through multi-level quantitative evaluation of node evaluation values ​​and process evaluation values, the final output is the process management and control effectiveness. Node evaluation values ​​reflect the operational quality of individual data processing nodes, while process evaluation values ​​comprehensively reflect the overall effect of end-to-end data management and control, effectively improving the intelligence level of chip manufacturing data management. Attached Figure Description

[0008] Figure 1 This is a flowchart illustrating an intelligent data management method for chip manufacturing, provided by an embodiment of the present invention. Figure 2 This is a schematic diagram of a module for an intelligent data management system for chip manufacturing, provided in an embodiment of the present invention. Detailed Implementation

[0009] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0010] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0011] Secondly, the term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places throughout this specification does not necessarily refer to the same embodiment, nor is it a single embodiment or an embodiment selectively excluded from other embodiments.

[0012] Reference Figures 1-2 As shown.

[0013] The embodiments further illustrate the intelligent data management method and system for chip manufacturing proposed in this invention.

[0014] An intelligent data management method for chip manufacturing, comprising the following steps: Collect target data processing efficiency and target task configuration information during the chip manufacturing process; The target data task set is obtained by processing and analyzing the target data processing efficiency and target task configuration information; The intelligent data management process is derived from the target data task set; the intelligent data management process includes data processing nodes and the node processing standard parameters corresponding to the data processing nodes. When managing and processing the entire chip production chain data according to the intelligent data management and control process, the node processing monitoring parameters of the chip production data at the data processing node are obtained; the node processing monitoring parameters are analyzed with the corresponding node processing standard parameters of the data processing node to determine the node processing status of the chip production data at the data processing node. The node evaluation value of chip production data at the data processing node is obtained based on the node processing status; the process evaluation value of chip production data in the intelligent data management process is obtained based on the node evaluation value; and the process management efficiency of chip production data in the intelligent data management process is output based on the process evaluation value.

[0015] The target data task set is obtained by processing and analyzing the target data processing efficiency and target task configuration information, specifically including the following steps: Based on the target data processing efficiency, we obtain the set of task efficiency combinations for the data tasks to be configured, and the efficiency combination coefficients corresponding to the set of task efficiency combinations. Based on the efficiency combination coefficients, we obtain the set of candidate efficiency combinations. Based on the target task configuration information, obtain the task configuration combination set of the data task to be configured, and the configuration combination coefficient corresponding to the task configuration combination set; and obtain the candidate configuration combination set based on the configuration combination coefficient. The target data task set is obtained by analyzing the set of efficiency combinations and the set of configuration combinations to be selected.

[0016] Based on the target data processing efficiency, we obtain the set of task efficiency combinations for the data tasks to be configured, and the corresponding efficiency combination coefficients for the task efficiency combinations. Based on the efficiency combination coefficients, we obtain the set of candidate efficiency combinations, which specifically includes the following steps: Based on the target data processing efficiency, analyze the urgency of actual data processing needs and data integrity requirements in each stage of chip production; The basic efficiency unit is derived based on the data generation rate, data processing priority, and data transmission stability. Different basic efficiency units are combined according to the sequence of chip manufacturing process to obtain a task efficiency combination set; Based on the urgency of actual data processing needs and data integrity requirements at each stage of chip production, the basic efficiency units of the task efficiency combination set are weighted to obtain the weight allocation result. Based on the weight allocation results, obtain the efficiency combination coefficients corresponding to the task efficiency combination set; The set of task efficiency combinations whose efficiency combination coefficients reach the preset efficiency combination coefficient threshold is marked as the set of candidate efficiency combinations.

[0017] First, based on the target data processing efficiency, we analyze the urgency of actual data processing needs, data integrity requirements, and processing resource consumption at each stage of chip production. For example, the lithography stage has extremely high requirements for real-time data processing, while the inspection stage focuses more on data integrity and accuracy.

[0018] Data generation rate reflects the frequency and scale of data generation at each stage. For example, the wafer inspection stage can generate thousands of inspection data per second, while the equipment monitoring stage generates operating parameters at a frequency of minutes. Data processing priority is divided according to the urgency of production tasks. For example, the data processing priority of urgent batches of chips is higher than that of regular batches. Data transmission stability considers the packet loss rate and latency indicators of data transmission between different stages. Each dimension is divided into different levels. For example, data generation rate is divided into high-speed, medium-speed, and low-speed levels; data processing priority is divided into high, medium, and low levels; and data transmission stability is divided into stable, average, and unstable levels. These levels are then combined to form multiple basic efficiency units, each of which represents a combination of data processing efficiency characteristics.

[0019] Different basic efficiency units are combined according to the sequential arrangement of the chip manufacturing process to obtain task efficiency sets. From wafer fabrication, photolithography, etching, thin film deposition to final inspection and packaging, there are strict sequential orders and data flow relationships between each stage. Therefore, the combination of basic efficiency units must follow process logic. For example, the high-speed, high-priority, and stable transmission basic efficiency units corresponding to the photolithography stage can be combined with the medium-speed, medium-priority, and stable transmission basic efficiency units corresponding to the etching stage to form task efficiency sets covering multiple production stages. In this way, multiple different task efficiency sets are obtained, each set corresponding to a production process data processing efficiency scheme.

[0020] After obtaining the task efficiency set, it is necessary to assign weights to the basic efficiency units in the task efficiency set based on the urgency and data integrity requirements of the actual data processing needs at each stage of chip production. The weight allocation reflects the importance of each basic efficiency unit in the entire task efficiency set. For example, for stages with high data processing urgency, the weight value of the corresponding basic efficiency unit should be increased accordingly to highlight the stage's importance in data processing efficiency.

[0021] The efficiency combination coefficient corresponding to the task efficiency combination set is calculated based on the weight allocation results. The weight value of each basic efficiency unit in the task efficiency combination set is multiplied by its corresponding efficiency characteristic value, summed, and then divided by the number of basic efficiency units in the combination set. For example, if a task efficiency combination set contains 3 basic efficiency units with weight values ​​of 8.1, 7.5, and 6.9, and corresponding efficiency characteristic values ​​of 0.9, 0.8, and 0.7, then the efficiency combination coefficient of this combination set = (8.1 × 0.9 + 7.5 × 0.8 + 6.9 × 0.7) ÷ 3 = (7.29 + 6 + 4.83) ÷ 3 = 6.04. The overall efficiency level of each task efficiency combination set is quantified as an efficiency combination coefficient; the higher the coefficient value, the better the data processing efficiency of the combination set.

[0022] Efficiency combinations of tasks whose efficiency coefficients reach a preset threshold are marked as candidate efficiency combinations. This preset threshold is determined based on the overall efficiency target and resource constraints of chip production. For example, if the overall data processing efficiency target set by the manufacturing company is 6.0, then the efficiency coefficient threshold is set to 6.0. Only efficiency combinations of tasks with an efficiency coefficient greater than or equal to 6.0 are marked as candidate efficiency combinations. High-efficiency solutions that meet production requirements are then selected from numerous efficiency combinations.

[0023] Based on the target task configuration information, we obtain the task configuration combination set of the data task to be configured, and the corresponding configuration combination coefficients of the task configuration combination set. Based on the configuration combination coefficients, we obtain the set of candidate configuration combinations, which specifically includes the following steps: Based on the target task configuration information, obtain the target configuration elements of the data task to be configured during the chip production process; Based on the processing capabilities of the basic efficiency units corresponding to each combination in the task efficiency combination set, the target configuration elements are hierarchically adapted, and the target configuration elements at different levels are combined according to the flow logic of chip production data to form a task configuration combination set. Based on the task execution constraints of the target task configuration information, the suitability of each target configuration element in the task configuration combination set is determined to obtain the determination result. Based on the judgment results, each target configuration element is assigned an adaptation weight. Based on the adaptation weight, the correlation adaptation degree between the task configuration combination set and the task efficiency combination set, the configuration combination coefficient corresponding to each task configuration combination set is generated. Determine the baseline adaptation standard for configuration combination coefficients based on the actual needs of task execution across the entire chip manufacturing chain; The set of task configuration combinations whose combination coefficients meet the baseline adaptation standard is selected to obtain the set of candidate configuration combinations.

[0024] First, based on the target task configuration information, clarify the target configuration elements of the data tasks to be configured during chip manufacturing. Target configuration elements include task type, data size, processing time limit, accuracy requirements, resource allocation strategy, and collaborative scheduling rules. For example, in the lithography stage, the target configuration elements for the data tasks to be configured include: task type is real-time data processing; data size is 1000 wafer inspection data points processed per cycle; processing time limit is 5 seconds; accuracy requirement is 99.99%; resource allocation strategy is to prioritize dedicated computing nodes; and collaborative scheduling rule is to stagger execution with etching stage tasks. This clearly defines the core configuration requirements of each data task to be configured.

[0025] Based on the processing capabilities of the basic efficiency units corresponding to each combination in the task efficiency combination set, the target configuration elements are hierarchically adapted. Then, the target configuration elements at different levels are combined according to the flow logic of chip production data, thus forming a task configuration combination set. The processing capability of a basic efficiency unit refers to its comprehensive performance in data generation rate, processing priority, and transmission stability. Different basic efficiency units correspond to different processing capability levels. For example, high-speed, high-priority basic efficiency units can support tasks with high real-time requirements, while medium-speed, medium-priority basic efficiency units are more suitable for handling routine data tasks. The hierarchical adaptation process matches the target configuration elements to the corresponding level of basic efficiency units according to their processing capability requirements. For example, a real-time task with a processing time limit of 5 seconds is adapted to a high-speed, high-priority basic efficiency unit, while a task with a large data volume but a more flexible processing time limit is adapted to a medium-speed, medium-priority basic efficiency unit. After completing the hierarchical adaptation, following the flow logic of chip production data, the target configuration elements at different levels are combined in an orderly manner. For example, according to the process sequence of wafer fabrication, photolithography, etching, and inspection, the adapted configuration elements of each stage are connected to form a task configuration combination set covering the entire process. In this way, multiple different task configuration sets are obtained, each set corresponding to a specific task configuration scheme, and matching the processing capacity of the basic efficiency unit in the task efficiency set.

[0026] Based on the task execution constraints in the target task configuration information, the suitability of each target configuration element within the task configuration set is determined, thus obtaining the determination result. Task execution constraints refer to the limiting rules that must be followed during task execution, including resource usage limits, time window limits, process compatibility requirements, and safety compliance standards. Determining the suitability assesses the degree of matching between the target configuration elements and the task execution constraints. Each target configuration element is checked one by one to see if it meets the constraints; for example, processing time limits are compared with time window limits, resource allocation strategies are compared with resource usage limits, and process parameters are compared with process compatibility requirements. Based on the comparison results, a suitability score is assigned to each configuration element.

[0027] After obtaining the fit and suitability assessment results, each target configuration element is assigned a fit and suitability weight based on these results. Combining the fit and suitability of the task configuration combination set and the task efficiency combination set, a configuration combination coefficient is generated for each task configuration combination set. The allocation of fit and suitability weights is based on the fit and suitability; the higher the fit and suitability of the target configuration element, the larger its corresponding fit and suitability weight value. For example, a configuration element with a fit and suitability of 0.9 has a fit and suitability weight of 0.9, and a configuration element with a fit and suitability of 0.6 has a fit and suitability weight of 0.6. The fit and suitability refers to the degree of matching between the task configuration combination set and the task efficiency combination set, reflecting the synergy between the configuration scheme and the efficiency scheme. For example, whether the processing time limit requirement in the task configuration combination set matches the processing speed of the basic efficiency unit in the task efficiency combination set, and whether the data scale requirement matches the processing capacity of the basic efficiency unit. The fit and suitability weights of each target configuration element in the task configuration combination set are multiplied by their corresponding fit and suitability, summed, and then divided by the number of configuration elements in the combination set. For example, a task configuration set contains four target configuration elements with adaptation weights of 0.9, 0.8, 0.7, and 0.6, and corresponding association adaptation degrees of 0.95, 0.9, 0.85, and 0.8, respectively. The configuration combination coefficient for this set is (0.9×0.95+0.8×0.9+0.7×0.85+0.6×0.8)÷4=0.6625. The overall adaptation level of each task configuration set is quantified as a configuration combination coefficient; the higher the coefficient value, the better the task configuration scheme of that set.

[0028] Based on the actual needs of task execution across the entire chip manufacturing chain, a baseline adaptation standard for configuration combination coefficients is determined. This baseline adaptation standard is the core basis for selecting high-quality task configuration combination sets, and its setting requires comprehensive consideration of multiple factors, including production efficiency, resource constraints, process requirements, and corporate strategic goals. For example, to ensure the stability and efficiency of end-to-end data processing, chip manufacturers may set a baseline adaptation standard of 0.7. Only task configuration combination sets with a configuration combination coefficient greater than or equal to 0.7 are considered high-quality solutions that meet actual needs. When determining the baseline adaptation standard, historical production data is referenced to determine the distribution of configuration combination coefficients for past high-quality task configuration solutions. This information is used as a reference for reasonable setting, ensuring that the baseline adaptation standard is both feasible and can effectively screen for high-quality configuration solutions.

[0029] The process involves filtering task configuration combinations whose coefficients meet a baseline adaptation standard, thus obtaining a candidate set of configuration combinations. The coefficients of all task configuration combinations are compared with the baseline adaptation standard, eliminating combinations with coefficients lower than the standard and retaining those with coefficients at or above the standard. For example, if the baseline adaptation standard is 0.7, and a task configuration combination has a coefficient of 0.75, that combination is included in the candidate set; if another combination has a coefficient of 0.65, it is excluded. This process accurately selects high-quality solutions from numerous task configuration combinations that meet both task execution constraints and are highly compatible with task efficiency combinations.

[0030] The target data task set is obtained by analyzing the set of efficiency combinations and the set of configuration combinations to be selected, specifically including the following steps: Construct an association mapping relationship between the set of candidate efficiency combinations and the set of candidate configuration combinations, and establish a corresponding association system based on the association mapping relationship and the adaptation dimensions between each combination; Based on the association system, determine the association constraints and adaptation conditions of the matching paths to which each set of candidate efficiency combinations and set of candidate configuration combinations belong; A preliminary set of matching combinations that satisfy the association constraints is obtained based on the adaptation conditions. The degree of coordination is obtained by performing a consistency check on the initial matching combination set, and the combination units that meet the preset requirements for the degree of coordination are retained. Hierarchical combination clusters are obtained by dividing the combination units according to their adaptation priority, and the combination clusters at each level are integrated in hierarchical order to form a continuous combination connection sequence. The combined sequence is integrated according to the execution weight to form the target data task set.

[0031] First, it is necessary to establish the association mapping relationship between the candidate efficiency combination set and the candidate configuration combination set. Based on this mapping relationship and the adaptation dimensions between each combination, a corresponding association system is established. The association mapping relationship clarifies the corresponding matching relationship between each candidate efficiency combination set and the candidate configuration combination set. The adaptation dimensions are key indicators used to measure the degree of matching between combinations, including processing capacity matching degree, resource consumption matching degree, process integration matching degree, and process compatibility. The performance of each candidate efficiency combination set and candidate configuration combination set in these adaptation dimensions is quantified to establish a complete corresponding association system. This system clearly shows the potential matching paths and degree of matching between each combination.

[0032] After establishing the correlation system, the correlation constraints and adaptation conditions of the matching paths to each candidate efficiency combination set and candidate configuration combination set are determined based on this system. Correlation constraints refer to the hard limitations that must be met when matching combinations. For example, if the resource utilization limit of a candidate efficiency combination set is 60%, then the resource requirements of the matching candidate configuration combination set cannot exceed this limit. Adaptation conditions are soft standards used to evaluate the quality of matching. For example, the processing capacity matching degree must reach 0.8 or higher, and the process integration matching degree must reach 0.75 or higher. These constraints and conditions are formulated based on the actual needs and process characteristics of chip manufacturing. For example, the tasks in the photolithography stage must be matched with high-speed processing efficiency combination sets, while the tasks in the inspection stage need to be matched with high-stability efficiency combination sets.

[0033] Based on the adaptation criteria, a preliminary set of matching combinations that meet the association constraints is obtained. The screening process compares each candidate efficiency combination set with a candidate configuration combination set according to the matching path in the association system. First, combinations that do not meet the association constraints are eliminated, such as those whose resource requirements exceed the upper limit of the efficiency combination set. Then, the remaining combinations are checked for adaptation criteria, and those that meet all adaptation criteria are included in the preliminary matching combination set. For example, if a candidate efficiency combination set and a candidate configuration combination set have a processing capacity matching degree of 0.85, a process connection matching degree of 0.8, a resource consumption matching degree of 0.9, and meet all association constraints, then this combination pair is included in the preliminary matching combination set. In this way, matching schemes that meet the basic requirements are selected from a large number of potential combination pairs.

[0034] After obtaining the initial matching set, a consistency check needs to be performed to determine the degree of collaboration, and the combination units that meet the preset requirements for collaboration are retained. The consistency check evaluates the collaborative performance of the efficiency combination and the configuration combination in the entire process, such as the continuity of data processing, the coordination of resource scheduling, and the smoothness of process flow. The scores for processing capacity matching, process flow matching, resource usage matching, and process compatibility are weighted and summed, with weights set to 0.3, 0.3, 0.2, and 0.2 respectively. For example, if the scores for the four dimensions of a combination pair are 0.85, 0.8, 0.9, and 0.85 respectively, then its collaboration degree is 0.845. The preset requirements are usually set based on production goals, such as a collaboration degree of 0.8 or higher. Only combination pairs that meet this requirement are retained as combination units.

[0035] The assembly process requires dividing the assembly units into hierarchical clusters based on their adaptation priority. These clusters are then integrated hierarchically to form a continuous assembly sequence. Adaptation priority is determined by factors such as the degree of synergy between the assembly units, their impact on production efficiency, and their criticality to the process. Assembly units with higher synergy and greater impact on production efficiency have higher adaptation priority. For example, the synergy of assembly units in the photolithography stage is 0.88, significantly impacting production efficiency, thus having the highest priority; while the synergy of assembly units in the inspection stage is 0.82, with a lower priority. Hierarchical clusters divide all assembly units into different levels according to their adaptation priority from highest to lowest. For instance, the highest priority assembly units form the first-level cluster, the next highest form the second-level cluster, and so on. When integrating these clusters to form the assembly sequence, the chip manufacturing process logic must be followed. The hierarchical clusters must be sequentially connected according to the order of wafer fabrication, photolithography, etching, and inspection to ensure the entire sequence covers the entire production chain and that the connections between each stage are smooth.

[0036] The combined connection sequence needs to be integrated to form the target data task set based on execution weights. Execution weights are allocated according to the importance of each combined unit in the entire process; for example, combined units in critical process steps have higher execution weights, while those in non-critical steps have relatively lower execution weights. The overall matching value is obtained by multiplying the degree of synergy of each combined unit in the combined connection sequence by its execution weight. Based on this overall matching value, the combined units are sorted and optimized, eliminating redundant combined units with low overall matching values ​​and retaining the core combined units to form the target data task set. For example, if the combined connection sequence contains 5 combined units with synergy levels of 0.88, 0.85, 0.82, 0.8, and 0.78, and execution weights of 0.25, 0.2, 0.2, 0.2, and 0.15, the overall matching value is 0.831.

[0037] The intelligent data management process derived from the target data task set includes the following steps: Set efficiency weights and configuration weights; Based on efficiency weights and configuration weights, we obtain the comprehensive evaluation coefficients corresponding to the candidate efficiency combination set and the candidate configuration combination set, and then obtain the target data task set based on the comprehensive evaluation coefficients. The data management process is formed by sorting the target data task set according to the degree of process relevance of the data tasks to be configured.

[0038] Efficiency and configuration weights are set. These weights are parameters used to measure the relative importance of candidate efficiency and configuration combinations in the overall evaluation. Their setting needs to be combined with the core objectives and practical constraints of chip manufacturing. The weights are not fixed but can be dynamically adjusted according to the needs of different production stages and process steps to ensure that the overall evaluation results always align with actual production conditions.

[0039] The comprehensive evaluation coefficients for the candidate efficiency combination set and the candidate configuration combination set are calculated based on efficiency weights and configuration weights. The target data task set is then determined based on these comprehensive evaluation coefficients. The comprehensive evaluation coefficient is obtained by multiplying the efficiency combination coefficient of the candidate efficiency combination set by its efficiency weight, and then adding the multiplication of the configuration combination coefficient of the candidate configuration combination set by its configuration weight. For example, if the efficiency combination coefficient of a candidate efficiency combination set is 6.04 and its efficiency weight is 0.6, and the corresponding configuration combination coefficient of the candidate configuration combination set is 0.75 and its configuration weight is 0.4, then the comprehensive evaluation coefficient for this combination pair is 6.04 × 0.6 + 0.75 × 0.4 = 3.624 + 0.3 = 3.924. This method weights and integrates the performance of both efficiency and configuration dimensions to obtain a numerical value reflecting the overall quality of the combination pair. All combination pairs are sorted from highest to lowest according to their comprehensive evaluation coefficients, and the combination pairs with the highest coefficient values ​​that meet production requirements are selected. The set of task units corresponding to these combination pairs constitutes the target data task set.

[0040] The data tasks to be configured within the target data task set are sorted according to their process relevance, thus forming an intelligent data management and control process. Process relevance refers to the degree of closeness between each data task to be configured and the chip manufacturing process. For example, data tasks in the lithography process are directly related to the lithography process, exhibiting extremely high process relevance; while equipment monitoring data tasks are indirectly related to multiple process stages, resulting in relatively low process relevance. The evaluation of process relevance can be quantified from multiple dimensions, including the process stage to which the task belongs, the data flow path, and the degree of impact on process accuracy. For instance, the core nature of the process stage, the directness of the data flow path, and the weight of the impact on process accuracy can be set to 0.4, 0.3, and 0.3 respectively. Each task is then scored to obtain a comprehensive score for process relevance. During sorting, tasks with high process relevance are placed first, and tasks with low process relevance are placed later, following the logic of the chip manufacturing process flow. For example, the task units in the target data task set are sequentially connected according to the order of wafer fabrication, lithography, etching, thin film deposition, inspection, and packaging. This forms an intelligent data management and control process that can match the process characteristics of chip manufacturing, ensuring that data processing and task execution always revolve around the core process links, and achieving efficient and orderly management and control of data across the entire chain.

[0041] When managing and processing data across the entire chip manufacturing chain according to the intelligent data management and control process, the node processing monitoring parameters of the chip manufacturing data at the data processing nodes are obtained, specifically including the following steps: The intelligent data management and control process is deployed to the industrial control terminal, and the data of the entire chip production chain is processed according to the intelligent data management and control process of the industrial control terminal. Processing feedback parameters are obtained from chip production data acquired by the industrial control terminal; these processing feedback parameters include chip production data feedback parameters and process execution feedback parameters. Obtain the node feedback status of chip production data at the data processing node based on chip production data feedback parameters; obtain the node process feedback status of chip production data at the data processing node based on process execution feedback parameters; The node feedback status and the node process feedback status constitute the actual execution status of the node. The actual execution status of the node is marked as the node processing monitoring parameter of chip production data in the data processing node.

[0042] Deploying intelligent data management and control processes to industrial control terminals enables standardized and automated processing of data across the entire chip manufacturing chain, in accordance with these processes. The industrial control terminal, the core hardware carrier of these processes, directly interfaces with various devices, sensors, and data acquisition systems on the chip production line, enabling real-time data acquisition, transmission, and processing. Data across the entire chip manufacturing chain flows systematically under the scheduling of the industrial control terminal, following a pre-defined node sequence and processing rules. For example, wafer inspection data generated during the lithography process is automatically transmitted to the corresponding data processing node for cleaning, analysis, and storage, ensuring that the data processing consistently adheres to the requirements of the intelligent management and control process.

[0043] During data processing, feedback parameters for chip production data need to be obtained from the industrial control terminal. These feedback parameters are mainly divided into chip production data feedback parameters and process execution feedback parameters. Chip production data feedback parameters refer to the status indicators generated during data processing, such as data integrity, accuracy, transmission latency, and loss rate. For example, when a data processing node processes lithography inspection data, the feedback parameters show data integrity of 99.9% and transmission latency of 20 milliseconds. Process execution feedback parameters refer to the execution status indicators of the control process itself, such as node processing time, resource utilization, whether process jumps are normal, and whether abnormal interruptions occur. For example, the processing time of this node is 150 milliseconds, CPU resource utilization is 45%, and there are no abnormal interruptions in process execution. Real-time acquisition and aggregation through the industrial control terminal allows for a comprehensive understanding of both data processing and process execution status, providing fundamental data for status assessment.

[0044] The node feedback status of chip production data at the data processing node is obtained based on chip production data feedback parameters, and the node process feedback status of chip production data at the data processing node is obtained based on process execution feedback parameters. The node feedback status is a comprehensive judgment of the processing quality of the data itself. For example, when data integrity reaches 99.9% and transmission latency is less than 50 milliseconds, the node feedback status is judged as excellent; if data integrity is less than 99% and transmission latency exceeds 100 milliseconds, the node feedback status is judged as abnormal. The node process feedback status is a comprehensive judgment of the compliance of process execution. For example, when node processing time is within a preset threshold, resource utilization does not exceed the upper limit, and process jumps normally, the node process feedback status is judged as normal; if processing time exceeds the limit, resource utilization is too high, or the process is interrupted, the node process feedback status is judged as abnormal. By analyzing and judging these two types of feedback parameters one by one, the respective states of data quality and process execution can be distinguished.

[0045] Node feedback status and node process feedback status together constitute the actual execution status of a node. This actual execution status is marked as a node processing monitoring parameter for chip production data at the data processing node. The actual execution status of a node comprehensively reflects the operation of the data processing node, including both the quality results of data processing and the performance of the process execution. For example, if the node feedback status of a data processing node is excellent and the node process feedback status is normal, then its actual execution status is excellent and normal, and the corresponding node processing monitoring parameter is marked as excellent and normal. If both the node feedback status and the node process feedback status are abnormal, then the actual execution status of the node is doubly abnormal, and the monitoring parameter is marked as abnormal accordingly. By using the actual execution status of nodes as monitoring parameters, a basis can be provided for subsequent node processing status judgment, evaluation value calculation, and process efficiency output, ensuring the transparency and traceability of the intelligent data management process.

[0046] The node processing monitoring parameters are analyzed in conjunction with the corresponding node processing standard parameters of the data processing node to determine the node processing status of chip production data at the data processing node. This includes the following steps: Compare the actual execution status of the node with the standard execution parameters of the node; If the deviation between the actual execution status of the node and the standard execution parameters of the node is within the preset threshold range, then the node processing status of the chip production data in the data processing node is judged to be normal. If the deviation between the actual execution status of a node and the standard execution parameters of the node exceeds a preset threshold range, the node processing status of the chip production data in the data processing node is determined to be abnormal.

[0047] The actual execution status of a node is compared with its standard execution parameters. The actual execution status is obtained from node processing monitoring parameters collected by the industrial control terminal, which comprehensively reflects the data processing quality and process execution. The standard execution parameters are ideal state indicators pre-set when constructing an intelligent data management and control process. The absolute values ​​of the differences between each sub-parameter in the actual execution status and its corresponding standard parameter are weighted and summed. The weights are set according to the importance of each sub-parameter. For example, data integrity has a weight of 0.4, processing time has a weight of 0.3, resource utilization has a weight of 0.2, and process jump success rate has a weight of 0.1. For example, the standard execution parameters for a data processing node are 99.9% data integrity, 150 milliseconds processing time, 50% resource utilization, and 100% process jump success rate. However, the actual execution status is 99.8% data integrity, 160 milliseconds processing time, 48% resource utilization, and 100% process jump success rate. The deviation value is |99.8-99.9|×0.4+|160-150|×0.3+|48-50|×0.2+|100-100|×0.1=3.44.

[0048] The deviation value is compared with a preset threshold range to determine the node processing status. The preset threshold range is determined based on the chip manufacturing precision requirements, process stability targets, and historical data statistics, representing the acceptable deviation range for node operation. For example, the preset threshold is set to a deviation value not exceeding 5. If the deviation value between the actual execution status of the node and the node's standard execution parameters is within the preset threshold range, then the node processing status of the chip production data at the data processing node is determined to be normal.

[0049] If the deviation between the actual execution status of a node and its standard execution parameters exceeds a preset threshold, the node processing status of the chip production data at the data processing node is determined to be abnormal. For example, if a node's actual execution status is 98% data integrity, 200 milliseconds processing time, 70% resource utilization, and 95% process jump success rate, then the deviation is |98-99.9|×0.4+|200-150|×0.3+|70-50|×0.2+|95-100|×0.1=20.26. This value is greater than the preset threshold of 5, therefore the node processing status is determined to be abnormal. The occurrence of an abnormal status indicates a problem with data processing quality or process execution, requiring timely triggering of an early warning mechanism to notify relevant personnel for investigation and handling.

[0050] The node evaluation value of chip production data at the data processing node is obtained based on the node processing status; the process evaluation value of chip production data in the intelligent data management process is obtained based on the node evaluation value; and the process management efficiency of chip production data in the intelligent data management process is output based on the process evaluation value, specifically including the following steps: The operational status of data processing nodes is distinguished based on their processing status. The compliance level and adaptability of node processing are determined based on the operational status. Initial node evaluation values ​​are generated based on the synergistic performance of compliance level and adaptability. The node evaluation value is obtained by adjusting the initial node evaluation value based on the processing load of the data processing node and the smoothness of data flow. Based on the connection relationship between data processing nodes, determine the degree of mutual influence of the evaluation values ​​of each node, and classify and integrate the evaluation values ​​of all nodes according to the degree of mutual influence to generate the initial value of process evaluation. Based on the state stability of each data processing node and the continuity and consistency of data processing, the initial value of the process evaluation is corrected to obtain the process evaluation value. Based on the process evaluation values, the control compliance status of the intelligent data management process is determined. Based on the control compliance status, the target direction of performance output is determined. Based on the target direction, the performance feedback content of the process operation is integrated. Among them, the performance feedback content includes node performance and process connection effect. The process evaluation values ​​and performance feedback are linked and integrated to form the process control performance.

[0051] The operational status of data processing nodes is distinguished based on their processing status. The compliance level and adaptability of node processing are determined by combining these operational statuses. An initial node evaluation value is then generated based on the synergistic performance of compliance and adaptability. Node processing status includes normal and abnormal states. Operational status is a comprehensive trend judgment of the node's processing status over a period of time. Compliance level refers to the degree to which the node's processing conforms to preset standards, which can be quantified by the frequency of normal states; for example, a 95% normal state rate results in a compliance level of 0.95. Adaptability refers to the degree to which the node's processing capabilities match the current data task, quantified by the ratio of processing efficiency to task requirements; for example, a processing efficiency reaching 110% of the task requirements results in an adaptability value of 1.1. The compliance level and adaptability are multiplied and then normalized. For example, if the compliance level is 0.95 and the adaptability is 1.1, the initial node evaluation value is 0.95 × 1.1 = 1.045. This value is then converted to a value between 0 and 1 using a normalization formula, such as 1.045 ÷ 1.2 = 0.8708, and this is used as the initial node evaluation value.

[0052] The node evaluation value is obtained by adjusting the initial node evaluation value based on the processing load and data flow smoothness of the data processing node. Processing load refers to the proportion of computing, storage, and other resources currently occupied by the node. For example, a processing load of 70% will affect node performance if the load is too high, requiring a reduction in the evaluation value. Data flow smoothness refers to the efficiency of data transmission within and between nodes, quantified by data latency and congestion. For example, a flow smoothness of 0.9 will reduce the evaluation value if congestion occurs. The node evaluation value is calculated as: Initial node evaluation value × (1 - Processing load adjustment coefficient) × Data flow smoothness. The processing load adjustment coefficient is set according to the load ratio; for example, it is 0.1 when the processing load exceeds 60%, and 0 otherwise. For example, if the initial node evaluation value is 0.8708, the processing load is 70%, the processing load adjustment coefficient is 0.1, and the data flow smoothness is 0.9, then the node evaluation value is 0.8708 × (1 - 0.1) × 0.9 = 0.7053.

[0053] After obtaining the evaluation values ​​of each node, the degree of mutual influence of each node's evaluation value is determined based on the connection relationship between data processing nodes. Then, the degree of mutual influence is used to categorize and integrate all node evaluation values ​​to generate the initial value for process evaluation. The connection relationship between nodes refers to the sequence and dependency of nodes in the process. For example, the evaluation value of the lithography node directly affects the processing effect of the subsequent etching node, thus the degree of mutual influence is high. The degree of mutual influence can be represented by a weight matrix between nodes. For example, the influence weight of the lithography node on the etching node is 0.3, and the influence weight on the detection node is 0.2. The initial value for process evaluation = Σ(node ​​evaluation value × the influence weight of that node on the entire process). For example, if the process includes lithography, etching, and detection nodes with evaluation values ​​of 0.7053, 0.6821, and 0.7234 respectively, and influence weights of 0.4, 0.3, and 0.3 respectively, then the initial value for process evaluation = 0.7053 × 0.4 + 0.6821 × 0.3 + 0.7234 × 0.3 = 0.7037.

[0054] Based on the state stability and continuous consistency of data processing at each data processing node, the initial value of the process evaluation is adjusted to obtain the process evaluation value. State stability refers to the degree of fluctuation in the processing state of a node over a period of time; the smaller the fluctuation, the higher the stability, which is quantified by the continuous duration of normal state. Continuous consistency refers to the continuity of data throughout the entire process, which is quantified by the consistency ratio of data format and precision between nodes. Process evaluation value = Initial value of process evaluation × State stability coefficient × Continuous consistency coefficient. For example, if the state stability coefficient is 0.95 and the continuous consistency coefficient is 0.98, then the process evaluation value = 0.7037 × 0.95 × 0.98 = 0.7037 × 0.931 = 0.6551.

[0055] The compliance status of the intelligent data management process is determined based on the process evaluation values. Based on this compliance, the target direction for performance output is established. Finally, performance feedback from the process operation is integrated based on the target direction. This feedback includes node performance and process connectivity. Compliance is determined by comparing the process evaluation values ​​with preset compliance thresholds. For example, if the threshold is 0.6 and the evaluation value is 0.6551, it is considered compliant; otherwise, it is considered non-compliant. If compliant, the performance output target is optimization and improvement, focusing on further enhancing node stability and process continuity. If non-compliant, the target is rectification and repair, focusing on identifying abnormal nodes and connectivity issues. The integration of performance feedback involves summarizing the evaluation values, processing status, load conditions, node performance, and the efficiency of inter-node connections, data flow, and process connectivity effects of each node to form a comprehensive feedback report.

[0056] The process control effectiveness is formed by linking and integrating process evaluation values ​​with performance feedback. The core of this integration is to combine quantitative process evaluation values ​​with qualitative performance feedback. For example, if the process evaluation value is 0.6551, which meets the standard and is at a slightly above-average level, and the performance feedback shows that the lithography node has a high load and the etching and inspection nodes are smoothly connected, then the process control effectiveness is defined as meeting the standard but having room for local optimization, and the lithography node is clearly identified as the key area for optimization.

[0057] An intelligent data management system for chip manufacturing includes: Acquisition module: Acquires target data processing efficiency and target task configuration information during the chip manufacturing process; Processing module: Processes and analyzes the target data processing efficiency and target task configuration information to obtain the target data task set; Components: The intelligent data management process is derived from the target data task set; the intelligent data management process includes data processing nodes and the node processing standard parameters corresponding to the data processing nodes. Analysis module: When managing and processing data across the entire chip production chain according to the intelligent data management and control process, it acquires the node processing monitoring parameters of chip production data at the data processing nodes; it analyzes the node processing monitoring parameters with the corresponding node processing standard parameters of the data processing nodes to determine the node processing status of chip production data at the data processing nodes. Output module: Obtains the node evaluation value of chip production data at the data processing node based on the node processing status; obtains the process evaluation value of chip production data in the intelligent data management process based on the node evaluation value; outputs the process management efficiency of chip production data in the intelligent data management process based on the process evaluation value.

[0058] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0059] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0060] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An intelligent data management method for chip manufacturing, characterized in that, The method includes the following steps: Collect target data processing efficiency and target task configuration information during the chip manufacturing process; The target data task set is obtained by processing and analyzing the target data processing efficiency and target task configuration information; An intelligent data management process is derived based on the target data task set; wherein, the intelligent data management process includes data processing nodes and node processing standard parameters corresponding to the data processing nodes; When managing and processing the entire chip production chain data according to the intelligent data management and control process, the node processing monitoring parameters of the chip production data at the data processing node are obtained; the node processing monitoring parameters are analyzed with the corresponding node processing standard parameters of the data processing node to determine the node processing status of the chip production data at the data processing node. The node evaluation value of chip production data at the data processing node is obtained based on the node processing status; the process evaluation value of chip production data in the intelligent data management process is obtained based on the node evaluation value; and the process management efficiency of chip production data in the intelligent data management process is output based on the process evaluation value.

2. The intelligent data management method for chip manufacturing according to claim 1, characterized in that, The target data task set is obtained by processing and analyzing the target data processing efficiency and target task configuration information, specifically including the following steps: Based on the target data processing efficiency, we obtain the set of task efficiency combinations for the data tasks to be configured, and the efficiency combination coefficients corresponding to the set of task efficiency combinations. Based on the efficiency combination coefficients, we obtain the set of candidate efficiency combinations. Based on the target task configuration information, obtain the task configuration combination set of the data task to be configured, and the configuration combination coefficient corresponding to the task configuration combination set; and obtain the candidate configuration combination set based on the configuration combination coefficient. The target data task set is obtained by analyzing the set of efficiency combinations and the set of configuration combinations to be selected.

3. The intelligent data management method for chip manufacturing according to claim 2, characterized in that, Based on the target data processing efficiency, we obtain the set of task efficiency combinations for the data tasks to be configured, and the corresponding efficiency combination coefficients for the task efficiency combinations. Based on the efficiency combination coefficients, we obtain the set of candidate efficiency combinations, which specifically includes the following steps: Based on the target data processing efficiency, analyze the urgency of actual data processing needs and data integrity requirements in each stage of chip production; The basic efficiency unit is derived based on the data generation rate, data processing priority, and data transmission stability. Different basic efficiency units are combined according to the sequence of chip manufacturing process to obtain a task efficiency combination set; Based on the urgency of actual data processing needs and data integrity requirements at each stage of chip production, the basic efficiency units of the task efficiency combination set are weighted to obtain the weight allocation result. Based on the weight allocation results, obtain the efficiency combination coefficients corresponding to the task efficiency combination set; The set of task efficiency combinations whose efficiency combination coefficients reach the preset efficiency combination coefficient threshold is marked as the set of candidate efficiency combinations.

4. The intelligent data management method for chip manufacturing according to claim 3, characterized in that, Based on the target task configuration information, we obtain the task configuration combination set of the data task to be configured, and the corresponding configuration combination coefficients of the task configuration combination set. Based on the configuration combination coefficients, we obtain the set of candidate configuration combinations, which specifically includes the following steps: Based on the target task configuration information, obtain the target configuration elements of the data task to be configured during the chip production process; Based on the processing capabilities of the basic efficiency units corresponding to each combination in the task efficiency combination set, the target configuration elements are hierarchically adapted, and the target configuration elements at different levels are combined according to the flow logic of chip production data to form a task configuration combination set. Based on the task execution constraints of the target task configuration information, the suitability of each target configuration element in the task configuration combination set is determined to obtain the determination result. Based on the judgment results, each target configuration element is assigned an adaptation weight. Based on the adaptation weight, the correlation adaptation degree between the task configuration combination set and the task efficiency combination set, the configuration combination coefficient corresponding to each task configuration combination set is generated. Determine the baseline adaptation standard for configuration combination coefficients based on the actual needs of task execution across the entire chip manufacturing chain; The set of task configuration combinations whose combination coefficients meet the baseline adaptation standard is selected to obtain the set of candidate configuration combinations.

5. The intelligent data management method for chip manufacturing according to claim 4, characterized in that, The target data task set is obtained by analyzing the set of efficiency combinations and the set of configuration combinations to be selected, specifically including the following steps: Construct an association mapping relationship between the set of candidate efficiency combinations and the set of candidate configuration combinations, and establish a corresponding association system based on the association mapping relationship and the adaptation dimensions between each combination; Based on the association system, determine the association constraints and adaptation conditions of the matching paths to which each set of candidate efficiency combinations and set of candidate configuration combinations belong; A preliminary set of matching combinations that satisfy the association constraints is obtained based on the adaptation conditions. The degree of coordination is obtained by performing a consistency check on the initial matching combination set, and the combination units that meet the preset requirements for the degree of coordination are retained. Hierarchical combination clusters are obtained by dividing the combination units according to their adaptation priority, and the combination clusters at each level are integrated in hierarchical order to form a continuous combination connection sequence. The combined sequence is integrated according to the execution weight to form the target data task set.

6. The intelligent data management method for chip manufacturing according to claim 1, characterized in that, The intelligent data management process derived from the target data task set includes the following steps: Set efficiency weights and configuration weights; Based on efficiency weights and configuration weights, we obtain the comprehensive evaluation coefficients corresponding to the candidate efficiency combination set and the candidate configuration combination set, and then obtain the target data task set based on the comprehensive evaluation coefficients. The data management process is formed by sorting the target data task set according to the degree of process relevance of the data tasks to be configured.

7. The intelligent data management method for chip manufacturing according to claim 6, characterized in that, When managing and processing data across the entire chip manufacturing chain according to the intelligent data management and control process, the node processing monitoring parameters of the chip manufacturing data at the data processing nodes are obtained, specifically including the following steps: The intelligent data management and control process is deployed to the industrial control terminal, and the data of the entire chip production chain is processed according to the intelligent data management and control process of the industrial control terminal. Processing feedback parameters are obtained from chip production data acquired by the industrial control terminal; wherein, the processing feedback parameters include chip production data feedback parameters and process execution feedback parameters; Obtain the node feedback status of chip production data at the data processing node based on chip production data feedback parameters; obtain the node process feedback status of chip production data at the data processing node based on process execution feedback parameters; The node feedback status and the node process feedback status constitute the actual execution status of the node. The actual execution status of the node is marked as the node processing monitoring parameter of chip production data in the data processing node.

8. The intelligent data management method for chip manufacturing according to claim 7, characterized in that, The node processing monitoring parameters are analyzed in conjunction with the corresponding node processing standard parameters of the data processing node to determine the node processing status of chip production data at the data processing node. This includes the following steps: Compare the actual execution status of the node with the standard execution parameters of the node; If the deviation between the actual execution status of the node and the standard execution parameters of the node is within the preset threshold range, then the node processing status of the chip production data in the data processing node is judged to be normal. If the deviation between the actual execution status of a node and the standard execution parameters of the node exceeds a preset threshold range, the node processing status of the chip production data in the data processing node is determined to be abnormal.

9. The intelligent data management method for chip manufacturing according to claim 8, characterized in that, The node evaluation value of chip production data at the data processing node is obtained based on the node processing status; the process evaluation value of chip production data in the intelligent data management process is obtained based on the node evaluation value; and the process management efficiency of chip production data in the intelligent data management process is output based on the process evaluation value, specifically including the following steps: The operational status of data processing nodes is distinguished based on their processing status. The compliance level and adaptability of node processing are determined based on the operational status. Initial node evaluation values ​​are generated based on the synergistic performance of compliance level and adaptability. The node evaluation value is obtained by adjusting the initial node evaluation value based on the processing load of the data processing node and the smoothness of data flow. Based on the connection relationship between data processing nodes, determine the degree of mutual influence of the evaluation values ​​of each node, and classify and integrate the evaluation values ​​of all nodes according to the degree of mutual influence to generate the initial value of process evaluation. Based on the state stability of each data processing node and the continuity and consistency of data processing, the initial value of the process evaluation is corrected to obtain the process evaluation value. The intelligent data management process is evaluated based on process assessment values ​​to determine its compliance status. Based on compliance status, the target direction for performance output is determined. Based on the target direction, the performance feedback content of the process operation is integrated. The performance feedback content includes node performance and process connection effectiveness. The process evaluation values ​​and performance feedback are linked and integrated to form the process control performance.

10. An intelligent data management system for chip manufacturing, applied to the intelligent data management method for chip manufacturing as described in any one of claims 1 to 9, characterized in that, include: Acquisition module: Acquires target data processing efficiency and target task configuration information during the chip manufacturing process; Processing module: Processes and analyzes the target data processing efficiency and target task configuration information to obtain the target data task set; Components: An intelligent data management process is obtained based on the target data task set; wherein, the intelligent data management process includes data processing nodes and node processing standard parameters corresponding to the data processing nodes; Analysis module: When managing and processing data across the entire chip production chain according to the intelligent data management and control process, it acquires the node processing monitoring parameters of chip production data at the data processing nodes; it analyzes the node processing monitoring parameters with the corresponding node processing standard parameters of the data processing nodes to determine the node processing status of chip production data at the data processing nodes. Output module: Obtains the node evaluation value of chip production data at the data processing node based on the node processing status; obtains the process evaluation value of chip production data in the intelligent data management process based on the node evaluation value; outputs the process management efficiency of chip production data in the intelligent data management process based on the process evaluation value.

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