Micro display direct drive physical synchronization architecture and method based on optical decompression signal

Abstract

This invention provides a microdisplay direct-drive physical synchronization architecture and method based on optically decompressed signals. The architecture receives coherent optical signals carrying compressed display information and expands them into multiple parallel photon streams or split-beam optical pulses at the physical layer; establishes end-to-end physical synchronization; and then distributes the multiple optical signals to the target display unit according to geometric consistency, directly participating in energy level transitions, mechanical deflection, optical modulation, or conduction control of the display medium. The method includes receiving compressed coherent optical signals, performing physical layer decompression, extracting and locking the optical clock, performing spatial mapping, selecting direct-drive or optically triggered gating paths, performing asynchronous compensation, performing power equalization, performing coherent noise reduction, outputting display results, and performing feedback calibration. This scheme reduces the dependence on power consumption, latency, and wiring complexity of traditional step-by-step electronic drive links, and is suitable for retinal-level near-eye displays, space internet display terminals, and low electromagnetic interference display scenarios.

Description

Technical Field

[0001] This invention relates to the fields of microdisplay technology, silicon-based photonics technology, near-eye display technology, optical signal processing technology, physical synchronization control technology, and spatial display system technology, specifically to a microdisplay direct-drive physical synchronization architecture and method based on optical decompression signals. Background Technology

[0002] With the development of technologies related to near-eye displays, mixed reality, spatial computing, and the spatial internet, display terminals are gradually evolving from traditional two-dimensional screen outputs to high-density micro-display systems oriented towards real-space overlay, highly dynamic interaction, and immersive perception. In this evolution, terminal devices not only need to provide image output capabilities with higher pixel density, higher refresh rates, and lower latency, but also need to achieve rapid responses to user head movements, environmental changes, and interactive inputs within limited volume, power consumption, and heat dissipation conditions. Especially under retinal-level display conditions, monocular display systems often need to handle multiple tasks such as ultra-high resolution, high-frequency refresh rates, and dynamic viewing angle compensation. For display devices targeting mixed reality, the spatial internet, and next-generation near-eye terminals, display architecture is no longer just an image output issue, but has become a core underlying issue affecting overall power consumption, wearing comfort, motion synchronization, spatial alignment accuracy, and system-level industrial design.

[0003] Meanwhile, display terminals in spatial internet scenarios also require display systems to form high-frequency coupling with modules such as positioning, sensing, interaction, and environmental feedback. For example, under conditions of rapid head rotation, changes in line of sight, changes in ambient light, or real-time updates of spatial positioning data, the display system must complete image output and spatial alignment in a very short time. If there is high latency, jitter, or heat dissipation in the system link, it will lead to image drift, misalignment of virtual and real objects, increased dizziness, and even affect the wearability and long-term stable operation of the device. Therefore, the next generation of micro-display systems for retina-level displays and spatial internet scenarios urgently needs to break through the limitations of traditional electrically driven display architectures in terms of power consumption, latency, size, synchronization accuracy, and physical scalability, and establish a new underlying implementation path that can directly complete high-density display driving and synchronization control at the physical layer.

[0004] Existing microdisplay systems, near-eye display systems, and related display terminals generally employ display chains centered on electronic drives. These chains typically include multiple processing stages such as data input, main control chip decoding, buffer scheduling, digital-to-analog conversion, row and column driving, pixel control, and final emission or modulation. Even if optical signals are used for data transmission in the upstream chain, the input data must still be converted into electrical signals at the display end, and then pixel addressing and display control are completed step-by-step by the main control chip, driver chip, or thin-film transistor array. Specifically, a typical driving mode in existing technologies usually includes the following processing path: first, image data or display instructions are received from an external input terminal; then, the main control chip decodes, buffers, and allocates timing for the data; next, a digital-to-analog conversion module generates a driving voltage or current adapted to the display unit; then, through row and column scanning, driver transistor control, or local control circuitry, the corresponding electrical driving signals are applied to the target pixel; finally, the pixel unit achieves emission, transmittance changes, reflectance changes, or other optical state changes. The essential characteristic of this mode is that the final state change of the display medium still depends on the step-by-step transmission and control of electrical signals through the electrical signal chain. In other words, in existing technologies, light primarily serves communication or transmission functions rather than directly driving changes in the physical state of the display. The core control of the display system still relies on the electronic logic layer, clock layer, and driver layer, causing the entire architecture to become increasingly dependent on the main control computing power, driver circuits, clock system, and heat dissipation structure under high resolution and high refresh rate conditions.

[0005] The core bottlenecks of traditional electric drive architectures include:

[0006] 1. Energy Consumption Bottleneck: Traditional electrically driven display architectures typically involve multiple stages during operation, including photoelectric conversion, logic decoding, buffer scheduling, digital-to-analog conversion, drive amplification, and pixel voltage or current loading. During this process, a significant amount of energy is not directly used to produce the desired display effect.

[0007] Instead, the power consumption is in electrical signal conversion, timing control, logic calculation, drive switching losses, and heat dissipation. Especially under high resolution conditions, as the number of pixels and refresh rate increase, CMOS switching losses, drive transistor losses, and wiring charging and discharging losses will increase significantly, leading to a rapid increase in the total system power consumption.

[0008] For retinal-level near-eye display devices, the limited size of the terminal, short heat dissipation path, and high sensitivity to surface temperature rise during wear make them highly susceptible to various factors. As the heat dissipation density per unit area continues to increase, the device not only faces a power deficit but may also approach or exceed the safety limits for human wear, thus restricting the continuous operation of high-resolution, high-refresh-rate display systems. In other words, the traditional architecture's "signal processing link" and "display execution link," heavily reliant on electrical control, have gradually become the main sources of heat dissipation and insufficient energy utilization.

[0009] 2. Latency Bottleneck: Each processing step in the traditional electrically driven display chain introduces additional latency, including data decoding latency, buffer scheduling latency, digital-to-analog conversion latency, row and column scanning latency, pixel response latency, and cross-module synchronization latency. In high-frequency dynamic display scenarios, these latencys accumulate to form system-level motion-to-image latency. When the user's head rotates rapidly, their line of sight changes, or spatial positioning information is updated at high speed, if the display system cannot complete the image update and alignment in a sufficiently short time, it is easy to produce virtual-real drift, edge ghosting, screen tearing, and dizziness.

[0010] Especially for mixed reality and spatial internet terminals, the display system does not operate independently; its output needs to be frequently coupled with spatial positioning, inertial measurement, visual perception, and environmental interaction data. If the latency in the display link becomes too long, the system struggles to achieve sub-pixel alignment with retina-level precision, and users can clearly perceive image drift or misalignment. Existing display architectures relying on electronic logic control are increasingly finding it difficult to simultaneously meet the dual requirements of high refresh rates and low motion latency under high dynamic and high-resolution conditions.

[0011] 3. Size and Wiring Bottlenecks: Traditional electrically driven display systems typically require a main control chip, driver chip, row and column control network, power supply network, clock module, buffer module, and corresponding heat dissipation units. As pixel size and control complexity increase, the related driving circuits, interconnect wiring, and power management structures also increase. This not only occupies a significant amount of system space but also significantly limits the miniaturization, integration, and lightweight design of the terminal.

[0012] For near-eye display devices, eyeglass-type terminals, and other micro-display terminals, the limited space in the temples, behind the lenses, and in terms of local thermal management capabilities makes the traditional approach of "high-performance main control + high-complexity driver + high-density wiring" increasingly unsuitable for next-generation ultra-lightweight devices. Especially under high-resolution conditions, more pixels usually mean more control lines, higher driver complexity, and stronger heat dissipation requirements, which limits the overall structural design and even conversely restricts the upper limit of display performance.

[0013] 4. Physical Limits of Traditional Architectures under Retina-Level Display Conditions: When display systems reach retina-level conditions with ultra-high pixel counts, high refresh rates, and low latency compensation per eye, the problems faced by traditional electrically driven architectures are no longer just engineering optimization issues, but gradually exhibit obvious physical boundary constraints.

[0014] At the thermodynamic level, as the total number of pixels and refresh rate increase, the switching losses, wiring losses, and multi-stage conversion losses in the drive chain lead to a rapid increase in the system's heat dissipation density per unit area. For terminals worn close to the human face, the heat dissipation area and heat dissipation path are strictly limited, so this type of architecture can easily approach the upper limit of temperature rise that the human body can tolerate during continuous operation.

[0015] At the clock synchronization level, traditional electronic clock systems suffer from problems such as jitter, crosstalk, and electromagnetic interference. As display refresh rates continue to increase and the system needs to synchronize with modules such as spatial positioning and inertial compensation at high frequencies, electronic clock systems inevitably introduce timing errors, thereby affecting the physical alignment accuracy of dynamic images.

[0016] At the bus and wiring level, as the number of pixels expands to extremely high levels, the electrical interconnect networks upon which pixel-by-pixel addressing, column-by-column driving, and hierarchical scheduling rely will face combined limitations in bandwidth, interconnect length, parasitic parameters, and wiring density. Even with mitigation through higher-performance controllers and more complex packaging processes, it is difficult to fundamentally change their strong dependence on electrical logic and electrical drive links.

[0017] Therefore, under retina-level display conditions, traditional electric drive architectures face thermal boundaries, timing boundaries, interconnect boundaries, and packaging boundaries simultaneously, which significantly restricts their scalability, wearability, and physical sustainability.

[0018] 5. Limitations of Existing Optoelectronic Display Solutions: Although some existing display solutions have introduced optical communication, optical interconnection, or optical transmission methods into transmission links, backplane links, or module interconnections, they are still essentially based on the overall architecture of "optical transmission and electrical drive." In other words, optical signals mainly play the role of information transmission in these systems. Once they enter the display end, they still need to undergo photoelectric conversion and then be processed step by step by the electronic logic layer, driving layer, and pixel control layer.

[0019] This means that although the existing solution uses light in some links, it does not truly achieve "direct driving of display physical state changes by optical decompression signals". The final state of the display medium is still controlled by voltage, current, TFT switches or other electronic driving units. Light does not become a direct physical triggering factor that determines pixel energy level transitions, mechanical deflections, optical modulation or conduction states.

[0020] Therefore, existing optoelectronic display solutions cannot fundamentally solve the problems of high heat loss, high latency, high wiring complexity and high synchronization pressure in traditional electric drive architectures, nor can they establish an integrated end-to-end physical synchronization architecture that covers decompression, synchronization, distribution, coupling, compensation and feedback.

[0021] Historical reasons why the 6-axis direct-drive path has not become mainstream in the past:

[0022] 6.1 Insufficient Materials and Process Conditions: In the early stages, there was a lack of mature heterogeneous integration processes between micro-display devices and silicon-based photonic waveguide systems, making it difficult to achieve high-precision, high-density, and low-loss coupling between display materials and optical waveguide materials on-chip. Micro-LEDs, LBS micromirrors, liquid crystal polymers, and other micro-display materials have long been developed along their own independent process routes, while silicon-based photonic devices mainly serve communication, modulation, and on-chip optical interconnect scenarios. There is a lack of a unified process foundation directly facing the display execution layer between the two.

[0023] Under these conditions, even if there is a concept of using optical signals to directly drive the display, it is difficult to achieve physical closure between waveguides, pixels, modulation units, and synchronization structures at the wafer, nanometer, and high yield levels.

[0024] 6.2 The display industry has long relied on electronic drives and computing power compensation: For a long time, the mainstream evolution path of the display industry has been to improve display performance through higher-performance main control chips, more powerful GPUs, more complex drive architectures, and more refined software compensation mechanisms. This path remains feasible as long as resolution, refresh rate, and real-time interaction requirements have not yet approached physical limits. Therefore, the industry tends to continue using the traditional technical route of "enhancing computing power—enhancing drives—enhancing algorithms," rather than reconstructing the physical architecture of display drives from the ground up.

[0025] In this historical context, optical signals were more often regarded as a means of communication than a means of directly driving the display of physical states. The "direct optical drive" path did not become mainstream, mainly due to industry path dependence rather than because it was inherently infeasible in principle.

[0026] 6.3 Recent Technological Changes: With the development of silicon-based photonics, micro-display technology, two-dimensional materials, on-chip heterogeneous integration, and high-precision packaging processes, several key conditions that previously constrained the realization of direct optical drive are changing. High-density waveguide structures, more mature Micro-LED array processes, smaller optical modulation devices, and more advanced packaging technologies have made it possible for optical signals to directly participate in the control of the display execution layer.

[0027] At the same time, as the demands for display resolution, refresh rate and dynamic compensation continue to increase, the problems of traditional electric drive routes in terms of power consumption, heat density, latency and wiring complexity are becoming increasingly prominent. As a result, "optical direct drive" has gradually evolved from a cutting-edge exploration path to a fundamental reconstruction direction with practical necessity.

[0028] Three types of engineering challenges faced by the 7-axis direct-drive architecture and existing solutions to avoid them.

[0029] 7.1 Energy Density Limitations: Communication-grade optical signals are typically at the milliwatt level or lower. If simply understood as "relying solely on the input optical signal to directly light up pixels," then there is indeed a problem of insufficient energy density. Especially in scenarios with high brightness, high refresh rate, and high-density pixel output, if the optical signal is regarded as the only light-emitting energy source in the traditional sense, it is difficult to directly cover all display energy consumption requirements under real-world conditions.

[0030] Therefore, the direct-drive optical architecture needs to avoid interpreting "direct-drive optical" as "light powered solely by light." Instead, a more precise physical definition should be adopted, where the optical signal acts as the excitation source, trigger source, or physical control source, directly determining pixel state changes. Correspondingly, optical pump triggering paths, optical trigger gating paths, or other physical-level optical control paths can be used, allowing light to directly determine display behavior at the physical layer, without having to bear the entire power supply task.

[0031] 7.2 Pixel Alignment Challenges: In retina-level displays, the number of pixels is enormous. To ensure precise coupling of the decompressed multi-path optical signals to the target pixel unit, high-precision alignment between the waveguide output, the display array, and the coupling interface must be achieved. Without a topologically consistent on-chip structure, relying solely on post-processing optical alignment or macroscopic mechanical calibration will be insufficient to support the stable operation of high-density pixel arrays.

[0032] Therefore, the direct-drive optical architecture needs to adopt wafer-level heterogeneous integration, on-chip waveguide array and pixel array integrated layout, and geometrically consistent topology mapping, so that the decompression structure directly corresponds to the pixel row and column coordinates in physical arrangement, thereby forming a "geometry is address" physical addressing logic, reducing the dependence on traditional electrical addressing and subsequent alignment correction.

[0033] 7.3 The inherent limitations of optical logic switching ratio and signal-to-noise ratio: Compared with electronic signals, optical signals may still exhibit leakage light, crosstalk light, or residual coherent light even in the "off" state. Without effective threshold control and noise reduction mechanisms, display systems are prone to problems such as fogging, black level rise, and decreased contrast when outputting black levels, thus affecting image quality.

[0034] Therefore, the direct-drive optical architecture needs to introduce a non-linear threshold effect to prevent noise light below a set threshold from triggering the target pixel. Simultaneously, it also needs to introduce optical noise reduction mechanisms such as coherent cancellation to achieve zero or near-zero light leakage control through physical interference when outputting black or extremely low brightness states. Only through these dual mechanisms can the characteristics of direct-drive optical architecture be maintained while simultaneously meeting the requirements for high-contrast displays.

[0035] 8 Key Issues Remaining Unresolved by Existing Technologies: Based on the above analysis, existing technologies have not yet effectively solved the following key issues:

[0036] (1) How to enable the optical signal to directly participate in the energy level transition, mechanical deflection, optical modulation or conduction control of the display medium after decompression without going through the traditional logic control layer, so as to construct a true direct-drive display path;

[0037] (2) How to integrate optical decompression, optical clock synchronization, spatial topology mapping, pixel coupling, asynchronous compensation, power equalization, noise control and feedback calibration into a unified end-to-end physical synchronization architecture, rather than a simple splicing of several isolated modules;

[0038] (3) How to solve problems such as beam splitting loss, alignment accuracy, black field contrast, system latency, power consumption control and engineering feasibility at the same time under the conditions of high pixel density, high refresh rate and dynamic space compensation;

[0039] (4) How to establish a new underlying implementation path that is different from the traditional “electronic computing-electronic drive” route, so that the display system can fundamentally get rid of its strong dependence on the highly complex electric drive link, and instead let the optical signal directly undertake the tasks of synchronization, distribution, driving and compensation at the physical layer.

[0040] The existence of the above problems indicates that existing technologies still lack a microdisplay direct-drive physical synchronization architecture and method with optical decompression signals as the core driving force for retina-level displays and space internet terminals. Summary of the Invention

[0041] To address the shortcomings of existing technologies, the overall objective of this invention is to provide a micro-display direct-drive physical synchronization architecture and method based on optical decompression signals to address the problems of high heat loss, high link latency, high wiring complexity, and high synchronization pressure faced by existing micro-display systems under conditions of high resolution, high refresh rate, low latency, and miniaturization. This aims to establish a display underlying implementation path that does not rely on traditional electrical logic step-by-step control.

[0042] More specifically, this invention attempts to elevate the decompressed optical signal from an upstream information carrier that only undertakes transmission functions to a physical driving force, physical triggering source, and physical synchronization source that can directly participate in the state changes of the display medium. This enables the optical signal in the display system to not only be responsible for information arrival, but also directly responsible for pixel alignment, state triggering, timing synchronization, spatial distribution, dynamic compensation, and feedback loop, thereby forming a full-link physical synchronization display architecture for retina-level displays and spatial Internet terminals.

[0043] To achieve the above objectives, this invention provides a microdisplay direct-drive physical synchronization architecture and method based on optical decompression signals. This architecture receives coherent optical signals carrying compressed display information, decompresses and spatially unfolds the coherent optical signals at the physical layer, extracts beat information from the input optical signals and establishes end-to-end physical synchronization, then maps the decompressed multi-channel optical execution signals to the target display area or target display unit according to a predetermined topology, and enables the optical signals to directly participate in the physical state changes of the display medium without relying on traditional electrical logic step-by-step addressing control, thereby forming the display output.

[0044] In a preferred embodiment, the target position, target beat, and target state changes displayed are determined by the decompressed optical signal at the physical layer, rather than being redefined by a subsequent independent electronic logic layer.

[0045] Furthermore, in some implementations, the architecture may also incorporate one or more of the following processing procedures, such as asynchronous compensation, power equalization, noise reduction control, feedback calibration, all-optical isolation control, or physical layer protection, as required by the system, to maintain the spatiotemporal consistency, operational stability, and engineering feasibility of the display output.

[0046] Thus, this invention forms a full-link physical synchronization display path from compressed coherent optical signal input, physical layer decompression, physical synchronization, topology mapping, optical signal directly participating in the physical state changes of the display medium, to display output and feedback correction.

[0047] In the aforementioned path, the decompressed optical signal not only undertakes the function of information transmission, but also the functions of display state definition, synchronization reference establishment, and physical trigger execution. Any scheme that only uses the optical signal as the front-end transmission medium and transfers the right to define the display state to the subsequent independent electronic logic layer is not a preferred implementation of the technical concept described in this invention.

[0048] Specifically, the present invention preferably achieves the following objectives:

[0049] 1. Establish a direct-drive optical display architecture

[0050] A microdisplay driving architecture is established with optical signals directly participating in display execution as its core, so that the decompressed optical signals no longer stop at the data transmission layer, but can directly act on the energy level transition, mechanical deflection, optical modulation or conduction control process of the display medium.

[0051] 2. Reduce heat loss in the electric drive link

[0052] By reducing or bypassing the main sources of heat loss in traditional electric drive links, such as photoelectric conversion, logic decoding, digital-to-analog conversion, timing drive, and pixel-by-pixel switching control, the total power consumption and heat dissipation density per unit area of ​​the system can be reduced.

[0053] 3. Achieve physical-level refresh synchronization

[0054] By extracting and injecting optical clocks and using asynchronous physical phase-locked loop mechanisms, physical-level synchronization between the decompressed optical signal and the display execution process is achieved, enabling the system to maintain a stable, low-jitter, and low-latency refresh rate even under retina-level display conditions.

[0055] 4. Establishing a geometrically consistent optical addressing path

[0056] This invention provides an on-chip optical signal coupling and addressing path suitable for high-density pixel arrays, enabling decompressed multiple optical signals to act on target pixel units in a topologically and geometrically consistent manner, forming a "geometry is address" display addressing logic. This reduces the burden on traditional pixel-by-pixel electronic addressing networks and improves optical path stability, alignment accuracy, and scalability under high-density array conditions.

[0057] 5. Establish asynchronous compensation paths for dynamic scenarios

[0058] To address the dynamic visual drift caused by user head rotation, pose changes, and spatial positioning updates, a physical-level asynchronous compensation path based on optical delay line adjustment is provided. This reduces the reliance on the traditional "prediction-re-rendering-re-display" path, enabling spatial images in dynamic scenes to achieve physical translation compensation and sub-pixel alignment with lower latency, improving the stability of virtual-real overlay and reducing dizziness.

[0059] 6. Establish dynamic gain and equalization paths

[0060] To address the unavoidable optical power attenuation problem during optical decompression and multi-path parallel distribution, a dynamic gain and power equalization scheme suitable for large-scale beam splitting is provided. This ensures that the decompressed multi-path optical signals still have sufficient effective energy in high-resolution display scenarios, thereby improving the availability of the display execution layer and the overall engineering feasibility of the system.

[0061] 7. Establish a zero-leakage noise reduction path

[0062] To address the issues of impure black levels, increased light leakage, enhanced haze, and insufficient contrast in direct-drive optical systems, a physical-level zero-leakage noise reduction solution is provided for full-black pixel output. This enables target pixels to achieve a higher degree of light leakage suppression at the physical layer when black or extremely low brightness is required, thereby improving the contrast performance and image quality stability of micro-display systems under dark conditions.

[0063] 8. Establish an all-optical isolated control path

[0064] For display scenarios that are highly sensitive to electromagnetic interference, a fully optically isolated control path is provided, which uses optical phase, optical intensity or optical path for control coupling. This reduces electromagnetic crosstalk, improves system compatibility, and enables the display execution link to operate under conditions of higher synchronization accuracy and lower noise interference.

[0065] To achieve the above objectives, the present invention adopts the following technical solution:

[0066] A microdisplay direct-drive physical synchronization architecture based on optical decompression signals includes a coherent optical input module, a physical layer decompression module, an optical clock extraction and synchronization module, an optical signal spatial mapping module, and a display execution module;

[0067] The coherent optical input module is used to receive an input optical signal carrying compressed display information;

[0068] The physical layer decompression module is used to decompress and spatially unfold the input optical signal at the physical optics level to form multiple parallel optical execution signals or beam splitting optical pulses.

[0069] The optical clock extraction and synchronization module is used to extract clock information from the input optical signal and keep the decompression process, spatial mapping process and display execution process synchronized at the physical layer.

[0070] The optical signal spatial mapping module is used to distribute the decompressed multi-channel optical execution signals to the target display area or target display unit according to a predetermined topology.

[0071] The display execution module is used to enable the decompressed optical execution signal to directly participate in the physical state changes of the display medium without relying on traditional electrical logic addressing control, so as to form a display output.

[0072] In a preferred embodiment, the input optical signal is a coherent optical signal with a defined phase relationship, frequency structure, and time envelope. In addition to carrying display content information, the input optical signal can also carry one or more of the following: beat information, phase information, local priority information, or area control information.

[0073] In a preferred embodiment, the physical layer decompression module uses one or more of the following: arrayed waveguide gratings, optical comb filters, nonlinear optical media, silicon-based nanowaveguides, beam splitters, couplers, phase controllers, and on-chip optical units suitable for wavelength mapping, frequency expansion, or parallel routing, to perform one-to-many expansion of the compressed input optical signal at the physical layer, thereby forming a multi-path parallel photon stream, beam-splitting optical pulse, or equivalent spatially distributed beam suitable for high-density display execution.

[0074] In a preferred embodiment, the optical clock extraction and synchronization module is used to extract a reference clock from the packet header, preamble, carrier frequency, frequency band relationship, repetition period, periodic structure, or phase relationship of the input optical signal, and to enable the local scanning unit, phase control unit, delay unit, or coupling unit in the subsequent display execution link to use the input optical signal as a unified synchronization source through injection locking, asynchronous physical phase-locked loop, or other optical phase-locked mechanism.

[0075] In a preferred embodiment, the optical signal spatial mapping module is used to map the decompressed multi-channel optical execution signals to the target display area, target pixel array, or target coupling channel according to a predetermined topological relationship or geometric consistency relationship, so that the display system forms a physical addressing logic based on geometric correspondence; the physical addressing logic includes one or more of hierarchical addressing, layered topology addressing, and optical matrix addressing.

[0076] In a preferred embodiment, the display execution module includes one or both of the following two paths:

[0077] One is the pixel direct-drive coupling path, where the decompressed light signal directly acts on the target response structure of the display medium to trigger energy level transitions, stimulated emission, mechanical deflection, optical modulation, or state switching.

[0078] The second is the light-triggered gating path, which directly changes the conduction conditions of the local gate structure by the decompressed light signal, so that the preset power supply rail is turned on without going through the traditional pixel-by-pixel electronic logic addressing, thereby realizing the light-triggered display behavior.

[0079] In a preferred embodiment, when the pixel direct-drive coupling path is used, the display medium can be one of Micro-LED, LBS, liquid crystal polymer, electrochromic material or holographic light field material; when the display medium is an LBS scanning display structure, the decompressed light signal can directly participate in micromirror deflection control, scanning path control or local scanning cycle control.

[0080] In a preferred embodiment, when the optical triggering gating path is used, the local gating structure may include one or more of a photosensitive gate, a photocontrolled resistor region, a barrier layer, or an equivalent light-conducting structure, and its conduction change may be achieved based on photoinduced carrier generation, local barrier modulation, band bending modulation, or local depletion region width variation; the optical triggering gating path does not involve electrical buffering, frame-by-frame buffering, line-by-line buffering, column-by-column buffering, or traditional line-by-line electrical scanning logic addressing networks for image data.

[0081] In a preferred embodiment, the architecture may further include one or more of an asynchronous compensation module, a power equalization module, a squelch control module, and a feedback calibration module;

[0082] The asynchronous compensation module is used to receive RTK, VIO, inertial navigation, head attitude sensor, angular velocity sensor or other pose-related inputs, and to compensate for the time relationship, phase relationship or spatial correspondence of the target display branch through tunable optical delay line, thermo-optic effect, electro-optic effect, MEMS micro-adjustment structure or other optical path correction methods.

[0083] The power equalization module includes a dynamic gain and equalization structure for optical power based on a micro-ring resonator, which is used to compensate for optical power attenuation caused by large-scale beam splitting, long-path transmission or local coupling, and to perform local gain compensation or power recovery adjustment on the corresponding branch when the effective optical power of the target display branch is lower than the preset compensation threshold.

[0084] The noise control module includes a nonlinear threshold noise suppression mechanism and / or a coherent destructive noise suppression mechanism. The nonlinear threshold noise suppression mechanism is used to suppress the target pixel response when the effective input light intensity of the target display branch is lower than the local trigger threshold, and to allow the target pixel to enter the effective display response state when it is higher than the local trigger threshold.

[0085] The feedback calibration module is used to extract the return light signal from the display output area, pixel unit or local optical interface, and to identify and correct the brightness deviation, phase deviation, delay deviation or local coupling state according to the return light signal.

[0086] In a preferred embodiment, the architecture may further include an all-optical isolation control module and / or a physical layer protection module;

[0087] The all-optical isolation control module uses optical phase modulation, optical intensity modulation or optical path switching to couple control information into the display link to reduce the risk of high-frequency electromagnetic noise entering the sensing area.

[0088] The physical layer protection module utilizes the phase randomness, local non-repeatability, path conditions, or phase distribution patterns of the input optical signal or during the decompression process to perform physical layer protection on the display data, ensuring that the display data is correctly reconstructed and displayed only under specific optical path conditions, specific phase conditions, or specific decompression states.

[0089] This invention also provides a microdisplay direct-drive physical synchronization method based on optical decompression signals, comprising the following steps:

[0090] S1: Receive a coherent optical signal carrying compressed display information;

[0091] S2: Decompress and spatially unfold the coherent optical signal at the physical layer to form multiple parallel optical execution signals or beam splitting optical pulses;

[0092] S3: Extract the beat information from the coherent optical signal and establish the physical synchronization relationship between the decompression process, the spatial mapping process and the display execution process;

[0093] S4: Map the decompressed multi-channel optical execution signals to the target display area or target display unit according to a predetermined topology;

[0094] S5: The decompressed optical execution signal is driven through the pixel direct-drive coupling path and / or the optical trigger gate path to directly participate in the physical state changes of the display medium without relying on the traditional electrical logic step-by-step addressing control, so as to form the display output;

[0095] S6: As needed, perform one or more of the following processes on the display branch: asynchronous compensation, power equalization, noise control, feedback calibration, all-optical isolation control, or physical layer protection.

[0096] The present invention has the following beneficial effects:

[0097] (1) By directly introducing the decompressed optical signal into the display execution link, the heat loss of the display drive link is significantly reduced by reducing or bypassing the large number of heat loss links generated by photoelectric conversion, logic decoding, digital-to-analog conversion, drive amplification and pixel-by-pixel electric switch control in the traditional display system.

[0098] (2) By physical layer decompression, optical clock extraction and synchronization, on-chip spatial mapping and optical path layer compensation mechanism, the cumulative latency caused by data decoding, cache scheduling, re-rendering, step-by-step driving and electronic synchronization in traditional display systems is reduced, thereby significantly reducing the total system latency and improving spatial alignment accuracy in dynamic scenarios.

[0099] (3) By introducing the topological mapping principle of "geometry is address", the waveguide physical structure undertakes part or main addressing functions, thereby reducing the dependence on traditional pixel-by-pixel electronic addressing networks, row and column scanning networks and complex electrically driven wiring structures, and reducing the system wiring and addressing complexity.

[0100] (4) Because it reduces the reliance on large-scale main control circuits, complex drive circuits and high-density electronic interconnection structures, the present invention is more conducive to achieving high-performance display system integration within a limited volume, thereby improving the miniaturization adaptability of near-eye display systems.

[0101] (5) By using the dynamic gain and power equalization mechanism based on the micro-ring resonator, the branch energy attenuation caused by beam splitting, long-path transmission and coupling loss can be compensated, thereby solving the power attenuation problem after large-scale beam splitting.

[0102] (6) By combining the nonlinear threshold suppression mechanism and the coherent de-noising mechanism, black field light leakage, crosstalk and black level rise can be suppressed, thereby improving the black field output purity and increasing the display contrast. Attached Figure Description

[0103] Figure 1 This is a diagram of the overall system architecture of the present invention;

[0104] Figure 2 Diagram of optical signal input and physical layer decompression structure;

[0105] Figure 3 This is a schematic diagram of AWG topology mapping and geometry (i.e., address).

[0106] Figure 4 Diagram of optical clock extraction and injection locking structure;

[0107] Figure 5 This is a diagram of a Micro-LED-based optical pump direct drive and optical trigger gating structure.

[0108] Figure 6 Diagram of the asynchronous compensation structure for a tunable optical delay line;

[0109] Figure 7 The diagram shows the dynamic gain and equalization structure of optical power based on a micro-ring resonator.

[0110] Figure 8 The diagram shows a coherent phase cancellation noise reduction structure based on a master-sub phase waveguide.

[0111] Figure 9 Diagram of the all-optical feedback closed-loop calibration structure;

[0112] Figure 10 This is a flowchart of the method of the present invention. Detailed Implementation

[0113] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only used to illustrate the technical concept and implementation of the present invention, and are not intended to limit the scope of protection of the present invention. Without departing from the technical concept of the present invention, those skilled in the art can make adjustments, substitutions, or equivalent changes to the device selection, structural arrangement, connection relationships, process conditions, or execution sequence, and such adjustments, substitutions, or equivalent changes all fall within the scope of the embodiments of the present invention.

[0114] This invention centers on "end-to-end physical synchronization." By enabling the coherent optical signal corresponding to compressed display information to complete decompression, clock extraction, spatial mapping, and display execution at the physical layer, the decompressed optical signal can directly participate in the physical state changes of the display medium without relying on traditional step-by-step addressing control of electrical logic. This forms a direct-drive implementation path for micro-displays suitable for high-resolution, low-latency, and small-volume display systems. The physical state changes may include energy level transitions, stimulated emission, mechanical deflection, transmittance changes, reflectance changes, phase changes, partial conduction, or other physical responses that can constitute the display output.

[0115] In various embodiments of the present invention, the input optical signal is preferably a coherent optical signal carrying compressed display information. In addition to carrying display content information, the coherent optical signal may also carry one or more of the following: beat information, phase information, local priority information, or area control information. After the input optical signal enters the system, it is expanded into multiple parallel optical execution signals or beam-splitting optical pulses by the physical layer decompression module. Then, a physical synchronization relationship is established between the decompression process, the spatial mapping process, and the display execution process by the optical clock extraction and synchronization module. Finally, the optical signal spatial mapping module distributes the multiple optical signals to the target display area or target display unit according to a predetermined topology.

[0116] During the display execution phase, the decompressed optical signal can participate in the state changes of the display medium through pixel direct-drive coupling paths and / or optical triggering gating paths. For display media suitable for direct optical response, the optical signal can directly act on the target response structure to trigger energy level transitions, stimulated emission, mechanical deflection, optical modulation, or state switching. For display media suitable for changing local gate control conditions by optical signals, the optical signal can directly change the conduction conditions of photosensitive gates, photocontrolled resistor regions, barrier layers, or other local gate control structures, enabling the preset power supply rails to conduct without traditional pixel-by-pixel electronic logic addressing, thereby achieving light-triggered display behavior.

[0117] In a preferred embodiment, to improve operational stability and engineering feasibility in dynamic scenarios, the present invention may also be configured with an asynchronous compensation module, a power equalization module, a noise reduction control module, a feedback calibration module, an all-optical isolation control module, and / or a physical layer protection module as needed. Specifically, the asynchronous compensation module can compensate for the temporal, phase, or spatial relationships of the target display branch based on pose-related inputs; the power equalization module can compensate for optical power attenuation caused by large-scale beam splitting, long-path transmission, or local coupling; the noise reduction control module can suppress black field light leakage and crosstalk; the feedback calibration module can identify and correct brightness, phase, delay, or local coupling states through the returned optical signal; the all-optical isolation control module can reduce the risk of high-frequency electromagnetic noise entering the sensing area; and the physical layer protection module can provide physical layer protection for the display data using specific optical path or phase conditions.

[0118] The present invention will now be described in conjunction with different embodiments.

[0119] Example 1: Micro-LED Microdisplay Direct-Drive Physical Synchronization Example Based on Optical Decompression Signal

[0120] See Figures 1 to 9 This embodiment provides a direct-drive physical synchronization architecture for Micro-LED microdisplays based on optical decompression signals. The architecture includes a coherent light input module, a physical layer decompression module, an optical clock extraction and synchronization module, an optical signal spatial mapping module, a display execution module, and, as needed, an asynchronous compensation module, a power equalization module, a noise reduction control module, and a feedback calibration module.

[0121] 1.1 Coherent Optical Input

[0122] In this embodiment, the coherent optical input module receives an input optical signal carrying compressed display information. The input optical signal is preferably a coherent optical signal with a defined phase relationship, frequency structure, and time envelope, which can carry image content information, as well as beat information, phase information, and local area control information simultaneously. The input optical signal can enter the on-chip waveguide structure in a single-channel input form or enter the pre-stage distribution structure in a multi-channel input form. When using a single-channel input, the physical layer decompression module subsequently performs one-to-many expansion; when using a multi-channel input, the input end can first perform frequency division, time division, or phase allocation of different sub-channels.

[0123] 1.2 Physical Layer Decompression and Spatial Unfolding

[0124] The physical layer decompression module is used to unfold the compressed input optical signal at the physical optics level into a multi-path parallel photon stream, beam-splitting optical pulse, or equivalent spatially distributed beam suitable for high-density display execution. Preferably, the physical layer decompression module may include one or more of the following: arrayed waveguide grating, optical comb filter, nonlinear optical medium, silicon-based nanowaveguide, beam splitter, coupler, phase controller, and on-chip optical units suitable for wavelength mapping, frequency unfolding, or parallel routing.

[0125] In this embodiment, the input optical signal is expanded in a one-to-many manner via an arrayed waveguide grating and an on-chip waveguide structure, transforming the originally compressed optical signal into multiple parallel optical execution signals at the physical layer. This expansion process is preferably completed directly in the optical domain, without first decoding by a CPU, GPU, or general-purpose electronic logic before being converted into display driving signals.

[0126] 1.3 Optical Clock Extraction and End-to-End Physical Synchronization

[0127] The optical clock extraction and synchronization module is used to extract a reference clock from the input optical signal and establish a physical synchronization relationship between the decompression process, the spatial mapping process, and the display execution process. In this embodiment, the reference clock can be extracted from the packet header, preamble, carrier frequency, periodic structure, or phase relationship of the input optical signal; preferably, through injection locking, asynchronous physical phase-locked loop, or other optical phase-locked loop mechanisms, the local scanning unit, phase control unit, delay unit, or coupling unit in the subsequent display execution link uses the input optical signal as a unified synchronization source.

[0128] The above structure enables the decompressed multi-channel optical execution signals to complete clock alignment before entering the spatial mapping and display execution stages, thereby reducing the impact of traditional electronic clock networks and external crystal oscillators on system synchronization.

[0129] 1.4 Optical Topology Mapping and Physical Addressing

[0130] The optical signal spatial mapping module is used to map the decompressed multi-channel optical execution signals to the target display area, target pixel array, or target coupling channel according to a predetermined topological or geometric consistency relationship, so that the display system forms a physical addressing logic based on geometric correspondence. Preferably, the physical addressing logic may include one or more of hierarchical addressing, layered topology addressing, or optical matrix addressing.

[0131] In this embodiment, a geometrically consistent correspondence is established between the on-chip waveguide branch structure and the target Micro-LED array, so that the physical arrangement of the decompression structure corresponds to the row and column layout of the pixel array, thereby forming a "geometry is address" physical addressing path. Through this structure, some or all of the addressing functions are undertaken by the waveguide topology itself, thereby reducing the burden on traditional pixel-by-pixel electronic addressing networks.

[0132] 1.5 Display Execution: Pixel Direct Drive Coupling Path

[0133] In this embodiment, the display execution module preferably adopts a pixel-direct coupling path. The decompressed light signal directly acts on the quantum well, local gain region, or other quasi-steady-state high-energy-level structure in the Micro-LED pixel as an excitation source or trigger source, completing the display execution through induced stimulated emission, energy level transition, or local light emission response. This display behavior is directly triggered by light at the physical layer, rather than relying on traditional pixel-by-pixel electronic logic links for step-by-step control.

[0134] In some modified embodiments, a light-triggered gating path can also be configured. This means that the decompressed light signal directly alters the conduction conditions of the photosensitive gate, the photocontrolled resistor region, the barrier layer, or the equivalent light-receiving conduction structure, enabling the preset power supply rail current to conduct without traditional upper-layer logic addressing, thereby achieving light-triggered display behavior. The alteration of the conduction conditions can be achieved through photoinduced carrier generation, local barrier modulation, band bending modulation, or changes in the width of the local depletion region.

[0135] In a preferred embodiment, the output state of the target pixel can be expressed as a function of the decompressed effective optical physical quantities, i.e.:

[0136]

[0137] in, Indicates the first Each pixel at time The target output state, which can be characterized as brightness, luminous intensity, transmittance, reflectance, deflection state or other observable physical states; Indicates the action on the first The effective photon flux intensity of each pixel after decompression; This indicates the light response efficiency parameter of the corresponding display medium; This represents a spatial mask or local weight modulation function; Indicates the material type, coupling structure type, or local device structural parameters; It represents other physical control quantities such as phase, delay, wavelength, or topology mapping.

[0138] In a preferred embodiment, if brightness is used as the primary output variable, it can be further expressed as:

[0139]

[0140] in, Indicates the first Target brightness per pixel The comprehensive coupling coefficient is used to represent the multiplicative effects of pixel coupling efficiency, local gain compensation, phase matching conditions, and current material response conditions.

[0141] 1.6 Asynchronous Compensation

[0142] In a preferred embodiment, the architecture may further include an asynchronous compensation module. This asynchronous compensation module can receive RTK, VIO, inertial navigation, head attitude sensor, angular velocity sensor or other pose-related inputs, and compensate for the temporal relationship, phase relationship or spatial correspondence of the target display branch through tunable optical delay lines, thermo-optic effects, electro-optic effects, MEMS micro-adjustment structures or other optical path correction methods.

[0143] In this embodiment, when the system detects head micro-movement, viewpoint change, or spatial positioning update, it can directly perform time or phase compensation on the display branch at the optical path layer to reduce visual drift in dynamic scenes, without having to rely entirely on the traditional full-frame re-rendering path.

[0144] In a preferred embodiment, when the system detects a change in pose characterized by RTK, VIO, inertial navigation, or head pose input... At that time, the compensated optical state of the target display branch can be expressed as:

[0145]

[0146] in, Indicates the first The path displays the spatial state vector before branch compensation. This represents the compensated spatial state vector. Represents the change in pose The determined compensation mapping relationship.

[0147] In the implementation using a tunable optical delay line, corresponding to the first... The equivalent optical path change of the branch path can be further expressed as:

[0148]

[0149] in, The speed of light in a vacuum. The refractive index of the waveguide group, Indicates the first The equivalent time compensation required for the branch road. This indicates the corresponding equivalent path change.

[0150] The above methods allow for direct adjustment of path length, phase relationship, or temporal relationship at the physical optical path layer, thereby reducing visual drift in dynamic scenes.

[0151] 1.7 Power Equalization

[0152] In a preferred embodiment, the architecture further includes a power equalization module. This power equalization module may include a micro-ring resonator-based dynamic optical power gain and equalization structure to compensate for optical power attenuation caused by large-scale beam splitting, long-path transmission, or local coupling.

[0153] In this embodiment, the effective optical power of each display branch can be recovered and adjusted through a local gain injection unit, a local pump compensation unit, a power monitoring unit, and a branch equalization unit to improve the consistency and availability of the output of each branch under high-density display conditions. In the case of a pump optical path, the pump light is preferably used to provide local energy support, while the timing, spatial location, and display definition of the target display state are still locked by the decompressed coherent signal light.

[0154] In a preferred embodiment, when the effective optical power of a certain display branch is lower than a preset compensation threshold, the local gain injection unit or the local pump compensation unit is triggered to perform power recovery or equalization adjustment on the corresponding branch; when the effective optical power of the corresponding branch recovers to the target holding range, the compensation process is weakened or stopped.

[0155] 1.8 Noise Control

[0156] In a preferred embodiment, the architecture further includes a squelch control module. This squelch control module may include a nonlinear threshold squelch mechanism and / or a coherent destructive squelch mechanism.

[0157] In this embodiment, when a target pixel or local display area needs to output a black or extremely low brightness state, a pair of coherent beams with a phase difference can be output through the main phase waveguide and the sub-phase waveguide, causing destructive interference in the target coupling region, thereby physically suppressing black field light leakage. This method improves black field purity and enhances display contrast.

[0158] In a preferred embodiment, the noise control module can also determine the response of the target pixel based on a local trigger threshold, and the determination relationship can be expressed as follows:

[0159]

[0160] in, Indicates the first The effective input light intensity corresponding to each pixel. This represents the local trigger threshold for the corresponding pixel or branch. When Below At that time, the first Each pixel does not enter an effective display response state to suppress false triggering caused by leakage light, crosstalk light, or residual coherent light; when the target display branch is determined to be in a black field output state and the residual leakage light is higher than the preset residual threshold, the coherent cancellation process of the main phase waveguide and the sub-phase waveguide is initiated to reduce black field leakage light and crosstalk.

[0161] 1.9 Feedback Calibration

[0162] In a preferred embodiment, the architecture further includes a feedback calibration module. This feedback calibration module is used to extract the return light signal from the display output area, pixel unit, or local optical interface, and to identify and correct brightness deviation, phase deviation, delay deviation, or local coupling state based on the return light signal.

[0163] In this embodiment, the system can perform closed-loop correction of the output state by analyzing the intensity, phase, frequency, or delay characteristics of the returned light; in some implementations, the phase drift and delay offset caused by environmental temperature drift can also be calibrated by using a reference optical path.

[0164] In a preferred embodiment, when the brightness deviation, phase deviation, delay deviation, or local coupling deviation characterized by the returned optical signal exceeds the corresponding calibration threshold, the feedback calibration module performs parameter correction on the target branch; when the deviation falls back to the preset tolerance range, the corresponding calibration action is weakened, maintained, or stopped.

[0165] 1.10 Implementation Results

[0166] Through the above structure, this embodiment realizes a continuous physical path from compressed coherent optical signal input, physical layer decompression, optical clock synchronization, topology mapping, pixel direct drive execution to asynchronous compensation, power equalization, noise reduction control and feedback correction. This enables the display system to complete the display output without relying on traditional electrical logic step-by-step addressing control, thereby helping to reduce heat loss, reduce total system latency, reduce wiring complexity and improve the engineering feasibility of high-density micro-display systems.

[0167] Example 2: Microdisplay direct-drive physical synchronization based on optically triggered gating path

[0168] See Figure 1 , Figure 2 , Figure 4 , Figure 5 , Figure 6 and Figure 10This embodiment provides a microdisplay direct-drive physical synchronization implementation method based on a light-triggered gating path. Unlike the preferred pixel-driven direct-drive coupling path in Embodiment 1, in this embodiment, the decompressed light signal does not directly act as the sole energy source for the display medium. Instead, it acts as a physical trigger source, directly changing the conduction conditions of the local gate control structure of the target display unit. This allows the preset power supply rail to conduct without traditional pixel-by-pixel electronic logic addressing, thereby achieving light-triggered display behavior. This path still belongs to the technical solution where the light decompressed signal directly participates in the physical state changes of the display medium.

[0169] 2.1 System Overall Structure

[0170] The system in this embodiment still includes a coherent optical input module, a physical layer decompression module, an optical clock extraction and synchronization module, an optical signal spatial mapping module, and a display execution module. If necessary, an asynchronous compensation module, a power equalization module, a squelch control module, and a feedback calibration module can also be configured. Its front-end input, decompression, synchronization, and topology mapping processes can be the same as in Embodiment 1, namely: the coherent optical input module receives the coherent optical signal carrying compressed display information; the physical layer decompression module forms multiple parallel optical execution signals or beam-splitting optical pulses; the optical clock extraction and synchronization module establishes a physical synchronization relationship; and the optical signal spatial mapping module distributes the multiple optical signals to the target display area or target display unit according to a predetermined topology.

[0171] 2.2 Optical Trigger Gating Structure

[0172] In this embodiment, the target pixel unit preferably integrates a local gate control structure. The local gate control structure may include one or more of a photosensitive gate, a photoresistive region, a barrier layer, or an equivalent light-receiving and conducting structure. Unlike traditional display systems where the upper-layer main control chip sends conduction signals through row-by-row, column-by-column, or pixel-by-pixel logic links, in this embodiment, the conduction trigger is directly determined by the decompressed optical signal.

[0173] Specifically, when the decompressed optical signal reaches the local gate control structure corresponding to the target pixel, its conduction condition can be changed through one or more of the following semiconductor physical mechanisms:

[0174] (1) Photoinduced carrier generation;

[0175] (2) Photogenerated carrier migration;

[0176] (3) Local barrier modulation;

[0177] (4) Band bending modulation;

[0178] (5) Variation in the width of the local depletion zone.

[0179] Through the above mechanism, the impedance characteristics, barrier height or local conduction threshold of the local control structure change, so that the preset power supply rail is turned on without traditional pixel-by-pixel electronic logic addressing, thereby realizing pixel illumination, state switching or other display behaviors.

[0180] In a preferred embodiment, when an optically triggered gating path is used, the first... The equivalent local impedance of a pixel unit can be expressed as:

[0181]

[0182] in, This represents the initial impedance when not modulated by light. This represents the amount of impedance change caused by the decompression of the incident light signal.

[0183] In a preferred embodiment, the impedance change can be further expressed as:

[0184]

[0185] in, This represents the conduction response coefficient, which is related to local material response characteristics, gating structure parameters, and incident wavelength conditions. Indicates the action on the first The effective photon flux intensity of a gated structure.

[0186] when When the power supply drops below the corresponding conduction threshold, the preset power rail is activated, thereby triggering the target display unit to emit light, switch states, or perform other display behaviors.

[0187] 2.3 Differences from traditional electrical addressing

[0188] In this embodiment, the light-triggered gating path does not involve electrical buffering, frame-by-frame buffering, line-by-line buffering, column-by-column buffering, or traditional line-by-line electrical scanning logic addressing networks for image data. In other words, the display behavior is not first performed by the main control chip to decode the image data and perform logical scheduling, and then controlled pixel by pixel by the driving circuit. Instead, the decompressed light signal directly determines whether the target display unit enters the conduction or state switching condition at the physical layer.

[0189] Therefore, although this embodiment allows for the existence of pre-installed power rails or localized power support, the definition of the display is still locked at the physical layer by the optical signal. The traditional SoC hierarchical logic control link does not undertake the main function of defining display behavior. This point is consistent with the logic in the original technical concept that "the optical signal serves as an excitation source, trigger source, or physical control source, without having to undertake the entire power supply task."

[0190] In this embodiment, even if there are local power supply rails, local holding nodes, or local auxiliary electrical structures, their function is still limited to passive support or response holding, and the right to define the target display state is still directly locked by the decompressed optical signal that reaches the target gating structure.

[0191] 2.4 Input optical signal and physical decompression

[0192] In this embodiment, the input optical signal is preferably a coherent optical signal with a defined phase relationship, frequency structure, and time envelope. In addition to carrying display content information, the input optical signal can also simultaneously carry beat information, phase information, local priority information, or area control information. After input, physical layer decompression is completed through one or more of the following: arrayed waveguide grating, optical comb filter, nonlinear optical medium, silicon-based nanowaveguide, beam splitter, coupler, phase controller, and on-chip optical units suitable for wavelength mapping, frequency unrolling, or parallel routing. The resulting multi-parallel optical signals correspond to the target display area or target gating structure, respectively.

[0193] In a preferred embodiment, the decompressed multi-channel optical signals establish a geometrically consistent correspondence with the target display array via an on-chip waveguide branch network, so that the optical signals of a specific branch directly correspond to a specific pixel unit or a specific gate unit, thereby forming a physical addressing logic based on the geometric correspondence.

[0194] 2.5 Optical Clock Synchronization

[0195] In this embodiment, the optical clock extraction and synchronization module is still used to extract the reference beat from the input optical signal and to keep the decompression process, spatial mapping process, and gating triggering process synchronized at the physical layer through injection locking, asynchronous physical phase-locked loop, or other optical phase-locked mechanisms. Since the gating triggering behavior itself is directly determined by the optical signal, this synchronization mechanism can further improve the consistency between the display behavior and the input optical signal beat and reduce the timing deviation introduced by traditional electronic clock networks.

[0196] 2.6 Asynchronous Compensation

[0197] In a preferred embodiment, this embodiment may further include an asynchronous compensation module. When the system receives RTK, VIO, inertial navigation, head attitude sensor, angular velocity sensor, or other pose-related inputs, it can compensate for the temporal, phase, or spatial relationships of the target gated branch through tunable optical delay lines, thermo-optic effects, electro-optic effects, MEMS micro-adjustment structures, or other optical path correction methods. Through these methods, the gate triggering timing can be adjusted at the optical path layer to reduce visual drift or display misalignment in dynamic scenes.

[0198] 2.7 Power Equalization and Squelch Control

[0199] In a preferred embodiment, this embodiment can also be configured with a power equalization module and a noise suppression module. The power equalization module may include a dynamic gain and equalization structure for optical power based on a micro-ring resonator, used to compensate for branch optical power attenuation during multi-path splitting and long-path transmission. The noise suppression module may include a nonlinear threshold noise suppression mechanism and / or a coherent cancellation noise suppression mechanism. When the target pixel needs to output a black or extremely low brightness state, light leakage, crosstalk, and black level rise can be reduced through threshold suppression and coherent cancellation.

[0200] 2.8 Feedback Calibration

[0201] In a preferred embodiment, this example may further include a feedback calibration module. This module extracts the returned light signal from the display output area, pixel unit, or local optical interface, and identifies and corrects brightness deviation, phase deviation, delay deviation, or local gate state based on the returned light signal. This module improves the stability and consistency of long-term operation under the light-triggered gating path.

[0202] 2.9 Implementation Results

[0203] By employing the aforementioned optically triggered gating path, this embodiment achieves direct modification of the local gate control structure's conduction conditions by the decompressed optical signal, thereby completing display output without relying on traditional pixel-by-pixel electronic logic addressing control. Compared to the traditional scheme that relies entirely on step-by-step driving via electronic logic links, this embodiment helps reduce heat loss, decrease latency accumulation, and alleviate wiring complexity, and provides another feasible path for achieving direct optical drive display in the presence of a pre-set power supply rail. This implementation method, together with the pixel direct drive coupling path, constitutes the two main implementation methods of the display execution module of this invention.

[0204] Example 3: Microdisplay direct-drive physical synchronization example applicable to LBS and other display media

[0205] See Figure 1 , Figure 2 , Figure 4 , Figure 5 , Figure 6 and Figure 10 This embodiment provides a direct-drive physical synchronization implementation method for micro-displays applicable to LBS scanning display structures and other display media. In this embodiment, the decompressed optical signal still directly participates in the physical state changes of the display medium without relying on traditional electrical logic step-by-step addressing control. However, its mode of operation is not limited to the Micro-LED pixel direct-drive coupling in Embodiment 1, nor is it limited to the light-triggered gating path in Embodiment 2. Instead, it can participate in micromirror deflection control, scanning path control, local scanning beat control, transmittance adjustment, reflectance adjustment, phase modulation, or state switching according to the response mechanism of different display media.

[0206] 3.1 System Overall Structure

[0207] The system in this embodiment still includes a coherent optical input module, a physical layer decompression module, an optical clock extraction and synchronization module, an optical signal spatial mapping module, and a display execution module. Depending on the needs, an asynchronous compensation module, a power equalization module, a squelch control module, a feedback calibration module, an all-optical isolation control module, and / or a physical layer protection module can also be configured. Its input, decompression, synchronization, and topology mapping processes can be the same as in the aforementioned embodiments, i.e., the coherent optical input module receives the coherent optical signal carrying compressed display information, the physical layer decompression module forms multiple parallel optical execution signals or beam-splitting optical pulses, the optical clock extraction and synchronization module establishes a full-link physical synchronization relationship, and the optical signal spatial mapping module distributes the multiple optical signals to the target display area or target coupling channel according to a predetermined topology.

[0208] 3.2 Display execution path applicable to LBS

[0209] When the target display medium is an LBS scanning display structure, the display execution module preferably allows the decompressed optical signal to directly participate in micromirror deflection control, scanning path control, or local scanning cycle control. Specifically, the optical signal can directly act on the local control structure, photoresponse structure, or equivalent light-receiving structure related to micromirror deflection, so that the deflection angle, scanning timing, or local scanning path of the scanning beam can be adjusted at the physical layer.

[0210] In this embodiment, the decompressed optical signal can serve as both a synchronization source for the local scanning beat and an adjustment input for the local scanning path, thereby ensuring that the scanning display behavior remains consistent with the beat, topological, and spatial relationships of the input optical signal. In this way, some control behaviors in the LBS structure can be directly implemented by the optical domain, rather than relying entirely on the traditional electronic logic layer to issue commands step-by-step.

[0211] 3.3 Execution paths applicable to liquid crystal polymers, electrochromic and holographic light field materials

[0212] When the target display medium is a liquid crystal polymer, electrochromic material, holographic light field material, or other display medium with photoresponse characteristics, the display execution module can adopt direct light modulation, photoinduced state switching, or low-power light-triggered coupling path according to its material response mechanism. Specifically, the decompressed light signal can directly act on the local response area of ​​the target material, causing changes in its transmittance, reflectivity, phase characteristics, diffraction characteristics, or local display state.

[0213] In a preferred embodiment, for display materials with selective wavelength response characteristics, a multi-wavelength mapping path can also be set, that is, the input wavelength, near-infrared wavelength or other functional wavelengths can be mapped to functional light bands suitable for the response of the target display material through frequency doubling, frequency mixing, frequency conversion or selective coupling, so as to improve the coupling compatibility between different display media and decompressed optical signals.

[0214] 3.4 Input optical signal and physical decompression

[0215] In this embodiment, the input optical signal is preferably a coherent optical signal with a defined phase relationship, frequency structure, and time envelope. In addition to carrying display content information, the input optical signal can also simultaneously carry beat information, phase information, local priority information, or area control information. The input optical signal undergoes physical layer decompression via one or more of the following: arrayed waveguide gratings, optical comb filters, nonlinear optical media, silicon-based nanowaveguides, beam splitters, couplers, phase controllers, and on-chip optical units suitable for wavelength mapping, frequency unrolling, or parallel routing. This results in multiple optical execution signals in the optical domain corresponding to the response areas of subsequent LBS scanning units or other display media.

[0216] 3.5 Optical Clock Synchronization and Spatial Mapping

[0217] In this embodiment, the optical clock extraction and synchronization module is used to extract the reference clock from the input optical signal and maintain physical synchronization between the decompression process, the spatial mapping process and the display execution process through injection locking, asynchronous physical phase-locked loop or other optical phase-locked mechanisms.

[0218] The optical signal spatial mapping module maps the decompressed multi-channel optical signals to the target scanning channel, target micromirror unit, target phase modulation region, or target material response region according to the target medium type. For LBS structures, the mapping may correspond to the spatial partitioning of the scanning path or the physical correspondence of local scanning units; for other display media, the mapping may correspond to the physical correspondence of local response regions, pixel arrays, or functionally coupled channels.

[0219] 3.6 Asynchronous Compensation

[0220] In a preferred embodiment, this embodiment may further include an asynchronous compensation module. When the system receives RTK, VIO, inertial navigation, head attitude sensor, angular velocity sensor or other pose-related inputs, it can compensate for the time relationship, phase relationship or spatial correspondence of the target scanning branch, target material response branch or target coupling channel through tunable optical delay lines, thermo-optic effects, electro-optic effects, MEMS micro-adjustment structures or other optical path correction methods.

[0221] For LBS structures, this compensation can be manifested as a correction of local scanning beat, scanning path, or scanning phase; for liquid crystal polymers, electrochromic materials, and holographic light field materials, this compensation can be manifested as a correction of the response timing or phase relationship of local modulation regions. This can reduce visual drift and display misalignment in dynamic scenes.

[0222] 3.7 Power equalization, noise control and feedback calibration

[0223] In a preferred embodiment, this example can also be configured with a power equalization module, a squelch control module, and a feedback calibration module. The power equalization module may include a dynamic optical power gain and equalization structure based on a micro-ring resonator, used to compensate for optical power attenuation caused by beam splitting, long-path transmission, or local coupling. The squelch control module may include a nonlinear threshold squelch mechanism and / or a coherent destructive squelch mechanism, used to suppress black field leakage and crosstalk. The feedback calibration module can identify and correct brightness deviations, phase deviations, time delay deviations, or local coupling states by extracting the returned optical signal from the display output area, local optical interface, or target response area.

[0224] For LBS structures, the feedback calibration module can also be used to identify scan path deviations or local scan beat errors; for other display media, the feedback calibration module can be used to identify local modulation response deviations, phase drift, or the effects of environmental disturbances.

[0225] 3.8 All-optical isolation control and physical layer protection

[0226] In a preferred embodiment, this embodiment may further include an all-optical isolation control module and / or a physical layer protection module. The all-optical isolation control module may use optical phase modulation, optical intensity modulation, or optical path switching to couple control information into the display link to reduce the risk of high-frequency electromagnetic noise entering the sensing area; the physical layer protection module may utilize the phase randomness, local non-repeatability, path conditions, or phase distribution patterns of the input optical signal or during the decompression process to physically protect the display data, ensuring that the display data is correctly reconstructed and displayed only under specific optical path conditions, specific phase conditions, or specific decompression states.

[0227] 3.9 Implementation Results

[0228] Through the above structure, this embodiment enables the decompressed optical signal to participate in scanning control, local modulation, phase control, state switching, or other display-related physical processes according to the response mechanisms of different display media, thereby completing the display output without relying on traditional electrical logic step-by-step addressing control. Therefore, this embodiment demonstrates that the present invention is not limited to a specific display material or a specific display structure, but is applicable to LBS and other display media with photoresponse characteristics, providing broader implementation support for the technical solution of the present invention.

Claims

1. A microdisplay direct-drive physical synchronization architecture based on optical decompression signals, characterized in that, include: The coherent optical input module is used to receive input optical signals carrying compressed display information; The physical layer decompression module is used to decompress and spatially unfold the input optical signal at the physical optics level to form multiple parallel optical execution signals or beam splitting optical pulses. The optical clock extraction and synchronization module is used to extract clock information from the input optical signal and keep the decompression process, spatial mapping process and display execution process synchronized at the physical layer. The optical signal spatial mapping module is used to distribute the decompressed multi-channel optical execution signals to the target display area or target display unit according to a predetermined topology. The display execution module is used to enable the decompressed optical execution signal to directly participate in the physical state changes of the display medium without relying on traditional electrical logic addressing control, so as to form display output; The architecture further includes one or more of the following modules: asynchronous compensation module, power equalization module, noise squelch control module, feedback calibration module, all-optical isolation control module, and physical layer encryption module, to form a full-link physical synchronization display path from compressed coherent optical signal input, physical layer decompression, physical synchronization, topology mapping, direct participation of optical signals in changes in the physical state of the display medium, display execution to feedback correction; the timing definition, spatial definition, and state triggering definition of the target display state are directly locked at the physical layer by the decompressed optical execution signal.

2. The micro-display direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The input optical signal is a coherent optical signal with a defined phase relationship, frequency structure, and time envelope. In addition to carrying display content information, the input optical signal also carries one or more of the following: beat information, phase information, local priority information, and area control information.

3. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The physical layer decompression module uses one or more of the following: arrayed waveguide gratings, optical comb filters, nonlinear optical media, silicon-based nanowaveguides, beam splitters, couplers, phase controllers, and on-chip optical units suitable for wavelength mapping, frequency expansion, or parallel routing. This allows the compressed input optical signal to be expanded in a one-to-many manner at the physical layer, forming a multi-path parallel photon stream, beam-splitting optical pulse, or equivalent spatially distributed beam suitable for high-density display execution.

4. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The optical clock extraction and synchronization module is used to extract reference beats from the packet header, preamble, carrier frequency, frequency band relationship, repetition period, periodic structure or phase relationship of the input optical signal, and through injection locking, asynchronous physical phase-locked loop or other optical phase-locked mechanisms, enable the local scanning unit, phase control unit, delay unit or coupling unit in the subsequent display execution link to use the input optical signal as a unified synchronization source. The unified synchronization source continuously acts on one or more downstream units during the decompression, spatial mapping, display execution, and dynamic compensation processes to avoid link-level timing deviations introduced by independent local electronic clocks.

5. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The optical signal spatial mapping module is used to map the decompressed multi-channel optical execution signals to the target display area, target pixel array, or target coupling channel according to a predetermined topological relationship or geometric consistency relationship, so that the display system forms a physical addressing logic based on geometric correspondence. The physical addressing logic includes one or more of hierarchical addressing, layered topology addressing, and optical matrix addressing.

6. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The display execution module includes one or both of the following two paths: One is the pixel direct-drive coupling path, where the decompressed light signal directly acts on the target response structure of the display medium to trigger energy level transitions, stimulated emission, mechanical deflection, optical modulation, or state switching. The second is the light-triggered gating path, which directly changes the conduction conditions of the local gate structure by the decompressed light signal, so that the preset power supply rail is turned on without going through the traditional pixel-by-pixel electronic logic addressing, thereby realizing the light-triggered display behavior.

7. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 6, characterized in that: When the pixel direct-drive coupling path is used, the display medium is one of Micro-LED, LBS, liquid crystal polymer, electrochromic material or holographic light field material; When the display medium is an LBS scanning display structure, the decompressed optical signal directly participates in micromirror deflection control, scanning path control, or local scanning cycle control. When the optical triggering gated path is used, the local gated structure includes one or more of the following: photosensitive gate, optically controlled resistor region, barrier layer or equivalent light-receiving conduction structure, and its conduction change is achieved based on photoinduced carrier generation, local barrier modulation, band bending modulation or local depletion region width change. The optically triggered gating path does not involve electrical buffering, frame-by-frame buffering, line-by-line buffering, column-by-column buffering, or traditional line-by-line electrical scanning logic addressing networks for image data; Any local power supply, local holding or local electrical auxiliary structure is only used to provide energy support or short-term state maintenance, and is not used to independently determine the timing position, spatial position or display state of the target display unit.

8. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The asynchronous compensation module is used to receive RTK, VIO, inertial navigation, head attitude sensor, angular velocity sensor or other pose-related inputs, and to compensate for the time relationship, phase relationship or spatial correspondence of the target display branch through tunable optical delay line, thermo-optic effect, electro-optic effect, MEMS micro-adjustment structure or other optical path correction methods. The power equalization module includes a dynamic gain and equalization structure for optical power based on a micro-ring resonator, which is used to compensate for optical power attenuation caused by large-scale beam splitting, long-path transmission or local coupling, and to perform local gain compensation or power recovery adjustment on the corresponding branch when the effective optical power of the target display branch is lower than the preset compensation threshold. The noise control module includes a nonlinear threshold noise suppression mechanism and / or a coherent destructive noise suppression mechanism. The nonlinear threshold noise suppression mechanism is used to suppress the target pixel response when the effective input light intensity of the target display branch is lower than the local trigger threshold, and to allow the target pixel to enter the effective display response state when it is higher than the local trigger threshold. The feedback calibration module is used to extract the return light signal from the display output area, pixel unit or local optical interface, and to identify and correct the brightness deviation, phase deviation, delay deviation or local coupling state according to the return light signal.

9. The microdisplay direct-drive physical synchronization architecture based on optical decompression signals according to claim 1, characterized in that: The all-optical isolation control module uses optical phase modulation, optical intensity modulation or optical path switching to couple control information into the display link, so as to reduce the risk of high-frequency electromagnetic noise entering the sensing area. The physical layer encryption module uses the phase randomness, local non-repeatability, path conditions, or phase distribution patterns of the input optical signal or during the decompression process to physically protect the display data, so that the display data can only be correctly reconstructed and displayed under specific optical path conditions, specific phase conditions, or specific decompression states.

10. A microdisplay direct-drive physical synchronization method based on optical decompression signals, characterized in that, Includes the following steps: S1: Receive a coherent optical signal carrying compressed display information; S2: Decompress and spatially unfold the coherent optical signal at the physical layer to form multiple parallel optical execution signals or beam splitting optical pulses; S3: Extract the beat information from the coherent optical signal and establish the physical synchronization relationship between the decompression process, the spatial mapping process and the display execution process; S4: Map the decompressed multi-channel optical execution signals to the target display area or target display unit according to a predetermined topology; S5: The decompressed optical execution signal is driven through the pixel direct-drive coupling path and / or the optical trigger gate path to directly participate in the physical state changes of the display medium without relying on the traditional electrical logic step-by-step addressing control, so as to form the display output; S6: As needed, perform one or more of the following processes on the display branch: asynchronous compensation, power equalization, noise control, feedback calibration, all-optical isolation control, or physical layer encryption.

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