Display driving circuit, display panel and display driving method

Abstract

This application discloses a display driving circuit, a display panel, and a display driving method, relating to the field of display technology. The display driving circuit includes a pixel, a first gate line, a second gate line, and display data lines for the column where the pixel is located. The first gate line is the gate line for the row where the pixel is located, and the second gate line is the gate line adjacent to the first gate line in the scanning timing sequence. The pixel includes a driving module, a light-emitting module, and a pre-charge module. The input terminal of the driving module is connected to the display data lines, the control terminal of the driving module is connected to the first gate line, and the output terminal of the driving module is connected to the input terminal of the light-emitting module. The control terminal of the pre-charge module is connected to the second gate line, and the output terminal of the pre-charge module is connected to the storage terminal of the driving module. The pre-charge module is used to pre-charge the driving module connected to it when the second gate line outputs a valid strobe signal. This application solves the technical problem of uneven display caused by insufficient charging.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to display driving circuits, display panels, and display driving methods. Background Technology

[0002] In the field of OLED (Organic Light-Emitting Diode) displays, thin-film transistors (TFTs) are typically used to charge the storage capacitors of pixels to write data voltages. However, due to the limited mobility of TFTs, their conduction current is limited, and the rise and fall of the voltage across the capacitor also requires a certain amount of time. Consequently, the storage capacitors are difficult to charge to the target voltage within the limited charging time, resulting in insufficient charging and causing uneven display issues.

[0003] The above content is only used to help understand the technical solutions of the embodiments of this application, and does not represent an admission that the above content is prior art. Summary of the Invention

[0004] The main objective of this application is to provide a display driving circuit, a display panel, and a display driving method, which aims to solve the technical problem of uneven display caused by insufficient charging.

[0005] To achieve the above objectives, this application provides a display driving circuit, which includes a pixel, a first gate line, a second gate line, and a display data line for the column where the pixel is located. The first gate line is the gate line for the row where the pixel is located, and the second gate line is the previous gate line adjacent to the first gate line in the scanning timing. The pixel includes a driving module, a light-emitting module, and a pre-charging module. The input terminal of the driving module is connected to the display data line, the control terminal of the driving module is connected to the first gate line, the output terminal of the driving module is connected to the input terminal of the light-emitting module, the control terminal of the pre-charge module is connected to the second gate line, and the output terminal of the pre-charge module is connected to the storage terminal of the driving module. The pre-charge module is used to pre-charge the drive module when the second gate line outputs a valid strobe signal.

[0006] In one embodiment, the driving module includes a first transistor, a second transistor, and a storage capacitor; The first terminal of the first transistor is used as the input terminal of the driving module, the control terminal of the second transistor is used as the control terminal of the driving module, and the first terminal of the storage capacitor is used as the storage terminal of the driving module. The second terminal of the first transistor is connected to the first terminal of the storage capacitor, the second terminal of the storage capacitor is connected to the first terminal of the second transistor, the control terminal of the second transistor is also connected to the first terminal of the storage capacitor, and the third terminal of the second transistor is used as the output terminal of the driving module.

[0007] In one embodiment, the precharge module includes a precharge data line and a precharge transistor; The control terminal of the precharge transistor is used as the control terminal of the precharge module, the precharge data line is connected to the first terminal of the precharge transistor, and the second terminal of the precharge transistor is used as the output terminal of the precharge module.

[0008] In one embodiment, the display driving circuit further includes a precharge control module, the output of which is connected to the precharge data line; The precharge control module is used to determine a precharge voltage between the target charging voltage that the pixel needs to reach and the reference voltage of the pixel. The precharge voltage is output to the precharge data line when the second gate line outputs a valid strobe signal. Wherein, when the row containing the pixel is not the first row, the reference voltage is the charging voltage that the pixel in the previous row that is in the same column and adjacent to the pixel needs to reach; when the row containing the pixel is the first row, the reference voltage is the charging voltage that the pixel in the last row that is in the same column as the pixel needs to reach in the previous frame, or a preset default voltage.

[0009] In one embodiment, the display driving circuit further includes a timing controller, a level shifter, and a buffer; The output of the timing controller is connected to the input of the precharge control module, the output of the precharge control module is connected to the input of the level converter, the output of the level converter is connected to the input of the buffer, and the output of the buffer is connected to the precharge data line. The timing control is used to send the target charging voltage that the pixel needs to reach and the reference voltage of the pixel to the precharge control module.

[0010] In one embodiment, when the row containing the pixel is the first row, the control terminal of the pre-charge module of the pixel also supports access to a preset frame start terminal; When the control terminal of the precharge module of the pixel is connected to the preset frame start terminal, the precharge module is also used to precharge the driving module of the pixel when the precharge module of the pixel receives the frame start signal output by the preset frame start terminal.

[0011] In addition, to achieve the above objectives, this application embodiment also provides a display panel, which includes the display driving circuit described above.

[0012] Furthermore, to achieve the above objectives, embodiments of this application also provide a display driving method applied to the display panel described above, the display driving method comprising: For each pixel in the display panel, when the previous gate line adjacent to the pixel in the scanning timing outputs a valid strobe signal, the pre-charge module of the pixel is turned on, and the pre-charge module pre-charges the driving module of the pixel.

[0013] In one embodiment, the step of pre-charging the driving module of the pixel through the activated pre-charging module includes: Obtain the target charging voltage that the pixel needs to achieve; The pre-charge data line in the pre-charge module, which controls the conduction, pre-charges the storage capacitor in the drive module according to the target charging voltage; or... The reference voltage of the pixel is obtained, and based on the reference voltage and the target charging voltage, the pre-charging voltage is determined, and the pre-charging data line is controlled to pre-charge the storage capacitor according to the pre-charging voltage.

[0014] In one embodiment, the step of obtaining a reference voltage of the pixel and determining a pre-charge voltage based on the reference voltage and the target charging voltage includes: If the row containing the pixel is the first row, the charging voltage required in the previous frame for the last row of pixels in the same column as the pixel is used as the reference voltage, or a preset default voltage is used as the reference voltage. If the row containing the pixel is not the first row, the charging voltage that the pixel in the same column and adjacent to the previous row needs to reach is used as the reference voltage. Calculate the average voltage between the reference voltage and the target charging voltage, and use the average voltage as the pre-charging voltage.

[0015] One or more technical solutions proposed in the embodiments of this application have at least the following technical effects: The display driving circuit includes a pixel, a first gate line, a second gate line, and a display data line of the column where the pixel is located. The first gate line is the gate line of the row where the pixel is located, and the second gate line is the previous gate line adjacent to the first gate line in the scanning timing. The pixel includes a driving module, a light-emitting module, and a pre-charge module. The input terminal of the driving module is connected to the display data line, the control terminal is connected to the first gate line, and the output terminal is connected to the input terminal of the light-emitting module. The control terminal of the pre-charge module is connected to the second gate line, and the output terminal is connected to the storage terminal of the driving module. The pre-charge module is configured to pre-charge the storage terminal of the driving module when the second gate line outputs a valid strobe signal. Since the second gate line is the gate line adjacent to the first gate line in the scanning timing, the second gate line will output a valid gating signal before the first gate line in the scanning timing. When the second gate line outputs a valid gating signal before the first gate line, the precharge module is turned on in advance. During the effective period of the second gate line, a precharge charge is injected into the storage terminal of the driving module. This ensures that before the first gate line becomes effective and the driving module is turned on to write the data voltage, a certain voltage level has been pre-established at the storage terminal of the driving module. The amount of charge that the driving module needs to supplement is reduced, and the target voltage can be quickly reached in a shorter scanning time. This effectively compensates for the insufficient charging current caused by the limited mobility of thin-film transistors and the limited charging time of a single line, thereby solving the technical problem of uneven display caused by insufficient charging. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with those described herein and, together with the specification, serve to explain the principles of those embodiments.

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A schematic diagram of charging a capacitor; Figure 2 This is a schematic diagram showing the flow of charge carriers in a TFT (Thin-Film Transistor). Figure 3 This is a schematic diagram of a module in a driving circuit according to an embodiment of this application; Figure 4 The circuit diagram of the driving module in the driving circuit is shown in the embodiment of this application; Figure 5This is a circuit diagram of the driving module and the light-emitting module in the display driving circuit according to an embodiment of this application; Figure 6 The diagram below shows the driving module, light-emitting module, and pre-charge module in the driving circuit of the present application embodiment. Figure 7 This is a schematic diagram showing the conduction status of two adjacent pixels in the same column when the gate line Gate(n-1) outputs a valid gating signal in the display driving circuit according to an embodiment of this application. Figure 8 This is a schematic diagram showing the conduction status of two adjacent pixels in the same column when the gate line Gate(n) outputs a valid strobe signal in the driving circuit of this application embodiment; Figure 9 This is a schematic diagram showing the module connection of the precharge control module in the drive circuit according to an embodiment of this application; Figure 10 This is a schematic diagram showing the module connections of the precharge control module, timing controller, level converter, and buffer in the driving circuit of this application embodiment; Figure 11 This is a schematic diagram showing an example of a driving circuit in this application, illustrating the determination of the precharge voltage in the precharge control module; Figure 12 This is a schematic diagram showing the determination of the precharge voltage in the precharge control module in another example of the driving circuit shown in the embodiments of this application.

[0019] Explanation of icon numbers: S, Source; G, Gate; D, Drain; Acl, Active Layer; 100, Driver Module; 200, Light Emitting Module; 300, Precharge Module; Datax, Display Data Line; Gate(n), First Gate Line; Gate(n-1), Second Gate Line; Q1~Q3, First Transistor~Third Transistor; Q4, Precharge Transistor; C, Storage Capacitor; Elvdd, Preset Forward Bias Voltage; Sensor, Current Detection Terminal; Elvss, Preset Negative Bias Voltage; Datax 1. Precharge data line; OLED, light-emitting diode; Xn-1, pixel in row n-1; Xn, pixel in row n; 400, precharge control module; 500, timing controller; 600, level shifter; 700, buffer; Gate(i), i-th gate line; Gate(i-1), i-1-th gate line; Gate(i-2), i-2-th gate line; Xi, pixel in row i of the same column as Xi-1; Xi-1, pixel in row i-1 of the same column as Xi.

[0020] The objectives, features, and advantages of the embodiments described in this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0021] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of the embodiments of this application and are not intended to limit the embodiments of this application.

[0022] To better understand the technical solutions of the embodiments of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0023] OLED technology has been widely adopted because it has advantages such as low power consumption, fast response speed, wide viewing angle, high resolution display, wide temperature characteristics, flexible screen, and relatively light weight. Because of these advantages, more and more display manufacturers are investing in OLED research and development, which has greatly promoted the industrialization of OLED.

[0024] However, when OLEDs are used in display panels, they rely on TFTs and storage capacitors for display. Because TFT mobility has certain specifications (for example, the mobility of traditional amorphous silicon is only about 0.5 cm² / V·s, while the mobility of amorphous IGZO is generally around 10 cm² / V·s), and because there is time for voltage rise and fall during charging, the time required to fully charge the storage capacitor is relatively limited, especially in high refresh rate scenarios where the time is further shortened. For example, see... Figure 1 , Figure 1 The diagram illustrates the rise and fall of voltage during capacitor charging. Figure 1 As can be seen, the voltage rise and fall of the capacitor both require a certain amount of time, which limits the charging time.

[0025] You can also refer to Figure 2 , Figure 2 The diagram shows the passage of charge carriers in a TFT. Figure 2 In this diagram, G represents the gate of the TFT, S represents the source of the TFT, D represents the drain of the TFT, and Acl represents the active layer of the TFT. When the gate of the TFT is turned on, a conductive channel is formed in the active layer, and charge carriers (electrons or holes) move directionally in this channel, thereby enabling current conduction between the source and drain. Figure 2 The dashed line indicates the direction of carrier flow after the TFT is turned on. Mobility represents the ability of carriers in the active layer to pass through after the TFT gate is turned on; the magnitude of mobility affects the charging and discharging of the storage capacitor. Furthermore, refer to Formula 1, which is the formula for the current passing through the source and drain of the TFT per unit time.

[0026] (Formula 1); in, C is the current flowing from the source to the drain in the TFT. ox V is the gate insulating layer capacitance, W / L is the channel width-to-length ratio of the TFT, and V is the gate insulating layer capacitance. GS V represents the voltage between the gate and source. TH The threshold voltage of the TFT is represented by μ, which is the carrier mobility. It can be seen that within a finite time, the current passing through the TFT will be limited by the mobility, which will affect the charging of the storage capacitor and lead to insufficient charging.

[0027] Therefore, this embodiment provides a display driving circuit, which includes a pixel, a first gate line, a second gate line, and a display data line of the column where the pixel is located. The first gate line is the gate line of the row where the pixel is located, and the second gate line is the previous gate line adjacent to the first gate line in the scanning timing. The pixel includes a driving module, a light-emitting module, and a pre-charge module. The input terminal of the driving module is connected to the display data line, the control terminal is connected to the first gate line, and the output terminal is connected to the input terminal of the light-emitting module. The control terminal of the pre-charge module is connected to the second gate line, and the output terminal is connected to the storage terminal of the driving module. The pre-charge module is configured to pre-charge the storage terminal of the driving module when the second gate line outputs a valid strobe signal. Since the second gate line is the gate line adjacent to the first gate line in the scanning timing, the second gate line will output a valid gating signal before the first gate line in the scanning timing. When the second gate line outputs a valid gating signal before the first gate line, the precharge module is turned on in advance. During the effective period of the second gate line, a precharge charge is injected into the storage terminal of the driving module. This ensures that before the first gate line becomes effective and the driving module is turned on to write the data voltage, a certain voltage level has been pre-established at the storage terminal of the driving module. The amount of charge that the driving module needs to supplement is reduced, and the target voltage can be quickly reached in a shorter scanning time. This effectively compensates for the insufficient charging current caused by the limited mobility of thin-film transistors and the limited charging time of a single line, thereby solving the technical problem of uneven display caused by insufficient charging.

[0028] Based on this, the present application provides a display driving circuit, referring to... Figure 3 , Figure 3 This is a schematic diagram of a module in an embodiment of the display driving circuit of this application. The display driving circuit includes a pixel, a first gate line Gate(n), a second gate line Gate(n-1), and a display data line Datax for the column where the pixel is located. The first gate line Gate(n) is the gate line of the row where the pixel is located, and the second gate line Gate(n-1) is the previous gate line adjacent to the first gate line Gate(n) in the scanning timing. The pixel includes a driving module 100, a light-emitting module 200, and a pre-charge module 300. The input terminal of the driving module 100 is connected to the display data line Datax, the control terminal of the driving module 100 is connected to the first gate line Gate(n), the output terminal of the driving module 100 is connected to the input terminal of the light-emitting module 200, the control terminal of the pre-charge module 300 is connected to the second gate line Gate(n-1), and the output terminal of the pre-charge module 300 is connected to the storage terminal of the driving module 100. The precharge module 300 is used to precharge the drive module 100 when the second gate line Gate(n-1) outputs a valid strobe signal.

[0029] It should be noted that the display driving circuit is applied to the display panel and can be used to drive the pixel display in the display panel. The display panel includes multiple pixels arranged in an array, and each pixel includes a driving module 100, a light-emitting module 200, and a pre-charge module 300. In the display panel, multiple pixels in the same column share the same display data line Datax, and the driving modules 100 of multiple pixels in the same row share the same gate line.

[0030] For each pixel in the display panel, the first gate line Gate(n) connected to the driving module 100 in the pixel is the gate line of the row where the pixel is located. The first gate line Gate(n) is connected to the control terminal of the driving module 100 in the pixel, and is also used to connect to the control terminal of the pre-charge module 300 in the next row of pixels. The second gate line Gate(n-1) connected to the pre-charge module 300 in the pixel is a gate line that is adjacent to the first gate line Gate(n) in the scan timing and whose effective strobe signal appears earlier than the first gate line Gate(n). In progressive scan driving, the second gate line Gate(n-1) corresponds to the gate line connected to the pixel in the row above the pixel. For example, when the first gate line Gate(n) is the gate line connecting the pixels in the first row, the second gate line Gate(n-1) can be the gate line connecting the pixels in the last row of the display panel, that is, the gate line connecting the pixels in the last row. When the first gate line Gate(n) is in the first row, the second gate line Gate(n-1) is adjacent to the first gate line Gate(n) in the scanning timing. When the first gate line Gate(n) is the gate line connecting the pixels in the k-th row, the second gate line Gate(n-1) is the gate line connecting the pixels in the (k-1)-th row. k and n are both positive integers greater than 1. The maximum value of k is M, and the maximum value of n is also M. M is the total number of rows in the display panel. M is a positive integer, and M is greater than n and also greater than k.

[0031] The Datax display line is used to provide display data voltage to the pixels. Each pixel in a given column corresponds to one Datax display line, and pixels in the same column share the same Datax display line.

[0032] For each pixel, the input terminal of the pixel driving module 100 receives the data voltage provided by the display data line Datax, the control terminal of the driving module 100 receives the valid gating signal provided by the first gate line Gate(n), and the output terminal of the driving module 100 provides driving current to the light-emitting module 200. The pre-charge module 300 is used to pre-charge the driving module 100 when the second gate line Gate(n-1) outputs a valid gating signal. By turning on the pre-charge module 300 through the second gate line Gate(n-1), the potential of the storage terminal of the driving module 100 can be pre-raised before the first gate line Gate(n) is selected, reducing the amount of charge replenishment in the subsequent formal charging stage. When the first gate line Gate(n) outputs a valid gating signal, the pre-charge module 300 of the next row of pixels will also receive the valid gating signal output by the first gate line Gate(n), and thus the pre-charge module 300 of the next row of pixels will also pre-charge the driving module 100 of the next row of pixels in advance.

[0033] A valid strobe signal is a level signal applied to a gate line that turns on the transistor in the corresponding module. For example, when the second gate line Gate(n-1) outputs a valid strobe signal, the precharge module 300 connected to the second gate line Gate(n-1) is turned on, and the drive module 100 connected to the second gate line Gate(n-1) is also turned on. For the same gate line, the gate line connects to the drive module 100 of the pixel in the row where the gate line is located, and to the precharge module 300 of the pixel in the row below the gate line. The precharge module 300 is used to precharge the drive module 100 connected to it when the second gate line Gate(n-1) outputs a valid strobe signal.

[0034] Pre-charging refers to the process by which the pre-charging module 300 injects charge into the storage terminal of the driving module 100 and establishes a certain voltage in advance before the first gate line Gate(n) outputs a valid gating signal and the driving module 100 formally writes the display data voltage. That is, in this embodiment, the gating time window of the previous row of pixels can be used to charge the driving module 100 of the current row of pixels in advance, so that when the current row of pixels is gating, it can quickly reach the voltage that needs to be charged, thereby solving the problem of uneven display caused by insufficient charging.

[0035] The light-emitting module 200 is a component that emits light under the action of the output current of the driving module 100. The light-emitting module 200 can be a light-emitting diode (OLED).

[0036] The display driving circuit includes a pixel, a first gate line Gate(n), a second gate line Gate(n-1), and a display data line Datax for the column where the pixel is located. The first gate line Gate(n) is the gate line of the row where the pixel is located, and the second gate line Gate(n-1) is the previous gate line adjacent to the first gate line Gate(n) in the scanning timing. The pixel includes a driving module 100, a light-emitting module 200, and a pre-charge module 300. The input terminal of the driving module 100 is connected to the display data line Datax, the control terminal is connected to the first gate line Gate(n), and the output terminal is connected to the input terminal of the light-emitting module 200. The control terminal of the pre-charge module 300 is connected to the second gate line Gate(n-1), and the output terminal is connected to the storage terminal of the driving module 100. The pre-charge module 300 is configured to pre-charge the storage terminal of the driving module 100 when the second gate line Gate(n-1) outputs a valid strobe signal. Since the second gate line Gate(n-1) is the gate line adjacent to the first gate line Gate(n) in the scan timing, the second gate line Gate(n-1) will output a valid gating signal before the first gate line Gate(n) in the scan timing. When the second gate line Gate(n-1) outputs a valid gating signal before the first gate line Gate(n), the precharge module 300 is turned on in advance. During the period when the second gate line Gate(n-1) is valid, a precharge charge is injected into the storage terminal of the driving module 100. This ensures that before the first gate line Gate(n) is valid and the driving module 100 is turned on to write the data voltage, a certain voltage level has been pre-established at the storage terminal of the driving module 100. The amount of charge that the driving module 100 needs to supplement is reduced, and the target voltage can be quickly reached in a shorter scan time. This effectively compensates for the insufficient charging current caused by the limited mobility of thin-film transistors and the limited charging time of a single line, thereby solving the technical problem of uneven display caused by insufficient charging.

[0037] In one feasible embodiment, please refer to Figure 4 The driving module 100 includes a first transistor Q1, a second transistor Q2, and a storage capacitor C; The first terminal of the first transistor Q1 is used as the input terminal of the driving module 100, the control terminal of the second transistor Q2 is used as the control terminal of the driving module 100, and the first terminal of the storage capacitor C is used as the storage terminal of the driving module 100. The second terminal of the first transistor Q1 is connected to the first terminal of the storage capacitor C, the second terminal of the storage capacitor C is connected to the first terminal of the second transistor Q2, the control terminal of the second transistor Q2 is also connected to the first terminal of the storage capacitor C, and the third terminal of the second transistor Q2 is used as the output terminal of the drive module 100.

[0038] It should be noted that the first transistor Q1 is a switching transistor in the driving module 100, and the conduction and cutoff of the first transistor Q1 are controlled by the first gate line Gate(n). The control terminal of the first transistor Q1 is the gate. The second transistor Q2 is a driving transistor in the pixel, and the control terminal of the second transistor Q2 is the gate. The second transistor Q2 is responsible for controlling the magnitude of the current arriving at the light-emitting module 200, thereby controlling the brightness of the light-emitting diode OLED in the light-emitting module 200.

[0039] The storage capacitor C is a capacitor element used to store voltage in the drive module 100. The first terminal of the first transistor Q1 is connected to the display data line Datax of the column where the pixel is located. The first terminal of the first transistor Q1 can be the source or the drain. The second terminal of the first transistor Q1 is connected to the first terminal of the storage capacitor C. The second terminal of the first transistor Q1 can also be the source or the drain. The first terminal and the second terminal of the first transistor Q1 are different. Specifically, when the storage capacitor C is charging, the first terminal of the first transistor Q1 is the source and the second terminal of the first transistor Q1 is the drain. When the storage capacitor C is discharging, the first terminal of the first transistor Q1 is the drain and the second terminal of the second transistor Q2 is the source.

[0040] When the first gate line Gate(n) outputs a valid gating signal, the first transistor Q1 is turned on. The voltage on the display data line Datax is written to the first terminal of the storage capacitor C via the first and second terminals of the first transistor Q1. After the first gate line Gate(n) is turned on (the first gate line Gate(n) stops outputting a valid gating signal), the first transistor Q1 is turned off, and the storage capacitor C maintains the voltage difference between the first and second terminals. The second transistor Q2 generates a corresponding driving current between its first and second terminals according to the voltage at the first terminal of the storage capacitor C. This current flows from the first terminal of the second transistor Q2 to the second terminal and is injected into the light-emitting module 200, driving the light-emitting module 200 to emit light at the corresponding brightness. The second terminal of the second transistor Q2 is also connected to a preset forward bias voltage Elvdd. The preset forward bias voltage provides a forward bias voltage for the light-emitting diode OLED in the light-emitting module 200, enabling the light-emitting diode OLED to emit light. The driving module 100 provides a driving current to the light-emitting diode OLED, so that the light-emitting diode OLED emits light at the brightness corresponding to the driving current.

[0041] The light-emitting module 200 is a component that emits light under the influence of the output current from the driving module 100. The light-emitting module 200 can be a light-emitting diode (OLED). The input terminal of the OLED is connected to the output terminal of the driving module 100. In other embodiments, for example, refer to... Figure 5 , Figure 5The diagram shows a circuit schematic of the light-emitting module 200 and the driving module 100. The light-emitting module 200 may further include a third transistor Q3. Specifically, the anode of the light-emitting diode (OLED) is used as the input terminal of the light-emitting module 200, the cathode of the OLED is connected to a preset negative bias voltage Elvss, the first terminal of the third transistor Q3 is connected to the anode of the OLED, the second terminal of the third transistor Q3 is connected to a current detection terminal (Sensor), and the control terminal of the third transistor Q3 is connected to the first gate line (Gate(n)). When the first gate line (Gate(n)) outputs a valid gating signal, the third transistor Q3 also conducts, allowing the current in the OLED to be detected by the current detection terminal (Sensor). When the first gate line (Gate(n)) outputs a valid gating signal, the pre-charge module 300 in the next row of pixels is also turned on, allowing the next row of pixels to pre-charge the driving module 100 connected to the pre-charge module 300. All transistors from the first to the third can be TFTs.

[0042] In one embodiment, please refer to Figure 6 The precharge module 300 includes a precharge data line Datay and a precharge transistor Q4; The control terminal of the precharge transistor Q4 is used as the control terminal of the precharge module 300, the precharge data line Datay is connected to the first terminal of the precharge transistor Q4, and the second terminal of the precharge transistor Q4 is used as the output terminal of the precharge module 300.

[0043] It should be noted that pixels in the same column of the display panel share the same precharge data line Datay. This means that for pixels in the same column, the driving module 100 in each pixel is connected to the same display data line Datax, and the precharge module 300 in each pixel is connected to the same precharge data line Datay. Pixels in different columns are connected to different display data lines Datax and different precharge data lines Datay. The precharge transistor Q4 is a transistor used as a switch in the precharge module 300, and can be a TFT. The control terminal of the precharge transistor Q4 is connected to the second gate line Gate(n-1), and is used to turn on when the second gate line Gate(n-1) outputs a valid strobe signal, transmitting the voltage on the precharge data line Datay to the storage terminal of the driving module 100.

[0044] The control terminal of the precharge transistor Q4 is its gate. The first terminal of the precharge transistor Q4 is a port used to connect to the precharge data line Datay to receive the precharge voltage. The second terminal of the precharge transistor Q4 is a port used to output the precharge voltage to the storage terminal of the drive module 100.

[0045] When the second gate line Gate(n-1) outputs a valid strobe signal (i.e., the previous gate line adjacent to the first gate line Gate(n) in the scan timing is driven), the control terminal of the precharge transistor Q4 receives the valid strobe signal, and the precharge transistor Q4 is turned on. At this time, the precharge voltage on the precharge data line Datay is written to the storage terminal of the driving module 100 via the first and second terminals of the precharge transistor Q4, specifically to the storage capacitor C in the driving module 100, so that the voltage of the storage capacitor C is pre-established during the strobe period of the second gate line Gate(n-1). When the strobe period of the second gate line Gate(n-1) ends, the precharge transistor Q4 is turned off, and the voltage of the storage capacitor C remains near the precharge voltage level provided by the precharge data line Datay.

[0046] Therefore, when the first gate line Gate(n) outputs a valid gating signal and the display data line Datax begins writing the target charging voltage to the drive module 100, the initial voltage of the storage capacitor C is already higher than the initial voltage when the pre-charge module 300 is not set. Under the same thin-film transistor mobility and gating time conditions, the voltage difference required to charge the storage capacitor C from this higher initial voltage to the target charging voltage is reduced, allowing the storage capacitor C to be fully charged to the target charging voltage within a limited gating time. This alleviates the problem of insufficient charging caused by insufficient charging time, reduces the charging pressure during the gating period of this row, and improves charging efficiency.

[0047] In this embodiment, the pre-charge data line Datay is set independently of the display data line Datax. Therefore, the voltage for pre-charging the storage capacitor C is not limited by the current transmission voltage of the display data line Datax. The pre-charge voltage can be flexibly set as needed, making the selection of the pre-charge voltage more flexible and precise. Differentiated pre-charge control can be achieved for different pixel positions or different voltage requirements, further improving the speed and accuracy of charging the storage capacitor C to the target voltage and effectively improving the problem of uneven display brightness caused by insufficient charging.

[0048] To better understand this embodiment, please refer to Figure 7 and Figure 8 The pre-charging and normal charging processes are explained. Figure 7 and Figure 8 The text shows two adjacent pixels in the same column, where the two adjacent pixels are Xi-1 and Xi, and i is a positive integer greater than 1. Figure 7 and Figure 8 As can be seen, each pixel includes a pre-charge module 300, a driving module 100, and a light-emitting module 200. Figure 7In pixel Xi-1, the gate of the first transistor Q1 is connected to the (i-1)th gate line Gate(i-1), and the gate of the precharge transistor Q4 in pixel Xi-1 is connected to the (i-2)th gate line Gate(i-2). For pixel Xi-1, the (i-1)th gate line Gate(i-1) is the first gate line connected to pixel Xi-1, and the (i-2)th gate line Gate(i-2) is the second gate line connected to pixel Xi-1.

[0049] exist Figure 7 In pixel Xi, the gate of the first transistor Q1 is connected to the i-th gate line Gate(i), and the gate of the pre-charge transistor Q4 in pixel Xi is connected to the (i-1)-th gate line Gate(i-1). For pixel Xi, the i-th gate line Gate(i) is the first gate line of pixel Xi, and the (i-1)-th gate line Gate(i-1) is the second gate line connected to pixel Xi. (Refer to...) Figure 7 It can be seen that when Gate(i-1) outputs a valid strobe level, the first transistor Q1 in pixel Xi-1 is turned on, and the pre-charge transistor Q4 in pixel Xi-1 is turned off. When the pre-charge transistor Q4 in pixel Xi is turned on, both the first transistor Q1 and the third transistor Q3 in pixel Xi are turned off. The display data line Datax charges the storage capacitor C in pixel Xi-1, and the pre-charge data line Datay pre-charges the storage capacitor C in pixel Xi. Therefore, when Gate(i-1) outputs a valid strobe signal, such as a high level, Datax charges the storage capacitor C in row i-1, and Datay charges the storage capacitor in row i, thus achieving pre-charging and improving the problem of insufficient charging. If the voltage charged to pixel Xi-1 at this time is V1, and the target charging voltage required by pixel Xi is V2, then when the gate line Gate(i-1) is turned on, the pre-charge voltage applied by Datay to pixel Xi can be in the range (V1, V2).

[0050] Reference Figure 8 , Figure 8 The terminology refers to the conduction status of transistors in two adjacent pixels in the same column when Gate(i) outputs a valid pass signal. When Gate(i) outputs a valid pass signal, the first transistor Q1, pre-charge transistor Q4, and third transistor Q3 in pixel Xi-1 are all off, the pre-charge transistor Q4 in pixel Xi is off, and the first transistor Q1 and third transistor Q3 in pixel Xi are both on. The display data line Datax charges the storage capacitor C in pixel Xi, and the pre-charge data line Datay pre-charges the storage capacitor C in pixel Xi+1. Figure 8 Pixel Xi+1 is not shown in the diagram.

[0051] When the nth row gate line is turned on, Datax charges pixel Xn with the target charging voltage required for pixel Xn to be displayed. Because the storage capacitor C in pixel Xn is from the pre-charge voltage (the pre-charge voltage is at (V1,V2)) to V2, rather than from V1 to V2, the voltage change is reduced, the total amount of charging required is reduced, so the charging can reach the target charging voltage faster.

[0052] In one feasible embodiment, please refer to Figure 9 The display driving circuit also includes a precharge control module 400, the output of which is connected to the precharge data line Datay; The precharge control module 400 is used to determine the precharge voltage between the target charging voltage that the pixel needs to reach and the reference voltage of the pixel. The precharge voltage is output to the precharge data line Datay when the second gate line outputs a valid strobe signal. Specifically, when the row containing the pixel is not the first row, the reference voltage is the charging voltage that the pixel in the previous row, which is in the same column and adjacent to the pixel, needs to reach; when the row containing the pixel is the first row, the reference voltage is the charging voltage that the pixel in the last row, which is in the same column as the pixel, needs to reach in the previous frame, or the preset default voltage.

[0053] It should be noted that the precharge control module 400 is a drive unit used to generate a precharge voltage based on the target charging voltage and reference voltage of the pixel, and to provide the precharge voltage to the precharge data line Datay when the second gate line outputs a valid strobe signal.

[0054] The target charging voltage is the charging voltage required by the pixel. Specifically, it can be the target voltage value that the pixel needs to be written to the storage capacitor C during normal display driving. The target charging voltage determines the luminous brightness of the light-emitting module 200. The reference voltage is used together with the target charging voltage to determine the reference voltage for the pre-charging voltage. The value of the reference voltage is related to the pixel's position in the display panel and the scanning timing.

[0055] The first row is the first row in the display panel; for example, the first row is the first row selected during each frame's display scan. Non-first rows are the other pixel rows in the display panel besides the first row. The last row is the pixel row corresponding to the last row of gate lines in the display panel.

[0056] The preset default voltage can be the starting voltage of zero gray level, the reference voltage corresponding to the middle gray level, the voltage of the vertical blanking period, etc. This embodiment does not make specific limitations on this, and it can be set according to the actual situation.

[0057] For each pixel, the precharge control module 400 obtains the target charging voltage that the pixel needs to reach and obtains the corresponding reference voltage for that pixel. The precharge control module 400 determines a precharge voltage between the target charging voltage and the reference voltage, such that the voltage value of the precharge voltage is between the target charging voltage and the reference voltage. For example, it can take the average value of the two or a certain weighted value, or it can be the target charging voltage. When the second gate line outputs a valid strobe signal, the precharge control module 400 outputs the determined precharge voltage to the precharge data line Datay, which is then written to the storage terminal of the driver module 100 via the precharge transistor Q4, that is, written to the storage capacitor C.

[0058] The reference voltage is determined as follows: When the pixel's row is not the first row, the reference voltage is the charging voltage required by the pixel in the previous row that is in the same column as the current pixel and whose scanning sequence is adjacent. The target charging voltage of the previous row pixel is the charging voltage it needs to achieve. This previous row pixel is selected before the current pixel during line-by-line scanning, thus its charging voltage can be obtained. When the pixel's row is the first row, the reference voltage is either the preset default voltage or the charging voltage required by the pixel in the last row of the same column as the current pixel in the previous frame. Since there is no previous row pixel in the same frame before the first row pixel, the charging voltage of the last row pixel in the same column of the previous frame is retrieved as the reference. If there is no previous frame data (such as the first frame after startup), the preset default voltage can be used as the reference voltage.

[0059] When the target charging voltage is less than the reference voltage, the pre-charge voltage may be greater than the target charging voltage. When the pre-charge voltage is greater than the target charging voltage, the voltage stored in the storage capacitor C will also be greater than the target charging voltage. Therefore, when the drive module 100 containing the storage capacitor C is turned on, the storage capacitor C can discharge to reduce the voltage to the target charging voltage, thus ensuring that the voltage of the storage capacitor C meets the requirements. Since the pre-charge voltage is limited between the target charging voltage and the reference voltage, even if the pre-charge voltage is greater than the target charging voltage, the extent by which the pre-charge voltage exceeds the target charging voltage is limited by the reference voltage. Therefore, within a limited selection time, the voltage of the storage capacitor C can be reduced to the target charging voltage.

[0060] Therefore, regardless of the relative magnitude of the target charging voltage and the reference voltage, the pre-charge voltage can effectively reduce the difference between the initial voltage of the storage capacitor C and the target charging voltage, so that the target voltage can be reached by a small amount of charging or discharging within a limited scan time. This ensures both the speed of voltage establishment and the accuracy of the final write voltage, thereby reliably improving the problems of insufficient charging and the resulting uneven display.

[0061] In addition, during the actual driving process of the display panel, there is a non-negligible parasitic capacitance on the display data line Datax. The capacitance value of this parasitic capacitance is usually much larger than the capacitance value of the internal storage capacitor C of the pixel. Therefore, the voltage left over from the charging of the same pixel in the previous frame scan cycle has little impact on the charging process of the current frame. Thus, the voltage left over from the charging of the same pixel in the previous frame can be ignored in actual driving.

[0062] In one feasible embodiment, please refer to Figure 10 The display driver circuit also includes a timing controller 500, a level converter 600, and a buffer 700; The output of the timing controller 500 is connected to the input of the precharge control module 400, the output of the precharge control module 400 is connected to the input of the level converter 600, the output of the level converter 600 is connected to the input of the buffer 700, and the output of the buffer 700 is connected to the precharge data line Datay. Timing control is used to send the target charging voltage that the pixel needs to reach and the reference voltage of the pixel to the precharge control module 400.

[0063] It should be noted that the timing controller 500 is a controller used to generate the timing control signals required for the display driver. In this embodiment, the timing controller 500 can provide the precharge control module 400 with the target charging voltage information that the pixel needs to reach and the reference voltage of the pixel, so as to support the precharge control module 400 in determining the precharge voltage.

[0064] A level converter 600 is used to convert the voltage amplitude of the input signal into a circuit module suitable for the voltage amplitude required for subsequent circuit driving. In this embodiment, the level converter 600 converts the precharge voltage output by the precharge control module 400 into a level suitable for the driving requirements of the precharge data line Datay. A buffer 700 can be used to enhance the signal driving capability. In this embodiment, the buffer 700 is used to improve the driving capability of the precharge voltage converted by the level converter 600, so as to ensure that the precharge voltage can effectively drive the precharge module 300 connected to the precharge data line Datay.

[0065] In other words, it is understandable that after determining the precharge voltage, the precharge control module 400 will not directly input the precharge voltage to the precharge data line Datay. Instead, it will input the precharge voltage to the precharge data line Datay through the level converter 600 and the buffer 700. The precharge control module 400 is a driver chip, such as a DIC.

[0066] The timing controller 500 can generate a target charging voltage for each pixel in the display panel based on the image data to be displayed. The timing controller 500 can also acquire a reference voltage for each pixel. For each pixel, the timing controller 500 can send the target charging voltage and reference voltage to the pre-charge control module 400. The pre-charge control module 400 determines the pre-charge voltage based on the received target charging voltage and reference voltage and inputs it to the level converter 600. This pre-charge voltage is level-adjusted by the level converter 600 and then input to the buffer 700. The buffer 700 enhances the driving capability and finally loads it onto the pre-charge data line Datay. For each pixel, when the second gate line connected to the pixel outputs a valid strobe signal, the pre-charge transistor Q4 is turned on, and the pre-charge voltage on the pre-charge data line Datay is written to the memory of the drive module 100 via the pre-charge transistor Q4.

[0067] For example, you can refer to Figure 11 The precharge control module 400 determines the precharge voltage based on the target charging voltage and the reference voltage as follows: The timing controller 500 inputs the target charging voltage and the reference voltage to the DIC. The DIC stores the data sent by the TCON into its DATA latch. For each pixel, the charging voltage required by the pixel in the same column and the previous row is stored in DATA latch(n-1), and the target charging voltage of the pixel is stored in DATA latch(n). DATA latch(n-1) is one of the data latches in the DIC. latch(n) is another data latch in DIC. Taking the pre-charge voltage as the average of the target charging voltage and the reference voltage as an example, the calculation process in the pre-charge control module 400 is explained. The target charging voltage and the reference voltage are both represented in binary form in the pre-charge control module 400. The reference voltage is V(n-1): 00001010, and the target charging voltage is V(n): 00001110. Then, V(n-1) is shifted one bit to the right, and V(n) is also shifted one bit to the right. That is, V(n-1) was originally 00001010, and after shifting one bit, it becomes 00000101; V(n) was originally 00001110, and after shifting one bit, it becomes 00000111. Then, the two are summed to obtain the pre-charge voltage Vy: 00001100. In this case, the decimal value of V(n-1) is 10, the decimal value of V(n) is 14, and the decimal value of the pre-charge voltage obtained after calculation is 12.

[0068] In other embodiments, the precharge control module 400 may also directly use the target charging voltage as the precharge voltage, for example, referring to... Figure 12The timing controller 500 can also input the target charging voltage V(n) of the pixel to the precharge control module 400. The precharge control module 400 can directly output the target charging voltage as the precharge voltage to the level converter 600. After conversion by the level converter 600, it is input to the buffer 700, and then the precharge voltage is output to the precharge data line Datay via the buffer 700.

[0069] In one feasible embodiment, when the row containing the pixel is the first row, the control terminal of the pixel's pre-charge module 300 also supports accessing the preset frame start terminal. When the control terminal of the pixel precharge module 300 is connected to the preset frame start terminal, the precharge module 300 is also used to precharge the pixel driving module 100 when the pixel precharge module 300 receives the frame start signal output by the preset frame start terminal.

[0070] It should be noted that the preset frame start terminal is a signal port or signal line used to provide the frame start signal. The frame start signal marks the beginning of a frame image scanning cycle, and typically generates a pulse or active level at the beginning of each frame cycle to indicate the start of progressive scanning of a new frame image. The frame start signal can be output by the level converter 600, therefore the preset frame start terminal can be the output terminal of the level converter 600 that outputs the frame start signal.

[0071] The frame start signal is a control signal generated at the beginning of each frame of image scanning. In this embodiment, the frame start signal can be used to control the activation of the first row pixel pre-charge module 300. The frame start signal can be an STV signal. The frame start signal can be a high-level signal.

[0072] When a pixel is in the first row, the control terminal of the precharge module 300 for that pixel supports connection to both the second gate line and the preset frame start terminal. Specifically, the control terminal of the precharge module 300 in the first row can be connected to either the second gate line or the preset frame start terminal for that pixel. When the control terminal of the precharge module 300 in the first row is connected to the preset frame start terminal, it does not need to be connected to the second gate line corresponding to the first row pixel. When the precharge module 300 in the first row is connected to the second gate line, it does not need to be connected to the preset frame start terminal.

[0073] When a new frame scan cycle begins, the preset frame start terminal outputs a frame start signal. This preset frame signal is applied to the control terminal of the first row pixel pre-charge module 300, causing the pre-charge module 300 to conduct. During the conduction of the pre-charge module 300, the pre-charge voltage is written to the storage terminal of the first row pixel driving module 100, completing the pre-charge of the first row pixels. This embodiment supports connecting the control terminal of the first row pixel pre-charge module 300 to the preset frame start terminal, using the frame start signal to conduct the pre-charge module 300 of the first row pixels, thereby also realizing the pre-charge function of the first row pixels.

[0074] Furthermore, based on the above embodiments of this application, in another embodiment of this application, the same or similar content as the above embodiments can be referred to the above description, and will not be repeated hereafter. This application also provides a display panel, which includes the display driving circuit as described above. The display panel aims to solve the technical problem of uneven display caused by insufficient charging. Compared with the prior art, the beneficial effects of the display panel provided in this application embodiment are the same as the beneficial effects of the display driving circuit provided in the above embodiments, and will not be repeated here.

[0075] Furthermore, based on the above embodiments of this application, in another embodiment of this application, the same or similar content as the above embodiments can be referred to the above description, and will not be repeated hereafter. On this basis, this embodiment also provides a display driving method applied to a display panel, the display driving method including step S10: For each pixel in the display panel, when the previous gate line adjacent to the pixel in the scanning timing outputs a valid strobe signal, the precharge module of the pixel is turned on, and the precharge module precharges the driving module of the pixel.

[0076] It should be noted that during the line-by-line scanning drive of each row of pixels in the display panel, for each pixel, when the previous gate line (i.e., the second gate line) adjacent to the pixel in the scanning timing outputs a valid strobe signal, the precharge module control terminal of that pixel receives the valid strobe signal, and the precharge transistor in the precharge module is turned on. After the precharge transistor is turned on, power can be supplied to the pixel's drive module through the precharge data line. Precharging occurs before the first gate line corresponding to the pixel outputs a valid strobe signal and before the drive module officially writes the display data voltage.

[0077] Specifically, the timing of pre-charging can be determined by the scanning signal timing on the second gate line. When the pixel is the first pixel in the row, the timing of pre-charging can also be determined by the frame start signal. For non-first row pixels, the second gate line is the gate line of the previous row that is physically adjacent and has a higher scanning timing. The pre-charging operation of this pixel is synchronized with the display data writing operation of the previous row pixel. For first row pixels, the second gate line is the gate line of the last row in the display panel.

[0078] Since the second gate line is the gate line adjacent to the first gate line in the scanning timing, the second gate line will output a valid gating signal before the first gate line in the scanning timing. When the second gate line outputs a valid gating signal before the first gate line, the pre-charge module is turned on in advance. During the effective period of the second gate line, a pre-charge charge is injected into the storage terminal of the driving module. This ensures that before the first gate line becomes effective and the driving module is turned on to write the data voltage, a certain voltage level has been pre-established at the storage terminal of the driving module. The amount of charge that the driving module needs to supplement is reduced, and the target voltage can be quickly reached in a shorter scanning time. This effectively compensates for the insufficient charging current caused by the limited mobility of thin-film transistors and the limited charging time of a single line, thereby solving the technical problem of uneven display caused by insufficient charging.

[0079] In a feasible embodiment, step S10 further includes steps S11 to S13: Step S11: Obtain the target charging voltage that the pixel needs to achieve; Step S12: The precharge data line in the precharge module, which is controlled to be turned on, precharges the storage capacitor in the drive module according to the target charging voltage. It should be noted that the target charging voltage can be directly used as the pre-charging voltage. The pre-charging voltage is written into the storage capacitor through the conducting pre-charging module. Specifically, the pre-charging voltage can be written into the storage capacitor through the pre-charging data line and the pre-charging transistor.

[0080] In this embodiment, the target charging voltage is directly used for pre-charging. After pre-charging is completed, the storage capacitor voltage reaches or approaches the target charging voltage, thereby reducing the computational burden on the pre-charging control module to calculate the pre-charging voltage.

[0081] Alternatively, in step S13, the reference voltage of the pixel is obtained, and based on the reference voltage and the target charging voltage, the pre-charging voltage is determined, and the pre-charging data line is controlled to pre-charge the storage capacitor according to the pre-charging voltage.

[0082] It should be noted that the reference voltage of the pixel can also be obtained, and the pre-charge voltage can be determined based on the reference voltage and the target charging voltage. For example, the pre-charge voltage can be determined by the pre-charge control module in the display panel based on the reference voltage and the target charging voltage. For example, the pre-charge voltage can be the average value of the reference voltage and the target charging voltage, and the pre-charge data line can be controlled to pre-charge the storage capacitor according to the pre-charge voltage.

[0083] This embodiment introduces a reference voltage and determines the pre-charge voltage together with the target charging voltage. The pre-charge voltage is between the two, which can effectively reduce the voltage difference in the formal charging stage to shorten the charging time, and also take into account power consumption, avoiding excessive power consumption caused by applying the target charging voltage to both the pre-charge data line and the display data line.

[0084] In a feasible embodiment, step S13 further includes steps S131 to S133: Step S131: When the row where the pixel is located is the first row, the charging voltage that the last row pixel in the same column as the pixel in the previous frame needs to reach in the previous frame is used as the reference voltage, or the preset default voltage is used as the reference voltage. It should be noted that when the pixel is in the first row, there are two ways to obtain the reference voltage. One is to directly use the preset default voltage as the reference voltage. The preset default voltage can be set based on the actual situation; for example, it can be the voltage corresponding to 0 grayscale or the voltage corresponding to any grayscale. This embodiment does not specifically limit this. The other is to obtain the charging voltage that the pixel in the last row of the previous frame, which belongs to the same column as the pixel, needs to reach in the previous frame, as the reference voltage. Since the pixel in the first row does not have a gate line in the previous row, but the gate line of the pixel in the first row has an adjacent gate line in the scanning timing, for example, the gate line connected to the pixel in the last row of the previous frame. Therefore, the pixel in the first row can also determine the pre-charge voltage based on the reference voltage and the target charging voltage.

[0085] Step S132: If the row containing the pixel is not the first row, the charging voltage required to be reached by the pixel in the same column and adjacent to the previous row is used as the reference voltage. It should be noted that when a pixel is not in the first row, the reference voltage is the charging voltage that the pixel in the previous row, which is in the same column as the pixel, needs to reach in the current frame.

[0086] Step S133: Calculate the average voltage between the reference voltage and the target charging voltage, and use the average voltage as the pre-charging voltage.

[0087] It should be noted that after obtaining the target charging voltage and the reference voltage, the average value of the two is calculated, that is, the sum of the target charging voltage and the reference voltage is calculated to obtain the voltage sum, and half of the voltage sum is used as the pre-charge voltage.

[0088] This embodiment determines the reference voltage based on different scenarios and uses the average of the reference voltage and the target charging voltage as the pre-charging voltage, enabling flexible adjustment of the pre-charging voltage. Since there are no pixels in the previous row of the same frame for the first row of pixels, the voltage of the last pixel in the previous frame or a preset default voltage is used as a reference, ensuring that the first row of pixels also supports determining the pre-charging voltage based on the reference voltage and the target charging voltage. For pixels not in the first row, the target charging voltage of the pixel in the previous row of the same column is directly used as the reference, fully utilizing the coupling effect of the parasitic capacitance of the display data lines on the charging process of adjacent rows, making the reference voltage closer to the actual driving environment. Based on this, the pre-charging voltage is taken as the average of the reference voltage and the target charging voltage, ensuring that the pre-charging voltage of the storage capacitor is neither too low (resulting in insufficient compensation) nor too high (resulting in insufficient voltage discharge and overcharging), achieving a good balance between charging speed and charging stability, thereby reliably improving the display unevenness problem caused by insufficient charging.

[0089] The above are merely preferred embodiments of the present application and do not limit the patent scope of the present application. Any equivalent structural or procedural transformations made using the description and drawings of the present application, or direct or indirect applications in other related technical fields, are similarly included within the patent processing scope of the present application.

Claims

1. A display driving circuit, characterized in that, The display driving circuit includes a pixel, a first gate line, a second gate line, and a display data line of the column where the pixel is located. The first gate line is the gate line of the row where the pixel is located, and the second gate line is the previous gate line adjacent to the first gate line in the scanning timing. The pixel includes a driving module, a light-emitting module, and a pre-charging module. The input terminal of the driving module is connected to the display data line, the control terminal of the driving module is connected to the first gate line, the output terminal of the driving module is connected to the input terminal of the light-emitting module, the control terminal of the pre-charge module is connected to the second gate line, and the output terminal of the pre-charge module is connected to the storage terminal of the driving module. The pre-charge module is used to pre-charge the drive module when the second gate line outputs a valid strobe signal.

2. The display driving circuit as described in claim 1, characterized in that, The driving module includes a first transistor, a second transistor, and a storage capacitor; The first terminal of the first transistor is used as the input terminal of the driving module, the control terminal of the second transistor is used as the control terminal of the driving module, and the first terminal of the storage capacitor is used as the storage terminal of the driving module. The second terminal of the first transistor is connected to the first terminal of the storage capacitor, the second terminal of the storage capacitor is connected to the first terminal of the second transistor, the control terminal of the second transistor is also connected to the first terminal of the storage capacitor, and the third terminal of the second transistor is used as the output terminal of the driving module.

3. The display driving circuit as described in claim 1, characterized in that, The precharge module includes a precharge data line and a precharge transistor; The control terminal of the precharge transistor is used as the control terminal of the precharge module, the precharge data line is connected to the first terminal of the precharge transistor, and the second terminal of the precharge transistor is used as the output terminal of the precharge module.

4. The display driving circuit as described in claim 3, characterized in that, The display driving circuit also includes a pre-charge control module, the output of which is connected to the pre-charge data line; The precharge control module is used to determine a precharge voltage between the target charging voltage that the pixel needs to reach and the reference voltage of the pixel. The precharge voltage is output to the precharge data line when the second gate line outputs a valid strobe signal. Wherein, when the row containing the pixel is not the first row, the reference voltage is the charging voltage that the pixel in the previous row that is in the same column and adjacent to the pixel needs to reach; when the row containing the pixel is the first row, the reference voltage is the charging voltage that the pixel in the last row that is in the same column as the pixel needs to reach in the previous frame, or a preset default voltage.

5. The display driving circuit as described in claim 4, characterized in that, The display driving circuit also includes a timing controller, a level converter, and a buffer; The output of the timing controller is connected to the input of the precharge control module, the output of the precharge control module is connected to the input of the level converter, the output of the level converter is connected to the input of the buffer, and the output of the buffer is connected to the precharge data line. The timing control is used to send the target charging voltage that the pixel needs to reach and the reference voltage of the pixel to the precharge control module.

6. The display driving circuit as described in claim 1, characterized in that, When the row containing the pixel is the first row, the control terminal of the pre-charge module of the pixel also supports accessing the preset frame start terminal; When the control terminal of the precharge module of the pixel is connected to the preset frame start terminal, the precharge module is also used to precharge the driving module of the pixel when the precharge module of the pixel receives the frame start signal output by the preset frame start terminal.

7. A display panel, characterized in that, The display panel includes the display driving circuit as described in any one of claims 1-6.

8. A display driving method, characterized in that, Applied to the display panel as described in claim 7, the display driving method includes: For each pixel in the display panel, when the previous gate line adjacent to the pixel in the scanning timing outputs a valid strobe signal, the pre-charge module of the pixel is turned on, and the pre-charge module pre-charges the driving module of the pixel.

9. The display driving method as described in claim 8, characterized in that, The step of pre-charging the driving module of the pixel through the pre-charge module includes: Obtain the target charging voltage that the pixel needs to achieve; The pre-charge data line in the pre-charge module, which controls the conduction, pre-charges the storage capacitor in the drive module according to the target charging voltage; or... The reference voltage of the pixel is obtained, and based on the reference voltage and the target charging voltage, the pre-charging voltage is determined, and the pre-charging data line is controlled to pre-charge the storage capacitor according to the pre-charging voltage.

10. The display driving method as described in claim 9, characterized in that, The step of obtaining the reference voltage of the pixel and determining the pre-charge voltage based on the reference voltage and the target charging voltage includes: If the row containing the pixel is the first row, the charging voltage required in the previous frame for the last row of pixels in the same column as the pixel is used as the reference voltage, or a preset default voltage is used as the reference voltage. If the row containing the pixel is not the first row, the charging voltage that the pixel in the same column and adjacent to the previous row needs to reach is used as the reference voltage. Calculate the average voltage between the reference voltage and the target charging voltage, and use the average voltage as the pre-charging voltage.

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