Electronic device with frequency dithering and ripple mitigation

Abstract

This disclosure relates to electronic devices with frequency jitter and ripple reduction. An electronic device configured to transmit wireless power to an attached electronic device may include: a wireless power transmission coil; an inverter configured to receive a switching signal based on a jitter clock signal and output a corresponding AC current signal to the wireless power transmission coil; and control circuitry that generates the jitter clock signal. The jitter clock signal may have multiple frequency steps. The duty cycles of these switching signals may be different between at least two different frequency steps to compensate for different gains in the wireless power transmission from the electronic device to the attached electronic device at at least two different frequency steps.

Description

Cross-references to related applications

[0001] This application claims priority to U.S. Provisional Application No. 63 / 735,735, filed December 18, 2024, entitled “Electronic Device with Frequency Dithering and Variable Timing Properties”, and U.S. Provisional Application No. 63 / 847,620, filed July 21, 2025, entitled “Electronic Device with Frequency Dithering and Ripple Mitigation”; each of these applications is incorporated herein by reference in its entirety. Technical Field

[0002] This article deals with electronic devices in general, and more specifically with electronic devices that have inverters. Background Technology

[0003] Electronic devices sometimes include inverters that convert direct current (DC) power to alternating current (AC) power. Inverters can use a clock signal at a given frequency to output a corresponding AC signal. Improving the electromagnetic compatibility (EMC) of inverters is desirable. Summary of the Invention

[0004] An electronic device configured to transmit wireless power to an attached electronic device may include: a wireless power transmission coil; an inverter configured to receive a switching signal based on a jittered clock signal and output a corresponding alternating current signal to the wireless power transmission coil; and control circuitry that generates the jittered clock signal. The jittered clock signal may have multiple frequency steps. One or more timing attributes of these switching signals may be different between at least two different frequency steps to compensate for different wireless power transmission gains at the at least two different frequency steps.

[0005] The inverter may include four transistors controlled by two switching signals.

[0006] These timing attributes may include the operating phase of the inverter. These timing attributes may include the duty cycle of these switching signals.

[0007] The control circuit can be configured to select one or more timing attributes of at least two different frequency steps based on real-time operating conditions determined through communication with the additional electronic device. The real-time operating conditions may include received power information of the additional electronic device. The control circuit can be configured to receive the received power information from the additional electronic device using a wireless power transmission coil. The received power information may include calibrated measurements of rectifier voltage and rectifier current of the additional electronic device at multiple operating frequencies, duty cycles, and power levels. The control circuit may calculate one or more gain values ​​based at least in part on the calibrated measurements. The received power information may include runtime measurements of rectifier power and rectifier voltage of the additional electronic device. The control circuit may calculate one or more timing attribute values ​​based at least in part on the runtime measurements. The real-time operating conditions may include ripple messages reported by the additional electronic device.

[0008] The control circuit can be configured to receive ripple values ​​from the additional electronic equipment using the wireless power transmission coil. The control circuit can select one or more timing attributes with at least two different frequency steps based on real-time operating conditions determined without communication with the additional electronic equipment. These real-time operating conditions may include the inverter input voltage ripple measured by the control circuit. If the one or more timing attributes include duty cycle, the control circuit can increment or decrement the duty cycle in response to: a comparison of the inverter input voltage ripple measured by the control circuit with a threshold; a determination of whether the ripple voltage increases or decreases over time; and a determination of whether the duty cycle increases or decreases over time.

[0009] The jittered clock signal may have multiple frequency steps within a repetition period. The repetition period of the jittered clock signal may include a step function approximating a waveform. The jittered clock signal may have a unique frequency value at each of the multiple frequency steps during the repetition period. The waveform may include a triangular waveform. The multiple frequency steps during the repetition period may include thirty-two frequency steps during the repetition period.

[0010] An electronic device may include: a wireless power transmission coil; an inverter configured to receive a switching signal based on a jittered clock signal and output a corresponding alternating current signal to the wireless power transmission coil; and control circuitry configured to generate the jittered clock signal. The jittered clock signal may have multiple frequency steps, each frequency step having a unique frequency magnitude. The jittered clock signal may have specific timing attributes where at least two of the multiple frequency steps are selected to compensate for different wireless power transmission gains at the at least two different frequency steps. These specific timing attributes may include the operating phase of the inverter. These specific timing attributes may include the duty cycle. The control circuitry may be configured to select these specific timing attributes of the at least two different frequency steps based on real-time operating conditions determined in communication with the additional electronic device. The control circuitry may also select these specific timing attributes of the at least two different frequency steps based on real-time operating conditions determined without communication with the additional electronic device. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of an exemplary wireless power system based on some implementation schemes.

[0012] Figure 2 These are schematic diagrams of exemplary wireless power transmitting and receiving circuits in a wireless power system according to some implementation schemes.

[0013] Figure 3 This is a schematic diagram of an exemplary inverter based on some implementation schemes.

[0014] Figure 4 This is a schematic diagram of an exemplary electronic device including a jitter circuit according to some implementation schemes.

[0015] Figure 5 It is a graph of an exemplary jitter clock signal based on some implementation schemes.

[0016] Figure 6 It is a graph of an exemplary modulated signal based on some implementation schemes.

[0017] Figure 7 It is based on some implementation plans. Figure 5 The graph illustrates the transmission factor of a jitter clock signal as a function of frequency.

[0018] Figure 8A It is a graph of duty cycle versus time when an exemplary wireless power transmission circuit operates at a constant duty cycle, based on some implementation schemes.

[0019] Figure 8B It is used in power transmission equipment according to some implementation plans. Figure 5 frequency and Figure 8A A graph illustrating the rectifier output voltage of an exemplary power receiving device as a function of time under a constant duty cycle.

[0020] Figure 9A It is a graph of duty cycle versus time when an exemplary wireless power transmission circuit operates with varying duty cycles, based on some implementation schemes.

[0021] Figure 9B It is used in power transmission equipment according to some implementation plans. Figure 5 frequency and Figure 9A The graph illustrates the change in rectifier output voltage of an illustrative power receiving device over time as the duty cycle changes.

[0022] Figure 10 This is an illustrative graph showing how the duty cycle of an inverter can vary at each frequency step according to some implementation schemes.

[0023] Figure 11A and Figure 11B This is an exemplary timing diagram of the inverter control signals when the inverter has different operating phases, based on some implementation schemes.

[0024] Figure 12 It is a state diagram of an exemplary power transmission circuit with multiple operating modes according to some implementation schemes.

[0025] Figure 13 This is a flowchart illustrating an exemplary method of operating a power transmission device according to some implementation schemes.

[0026] Figure 14 It is a simplified equivalent circuit model of a wireless power transmission system.

[0027] Figure 15 This is a simplified flowchart of the first duty cycle compensation technology.

[0028] Figure 16 This is a simplified flowchart of the initial calibration phase of the first duty cycle compensation technology.

[0029] Figure 17 This is a simplified flowchart of the duty cycle calculation stage of the first duty cycle compensation technology.

[0030] Figure 18 This is a simplified flowchart of the second duty cycle compensation technology.

[0031] Figure 19 This is a graph showing the relationship between ripple voltage and duty cycle when using the second duty cycle compensation technique. Detailed Implementation

[0032] Figure 1An illustrative wireless power system (sometimes also called a wireless charging system) is shown. For example... Figure 1 As shown, the wireless power system 8 may include one or more wireless power transmitting devices such as wireless power transmitting device 12, and one or more wireless power receiving devices such as wireless power receiving device 24. The wireless power system 8 may also be referred to herein as a wireless power transmission (WPT) system 8 or simply wireless power system 8. The wireless power transmitting device 12 may also be referred to herein as a power transmitter (PTX) device 12 or simply PTX 12. The wireless power receiving device 24 may also be referred to herein as a power receiver (PRX) device 24 or simply PRX 24.

[0033] PTX device 12 includes control circuitry 16. Control circuitry 16 is mounted within housing 30. PRX device 24 includes control circuitry 38 mounted within a corresponding housing 52 of PRX device 24. Exemplary control circuitry 16 and control circuitry 38 are used to control the operation of WPT system 8. The control circuitry may include processing circuitry, which includes one or more processors, such as a microprocessor, power management unit, baseband processor, digital signal processor, microcontroller, graphics processing unit (GPU), central processing unit (CPU), application processor (AP), application-specific integrated circuit (ASIC) with processing circuitry, and / or other processing circuitry. The processing circuitry implements desired control and communication features in PTX device 12 and PRX device 24. For example, the processing circuitry may be used to control the supply of power to one or more coils, determine and / or set power transmission levels, generate and / or process sensor data (e.g., to detect foreign objects and / or external electromagnetic signals or fields), process user input, handle negotiation between PTX device 12 and PRX device 24, transmit and receive in-band and out-of-band data, perform measurements, and / or otherwise control the operation of WPT system 8.

[0034] The control circuitry (e.g., control circuitry 16 and / or 38) in WPT system 8 is configured to perform operations within WPT system 8 using hardware (e.g., dedicated hardware or circuitry), firmware, and / or software. Software code used to perform operations within WPT system 8 is stored on a non-transitory computer-readable storage medium (e.g., a tangible computer-readable storage medium) within the control circuitry of WPT system 8. Software code may sometimes be referred to as software, data, program instructions, commands, or code. The non-transitory computer-readable storage medium may include non-volatile memory such as non-volatile random access memory (NVRAM), one or more hard disk drives (e.g., disk drives or solid-state drives), one or more removable flash drives, or other removable media. The software stored on the non-transitory computer-readable storage medium can be executed on the processing circuitry of control circuitry 16 and / or 38.

[0035] PTX device 12 can be a standalone power adapter (e.g., a wireless charging pad or charging tray including power adapter circuitry), a wireless charging pad or tray connected via cable to a power adapter or other equipment, or an electronic device (e.g., a laptop computer, desktop computer, computer monitor containing an embedded computer, tablet computer, cellular phone, media player, or other handheld or portable electronic device; smaller devices such as wristwatches, hanging devices, headphones or handsets, devices embedded in glasses, goggles, or other equipment worn on a user's head, or other wearable or micro-devices; televisions, computer monitors without embedded computers, gaming devices, navigation devices, voice-controlled speakers connected to the wireless internet, home entertainment devices, remote control devices, game controllers, peripheral user input devices, wireless base stations or access points, equipment that enables the functionality of two or more of these devices; or other electronic equipment), equipment already integrated into furniture, vehicles, or other systems, a removable battery box, or other wireless power transmission equipment.

[0036] PRX device 24 can be: electronic devices such as laptop computers, desktop computers, computer monitors containing embedded computers, tablet computers, cellular phones, media players, or other handheld or portable electronic devices; smaller devices such as wristwatches, wristbands, headphones, or handsets, devices embedded in glasses, goggles, or other equipment worn on a user's head, or other wearable or micro-devices; wireless tracking tags; televisions, computer monitors without embedded computers, gaming devices, navigation devices, voice-controlled speakers connected to the wireless internet, home entertainment devices, remote control devices, game controllers, peripheral user input devices, wireless base stations or access points, equipment that enables the functionality of two or more of these devices; or other electronic equipment.

[0037] PTX device 12 can be connected to a wall socket (e.g., an AC power source), can be coupled to the wall socket via an external power adapter, may have a battery for supplying power, and / or may have another power source. In a specific embodiment where PTX device 12 is coupled to the wall socket via an external power adapter, the adapter may have an AC-to-DC power converter that converts AC power from the wall socket or other power source into DC power. If desired, PTX device 12 may include a DC-DC power converter for converting DC power between different DC voltages. Additionally or alternatively, PTX device 12 may include an AC-to-DC power converter that generates DC power from AC power supplied from the wall socket (e.g., in a specific embodiment where PTX device 12 is connected to the wall socket without an external power adapter). The DC power can be used to power control circuitry 16. During operation, the controller in control circuitry 16 uses power transmitting circuitry 22 to transmit wireless power to power receiving circuitry 46 of PTX device 24.

[0038] The power transmission circuit 22 may have switching circuitry, such as an inverter circuit 26 formed of transistors, which are turned on or off based on control signals provided by the control circuit 16, thereby creating AC current signals through one or more wireless power transmission coils (such as wireless power transmission coil 32). These coil drive signals cause coil 32 to transmit wireless power. In embodiments where coil 32 includes multiple coils, the coils may be mounted on a ferromagnetic structure, arranged in a planar coil array, or arranged to form a coil cluster (e.g., two or more coils, 5 to 10 coils, at least 10 coils, 10 to 30 coils, fewer than 35 coils, fewer than 25 coils, or other suitable number of coils). In some embodiments, the PTX device 12 includes only a single coil 32.

[0039] When an AC current passes through one or more coils 32, an alternating electromagnetic (e.g., magnetic) field (wireless power signal 44) is generated. This alternating electromagnetic field is received by one or more corresponding receiver coils (such as coil 48 in PRX device 24). In other words, one or more coils in coil 32 are induced to be coupled to one or more coils in coil 48. PRX device 24 may have a single coil 48, at least two coils 48, at least three coils 48, at least four coils 48, or other suitable number of coils 48. When the alternating electromagnetic field is received by coil 48, a corresponding alternating current is induced in coil 48. The AC signal used to transmit wireless power may have any desired frequency (e.g., 100 kHz to 400 kHz, 1 MHz to 100 MHz, between 1.7 MHz and 1.8 MHz, less than 2 MHz, between 100 kHz and 2 MHz, 6.78 MHz, 13.56 MHz, etc.). A rectifier circuit, such as rectifier circuit 50 (which includes rectifier components, such as synchronous rectifier transistors arranged in a bridge network), converts an AC signal (a received AC signal associated with wireless power signal 44) received from one or more coils 48 into a DC voltage signal for powering the PRX device 24. Wireless power signal 44 is sometimes referred to herein as wireless power 44 or wireless charging signal 44. Coil 32 is sometimes referred to herein as wireless power transmission coil 32, wireless charging coil 32, or wireless power transmitting coil 32. Coil 48 is sometimes referred to herein as wireless power transmission coil 48, wireless charging coil 48, or wireless power receiving coil 48.

[0040] The DC voltage generated by rectifier circuit 50 (sometimes referred to as rectifier output voltage Vrect) can be used to charge a battery (such as battery 34) and can also be used to power other components in PTX device 24 (such as control circuitry 38, input / output (I / O) devices 54, etc.). PTX device 12 may also include input / output devices, such as input / output device 28. Input / output device 54 and / or input / output device 28 may include input devices for collecting user input and / or performing environmental measurements, and may include output devices for providing output to the user.

[0041] For example, input-output device 28 and / or input-output device 54 may include a display (screen) for creating visual output, a speaker for presenting the output as an audio signal, light-emitting diode status indicators, and other light-emitting components for emitting light to provide status information and / or other information to the user, tactile devices for generating vibrations and other tactile outputs, and / or other output devices. Input-output device 28 and / or input-output device 54 may also include sensors for collecting input from the user and / or for measuring the surrounding environment of WPT system 8.

[0042] Figure 1 The example of the PRX device 24 including battery 34 is illustrative. More generally, electronic devices may include power storage device 34. Power storage device 34 may be a battery, or it may be, for example, a supercapacitor that stores electrical charge.

[0043] PTX device 12 and PRX device 24 can communicate wirelessly using in-band or out-of-band communication. Specific implementations of in-band communication can utilize, for example, Frequency Shift Keying (FSK) and / or Amplitude Shift Keying (ASK) technologies to transmit in-band data between PTX device 12 and PRX device 24. Coils 32 and 48 can be used simultaneously to transmit wireless power and in-band data. When PTX 12 transmits in-band data to PRX 24, the wireless transceiver (TX / RX) circuitry 20 can modulate the wireless charging signal 44 to apply FSK or ASK communication, and the wireless transceiver circuitry 40 can demodulate the wireless charging signal 44 to obtain the data being transmitted. When PRX 24 transmits in-band data to PTX 12, the wireless transceiver (TX / RX) circuitry 40 can modulate the wireless charging signal 44 to apply FSK or ASK communication, and the wireless transceiver circuitry 20 can demodulate the wireless charging signal 44 to obtain the data being transmitted.

[0044] Specific implementations of out-of-band communication can utilize, for example, hardware antenna structures and communication protocols (such as Bluetooth or NFC) to transmit out-of-band data between PTX device 12 and PRX device 24. Power can be wirelessly supplied between coil 32 and coil 48 simultaneously with out-of-band data transmission. Wireless transceiver circuit 20 can use an antenna (such as antenna 56) to wirelessly transmit and / or receive out-of-band signals to and / or from PRX device 24. Wireless transceiver circuit 40 can use an antenna (such as antenna 58) to wirelessly transmit and / or receive out-of-band signals to and / or from PTX device 12.

[0045] Antennas 56 and 58 can handle wireless local area network (WLAN) communication bands, such as 2.4 GHz and 5 GHz Wi-Fi. ® (IEEE 802.11) band; Wireless Personal Area Network (WPAN) communication bands, such as 2.4GHz Bluetooth. ®Communication frequency bands; cellular telephone communication frequency bands, such as the low frequency band (LB) (e.g., 600MHz to 960MHz), the low-mid frequency band (LMB) (e.g., 1400MHz to 1550MHz), the mid frequency band (MB) (e.g., 1700MHz to 2200MHz), the high frequency band (HB) (e.g., 2300MHz to 2700MHz), the ultra-high frequency band (UHB) (e.g., 3300MHz to 5000MHz, or other cellular communication frequency bands between approximately 600MHz and approximately 5000MHz (e.g., 3G bands, 4G LTE bands, the 5G new radio frequency range 1 (FR1) band below 10GHz, etc.)); near field communication (NFC) bands (e.g., at 13.56MHz); satellite navigation bands (e.g., the L1 Global Positioning System (GPS) band at 1575MHz, the L5 at 1176MHz). GPS bands, GLONASS bands, BeiDou Navigation Satellite System (BDS) bands, etc.; ultra-wideband (UWB) communication bands supported by the IEEE 802.15.4 protocol and / or other UWB communication protocols (e.g., a first UWB communication band at 6.5 GHz and / or a second UWB communication band at 8.0 GHz); and / or any other desired communication bands.

[0046] Antennas 56 and 58 can support communication in the extremely high frequency (EHF) or millimeter-wave communication bands between approximately 30 GHz and 300 GHz, and / or in the centimeter-wave communication band (sometimes referred to as the ultra-high frequency (SHF) band) between approximately 10 GHz and 30 GHz. As an example, antennas 56 and 58 can support the IEEE K communication band between approximately 18 GHz and 27 GHz, and the K band between approximately 26.5 GHz and 40 GHz. a Communication frequency band, between approximately 12 GHz and 18 GHz K u Communication bands, including the V communication band between approximately 40 GHz and 75 GHz, the W communication band between approximately 75 GHz and 110 GHz, or any other desired band between approximately 10 GHz and 300 GHz. If desired, millimeter-wave / centimeter-wave transceiver circuitry can support IEEE 802.11ad communication at 60 GHz (e.g., the WiGig or 60 GHz Wi-Fi band between approximately 57 GHz and 61 GHz) and / or the 5G mobile network or 5G wireless system (5G) New Radio (NR) frequency range 2 (FR2) communication band between approximately 24 GHz and 90 GHz.

[0047] Antennas 56 and 58 may include antennas with radiating elements, which are formed from loop antenna structures, patch antenna structures, inverted-F antenna structures, slot antenna structures, planar inverted-F antenna structures, helical antenna structures, dipole antenna structures, monopole antenna structures, and hybrids of these designs. Different types of antennas can be used in different frequency bands and combinations thereof. For example, one type of antenna can be used to form a local wireless link, and another type of antenna can be used to form a long-range wireless link antenna.

[0048] Each of the housing 30 and housing 52 may be formed of plastic, metal, fiber composite material (such as carbon fiber material), wood and other natural materials, glass, other materials and / or a combination of two or more of these materials.

[0049] The PTX 12 transmits wireless power and the PRX 24 receives wireless power. Figure 1 The examples in the diagram are merely illustrative. PTX 12 may optionally be able to receive wireless power signals using coil 32 and PTX 24 may optionally be able to transmit wireless power signals using coil 48. When a device is capable of both transmitting and receiving wireless power signals, it may include both an inverter and a rectifier.

[0050] Figure 2 This is a circuit diagram of an exemplary wireless charging circuit for System 8. (For example...) Figure 2 As shown, circuit 22 may include inverter circuitry such as one or more inverters 26 or other drive circuitry that generates wireless power signals transmitted via an output circuitry including one or more coils 32 and a capacitor such as capacitor 70. In some embodiments, device 12 may include multiple individually controlled inverters 26, each of which provides a drive signal to a corresponding coil 32. In other embodiments, a switching circuitry is used to share an inverter 26 among multiple coils 32.

[0051] During operation, the control signal for inverter 26 is provided by control circuit 16 at control input 74. Figure 2 The example shows a single inverter 26 and a single coil 32, but multiple inverters 26 and multiple coils 32 can be used if desired. In a multi-coil configuration, switching circuitry (e.g., multiplexer circuitry) can be used to couple a single inverter 26 to multiple coils 32 and / or each coil 32 can be coupled to a corresponding inverter 26. During wireless power transmission operation, transistors in one or more selected inverters 26 are driven by AC control signals from control circuitry 16. The relative phase between the inverters can be dynamically adjusted (e.g., a pair of inverters 26 can produce in-phase or out-of-phase output signals).

[0052] An inverter 26 (e.g., a transistor or other switch in circuit 22) is used to apply a drive signal to cause an output circuit formed by a selected coil 32 and a capacitor 70 to generate an AC electromagnetic field (signal 44), which is received by a wireless power receiving circuit 46 using a wireless power receiving circuit formed by one or more coils 48 and one or more capacitors 72 in device 24.

[0053] The rectifier circuit 50 is coupled to one or more coils 48 and converts the received power from AC to DC, and provides a corresponding DC output voltage Vrect at the rectifier output terminal 76 for powering the load circuits in the device 24 (e.g., for charging the battery 34, for powering the display and / or other input-output devices 54, and / or for powering other components).

[0054] Figure 3 This is a circuit diagram showing the arrangement of the inverter 26 in the power transmission circuit 22. (Example) Figure 3 As shown, inverter 26 can be a full-bridge inverter comprising four switches arranged in a bridge configuration. Switches T1 and T4 are connected in series to provide an adjustable voltage V. IN The control terminal is connected to ground. Switches T3 and T2, which are connected in parallel with switches T1 and T4, are connected in series to provide an adjustable voltage V. IN The control terminals are connected to ground. Coil 32 and capacitor 70 are connected between the first node located between T1 and T4 and the second node located between T2 and T3. These four switches (T1, T2, T3, and T4) can be power metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), or other desired switching components. Figure 3 The following diagram shows switches T1, T2, T3, and T4 (sometimes referred to as transistors T1, T2, T3, and T4) as examples of power MOSFETs.

[0055] During the operation of inverter 26, transistors T1, T2, T3, and T4 can be turned on and off in pairs. In an example with a 50% duty cycle, one pair of transistors (e.g., transistors T1 and T2) is turned on (connected) during one half-cycle of the output waveform, while the other pair is turned off. Then, during the next half-cycle, the conducting transistors (T1 and T2) are turned off, and the previously turned-off transistors (T3 and T4) are turned on. This process is repeated to generate the desired AC output waveform as input to wireless power transmission coil 32.

[0056] Figure 3An example is shown where transistors T1 and T2 receive a common control signal SW1 and transistors T3 and T4 receive a common control signal SW2. Control signals SW1 and SW2 can be switched alternately between a first state and a second state (e.g., a high state and a low state) to operate inverter 26.

[0057] Inverter 26 has several operating characteristics that can be adjusted during the operation of PTX 12. These operating characteristics include inverter voltage V. IN The operating phase θ, duty cycle, and frequency of the output AC current signal generated by inverter 26.

[0058] like Figure 3 As shown, inverter 26 can be connected to a variable DC voltage V. IN V IN The value of V can be adjusted to control the amount of wireless power transmitted by the power transmission circuit 22. Increasing V IN This increases the magnitude of the wireless power transmitted by the power transmission circuit 22, while decreasing V. IN This causes a decrease in the amount of wireless power transmitted by the power transmission circuit 22. Alternatively or otherwise, the amount of the operating phase can be used to control the amount of wireless power transmitted by the power transmission circuit 22. Alternatively or otherwise, the amount of the duty cycle can be used to control the amount of wireless power transmitted by the power transmission circuit 22.

[0059] Figure 3 The example of the inverter output being coupled to a wireless power transmission coil is merely illustrative. Generally, the inverter output can be coupled to a wireless power transmission coil (such as in...). Figure 2 and Figure 3 (in the middle), transformer coils, antennas, or any other desired components.

[0060] Some electronic devices with inverters (such as Figures 1 to 3 The PTX 12 in the inverter 26 can employ signal jittering to improve the electromagnetic emission characteristics of the system (e.g., to reduce conducted and / or radiated emissions). For example, the PTX 12 can jitter the clock signal used to control the inverter 26. This effectively jitters the frequency of the AC current signal output by the inverter 26.

[0061] In this paper, various signals (e.g., clock signals) may be referred to as having corresponding waveforms (e.g., the shape of a signal's voltage over time). A given waveform may have a cyclic shape that repeats at a given frequency (i.e., a given waveform may be periodic). The cyclic shape does not have to be a regular shape (e.g., a sine curve). In fact, the cyclic shape may deviate from a sinusoidal shape. However, this type of waveform can still have frequencies associated with periodic repetitions of a non-sinusoidal shape.

[0062] Figure 4 This is a schematic diagram of an exemplary PTX 12 with a jitter circuit. In one possible arrangement, the jitter circuit 84 and the clock modulation circuit 86 can be used to implement spread spectrum clocking technology (sometimes referred to as clock jitter). The jitter circuit 84 and the clock modulation circuit 86 can be considered as part of the control circuit 16. In spread spectrum clocking, the clock waveform is intentionally modified so that the spectrum of the signal is spread around a target frequency of the clock signal. This target frequency is sometimes referred to as the fundamental frequency of the clock signal. This improves the electromagnetic compatibility (EMC) associated with the target frequency of the clock signal. The jitter circuit 84 determines the modulation waveform 88 used to modulate the clock waveform 92 (sometimes referred to as the native clock waveform 92, initial clock waveform 92, un-jittered clock waveform 92, system clock 92, etc.). To improve EMC, the modulation waveform 88 is applied to the clock waveform 92 by the clock modulation circuit 86. The clock modulation circuit 86 can use the modulation waveform 88 to frequency modulate the clock waveform 92. The resulting switching signal 90 (sometimes referred to as the modified clock signal 90, jittered clock signal 90, jittered switching signal 90, etc.) is then provided to the inverter 26 to generate a frequency-jittered AC signal.

[0063] The modulated waveform 88 output by the dithering circuit 84 can be fixed or can be adjusted based on the real-time operating conditions of the wireless power system 8. For example, the dithering circuit 84 can generate the modulated waveform 88 based on the state of charge of the battery 34 in the PRX 24, the output voltage and / or current of the rectifier 50, the output voltage and / or current of the coil 48, the voltage and / or current of the coil 32, etc.

[0064] Figure 5 This is a graph of an example jitter clock signal that can be provided to inverter 26 in PTX 12. Figure 5 The jittered clock signal can be used for PTX with a specified wireless power transmission frequency of 360 kHz (sometimes referred to as the nominal wireless power transmission frequency or simply the wireless power transmission frequency). For example... Figure 5 As shown, the jittered clock signal can be a step function that approximates a triangular waveform. Therefore, this jittered clock signal can be described as having a triangular shape. Figure 5 The jittered clock signal can be repeated over multiple cycles. Each cycle can include... Figure 5 The waveform shown represents one cycle. This triangular waveform is expected to have a smooth transition between each repetition cycle of the jitter pattern.

[0065] There are a total of 32 frequency steps in one repetition cycle of the jitter clock signal. Figure 5 The instantaneous frequency of the clock signal over time is shown. The period of each frequency step is equal to 1 / f. s (where f) sIt is the instantaneous frequency of the clock signal. In other words, the jittered clock signal is held at each frequency step for exactly one cycle at the instantaneous frequency associated with that frequency step.

[0066] Each of the 32 frequency steps may have a unique frequency magnitude value. These 32 unique frequency steps have a first subset of decreasing steps (sometimes called decrementing steps), where the frequency magnitude decreases with each subsequent step of the waveform. These 32 unique frequency steps also have a second subset of increasing steps (sometimes called ascending steps), where the frequency magnitude increases with each subsequent step of the waveform. Figure 5 In the example, steps 1-17 are the falling steps of the waveform, and steps 18-32 are the rising steps of the waveform. The middle step of the rising step (i.e., step 24) is equal to the wireless power transmission frequency of 360 kHz. The middle step of the falling step (i.e., step 9) is close to the wireless power transmission frequency of 360 kHz (although not exactly equal to 360 kHz - each frequency step has a unique frequency value).

[0067] Each of these rising frequency steps can be offset relative to the corresponding falling frequency step. The frequency value at step 18 is slightly greater than the frequency value at step 16, the frequency value at step 19 is slightly greater than the frequency value at step 15, the frequency value at step 20 is slightly greater than the frequency value at step 14, and so on.

[0068] Each of these rising frequency steps may have a frequency value between two corresponding frequency values ​​in the falling frequency step. The frequency value at step 18 is between the frequency values ​​of steps 15 and 16, the frequency value at step 19 is between the frequency values ​​of steps 14 and 15, the frequency value at step 20 is between the frequency values ​​of steps 13 and 14, and so on.

[0069] The modulation frequency (f) of the jitter clock signal m ) can be equal to Figure 5 The reciprocal of the waveform's period. Since each frequency step has a duration of one period at the instantaneous frequency of that step, and the jitter clock signal is centered around a specified wireless power transmission frequency, the modulation frequency of the jitter clock signal can also be equal to the wireless power transmission frequency divided by the number of steps in the frequency distribution diagram. Therefore, Figure 5 The modulation frequency of the jitter clock signal is 11.25kHz (e.g., 360kHz / 32 = 11.25kHz).

[0070] Figure 5The jittered clock signal can also have a characteristic frequency deviation Δf. The value of Δf can be equal to the maximum difference between the frequency of the jittered clock signal and the wireless power transmission frequency. Figure 5 In the waveform, frequency step 1 has the maximum frequency, and frequency step 17 has the minimum frequency. Frequency step 17 may have the maximum deviation from the wireless power transmission frequency, so the value of Δf is equal to 360kHz minus the frequency at step 17. Here, the frequency at step 17 can be equal to 341.23kHz, so Δf is equal to 18.77kHz.

[0071] Figure 5 The jittered clock signal can have a characteristic modulation index (h), which is defined as Δf / f m .for Figure 5 The waveform has a modulation index of 1.67 (e.g., 18.77kHz / 11.25kHz = 1.67).

[0072] Figure 6 It shows that it can be used to generate Figure 5 An example modulation waveform of a jittery clock signal. As an example, clock modulation circuit 86 can modulate clock waveform 92 by dividing the clock frequency by the denominator provided by modulation waveform 88. As an example, the system clock frequency could be 288MHz. Figure 6 The diagram shows the denominator used to divide the system clock frequency. Figure 6 The waveform has 32 steps, each step corresponding to Figure 5 The corresponding step in the jittered clock signal.

[0073] As a specific example Figure 6The modulated waveform can have the following denominator values ​​(in this order): 764, 768, 772, 776, 780, 784, 788, 792, 796, 802, 810, 816, 822, 828, 836, 842, 844, 840, 834, 824, 820, 814, 808, 800, 794, 790, 786, 782, 778, 774, 770, and 766. The resulting frequency values ​​are equal to (in this order): 376.96kHz (e.g., 288MHz / 764 = 376.96kHz), 375.00kHz (e.g., 288MHz / 768 = 376.96kHz), and 375.00kHz (e.g., 288MHz / 768 = 376.96kHz). 375.00kHz), 373.06kHz, 371.13kHz, 369.23kHz, 367.35kHz, 365.48kHz, 363.64kHz, 361.81 kHz, 359.10kHz, 355.56kHz, 352.94kHz, 350.36kHz, 347.83kHz, 344.50kHz, 342.04kHz, 341 .23kHz, 342.86kHz, 345.32kHz, 349.51kHz, 351.22kHz, 353.81kHz, 356.44kHz, 360kHz, 362 .72kHz, 364.56kHz, 366.41kHz, 368.29kHz, 370.18kHz, 372.09kHz, 374.03kHz and 375.98kHz. For each pair of adjacent frequency steps, the difference between the frequency values ​​can be between 0.5 kHz and 4.5 kHz. The minimum difference between the frequency values ​​of adjacent frequency steps can be 0.81 kHz. The maximum difference between the frequency values ​​of adjacent frequency steps can be 4.19 kHz.

[0074] Figure 6 Each of the 32 unique denominator steps can have a unique value. These 32 unique denominator steps have a first subset of ascending steps (sometimes called incremental steps), where the denominator value increases with each subsequent step of the waveform. These 32 unique denominator steps also have a second subset of descending steps (sometimes called decrementing steps), where the denominator value decreases with each subsequent step of the waveform. Figure 6 In the example, steps 1 to 17 are the rising steps of the waveform, and steps 18 to 32 are the falling steps of the waveform.

[0075] One or more of the descending denominator steps in the descending denominator step may be offset by a constant amount relative to the corresponding denominator step of the ascending frequency step. Figure 6The offset value in the calculation is equal to 2. The denominator value at step 18 is 2 less than the denominator value at step 16, the denominator value at step 19 is 2 less than the denominator value at step 15, the denominator value at step 21 is 2 less than the denominator value at step 13, and so on.

[0076] Figure 5 and Figure 6 The specific examples are merely illustrative. Modulation frequency f m The modulation frequency can be greater than 9kHz, greater than 10kHz, greater than 11kHz, greater than 15kHz, less than 30kHz, less than 20kHz, etc. A lower modulation frequency may be desirable for reducing the magnitude of Δf, which places less stress on the wireless power system. This allows the modulation frequency f to... m A frequency greater than 9kHz may also be desirable, as 9kHz is the resolution bandwidth (RBW) used during some electromagnetic interference (EMI) test protocols.

[0077] The modulation index (h) of the jitter clock signal can be less than 2.0, less than 1.9, less than 1.8, less than 1.7, less than 1.6, greater than 1.4, greater than 1.5, greater than 1.6, between 1.4 and 1.8, between 1.5 and 1.7, between 1.6 and 1.7, etc. The frequency offset (Δf) of the jitter clock signal can be greater than 5kHz, greater than 10kHz, greater than 15kHz, greater than 20kHz, greater than 30kHz, less than 20kHz, less than 15kHz, between 10kHz and 30kHz, between 10kHz and 20kHz, etc. The frequency deviation (Δf) of the jitter clock signal can be less than 20% of the wireless power transmission frequency, less than 10% of the wireless power transmission frequency, less than 5% of the wireless power transmission frequency, less than 3% of the wireless power transmission frequency, greater than 1% of the wireless power transmission frequency, greater than 2% of the wireless power transmission frequency, greater than 5% of the wireless power transmission frequency, greater than 10% of the wireless power transmission frequency, or between 1% and 10% of the wireless power transmission frequency.

[0078] Figure 5 The jitter clock signal may have a time-weighted average frequency within 1 kHz of the wireless power transmission frequency (e.g., between 359 kHz and 361 kHz, between 127 kHz and 129 kHz, etc.).

[0079] One objective of the frequency jitter scheme presented in this paper is to improve EMC at a given wireless power transmission frequency. Generally, it is desirable to reduce EMI as much as possible at a given wireless power transmission frequency. However, the maximum transmit peak value associated with the jitter clock signal needs to be maintained at the wireless power transmission frequency, not at the sideband frequencies. In other words, it is desirable that the transmit peak value at the sideband frequencies associated with the wireless power transmission frequency is lower than the transmit peak value at the wireless power transmission frequency. Reducing the transmit peak value at the wireless power transmission frequency may lead to an increase in the transmit peak value at the sideband frequencies. Therefore, the jitter mode presented in this paper can be selected to reduce the transmit peak value at the wireless power transmission frequency as much as possible, while also ensuring that the transmit peak value at the sideband frequencies is lower than the transmit peak value at the wireless power transmission frequency.

[0080] Figure 7 Is with Figure 5 A graph showing the transmission spectrum associated with a jittered clock signal. This graph illustrates the frequency-dependent transmission (in dBμA / m). Differences in transmission can be expressed in dB. The dashed curve 102 shows the transmission of the un-jittered version of the clock signal at the wireless power transmission frequency. For Figures 5 to 7 For example, curve 102 shows the transmission of a non-jittered clock signal at a constant frequency of 360 kHz. For Figure 7 The value of curve 102 at 360kHz, on the Y-axis scale, can be defined as 0.

[0081] Solid line curve 104 shows Figure 5 The transmission of jittered clock signals. For example... Figure 7 As shown, the maximum transmit peak value of curve 104 has a magnitude of E1 and is located at the wireless power transmission frequency (e.g., 360 kHz). The transmit peak value of curve 104 (e.g., E1) at 360 kHz is 106 smaller than the transmit peak value of curve 102 at 360 kHz. Therefore, difference 106 characterizes the EMI reduction at the wireless power transmission frequency. For Figure 5 The jitter of the clock signal is -4.8dB, with a difference of 106.

[0082] In addition to the wireless power transmission frequency, curve 104 also has peaks at the sideband frequencies. These sideband frequencies are separated from the modulation frequencies of the jittered clock signal. Figure 5 In the example, the modulation frequency is equal to 11.25 kHz. Therefore, in Figure 7 In this context, each transmitted peak is separated from its adjacent transmitted peak by a frequency of 11.25 kHz.

[0083] Transmitted peak values ​​may decrease as the deviation from the wireless power transmission frequency increases. (Select) Figure 5The jitter mode ensures that the transmit value at the sideband frequency closest to the wireless power transmission frequency is less than the transmit value at the wireless power transmission frequency. Figure 7 This illustrates how there is an emission value E2 at the first sideband frequency of 348.75 kHz and an emission value E3 at the second sideband frequency of 371.25 kHz. The emission value E2 is 108 less than the emission peak value of curve 102. The emission value E3 is 110 less than the emission peak value of curve 102. For Figure 5 The jitter clock signal has a difference of -5.9dB at 108 and a difference of -5.3dB at 110.

[0084] Differences 108 and 110 can be greater than difference 106 to ensure that the peak value at the specified wireless power transmission frequency is the maximum transmit value of the jitter clock signal. However, differences 108 and 110 can be close to difference 106 to improve the overall value of difference 106. Difference 108 can be within 2 dB of difference 106, within 1.5 dB of difference 106, within 1 dB of difference 106, etc. Difference 110 can be within 2 dB of difference 106, within 1.5 dB of difference 106, within 1 dB of difference 106, etc.

[0085] The jitter patterns described herein are for a wireless power transmission frequency of 360 kHz. However, it should be understood that the same concepts can be applied to jitter patterns regardless of the magnitude of the wireless power transmission frequency. For example, jitter patterns at any desired wireless power transmission frequency (e.g., 100 kHz to 400 kHz, 128 kHz, 1 kHz to 100 MHz, between 1.7 MHz and 1.8 MHz, less than 2 MHz, between 100 kHz and 2 MHz, 6.78 MHz, 13.56 MHz, etc.) can have the frequency step count, modulation frequency, waveform shape, frequency deviation, modulation index, and / or transmission curve characteristics described herein.

[0086] exist Figure 5 Between different frequency steps of the jittered clock signal, one or more operating characteristics of the PTX 12 may change (besides frequency). Different frequency steps may have different associated magnitudes, duty cycles, phases, etc. Specifically, non-frequency operating characteristics can be modified to adjust the magnitude of wireless power transfer from the PTX 12 to the PRX 24. Adjusting the magnitude (power level) of wireless power transfer can mitigate ripple that would otherwise occur due to variable gain caused by frequency changes.

[0087] This concept is illustrated in Figures 8 and 9. Figure 8A This is a graph showing the duty cycle over time when the PTX 12 operates with a constant duty cycle. (Example:) Figure 8AAs shown, the duty cycle remains fixed at a given value (e.g., 0.5% or 50%) over time. However, the frequency of the jittered clock signal varies (e.g., ... Figure 5 (As shown) This may cause a change in the output voltage at PRX 24. Figure 8B When using PTX 12 Figure 5 frequency and Figure 8A At a duty cycle of [value missing], the rectifier output voltage of the PRX 24 (e.g., V) RECT A graph of curves. For example... Figure 8B As shown, when the duty cycle (and other non-frequency operating characteristics) are constant, the output voltage is related to the instantaneous frequency of the wireless power signal transmitted by PTX 12. In the inductive link between PTX 12 and PRX 24, different frequencies may have different associated gain values. In the wireless power transmission system 8 ( Figure 1 and Figure 2 In the example, the operating frequency is inversely proportional to the gain between PTX 12 and PRX 24, and therefore inversely proportional to the output voltage seen by PRX 24 for a given output from PTX 12. Specifically, higher frequencies have lower associated gain and output voltage, while lower frequencies have higher associated gain and output voltage.

[0088] use Figure 5 and Figure 8A Due to its operating characteristics, the rectifier output voltage has ripple (such as...). Figure 8B (As shown). Ripple is defined as the residual periodic variation of the DC voltage. In this paper, the magnitude of the ripple can be characterized as the difference between the maximum and minimum output voltages within at least one repetition period of the jittered clock signal. Figure 8B The maximum output voltage is approximately 30V, and the minimum output voltage is approximately 26V. Therefore, the ripple value of 202 is approximately 4V.

[0089] To improve wireless charging operation between the PTX 12 and PRX 24 (e.g., reducing noise and vibration, improving stability and communication), the PTX 12 can mitigate ripple caused by jittered clock signals. Specifically, the PTX 12 can change one or more non-frequency operating characteristics (e.g., amplitude, duty cycle, phase, etc.) between different frequency steps within a repetition period. Changing the non-frequency operating characteristics alters the transmit power level associated with wireless power transmission from the PTX 12 to the PRX 24, thereby compensating for gain variations caused by frequency changes between different frequency steps. Specifically, the non-frequency operating characteristics can be controlled to counteract any gain variations caused by frequency changes. In other words, the non-frequency operating characteristics have an associated high transmit power level when the frequency is higher (and the gain is lower), and an associated low transmit power level when the frequency is lower (and the gain is higher).

[0090] Figure 9A This is a graph showing the duty cycle as a function of time when the PTX 12 operates with a variable duty cycle to suppress ripple. (Example) Figure 9A As shown, the duty cycle is based on a formula similar to... Figure 5 The frequency pattern changes over time. For Figure 5 Each of the 32 frequency steps, or Figure 5 Some, but not all, of the 32 frequency steps may have unique duty cycles.

[0091] Figure 9B When using PTX 12 Figure 5 frequency and Figure 9A At a duty cycle of [value missing], the rectifier output voltage of the PRX 24 (e.g., V) RECT A graph of curves. For example... Figure 9B As shown, Figure 9A The changing duty cycle keeps the output voltage constant (or approximately constant). Therefore, Figure 9B The ripple is equal to 0 (or approximately 0, such as less than 0.5V, less than 0.3V, less than 0.1V, etc.).

[0092] Figure 10 It is a graph showing how the duty cycle of inverter 26 changes at each frequency step. Figure 10 It shows the use of Figure 10 The jittered clock signal is a step-by-step switching signal with steps 1, 2, and 3. For example... Figure 10 As shown, step 1 has a corresponding period 204-1, step 2 has a corresponding period 204-2, and step 3 has a corresponding period 204-3. The instantaneous frequency at step 1 is 376.96 kHz, therefore step 1 has a period 204-1 of 2.65 μs. The instantaneous frequency at step 2 is 375.00 kHz, therefore step 2 has a period 204-2 of 2.67 μs. The instantaneous frequency at step 3 is 373.06 kHz, therefore step 3 has a duration of 2.68 µs.

[0093] In addition to its unique period, each frequency step can also have a unique duty cycle. The duty cycle can be defined as the control signal SW1 being high (thus causing...) Figure 3 The percentage of time that transistors T1 and T2 are turned on or off. Figure 10As shown, during period 204-1 between t0 and t1, SW1 is high for duration 206-1 (e.g., a subset of this period). Then, SW1 is low for the remainder of this period. Therefore, the duty cycle during step 1 is equal to the duration 206-1 divided by the duration 204-1. Similarly, the duty cycle during step 2 is therefore equal to the duration 206-2 divided by the duration 204-2, and the duty cycle during step 3 is therefore equal to the duration 206-3 divided by the duration 204-3. The duty cycle of step 1 can be 50%, the duty cycle of step 2 (e.g., 49%) can be less than the duty cycle of step 1, and the duty cycle of step 3 (e.g., 48%) can be less than the duty cycle of step 2.

[0094] Figure 10 An example of complementary duty cycle control is shown, where SW2 is set to be the inverse of SW1. In other words, SW2 is low when SW1 is high, and vice versa. This example is merely illustrative, and SW1 and SW2 can also be controlled using symmetrical duty cycle control (sometimes called parallel duty cycle control). In symmetrical duty cycle control, SW1 and SW2 are high for the same amount of time in each cycle. Therefore, there may be one or more periods in a cycle where both SW1 and SW2 are low. In an example using symmetrical duty cycle control with a 45% duty cycle, SW1 may be high and SW2 low for the first 45% of the cycle, both SW1 and SW2 may be low for the next 5% of the cycle, SW2 may be high and SW1 low for the next 45% of the cycle, and both SW1 and SW2 may be low for the last 5% of the cycle.

[0095] A 50% duty cycle maximizes the transmit power level of wireless power transmission at a given frequency. Decreasing the duty cycle decreases the transmit power level of wireless power transmission at a given frequency. Therefore, the duty cycle is 50% at least for the frequency step with the maximum frequency in the frequency jitter mode. The duty cycle can have a minimum value at least for the frequency step with the minimum frequency in the frequency jitter mode. The minimum duty cycle can be less than 45%, less than 40%, less than 35%, less than 30%, etc. The duty cycle range used during the repetition period of the jitter clock signal can be at least 5%, at least 10%, at least 15%, at least 20%, at least 25%, between 10% and 30%, etc. When using a 32-step jitter mode (e.g.) Figure 5 (In the middle), these 32 frequency steps can have at least 10 unique duty cycle values, at least 15 unique duty cycle values, at least 20 unique duty cycle values, at least 25 unique duty cycle values, at least 30 unique duty cycle values, 32 unique duty cycle values, etc.

[0096] The example of reducing ripple by changing the duty cycle value between varying frequency steps of the jittered clock signal is merely illustrative. In another possible arrangement, control circuit 16 may change the phase of control signals SW1 and SW2 to reduce ripple.

[0097] The operating phase θ (sometimes called inverter phase θ) can refer to the offset between control signal SW1 and control signal SW2. Figure 11A The timing diagrams of SW1 and SW2 are shown when the inverter phase is 0 degrees. Figure 11B The timing diagrams for SW1 and SW2 are shown when the inverter phase is equal to 180 degrees. Using... Figure 11A and Figure 11B By convention, a 0-degree (zero)-degree working phase is defined as the condition when SW2 is the inverse of SW1, and a 180-degree working phase is defined as the condition when SW2 and SW1 are the same. At a 0-degree working phase, when SW1 changes from high to low, SW2 changes from low to high, and when SW1 changes from low to high, SW2 changes from high to low. In other words, when the working phase is 0 degrees, the waveforms of SW1 and SW2 are offset by half a cycle. At a 180-degree working phase, when SW1 changes from low to high, SW2 changes from low to high, and when SW1 changes from high to low, SW2 changes from high to low. In other words, when the working phase is 180 degrees, the waveforms of SW1 and SW2 are synchronized.

[0098] use Figure 11A and Figure 11B The definition of the working phase θ is as follows: when the phase is equal to 0 degrees (e.g., ... Figure 11A As shown), the inverter's effective output voltage is maximized, and when the phase is equal to 180 degrees (as shown in the figure), the inverter's effective output voltage is maximized. Figure 11B As shown), the effective output voltage of the inverter is minimized. Therefore, adjusting the phase of inverter 26 can adjust the amount of wireless power transmitted by power transmission circuit 22. Between 0 degrees and 180 degrees, increasing the phase results in a decrease in the amount of wireless power transmitted by power transmission circuit 22, and decreasing the phase results in an increase in the amount of wireless power transmitted by power transmission circuit 22.

[0099] Therefore, at least for the frequency step with the maximum frequency in the frequency jitter mode, the phase can be 0 degrees. At least for the frequency step with the minimum frequency in the frequency jitter mode, the phase can have a maximum value. The maximum phase can be greater than 5 degrees, greater than 10 degrees, greater than 20 degrees, greater than 30 degrees, greater than 50 degrees, etc. The phase range used during the repetition period of the jitter clock signal can be greater than 5 degrees, greater than 10 degrees, greater than 20 degrees, greater than 30 degrees, greater than 50 degrees, etc. When using the 32-step jitter mode (such as...) Figure 5(In the middle), these 32 frequency steps can have at least 10 unique phase values, at least 15 unique phase values, at least 20 unique phase values, at least 25 unique phase values, at least 30 unique phase values, 32 unique phase values, etc.

[0100] Under certain operating conditions, wireless power transmission performance may be satisfactory even without ripple mitigation operation. Therefore, the power transmission circuit 22 can operate in two modes: one with ripple mitigation and one without.

[0101] Figure 12 This is a state diagram illustrating an exemplary power transmission circuit with multiple operating modes. For example... Figure 12 As shown, the power transmission circuit can operate in a first mode 212 and a second mode 214. In the first mode, the control circuit 16 and / or the power transmission circuit 22 do not perform ripple mitigation. Therefore, when the power transmission circuit 12 operates in mode 212 (sometimes referred to as non-ripple mitigation mode 212), the phase and duty cycle can be fixed. In the second mode, the control circuit 16 and / or the power transmission circuit 22 perform ripple mitigation. When the power transmission circuit 12 operates in mode 214 (sometimes referred to as ripple mitigation mode 214), the phase and / or duty cycle can vary within each repetition cycle of the jitter clock signal.

[0102] Both phase and duty cycle can be referred to as timing attributes of the switching signals used to control inverter 26. Both phase and duty cycle can also be referred to as non-frequency operating conditions of power transmission circuit 22.

[0103] Control circuit 16 can place power transmission circuit 22 into mode 212 or mode 214 based on one or more factors. Specifically, control circuit 16 can base its settings on one or more real-time operating conditions (such as inverter power level (P)). INV The estimated inductive coupling factor (k) between PTX 12 and PRX 24. EST (and / or ripple value information reported from PRX 24 to PTX 12) to select the appropriate mode for the power transmission circuit 22.

[0104] Inverter power level P INV This can refer to the power level of the AC current signal generated by inverter 26 and provided to the transmit (TX) coil 32. At some inverter power levels, wireless power transmission performance may also be satisfactory without ripple mitigation operation; therefore, power transmission circuit 22 can operate in mode 212. Control circuit 16 can be used for P... INV The threshold value is used to determine the appropriate mode for the power transmission circuit 22. When P INVWhen the voltage is below the threshold, control circuit 16 sets the power transmission circuit to mode 212 (ripple mitigation). When P INV When the value exceeds the threshold, the control circuit 16 sets the power transmission circuit to mode 214 (with ripple reduction). The threshold value can be 7W, 10W, 15W, 20W, 25W, less than 15W, less than 12W, less than 10W, greater than 8W, greater than 10W, greater than 12W, greater than 15W, etc.

[0105] Inverter power level P INV The example of comparing the power transmission circuit 22 to a threshold to determine its mode is merely illustrative. If needed, other power levels associated with PTX 12 (e.g., DC power output from a power adapter connected to PTX 12, DC power output from the lead portion of a cable connected to the power adapter, etc.) can be compared to the threshold to determine the mode of the power transmission circuit 22.

[0106] PTX 12 can estimate the magnitude of the inductive coupling factor (k) between PTX 12 and PRX 24. The inductive coupling factor k is equal to... Where M' is mutual inductance, L' TX It is the inductance of coil 32, and L' RX It is the inductance of coil 48. To estimate k, PRX 24 can measure the rectifier output voltage (V) during digital ping (e.g., low-level wireless power transfer from PTX 12 to PRX 24 when PRX 24 is detected on PTX 12). RECT The rectifier output voltage during digital ping is sometimes referred to as the digital ping voltage. The digital ping voltage can be measured by PRX 24 and reported to PTX 12 (e.g., using in-band or out-of-band communication). PRX 24 can also send one or more additional coefficients (e.g., scaling factors) or parameters to PTX 12 to assist PTX 12 in estimating the inductive coupling factor. PTX 12 can use the received information to estimate the magnitude of k (e.g., ...). Where kest is an estimator of k. V RECT It is the digital ping voltage, V IN VCTX_PP is the input voltage of inverter 26, VCTX_PP is the measured peak-to-peak voltage across tuning capacitor 70, and E0 and E1 are selected to fit the k-estimation formula within a preference range of 0.7 to 0.9. The foregoing example of k-estimation is merely illustrative, and other k-estimation techniques may be used if necessary.

[0107] At certain inductive coupling factor values, wireless power transmission performance can be satisfactory even without ripple mitigation operation; therefore, power transmission circuit 22 can operate in mode 212. Control circuit 16 can be used for k... EST The threshold value determines the appropriate mode for the power transmission circuit 22. When k EST When the value exceeds the threshold, control circuit 16 sets the power transmission circuit to mode 212 (ripple mitigation). When k EST When the value is below a threshold, the control circuit 16 sets the power transmission circuit to mode 214 (ripple reduction). The threshold value can be 0.7, 0.75, 0.8, 0.85, greater than 0.7, greater than 0.75, greater than 0.8, greater than 0.85, less than 0.85, less than 0.8, less than 0.75, less than 0.7, etc.

[0108] The PRX 24 can report ripple magnitude information to the PTX 12 using in-band and / or out-of-band communication. The ripple magnitude information may include ripple magnitude values, such as... Figure 8B The value in the text is 202. Generally, the ripple value can include the value related to the output voltage V. RECT Any expected information associated with the ripple.

[0109] Control circuit 16 may use one or more of the factors described above to place power transmission circuit 22 in mode 212 or mode 214. Control circuit 16 may place power transmission circuit 22 in mode 212 or mode 214 at the start of power transmission operation. Control circuit 16 may optionally switch between mode 212 and mode 214 during ongoing power transmission operation.

[0110] To determine the duty cycle or phase magnitude for each frequency step in the jitter mode to mitigate ripple, a given set of operating conditions (e.g., V) can be used. IN P INV (etc.) Measure the system gain at each frequency step. The measured gain can then be used to calculate the duty cycle or phase of each of these frequency steps. For example, the formula can be used... To calculate the duty cycle of a given frequency step, where It's the duty cycle, V RECT It is the rectifier output voltage. It is the wireless link gain, and V IN This is the inverter input voltage. This process can be performed during the design phase of the PTX 12. This process can be repeated under various operating conditions to determine the duty cycle mode used to mitigate ripple for a given clock signal jitter pattern under various operating conditions.

[0111] Patterns of varying duty cycle or phase values ​​associated with different operating conditions can be stored in control circuit 16. During real-time operation of PTX 12, PTX 12 can use a lookup table to select the duty cycle or phase pattern based on the operating condition closest to the real-time operating condition.

[0112] Figure 13 This is a flowchart illustrating a method of operating a power transmitting device. During operation at block 302, control circuitry 16 may collect information. The collected information may include real-time measurements associated with power transmitting circuitry 22 (e.g., P...). INV V IN The voltage and / or current sensors within the power transmission circuit 22 can be used to determine real-time measurements. The collected information may also include or be based on information received from the PRX 24. For example, the control circuit 16 may receive information from the PRX 24 regarding the received power (sometimes referred to as received power information or RP information), such as P... RECT and / or V RECT Alternatively or otherwise, control circuitry 16 may receive ripple magnitude information and / or device type information from PRX 24. The information received from PRX 24 may be received using in-band and / or out-of-band communication. Control circuitry 16 may use the information received from PRX 24 to estimate and / or derive additional parameters, such as the inductive coupling factor k. EST .

[0113] During operation of block 304, control circuit 16 can select the mode for power transmission circuit 22 based on information collected from 304. Control circuit 16 can select... Figure 12 The control circuit 16 can be based on P... (The text abruptly ends here, so the translation stops as well.) INV Compare with the threshold, and set k EST The mode for power transmission circuit 22 is selected by comparing the ripple magnitude value with a threshold value and / or by comparing the ripple magnitude value with a threshold value. As an example, when P... INV When k is greater than the threshold EST When the ripple value is less than the threshold, and / or when the ripple value is greater than the threshold, the control circuit 16 may select the ripple mitigation mode 214 for the power transmission circuit 22.

[0114] As another example, control circuitry 16 may select a mode at block 304 based on the communication protocol used for communication between PTX 12 and PRX 24. A first communication protocol may not support communication regarding ripple magnitude and / or may have a maximum power level at which wireless power transmission operation is satisfactory even with ripple mitigation. A second communication protocol may support communication regarding ripple magnitude and / or may have a maximum power level at which wireless power transmission operation is improved with ripple mitigation. In this example, control circuitry 16 may place the power transmission circuitry in a non-ripple mitigation mode 212 when using the first protocol and in a ripple mitigation mode 214 when using the second protocol.

[0115] When control circuit 16 selects the ripple mitigation mode during operation of block 304, it can subsequently select a magnitude for the timing attribute of the inverter's switching signals during operation of block 306. As previously discussed, the timing attribute can be duty cycle or phase. The control circuit can optionally select which timing attribute (e.g., duty cycle or phase) to change during operation of block 306. The control circuit can select the magnitude of the selected timing attribute based on information collected from block 302.

[0116] To select the value of the chosen timing attribute, control circuitry 16 may use a lookup table. The lookup table may include multiple modes for various operating conditions. Each mode includes multiple values ​​for the timing attribute. Each value may be associated with a corresponding frequency step of the jitter clock signal.

[0117] The operating conditions associated with each storage mode may include the PRX 24's device type, inverter current (I0), and other parameters. INV ), receive power information (such as V) RECT or P RECT ), k EST And / or ripple magnitude. Control circuit 16 can select a mode with associated operating conditions that best match the real-time operating conditions. Optionally, interpolation and / or extrapolation can be used to accommodate differences between the operating conditions of the selected mode and the real-time operating conditions. The magnitude of a given mode can optionally be scaled based on the device type of PRX 24.

[0118] Following the operation of block 306, PTX 12 can transmit wireless power to PRX 24 using a frequency jitter pattern with associated variable non-frequency characteristics. The magnitude of the variable non-frequency characteristics is selected during the operation of block 306. During the ongoing wireless power transmission operation, during the operation of block 308, control circuitry 16 can collect additional information (similar to the information in the operation of block 302). In other words, control circuitry 16 can continuously monitor the operating conditions associated with the wireless power transmission.

[0119] During the operation of block 310, the control circuitry may take additional actions based on additional information from block 308. For example, control circuitry 16 may switch the mode of the power transmission circuit. As a specific example, control circuitry 16 may respond to P INV The value increases to a value greater than the threshold, switching from non-ripple mitigation mode 212 to ripple mitigation mode 214, or may respond to P. INV The ripple reduction mode 214 switches to the non-ripple reduction mode 212 when the value decreases to below a threshold. As an additional example, the control circuit 16 can respond to k... EST The value is reduced to below a threshold, switching from non-ripple mitigation mode 212 to ripple mitigation mode 214, or it can respond to k. EST Increase the value to a value greater than the threshold and switch from ripple mitigation mode 214 to non-ripple mitigation mode 212.

[0120] As another example, control circuit 16 can change the magnitude of timing attributes during operation of block 310. Consider the example of using a varying duty cycle in mode 214 to mitigate ripple. Control circuit 16 can store multiple duty cycle modes. Each duty cycle mode includes 32 duty cycle magnitudes (one per frequency step of the jitter clock signal repetition period). The first mode can be associated with the first inverter power level P. INV1 Related to this, the second mode can be associated with the second inverter power level P. INV2 Related. During the operation of block 306, the inverter power level can be equal to P. INV1 Therefore, the first mode with a varying duty cycle is used. During the operation of block 310, the inverter power level can be equal to P. INV2 Therefore, a second mode with varying duty cycles is used.

[0121] As mentioned above, inverter switching frequency jitter can be used to reduce electromagnetic interference (EMI) and improve electromagnetic compatibility (EMC). In the context of wireless power transmission systems, this can lead to ripple in the rectifier output voltage (Vrect). Various techniques for mitigating this ripple have also been described above, such as manipulating additional inverter control parameters besides the frequency, which corresponds to frequency jitter. As mentioned above, such additional parameters can include manipulation of the duty cycle, phase, etc.

[0122] In some implementations, it may be advantageous to further modify this ripple compensation technique to account for different operating conditions, such as different wireless power transmission levels, different relative positioning between the PTX and PRX, etc. As an example, duty cycle jitter can be employed, where the duty cycle can be gradually changed to reduce rectifier output voltage (Vrect) ripple by compensating for changes in wireless power transmission gain associated with frequency variations (jitter). While such duty cycle variation can significantly reduce ripple, the “optimal” duty cycle depends on both the load (i.e., the amount of power delivered by the wireless power transmission system) and the relative position or magnetic alignment between the PTX and PRX. Therefore, it may be desirable to change the duty cycle in part in response to the load and / or relative position or magnetic alignment, and in response to frequency jitter, to compensate for ripple. There are at least two ways to achieve the desired duty cycle compensation. The first technique may be based on gain calculations performed through cooperation between the PTX and PRX devices. The second technique may be performed by the PTX alone based on measurements of its own input voltage. These techniques will be described in more detail below.

[0123] Figure 14 A simplified equivalent circuit model 1400 of a wireless power transmission system is illustrated. This model includes an AC voltage source 1402, a complex impedance 1404 representing the wireless power transmission system, and a load impedance 1406 corresponding to the load powered by the PRX. The rectifier output voltage Vrect appears across the load impedance 1406. The parameters K and Zo depicted in the equivalent circuit model 1400 can be used to determine the duty cycle to mitigate rectifier voltage ripple associated with frequency jitter, as described in more detail below. These parameters can also be considered as characterizing the load lines of the wireless power transmission system.

[0124] Figure 15 This is a simplified flowchart 1500 of the first duty cycle compensation technique based on gain calculation performed in collaboration between PTX and PRX devices. Figure 15 The left side depicts actions that can be performed by the PTX device (e.g., by control circuit 16). Figure 15The right side depicts actions that can be performed by a PRX device (e.g., by control circuitry 38). For convenience, such actions will be described as being performed by the corresponding PTX or PRX device, although it should be understood that such actions can actually be performed by specific components or systems of such devices. Starting with block 1501, the PTX can detect ripple associated with the aforementioned frequency jitter. This can be based on its own measurements, such as measurements of inverter output and / or voltage, inverter input current and / or voltage, or other suitable circuit parameters. In some embodiments, the PRX device can detect this ripple (block 1502) and notify the PTX using available in-band or out-of-band communication channels (block 1503). The PRX device can detect this ripple by measuring rectifier input current and / or voltage, rectifier output current and / or voltage, or other suitable circuit parameters.

[0125] In any case, once the PTX detects a ripple condition (box 1501), the system (including the PTX and PRX) can enter the initial calibration phase 1600, which will be referred to below. Figure 16 A more detailed description follows. Once calibration phase 1600 is complete, PTX can participate in runtime duty cycle calculation (box 1700), as shown in the following reference. Figure 17 To describe in more detail.

[0126] Figure 16 This is a simplified flowchart (1600) of the initial calibration phase of the first duty cycle compensation technique. Figure 15 Like in the middle, Figure 16 The left side depicts actions that can be performed by a PTX device (e.g., by control circuitry 16). Similarly, Figure 16 The right side depicts actions that can be performed by a PRX device (e.g., by control circuitry 38). For convenience, such actions will be described as being performed by the corresponding PTX or PRX device, although it should be understood that such actions can actually be performed by specific components or systems of such devices. Additionally, Figure 16 The operations described are divided into four groups labeled (a)-(d), encompassing measurements, communications, and / or calculations performed by the PTX and PRX devices, respectively. The corresponding boxes for these operations are provided with reference numbers in group (a), but for brevity, such reference numbers are omitted in groups (b)-(d). Nevertheless, it should be understood that... Figure 16 The corresponding reference number applies to all operations of a given type, even if the number is omitted in one or more instances.

[0127] Figure 16The initiation calibration operation can be triggered as part of the power ramp-up phase. As just one example, the operation can be triggered in response to a power level below a threshold. Such a threshold could be 15W, but other values ​​such as 5W, 7.5W, 10W, etc., can be chosen. The estimated coupling coefficient kest can also be part of this triggering. As an example, initiation calibration can be triggered if kest < 0.83 or other suitable values ​​(such as 0.80, 0.81, 0.82, 0.84, 0.85, etc.).

[0128] Figure 16 The initial calibration operation may include multiple gain measurements, whereby the PTX measures the gain of the wireless power transmission path in cooperation with the PRX. These gain measurements can be performed at multiple operating frequencies and duty cycles to allow characterization of the wireless power transmission path. Thus, in box 1601 of group (a), the PTX may set an initial wireless power transmission frequency F1 and an initial duty cycle D1-1. The PTX may then (in box 1602) initiate a gain measurement mode (GMM). This may include communication to the PRX, the reception of which is indicated in box 1603. In some embodiments, the initiation of the gain measurement mode may be performed using communication according to one or more versions of the Qi wireless power transmission protocol issued by the Wireless Power Consortium. These communications may include the exchange of messages between the PTX and the PRX, which are omitted here for brevity.

[0129] Once the gain measurement mode is activated, the PRX can measure the rectifier voltage (Vr) and rectifier current (Ir) at each of the first and second load levels. For example, the PRX can measure Vr1 and Ir1 at the first load level, then connect an additional load and measure Vr2 and Ir2 at the second load level (box 1604). In box 1605, the PRX can send (report) these values ​​to the PTx. This sending can also be performed according to one or more versions of the Qi protocol and may include the exchange of one or more messages, which are omitted here for brevity.

[0130] Once PTX receives the measured voltage and current values ​​Vr1, Ir1, Vr2, and Ir2, it can transmit... Figure 14 The parameters K and Zo are depicted in the equivalent circuit model 1400. More specifically, the parameter Zo can be calculated according to the following equation:

[0131] in yes Figure 14The moduli of the complex impedance depicted, Vr1, Ir1, Vr2, and Ir2, are the corresponding measurements of the rectifier voltage and current at two different load levels as described above. Therefore, for the first gain measurement (a), the value of Zo1-1 can be determined, which corresponds to the first operating frequency and duty cycle set by PTX in block 1601.

[0132] Given Zo, the parameter K can be calculated using the following equation:

[0133] in The modulus of the complex impedance calculated above, Ir1 and Vr1 are the corresponding measured values ​​of the rectifier voltage and current as described above, and Vinv is the inverter input voltage. This calculation can optionally be performed using the values ​​of Ir2 and Vr2. Therefore, for the first gain measurement (a), the value of K1-1 can be determined, which corresponds to the first operating frequency and duty cycle set by PTX in block 1601.

[0134] These operations are available Figure 16 The described gain measurement sequence (b)-(d) is repeated, where gain measurement (b) is at a first frequency F1 and a second duty cycle D1-2, gain measurement (c) is at a second frequency F2 and a third duty cycle D2-1, and gain measurement (d) is at a second frequency F2 and a fourth duty cycle D2-2. Therefore, these measurements produce corresponding parameters Zo1-2, K1-2, Zo2-1, K2-1, Zo2-2, and K2-2, as described above. Then, refer to the above... Figure 15 Introduction and reference below Figure 17 The runtime duty cycle calculations of 1700 use these calibration values ​​in a more detailed description.

[0135] PTX can select frequency values ​​F1 and F2, as well as duty cycle values, at these corresponding frequencies to provide appropriate coverage of the expected operating conditions range. For example, a first frequency and a second frequency can be selected to correspond to the frequency range that will be caused by the jitter operation described above. As an example, for a nominal operating frequency of 360 kHz, F1 could be 380 kHz, and F2 could be 340 kHz. These values ​​can be, but are not necessarily, the minimum and maximum values ​​provided by the jitter operation. Similarly, various duty cycles can be selected to correspond to the range of duty cycles expected to be selected to provide constant gain (ripple reduction) based on the jitter operating frequency. For example, at the first frequency F1 (e.g., 380 kHz), a first duty cycle D1-1 of 0.46 and a second duty cycle of 0.5 can be selected. Likewise, at the second frequency F2 (e.g., 340 kHz), a third duty cycle D2-1 of 0.35 and a second duty cycle of 0.4 can be selected. Generally, selecting a range between frequencies F1 and F2 that covers a large portion of the expected jitter range provides better compensation. Additionally, regarding the duty cycle, it should be understood that the duty cycle will always be less than 0.5, and as the frequency decreases, it may be necessary to reduce the duty cycle to keep the wireless power transmission channel gain (and therefore the power level) relatively constant. Therefore, each of the frequency and duty cycle values ​​mentioned above is merely illustrative, and any appropriate value may be chosen for a given specific implementation.

[0136] Figure 17 This is a simplified flowchart (1700) of the runtime duty cycle calculation stage of the first duty cycle compensation technique. Figure 15 and Figure 16 Like in the middle, Figure 17 The left side depicts actions that can be performed by a PTX device (e.g., by control circuitry 16). Similarly, Figure 17 The right side depicts actions that can be performed by the PRX device (e.g., by control circuitry 38). For convenience, such actions will be described as being performed by the corresponding PTX or PRX device, although it should be understood that such actions can actually be performed by specific components or systems of such devices. During wireless power transmission, the PRX will periodically report (box 1701) its rectifier power level (Prect), i.e., the amount of power supplied to the load on the PRX, and its rectifier output voltage (Vrect), to the PTX. In some embodiments, this reporting or communication may be performed according to one or more versions of the Qi standard referenced above. In some embodiments, such reporting may include the use of MPLA data packets sent at specified time intervals. The time interval may be 1.3 s or other time periods.

[0137] When PTX receives the reported Prect and Vrect values, it can compare the Prect value with a threshold (box 1702) to determine, for example, whether the transmit power level exceeds the threshold. The threshold can be 15W or other suitable values, such as 5W, 7.5W, 10W, 12.5W, 20W, 25W, etc. If the reported Prect value exceeds the threshold, PTX can calculate the gains G1 and G2 according to the following equations (box 1703):

[0138] as well as

[0139] Where Ro is the load impedance given by the following formula:

[0140] Furthermore, Zo1 is Zo1-1, K1 is K1-1, Zo2 is Zo2-1, and K2 is K2-1, as determined above.

[0141] After calculating the gain, PTX can calculate the duty cycles D1 and D2 by solving the following system of equations (box 1704):

[0142]

[0143] Where dD is the duty cycle span, G1 and G2 are the gains calculated above, and Vrect is the rectifier voltage reported by PRX. The solutions to these equations provide:

[0144]

[0145] All parameters are as described above. Finally, Doffset can be defined as:

[0146] Doffset is the perturbation applied to the duty cycle to minimize ripple. Using the duty cycle calculated in box 1704, PTX can then set a new duty cycle corresponding to the frequency jitter step (box 1705) to minimize the ripple associated with frequency jitter.

[0147] In the above calculations, the gain calculations use the value Zo1 as Zo1-1, K1 as K1-1, Zo2 as Zo2-1, and K2 as K2-1. In some embodiments, these parameters may be changed according to the current or determined duty cycle. As an example, when D2 is greater than or equal to a certain threshold (e.g., 0.42), the above values may be used. If D2 is less than the threshold, other values may be used instead, i.e., Zo1 as Zo1-2, K1 as K1-2, Zo2 as Zo2-2, K2 as K2-2, because these values were calculated using a lower (and thus closer duty cycle) during the calibration phase described above Figure 16 described. Additionally, for PTX, it may be desirable to set boundaries for the duty cycle value. For example, D2 may be restricted to a range from 0.35 to 0.445 (or other suitable values), and the maximum duty cycle may be restricted to be greater than D2 and always less than 0.5.

[0148] Figure 18 is a simplified flowchart 1800 of a second duty cycle compensation technique that is performed only by PTX without additional data or other cooperation from PRX. For convenience, this action will be described as being performed by the PTX device, although it should be understood that this action may actually be performed by a specific component or system of such a device. This compensation technique is based on PTX monitoring the inverter input voltage (Vinv) ripple, which is caused by the corresponding ripple on PRX. Thus, in block 1801, PTX may measure the Vinv ripple, thereby generating a value Vinvpp[n], where n is the number of measurements. Then, in block 1802, PTX may compare the measured ripple Vinvpp[n] with a threshold (e.g., 100 mV) and the previously measured value Vinvpp[n-1], and also compare the current duty cycle (D[n]) with the previous duty cycle (D[n-1]). In response to the following conditions: • The ripple is greater than the threshold (i.e., Vinvpp[n]>Th); • The ripple value decreases over time (i.e., Vinvpp[n]<Vinvpp[n-1]); and • The duty cycle increases over time (i.e., dD>0, where dD = D[n]-D[n-1]); then PTX may increment the duty cycle by a small value (e.g., 0.1, i.e., D[n+1]=D[n]+0.1) and set the maximum duty cycle value, e.g., 0.445, in block 1803. Referring to the Figure 19 curve discussed below, this may be described as left-side operation. PTX may then return to block 1801 to perform another ripple measurement.

[0149] Otherwise, if one or more of the above conditions of block 1802 are not satisfied, then in block 1804, PTX may determine whether: • The ripple is greater than a threshold (i.e., Vinvpp[n]>Th); • The ripple value increases over time (i.e., Vinvpp[n]>Vinvpp[n - 1]); and • The duty cycle increases over time (i.e., dD>0, where dD = D[n]-D[n - 1]).

[0150] In response to these conditions being satisfied, PTX may decrease the duty cycle by a small value (e.g., 0.1, i.e., D[n + 1]=D[n]-0.1) in block 1805 and set a minimum duty cycle value, e.g., 0.35. Referring to the Figure 19 curve discussed below, this can be described as a movement to the right in operation. PTX may then return to block 1801 to perform another ripple measurement.

[0151] Otherwise, if one or more of the above conditions of block 1804 are not satisfied, then in block 1807, PTX may determine whether: • The ripple is greater than a threshold (i.e., Vinvpp[n]>Th); • The ripple value decreases over time (i.e., Vinvpp[n]<Vinvpp[n - 1]); and • The duty cycle decreases over time (i.e., dD<0, where dD = D[n]-D[n - 1]).

[0152] In response to these conditions being satisfied, PTX may decrease the duty cycle by a small value (e.g., 0.1, i.e., D[n + 1]=D[n]-0.1) in block 1806 and set a minimum duty cycle value, e.g., 0.35. Referring to the Figure 19 curve discussed below, this can be described as a right - hand operation. PTX may then return to block 1801 to perform another ripple measurement.

[0153] Otherwise, if one or more of the above conditions of block 1806 are not satisfied, then in block 1808, PTX may determine whether: • The ripple is greater than a threshold (i.e., Vinvpp[n]>Th); • The ripple value increases over time (i.e., Vinvpp[n]>Vinvpp[n - 1]); and • The duty cycle decreases over time (i.e., dD<0, where dD = D[n]-D[n - 1]).

[0154] In response to these conditions being met, PTX can increment the duty cycle by a small value (e.g., 0.1, i.e., D[n+1] = D[n] + 0.1) in box 1809 and set a maximum duty cycle value, e.g., 0.445. See the discussion below. Figure 19 The curve can be described as a movement to the left. PTX can then return to box 1801 to perform another ripple measurement.

[0155] Finally, if none of the conditions in boxes 1802, 1804, 1806, or 1808 are met (e.g., because the ripple is less than the threshold, the ripple neither increases nor decreases, and / or the duty cycle remains unchanged), PTX can simply return to box 1801 and perform another ripple measurement, repeating the above process without changing the duty cycle as in boxes 1803, 1805, 1807, or 1809.

[0156] Figure 19 This is graph 1900 showing the relationship between ripple voltage and duty cycle when using a second duty cycle compensation technique. Curve 1901 corresponds to a first power level P1 (e.g., 50W), and curve 1902 corresponds to a second power level P2 (e.g., 25W), which is less than the first power level P1. For both curves, starting from the left, the ripple voltage decreases as the duty cycle increases until it reaches a certain minimum value. For different power levels, the minimum ripple value and / or the associated duty cycle may be different. Nevertheless, for a given power level (and the relative positions of PTX and PRX), there will be an optimal duty cycle value that minimizes ripple. For any given power level, below this optimal duty cycle, increasing the duty cycle will decrease the ripple voltage. This is the left-side operation described above. Conversely, for any given power level, above this optimal duty cycle, increasing the duty cycle will increase the ripple voltage, while decreasing the duty cycle will decrease the ripple voltage. This is the right-side operation described above.

[0157] Therefore, when PTX measures the ripple and increments or decrements the duty cycle as described above, PTX will make the increment or decrement decision in part based on whether the previous increment or decrement has achieved the desired result. If not, the control logic will have to switch to the other side of the curve to achieve the desired result. Additionally, by having a Vinv ripple threshold (e.g., 100mV) below which the duty cycle is not changed, a "dead zone" can exist at an acceptable small ripple voltage value, where no change to the duty cycle is performed. Additionally, the above control technique can be started with an appropriate initial duty cycle value (e.g., 0.5).

[0158] This second technique for duty cycle compensation relies on the measurement of the inverter input voltage Vinv. In some implementations, these measurements may be accompanied by noise associated with sources other than disturbances caused by frequency jitter. Therefore, the measured ripple voltage may be masked by this noise. However, since the frequency of the ripple associated with frequency jitter is known, the measured voltage (e.g., box 1801) can be filtered in the analog domain before sampling and / or in the digital domain after sampling to isolate the ripple value from other noise sources. One digital domain filtering technique that may be advantageous in some applications is the Goertzel algorithm, as it offers relatively simple computation, which is more readily within the capabilities of the PTX control circuitry 16. However, any of a variety of filtering techniques may be used depending on the available computational resources and the desired performance level.

[0159] Reducing ripple (e.g., the ripple of the rectifier voltage Vrect) can have several benefits. One such benefit is reduced audible noise. In some implementations, for example, if ceramic capacitors are used in the DC link, the Vrect ripple may be associated with audible noise. Depending on the switching frequency (e.g., 360 kHz) and the number of jitter steps (e.g., 32 steps), frequencies within the audible range may be affected (e.g., 360 kHz / 32 = 11.25 kHz). This benefit, along with other benefits such as improved EMI and EMC, can also be achieved by reducing the ripple associated with the frequency jitter described herein.

[0160] The foregoing is merely illustrative and various modifications can be made to the described implementation scheme. The foregoing implementation scheme can be implemented individually or in any combination.

Claims

1. An electronic device configured to transmit wireless power to an attached electronic device, the electronic device comprising: Wireless power transmission coil; An inverter configured to receive a switching signal based on a jittered clock signal and output a corresponding alternating current signal to the wireless power transmission coil; and The control circuit generates the jitter clock signal. The jittered clock signal has multiple frequency steps. The timing properties of one or more of the switching signals are different between at least two different frequency steps in the plurality of frequency steps to compensate for the different wireless power transmission gains at the at least two different frequency steps.

2. The electronic device of claim 1, wherein the inverter comprises four transistors controlled by two switching signals.

3. The electronic device according to claim 1, wherein the timing attribute includes the operating phase of the inverter.

4. The electronic device according to claim 1, wherein the timing attribute includes the duty cycle of the switching signal.

5. The electronic device of claim 4, wherein the control circuit is configured to select the one or more timing attributes of the at least two different frequency steps based on real-time operating conditions determined in communication with the additional electronic device.

6. The electronic device according to claim 5, wherein the real-time operating conditions include the received power information of the additional electronic device.

7. The electronic device of claim 6, wherein the control circuit is configured to receive the received power information from the additional electronic device using the wireless power transmission coil.

8. The electronic device of claim 6, wherein the received power information includes calibrated measurements of rectifier voltage and rectifier current of the additional electronic device at multiple operating frequencies, duty cycles, and power levels.

9. The electronic device of claim 8, wherein the control circuit calculates one or more gain values ​​based at least in part on the calibration measurements.

10. The electronic device of claim 6, wherein the received power information includes operating time measurements of the rectifier power and rectifier voltage of the additional electronic device.

11. The electronic device of claim 10, wherein the control circuit calculates one or more timing attribute values ​​based at least in part on the runtime measurement.

12. The electronic device of claim 6, wherein the real-time operating conditions include ripple messages reported by the additional electronic device.

13. The electronic device of claim 12, wherein the control circuit is configured to receive a ripple value from the additional electronic device using the wireless power transmission coil.

14. The electronic device of claim 4, wherein the control circuit selects the one or more timing attributes of the at least two different frequency steps based on real-time operating conditions determined without communicating with the additional electronic device.

15. The electronic device of claim 14, wherein the real-time operating conditions include the inverter input voltage ripple measured by the control circuit.

16. The electronic device of claim 15, wherein the one or more timing attributes include a duty cycle, and the control circuit increments or decrements the duty cycle in response to: The inverter input voltage ripple measured by the control circuit is compared with a threshold. Regarding the determination of whether the ripple voltage increases or decreases over time; and Regarding the determination of whether the duty cycle increases or decreases over time.

17. The electronic device of claim 1, wherein the jitter clock signal has the plurality of frequency steps in a repetition period, wherein the repetition period of the jitter clock signal comprises a step function of an approximate waveform, and wherein the jitter clock signal has a unique frequency magnitude at each of the plurality of frequency steps during the repetition period.

18. The electronic device of claim 17, wherein the waveform includes a triangular waveform.

19. The electronic device of claim 17, wherein the plurality of frequency steps during the repetition period comprises thirty-two frequency steps during the repetition period.

20. An electronic device, the electronic device comprising: Wireless power transmission coil; An inverter configured to receive a switching signal based on a jittered clock signal and output a corresponding alternating current signal to the wireless power transmission coil; and A control circuit configured to generate the jitter clock signal. The jittered clock signal has multiple frequency steps, each frequency step having a unique frequency value, and The jitter clock signal has a specific timing property where at least two of the plurality of frequency steps are selected to compensate for different wireless power transmission gains at the at least two different frequency steps.

21. The electronic device of claim 20, wherein the timing attribute includes the operating phase of the inverter.

22. The electronic device of claim 20, wherein the timing attribute includes duty cycle.

23. The electronic device of claim 20, wherein the control circuit selects the specific timing attribute of the at least two different frequency steps based on real-time operating conditions determined in communication with an additional electronic device.

24. The electronic device of claim 20, wherein the control circuit selects the specific timing attribute of the at least two different frequency steps based on real-time operating conditions determined without communicating with additional electronic devices.

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