Power factor correction (PFC) circuit

CN122247180APending Publication Date: 2026-06-19NXP USA INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
NXP USA INC
Filing Date
2025-12-16
Publication Date
2026-06-19

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Abstract

Systems and methods for power factor correction (PFC) circuits are described. In various embodiments, these systems and methods can be used to power the operation of any component of any electronic device. In an illustrative, non-limiting embodiment, a power supply device may include: a power converter having a high-side switch, a low-side switch coupled to the high-side switch, and a bootstrap capacitor coupled between the high-side switch and the low-side switch; and control circuitry coupled to the low-side switch, the control circuitry being configured to activate the low-side switch and charge the bootstrap capacitor without changing the output voltage of the power converter.
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Description

Technical Field

[0001] This disclosure generally relates to electronic circuits, and more specifically, to power factor correction (PFC) circuits with bootstrap capacitor charging capability. Background Technology

[0002] Power supply units convert electrical energy from sources such as wall sockets into the appropriate voltage, current, and frequency required by electronic devices. They are widely used in a variety of applications, from small gadgets to large industrial machines.

[0003] Power factor correction (PFC) circuits are used to improve the power factor and reduce power waste, especially in devices that draw large amounts of power from the mains. The converter in the power supply unit transforms AC (alternating current) from the mains into DC (direct current) required by electronic devices and can adjust the voltage level as needed. At low output power levels, burst mode operation is used to improve efficiency. In burst mode, the power supply unit periodically switches on and off to maintain the output voltage, thereby reducing overall power consumption. Summary of the Invention

[0004] Thus, systems and methods for opportunistic charging of PFC circuits with bootstrap capacitors are described. In various embodiments, these systems and methods can be used to power the operation of any component of any electronic device. In an illustrative, non-limiting embodiment, a power supply device may include: a power converter having a high-side switch, a low-side switch coupled to the high-side switch, and a bootstrap capacitor coupled between the high-side switch and the low-side switch; and control circuitry coupled to the low-side switch, the control circuitry being configured to activate the low-side switch and charge the bootstrap capacitor without changing the output voltage of the power converter.

[0005] The bootstrap capacitor may be coupled in series with a diode. The diode may be coupled to a voltage source, and the bootstrap capacitor may be coupled between a high-side switch and a low-side switch. The control circuitry may be configured to activate the low-side switch to charge the bootstrap capacitor when the high-side switch is off. The control circuitry may also be configured to activate the low-side switch to charge the bootstrap capacitor in response to the mains voltage reaching its negative peak value.

[0006] Alternatively, the control circuitry can be configured to activate the low-side switch in response to the power supply operating in burst mode, non-switching mode, or low-frequency switching mode. Alternatively, the control circuitry can be configured to activate the low-side switch in response to receiving a mode active signal. Alternatively, the control circuitry can be configured to activate the low-side switch for one or more switching cycles.

[0007] Alternatively, the control circuitry can be configured to activate the low-side switch following a selected switching cycle pattern. The power supply unit may include an inductor coupled between the high-side and low-side switches, wherein the control circuitry is configured to turn off the low-side switch before the inductor accumulates sufficient energy to change the output voltage of the power converter.

[0008] In another illustrative, non-limiting embodiment, an electronic circuit includes: a power converter having a high-side switch, a low-side switch coupled to the high-side switch, an output capacitor coupled across the high-side switch and the low-side switch, and a bootstrap capacitor coupled between the high-side switch and the low-side switch; and a control module coupled to the power converter, wherein the control module is configured to activate the low-side switch to charge the bootstrap capacitor in a timely manner without increasing the charge across the output capacitor.

[0009] The control module can be configured to activate the low-side switch when the high-side switch is turned off. Alternatively, the control module can be configured to activate the low-side switch in response to the input voltage reaching its negative peak. Alternatively, the control module can be configured to activate the low-side switch in response to at least one of the following: the power supply operates in burst mode, or a burst mode activation signal is received. Alternatively, the control module can be configured to activate the low-side switch for one or more switching cycles. Alternatively, the control module can be configured to activate the low-side switch following an alternating switching cycle pattern.

[0010] In yet another illustrative, non-limiting embodiment, a method may include: entering a selected operating mode in a power converter having a bootstrap capacitor coupled between a low-side switch and a high-side switch; and in response, activating the low-side switch to charge the bootstrap capacitor without affecting the output of the power converter.

[0011] The method may also include activating the low-side switch following a switching cycle pattern. The selected operating mode may include a burst mode. Alternatively, the selected operating mode may include a non-switching mode or a low-frequency switching mode.

[0012] In many implementations, the systems and methods described herein can be incorporated into a wide range of electronic devices, including, for example, computer systems or information technology (IT) products; consumer devices or appliances; scientific instruments; industrial robots; medical or laboratory electronic devices; transportation vehicles such as automobiles, buses, trucks, trains, ships, airplanes, etc.; military equipment, etc. Attached Figure Description

[0013] This disclosure is by way of example and is not limited to the accompanying drawings, in which similar reference numerals indicate similar elements. The elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale.

[0014] Figure 1 This is a circuit diagram of an example of a power factor correction (PFC) circuit according to some embodiments.

[0015] Figure 2 This is a block diagram of an example of a PFC controller according to some embodiments.

[0016] Figure 3 and 4 These are graphs showing examples of switching waveforms during the positive and negative mains phases according to some embodiments.

[0017] Figure 5 and 6 This is a graph illustrating examples of normal and boost mode operation performed by an example PFC circuit and controller according to some embodiments.

[0018] Figure 7 and 8 This is a graph illustrating an example of the switching waveforms when an example PFC controller is operated during the positive and negative mains phases, according to some embodiments. Detailed Implementation

[0019] Power supply units convert electrical energy from sources such as wall sockets into the appropriate voltage, current, and frequency required by electronic devices. They are widely used in a variety of applications, from small gadgets to large industrial machines.

[0020] Power factor correction (PFC) circuits are used to improve the power factor and reduce power waste, especially in devices that draw large amounts of power from the mains. Converters in power supply units transform AC (alternating current) from the mains into DC (direct current) required by electronic devices, and the voltage level can be adjusted as needed.

[0021] At low output power levels, burst mode operation can be used to improve efficiency. In burst mode, the power supply periodically switches on and off to maintain the output voltage, thereby reducing overall power consumption. However, during burst mode or low-power operation, the bootstrap capacitor may discharge, affecting the ability to drive the high-side switch and causing a voltage drop across the output. This can lead to inefficiencies with connected loads and potential operational problems.

[0022] Existing solutions for maintaining the charge of the bootstrap capacitor during burst-mode operation typically involve limiting the turn-off cycle in burst mode, which requires a regular switching cycle to charge the output capacitor. If the load is low, this can cause an undesirable increase in output voltage, necessitating the application of a minimum load to keep the output voltage within limits. Such methods may increase no-load or low-load input power, which is generally undesirable. Additionally, some solutions use charge pumps, which increases design complexity and cost.

[0023] To address these and other issues, the systems and methods described herein provide PFC circuitry and controllers that ensure the bootstrap capacitor remains charged during burst-mode operation. By detecting the negative peak of the mains voltage and using this moment to drive the low-side switch, the bootstrap capacitor can be charged without affecting the output voltage.

[0024] Thus, these systems and methods maintain the efficiency and proper operation of the power supply even under low loads, thereby addressing the challenges of low power levels. Furthermore, these systems and methods can be implemented during operating modes, such as when the switching frequency decreases under low load conditions, or after a load step from high to low load, where switching operation is paused for a period due to output voltage overshoot.

[0025] As used herein, the term "opportunistic charging" generally refers to strategically activating the low-side switch to charge the bootstrap capacitor at a specific moment (when it will not adversely affect the output voltage of the power converter). This can be achieved, for example, by detecting a negative peak in the mains voltage and using this moment to drive the low-side switch. By doing so, the bootstrap capacitor can be effectively charged during burst-mode operation or low-power conditions without causing voltage drops or inefficiencies in the power supply unit. This ensures that the bootstrap capacitor remains charged, thereby maintaining proper operation and efficiency of the power supply unit even under low loads.

[0026] To illustrate this point, Figure 1 An example of a PFC circuit 100 is depicted. In various embodiments, the PFC circuit 100 can be used to power the operation of any component of any electronic device or load based on the mains voltage source 101 to the output voltage (VBOOST) coupled across its output capacitor 122. In this case, for high efficiency, the totem pole PFC topology is shown, with individual components coupled as illustrated.

[0027] Specifically, mains power 101 supplies voltage to PFC circuit 100. Capacitor 102 can be used for differential-mode noise filtering. In some embodiments, this filtering can be performed using several inductors and capacitors, but for simplicity, only capacitor 102 is shown. Meanwhile, capacitors 103-106 are filter capacitors used for common-mode noise filtering.

[0028] Voltage source 107 is a DC power supply device that supplies voltage (VCC) to gate drivers 108 and 109. The high-side supply VCC_HS is provided by a bootstrap circuit including diode 110 and capacitor 111. When the voltage at the node (VDRN) between high-side switch 113 and low-side switch 114 is low (e.g., close to zero), diode 110 conducts and charges capacitor 111. Capacitor 111 then buffers energy to supply DRV_HS to gate driver 108 along current path 112.

[0029] When VDRN is at a high voltage, diode 110 blocks current flow and supplies power from capacitor 111 to gate driver circuit 108. In some cases, diode 110 can be replaced by an active switch with a control circuit system.

[0030] High-side switch 113 and low-side switch 114 are switching elements (e.g., 100 kHz), and inductor 115 boosts the mains voltage 101 to VBOOST. VBOOST is generally higher than the peak value of the mains voltage 101. Typically, for general applications, VBOOST can have a value of about 400 V. Output capacitor 122 buffers VBOOST.

[0031] Diodes 116 and 117 are rectifier diodes. During normal operation, diode 117 conducts during the positive mains phase (i.e., 101 > 0 V), and diode 116 conducts during the negative mains phase (i.e., 101 < 0 V). In some applications, diodes 116 and 117 can be replaced by active switches (e.g., to improve efficiency).

[0032] Resistors 118-121 form a voltage divider for the mains voltage 101, namely VMAINS_L (VL) and VMAINS_N (VN), and are typically used to sense the amplitude and phase of the voltage divider. During normal operation, the bootstrap capacitor 111 is charged in each switching cycle.

[0033] To illustrate this point, Figure 3 and 4 Graphs 300 and 400 show examples of switching waveforms during the positive and negative mains phases of the PFC circuit 100, respectively. Specifically, in graph 300, the switching waveform is plotted for the voltage at the VDRN node during the positive mains phase when VL > VN. The low-side switch 114 is turned on between t0 and t1. From t0 to t1, VDRN is connected to ground via the low-side switch 114. The capacitor 111 is charged via the operation of the voltage source 107, the diode 110, and the low-side switch 114. The low-side switch 114 can be driven between t1 and t2, or the body diode of the low-side switch 114 can be used.

[0034] In graph 400, during a negative mains phase when VL < VN, another switching waveform is plotted for the voltage at the VDRN node. The low-side switch 114 is turned on between t3 and t4. From t4 to t5, VDRN is approximately zero. The low-side switch 114 can be driven between t4 - t5, or the body diode of the low-side switch 114 can be used.

[0035] In normal operation, the bootstrap capacitor 111 is charged during each switching cycle, but at very low output power levels, it may be advantageous to operate in burst mode for efficiency reasons. As used herein, the term "burst mode" refers to an operating mode in a power supply device in which the converter periodically turns on and off to maintain its output voltage, thereby reducing the total power consumption by minimizing the energy used during low-demand cycles.

[0036] Circuit 100 can be switched periodically to charge the output capacitor 122, and then it can be turned off. During the off period, the load (not shown) connected to VBOOST can be powered by capacitor 122 while the bootstrap capacitor 111 discharges. At very low loads, the off period can be long enough that the bootstrap capacitor 111 discharges to too low a voltage to supply DRV_HS to the gate driver 108. If the switch needs to restart to recharge capacitor 122 when VMAINS < 0, the low-side switch 114 cannot be turned on because the supply voltage VCC_HS is too low.

[0037] This results in a voltage drop on VBOOST. Later, when VMAINS becomes greater than zero, the switching element 114 can be driven and C_HS can be recharged. Thus, a VBOOST voltage drop time of up to half of the mains cycle (e.g., for 50 Hz mains, 10 milliseconds) can occur. Additionally, the voltage drop on VBOOST may be too large for the load connected to VBOOST to maintain proper operation.

[0038] To keep the bootstrap capacitor 111 charged during burst mode operation, the off period in burst mode operation can be time-limited. But this means that the switching cycle will have to be present regularly to charge the output capacitor 122. If the load on VBOOST is low, the output capacitor 122 may be charged to an undesirably high voltage. Applying a minimum load on VBOOST can keep the output voltage within limits, but it also increases the no-load or low-load input power, which is generally undesirable.

[0039] To recharge the bootstrap capacitor 111 without charging the output capacitor 122, the systems and methods described herein may include driving the low-side switch 114 during burst-mode operation when the mains voltage is near its extreme negative voltage (negative mains peak). In this way, when the low-side switch 114 is turned on, VDRN is close to 0 V, and charging begins. Therefore, there is no need to discharge capacitors 103-106—discharging can potentially result in greater no-load efficiency. It also ensures that no power is delivered to the output during the charging cycle (which would otherwise lead to VBOOST runaway). Capacitors 103-106 can be used to achieve good electromagnetic interference (EMI) results.

[0040] Figure 2 This is a block diagram of an example of a PFC controller 200 that can be used to implement these systems and methods. In some embodiments, the PFC controller 201 may include a subtractor 201 configured to measure the AC mains voltage 101 via VMAINS_L and VMAINS_N. The VMAINS voltage signal may be processed in a phase or peak detection circuit 202 to capture the moment of the negative mains peak voltage. A regulator circuit 203 may adjust the output voltage VBOOST to the desired level.

[0041] Regulator 100 can be coupled to burst mode controller 204, which switches between normal mode and burst mode based on PFC output power. Meanwhile, switch controller 203 can drive switches 113 and 114 via output signals HS and LS, and receives its input from peak or phase detection circuit 202, regulator 100, or burst mode controller 204.

[0042] Figure 5 and 6 Graphs 500 and 600, according to some embodiments, illustrate examples of normal and boost mode operation performed by PFC circuit 100 and PFC controller 200. In graph 500, VL and VN are shown. Between ta1 and tb1, the converter is in either normal operation or burst mode active period. The switching waveform of VDRN is also depicted.

[0043] Referring again to curve 500, at time tb1, the converter switches to the burst mode shutdown cycle. Switching elements 113 and 114 remain off, and VCC_HS drops. At times tc1, td1, and te1, low-side switch 114 is driven to its on state for one or more switching cycles. During the on state, VDRN is essentially zero, and bootstrap capacitor 111 is recharged. Because VMAINS is at its negative peak voltage, VL is already (close to) zero, and almost no energy accumulates in inductor 115 during the on cycle of switching element 114. If energy accumulates in inductor 115, it will flow into output capacitor 112. Note that when the burst shutdown cycle begins at tb1, VN is low (essentially zero).

[0044] Referring now to curve 600, between ta2 and tb2, the converter is in either normal operation or a burst mode active cycle. When the burst shutdown cycle begins at tb2, VN is high (essentially equal to the boost voltage). Capacitors 103-106 primarily become high. Now, as the bootstrap capacitor 111 is recharged by one or more switches of the low-side switch 114 at tc2, td2, te2, etc., capacitors 103-106 discharge and VN and VL decrease. After tg2, capacitors 103-106 have discharged, and the negative mains peak voltage VL is zero, as shown in curve 500.

[0045] During the switching and discharging of capacitors 103-106, the energy stored in these capacitors flows to output capacitor 112. However, since the values ​​of capacitors 103-106 are typically much smaller than those of output capacitor 112 (approximately 10 nF for capacitors 103-106 and approximately 100 uF or larger for output capacitor 112), the output voltage may not increase significantly. GATE_LS is also shown in graphs 500 and 600 and appears as a small spike.

[0046] Figure 7 and 8Graphs 700 and 800, according to some embodiments, illustrate examples of switching waveforms when the PFC controller 200 is operated during the positive and negative mains phases. In graph 700, the switching waveforms of GATE_LS and VDRN are shown with the negative peak of VL approaching zero during the burst shutdown cycle. Between t10 and t11, GATE_LS is high, and the low-side switch 114 is on. VDRN is low. The bootstrap capacitor 111 charges as previously described. After t11, VDRN may rise, but the small amount of energy accumulated in the inductor 115 between t10 and t11 is insufficient to increase VDRN to VBOOST, so no energy is transferred to the output capacitor 112. In graph 700, t10 is equal to tg2 shown in graph 600, such that the switching cycle begins at (or near) the negative mains peak voltage.

[0047] In graph 800, the switching waveforms of GATE_LS and VDRN are shown for the case where VL is not close to zero at the start of the burst shutdown cycle. From t20 to t21, GATE_LS is high, and the low-side switch 114 is on. VDRN is low. The bootstrap capacitor 111 charges as previously described. After t21, VDRN rises to VBOOST, and the energy stored in inductor 115 between t20 and t21 is transferred to output capacitor 112 during t21 to t22. In graph 800, t20 equals tc2, such that the switching cycle begins at (or near) the negative mains peak voltage.

[0048] Two switching cycles are plotted in graphs 700 and 800. In some cases, the number of switching cycles can be one or more, depending on how long it takes to recharge the bootstrap capacitor 111 to the desired voltage. Alternatively, the PFC controller 200 can switch every other mains cycle or every nth mains cycle. For example, near tc1 and te1, but not near tb1 and td1. Furthermore, depending on the rate of discharge of VCC_HS, more or fewer switching cycles can be used, and switching cycles can be skipped.

[0049] It should be noted that the time scales of curves 500 and 600 differ from those in curves 300, 400, 700, and 800. Curves 500 and 600 have a mains frequency time scale (e.g., 20 milliseconds for 50 Hz mains). Curves 300, 400, 700, and 800 have a switching frequency time scale for the PFC circuit 100 (typically much higher than 20 kHz). Furthermore, in curves 700 and 800, VCC_HS is plotted relative to the VDRN node, the local ground of DRV_HS, and the bootstrap capacitor 111.

[0050] In various embodiments, the systems and methods described herein can detect the time of negative mains peak voltage (or just around the negative mains peak) by measuring the mains voltage and using that trigger to drive the low-side switch 114 to charge the bootstrap capacitor 111. The PFC controller 200 can operate in burst mode or exit burst mode operation, but other operating modes are not excluded.

[0051] For the sake of brevity, conventional techniques are not described in detail herein. Furthermore, the connecting lines shown in the figures contained herein are intended to illustrate relationships (e.g., logical relationships) or physical couplings (e.g., electrical couplings) between the various elements. However, it should be noted that alternative relationships and connections may be used in other embodiments. Additionally, the circuit systems described herein may be implemented in silicon or another semiconductor material, or alternatively, may be implemented through their software code representation.

[0052] Although various systems and methods have been described herein with reference to specific embodiments, modifications and changes may be made without departing from the scope of this disclosure as set forth in the appended claims. Therefore, the specification and drawings should be considered illustrative rather than restrictive, and all such modifications are intended to be included. It is not intended that any benefit, advantage, or solution to a problem described herein with reference to specific embodiments be construed as a key, necessary, or essential feature or element of any or all claims.

[0053] This document refers to a device as "configured" or a device "configured to" perform certain operations. This may include selecting predefined logic blocks and logically associating them. It may also include programming and modifying the computer software-based logic of the control device, wiring discrete hardware components, or a combination thereof. A device thus configured is physically designed to perform the specified operations.

[0054] Unless otherwise stated, terms such as “first” and “second” are used to arbitrarily distinguish the elements described by these terms. Therefore, these terms are not necessarily intended to indicate a temporal or other priority ordering of such elements. The term “coupled” or “operably coupled” is defined as a connection, but not necessarily a direct connection or a mechanical connection. Unless otherwise stated, the term “a / an / a kind” is defined as one (kind) or more (kinds). The terms “comprise” (and any form of inclusion, such as “comprises” and “comprising”), “have” (and any form of having, such as “has” and “having”), “include” (and any form of including, such as “includes” and “including”), and “contain” (and any form of containing, such as “contains” and “containing”) are open-ended linking verbs. Therefore, a system, apparatus, or device that “comprises,” “has,” “includes,” or “contains” one or more elements possesses, but is not limited to, only possessing, said one or more elements. Similarly, a method or process that "includes," "has," "contains," or "comprises" one or more operations has, but is not limited to, having only one or more operations.

Claims

1. A power supply device, characterized in that, include: A power converter having a high-side switch, a low-side switch coupled to the high-side switch, and a bootstrap capacitor coupled between the high-side switch and the low-side switch; as well as A control circuit coupled to the low-side switch is configured to activate the low-side switch and charge the bootstrap capacitor without changing the output voltage of the power converter.

2. The power supply device according to claim 1, characterized in that, The bootstrap capacitor is coupled in series with a diode.

3. The power supply device according to claim 2, characterized in that, The diode is coupled to a voltage source, and the bootstrap capacitor is coupled between the high-side switch and the low-side switch.

4. The power supply device according to claim 1, characterized in that, The control circuit is configured to activate the low-side switch to charge the bootstrap capacitor when the high-side switch is turned off.

5. The power supply device according to claim 1, characterized in that, The control circuit is configured to activate the low-side switch to charge the bootstrap capacitor in response to the mains voltage reaching its negative peak value.

6. The power supply device according to claim 1, characterized in that, The control circuit is configured to activate the low-side switch in response to the power supply device operating in burst mode, non-switching mode, or low-frequency switching mode.

7. The power supply device according to claim 6, characterized in that, The control circuit is configured to activate the low-side switch in response to receiving a mode active signal.

8. The power supply device according to claim 1, characterized in that, The control circuit is configured to activate the low-side switch in one or more switch cycles.

9. An electronic circuit, characterized in that, include: A power converter having a high-side switch, a low-side switch coupled to the high-side switch, an output capacitor coupled across the high-side switch and the low-side switch, and a bootstrap capacitor coupled between the high-side switch and the low-side switch; as well as A control module coupled to the power converter, wherein the control module is configured to activate the low-side switch to charge the bootstrap capacitor in a timely manner without increasing the charge across the output capacitor.

10. A method, characterized in that, include: Entering a selected operating mode in a power converter, the power converter having a bootstrap capacitor coupled between a low-side switch and a high-side switch; as well as In response, the low-side switch is activated to charge the bootstrap capacitor without affecting the output of the power converter.