Single-supply integrated inductive boost cascaded multilevel inverter for wireless power transfer

Abstract

This invention discloses a single-supply integrated inductor boost-type cascaded multilevel inverter for wireless power transfer, belonging to the field of wireless power transfer technology. The inverter includes a DC power supply, N H-bridge inverter units, N energy storage capacitors, and N energy storage inductors. The H-bridges are cascaded through the energy storage inductors. The DC power supply is boosted by connecting the first inductor and capacitor to the first H-bridge. Each inductor replaces the traditional charging switch, and the inductor energy storage and release, and the orderly charging and discharging of the capacitors are achieved by controlling the switching transistors. This invention preferably uses a five-level topology, designs eight operating modes to match the WPT system resonant frequency, and adopts a nearest-level approximation modulation strategy. This effectively suppresses capacitor charging current spikes, improves output voltage gain, reduces harmonic distortion, simplifies the circuit structure, and is suitable for high-power WPT scenarios such as fast charging of electric vehicles, significantly improving system transmission efficiency and reliability.

Description

Technical Field

[0001] This invention patent applies to the field of wireless power transmission, specifically relating to a single-supply integrated inductor boost cascaded multilevel inverter for wireless power transmission. Background Technology

[0002] Wireless Power Transfer (WPT) is a revolutionary technology that transmits electrical energy without physical contact, changing the way energy is supplied in many fields, especially in high-power applications such as new energy, transportation, and industrial automation. One of the current research directions and application hotspots is wireless power supply technology and systems for electric vehicles, and the power level of these systems is constantly increasing. WPT systems require high-frequency inverters to generate high-frequency alternating current. However, in high-power scenarios such as fast charging of electric vehicles and dynamic wireless power supply for rail transit, the insufficient power capacity of traditional inverters such as H-bridge inverters is becoming apparent, and their high total harmonic distortion (THD) output voltage leads to high harmonic content and an increased risk of high-frequency electromagnetic interference (EMI).

[0003] Multilevel inverters offer a superior solution. They utilize low-voltage switching devices to synthesize high-voltage output, reducing voltage stress on individual components and decreasing the du / dt of the voltage. Furthermore, their output waveform is closer to a sine wave, significantly reducing THD, thus simultaneously improving the output power and power transmission quality of WPT systems. Existing multilevel inverter topologies mainly include diode-clamped, capacitor-clamped, switched-capacitor, and cascaded H-bridge types. A significant drawback of diode-clamped and capacitor-clamped topologies is the requirement for a large number of diodes and capacitors, with the number of components increasing dramatically with the number of levels, leading to a significant increase in circuit complexity and cost. In addition, capacitor-clamped topologies face the challenge of voltage balancing, often requiring additional control strategies or auxiliary circuits to maintain stability. While switched-capacitor inverters solve the voltage balancing problem, large current spikes are generated during capacitor switching, which not only exacerbates electromagnetic interference but also shortens capacitor life and affects system reliability. Cascaded H-bridge multilevel inverters are widely used due to their modular structure, high reliability, and fewer components, but their main drawback is the need for multiple independent DC power supplies. Single-supply cascaded topologies use capacitors to replace the DC power supplies at each stage, and charging switches enable the power supply to charge the capacitors at each stage. However, the introduction of capacitors also introduces problems such as capacitor charging current spikes and voltage drops, leading to a decrease in system performance and reliability. Therefore, how to suppress capacitor charging current spikes and further improve inverter output gain are key technical problems that need to be solved for multilevel inverters designed for WPT systems. Summary of the Invention

[0004] To address the problems existing in the prior art, the present invention aims to provide a single-supply integrated inductor boost cascaded multilevel inverter for wireless power transmission, which can effectively solve the above-mentioned technical problems and improve the flexibility and detection accuracy of the device.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A single-supply integrated inductor boost-type cascaded multilevel inverter for wireless power transmission, characterized in that it includes a DC power supply. U dc It consists of N H-bridges, N capacitors, and N inductors, where N is a positive integer greater than or equal to 2. Each H-bridge is a basic unit, and each H-bridge unit contains 4 switching transistors, each of which is connected in parallel with a reverse diode. Adjacent H-bridge units are connected through inductors, which are the core components for increasing the output voltage and reducing capacitor charging current spikes. DC power supply U dcThe first H-bridge is connected to the input terminal via the first inductor L1 and the first capacitor C1, and the corresponding capacitors C2-C1 are connected in parallel across the DC side of each of the remaining H-bridges. N And the remaining H bridges are connected through their corresponding inductors L2-L N Connect and cascade N H-bridge units.

[0006] The present invention further defines the technical solution as follows: Furthermore, when N=2, the inverter is a five-level inverter, including two H-bridge units, two capacitors C1 and C2, and two inductors L1 and L2; The first H-bridge unit consists of the switching transistor S. 11 S 12 S 13 S 14 Composition, in which S 11 With S 12 The first bridge arm is formed by connecting them in series, S 13 With S 14 The first and second bridge arms are connected in series to form the second bridge arm, and the first and second bridge arms are connected in parallel to form the first H-bridge inverter unit. 11 With S 12 The connection point is the first output terminal on the AC side of the first H-bridge inverter unit, S 13 With S 14 The connection point is the second output terminal on the AC side of the first H-bridge inverter unit; The second H-bridge unit consists of the switching transistor S. 21 S 22 S 23 S 24 Composition, in which S 21 With S 22 The third bridge arm is formed by connecting them in series, S 23 With S 24 The fourth bridge arm is formed by connecting the third and fourth bridge arms in series, and the second H-bridge inverter unit is formed by connecting the third and fourth bridge arms in parallel. 21 With S 22 The connection point is the first input terminal on the AC side of the second H-bridge inverter unit, S 23 With S 24 The connection point is the second input terminal on the AC side of the second H-bridge inverter unit, and the AC output terminal on the AC side of the second H-bridge inverter unit is the total AC output terminal of the five-level inverter. DC power supply U dcThe inductor L1 and capacitor C1 are connected to the input terminal of the first H-bridge unit. Capacitor C2 is connected in parallel across the DC side of the second H-bridge unit. Inductor L2 is connected between the first and second H-bridge units. The two H-bridge units are cascaded to form a five-level output structure.

[0007] Furthermore, the switching frequency of the five-level inverter f S Resonant frequency with external WPT system f 0 remains consistent, resonant angular frequency ω 0 and resonant frequency f 0 is: ; Where L p C is the inductance value of the transmitting coil. p For the capacitance value of the transmitter resonant compensation capacitor, L s To pick up the coil inductance value, C s The capacitance value is used for the resonance compensation capacitor at the pickup end.

[0008] Furthermore, when the inverter operates in steady state, each of the energy storage inductors satisfies the volt-second balance principle, and each of the energy storage capacitors satisfies the ampere-second balance principle, such that the 2nd to Nth capacitors C2-C N As the voltage difference decreases, the output voltage waveform at the inverter's total AC output terminal becomes symmetrically distributed.

[0009] A control method for an inductor-driven boost five-level inverter, comprising the aforementioned five-level inverter, in one operating cycle... T= 1 / f s Internally, the five-level inverter has the following eight operating modes: (1) 0- t 1, t 8- T Internal, Mode 1: Switching transistor S 11 , S 13 , S 21 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1 and capacitor C 1. Parallel connection releases energy. U dc With capacitor C 1 and series through inductor L 2 and capacitor C 2. Form a charging circuit; (2)t 1- t 2. Mode 2: Switching transistor S 12 , S 13 , S 21 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1 with DC power supply U dc Parallel energy storage, while DC power supply U dc and capacitor C One path is connected in series and then through an inductor. L 2 is a capacitor C One path powers the charging circuit, while the other powers the transmitter resonant network of the WPT system. (3) t 2- t Mode 3: Switching transistor S 12 , S 13 , S 22 and S 23 The transistor is in the ON state, while the other switches are in the OFF state. L 1. Maintain and U dc Parallel connection, inductor L 2 with DC power supply U dc and capacitor C 1. Connected in parallel to store energy, DC power supply U dc ,capacitance C 1 and electricity C 2 are connected in series to power the transmitter resonant network of the WPT system; (4) t 3- t Mode 4: Switching transistor S 12 , S 14 , S 22 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain connection with DC power supply U dc Parallel connection, inductor L 2. Through the switching transistor S 14 and S22 Short circuit, capacitor C 1. Enters an open circuit state, while the capacitor... C 2. Power supply is provided separately for the resonant network; (5) t 4- t Mode 5: Switching transistor S 12 , S 14 , S 22 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain connection with DC power supply U dc Parallel connection, inductor L 2 is still in a short-circuit state, capacitor C 1 and C Both are now in an open circuit state; (6) t 5- t Mode 6: Switching transistor S 11 , S 14 , S 22 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Convert to capacitor C 1. Inductors connected in parallel to release energy L 2 is still in a short-circuit state, capacitor C 2. Keep the circuit open, DC power supply U dc and capacitor C 1. A series-connected resonant network in reverse configuration is used for power supply; (7) t 6- t Mode 7: Switching transistor S 11 , S 14 , S 21 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain with capacitor C 1. Connected in parallel to release energy, while inductors L 2 and capacitor C 2. Connected in parallel to release energy, DC power supply U dc ,capacitanceC 1 and capacitor C Two series-connected resonant networks in opposite directions are powered. (8) t 7- t Mode 8: Switching transistor S 11 , S 13 , S 21 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain with capacitor C 1. Connected in parallel to release energy, DC power supply U dc and capacitor C 1. Series through inductor L 2 is a capacitor C 2 charging, and C 2. A separate power supply is provided for the reverse resonant network.

[0010] Furthermore, in t 1- t 5. Inductance L 1. Stores energy, with a terminal voltage of U dc ; In 0- t 1 and t 1- t 5. Inductance L 1 is in an energy release state, and its terminal voltage is - u C1 ; In 0- t 2 and t 7- T Inside, L The voltage of 2 is U dc +u C1 - u C2 ; exist t 2- t Within 3, L The voltage of 2 is U dc +u C1 ; exist t 3- t Within 6, L The voltage of 2 is 0; exist t 6- t Within 7,L The voltage of 2 is - u C2 .

[0011] A wireless power transfer (WPT) system includes the aforementioned five-level inverter, and further includes a transmitting resonant module, a pickup resonant module, a rectifier and filter module, and a load, wherein: The transmitting resonant module includes a transmitting coil L p and transmitter compensation capacitor C p The transmitting coil L p With the transmitter compensation capacitor C p It is connected in series to the AC output terminal of the five-level inverter; The pickup resonant module includes a pickup coil L. s and pickup end compensation capacitor C s The pickup coil L s Compensation capacitor C at the pickup end s The pickup coil L is connected in series. s With the transmitting coil L p Non-contact energy coupling is achieved between them through mutual inductance M; The rectifier and filter module includes a rectifier bridge and a filter capacitor C. f The AC input terminal of the rectifier bridge is connected to the output terminal of the pickup resonant module, and the filter capacitor C f The load is connected in parallel to the DC output terminal of the rectifier bridge, and the filter capacitor C is connected in parallel. f in parallel.

[0012] Furthermore, the rectifier bridge is an uncontrolled rectifier bridge, consisting of four diodes D1, D2, D3, D4, D5, D6, D7, D8, D9, D1, D1, D2 ...1, D2, D2, D2, D2, D 2、 Composed of D3 and D4, the four diodes D1-D4 form a full-bridge rectifier structure, which converts the AC power output from the pickup resonant module into DC power. The filter capacitor Cf filters out the ripple in the DC power and supplies power to the load.

[0013] Compared with the prior art, the beneficial effects of the present invention are: The inverter integrates inductors into a single-supply cascaded H-bridge topology. The DC power supply is connected to the first inductor and capacitor and the first H-bridge input to achieve voltage multiplication. Combined with the energy storage and release of each inductor and switching logic control, a stepped increase in input voltage can be achieved. Taking a five-level topology as an example, it can achieve 0, ±2... U dc ±4 U dcIt features a five-level output with a voltage amplitude gain of up to 4, and the output level can be flexibly switched and the output voltage amplitude can be increased by adjusting the modulation index, meeting the high-voltage output requirements of high-power wireless power transmission.

[0014] This invention utilizes cascaded inductors at various levels as the core components of the capacitor charging circuit, replacing the charging switch in the traditional topology. The current-limiting characteristics of the inductors make the capacitor charging current much smaller than the inverter output current, while also making the capacitor discharge current lower than the discharge current of the traditional topology, effectively eliminating current spikes during capacitor charging and discharging; significantly reducing the electrical stress on the capacitor, reducing the capacitor voltage drop, extending the capacitor's service life, and avoiding additional circuit losses caused by peak current.

[0015] Under steady-state operation, this invention ensures that each inductor satisfies the volt-second balance principle and each capacitor satisfies the ampere-second balance principle, significantly reducing the voltage difference between cascaded capacitors and resulting in a well-symmetrical distribution of the inverter output voltage waveform. Combined with the nearest-level approximation modulation strategy, as the modulation index increases, the inverter can switch from three-level to five-level output, significantly reducing the total harmonic distortion (THD) of the output voltage, greatly improving the waveform quality of power transmission, and reducing the risk of high-frequency electromagnetic interference (EMI).

[0016] This invention enables precise control of the inverter's boost ratio and output voltage by adjusting the conduction time of each H-bridge unit's switching transistors. By changing the modulation index, it can flexibly switch the output level state and adjust the output voltage amplitude. Furthermore, optimizing the modulation index can further reduce inverter losses and harmonic distortion, allowing the inverter to adapt to wireless power transmission conditions with different power and voltage requirements, thus possessing good adaptability and control flexibility. Attached Figure Description

[0017] Figure 1 is a schematic diagram of the overall topology of the single-power integrated inductor boost-type cascaded multilevel inverter of the present invention; Figure 2 is a schematic diagram of the WPT system topology based on a five-level inverter according to the present invention; Figure 3 is a schematic diagram of the main operating waveforms of the five-level inverter of the present invention; Figure 4 is a schematic diagram of the equivalent circuit of each working mode of the five-level inverter of the present invention; Figure 5 This is a schematic diagram of the fundamental equivalent circuit of the WPT system of the present invention; Figure 6 This is a schematic diagram of the current waveforms of capacitors C1 and C2 in the five-level inverter of the present invention; Figure 7Figure 7(a) shows the simulated waveforms of the inverter output voltage and current, and Figure 7(b) shows the simulated waveforms of the pickup coil current, pickup voltage and load voltage. Figure 8 is a schematic diagram of the simulated voltage and current waveforms of the capacitor in the five-level inverter of the present invention, wherein Figure 8(a) is the simulated voltage and current waveform of capacitor C1, and Figure 8(b) is the simulated voltage and current waveform of capacitor C2. Figure 9 is a schematic diagram of the simulated current waveforms of inductors L1 and L2 in the five-level inverter of the present invention; Figure 10 shows the five-level inverter of the present invention at different modulation indices M. I Below, the pickup terminal voltage u s and inverter-side voltage u p A schematic diagram of the steady-state experimental waveforms, where Figure 10(a) shows M. I The experimental waveform when = 0.3, Figure 10 (b) is M I The experimental waveform when M=0.5 is shown in Figure 10(c). I Experimental waveform at 0.8; Figure 11 shows the five-level inverter of the present invention in M... I A schematic diagram of the output voltage harmonic spectrum at a value of 0.8. Detailed Implementation

[0018] To make the objectives and advantages of this invention clearer, the invention will be specifically described below with reference to embodiments. It should be understood that the following text is merely used to describe one or more specific embodiments of the invention and does not strictly limit the scope of protection specifically claimed by the invention. Example 1

[0019] like Figure 1 As shown, this embodiment provides a single-supply integrated inductor boost cascaded multilevel inverter for wireless power transfer, including a DC power supply. U dc It consists of N H-bridges, N capacitors, and N inductors, where N is a positive integer greater than or equal to 2. Each H-bridge is a basic unit, and each H-bridge unit contains 4 switching transistors, each of which is connected in parallel with a reverse diode. Adjacent H-bridge units are connected through inductors, which are the core components for increasing the output voltage and reducing capacitor charging current spikes. DC power supply U dc The first H-bridge is connected to the input terminal via the first inductor L1 and the first capacitor C1, and the corresponding capacitors C2-C1 are connected in parallel across the DC side of each of the remaining H-bridges. NAnd the remaining H bridges are connected through their corresponding inductors L2-L N Connect and cascade N H-bridge units. Example 2

[0020] This embodiment constructs a single-power integrated inductor boost-type cascaded multilevel inverter with N=2, i.e., a five-level inverter. Its topology is shown in Figure 2, including two H-bridge units, two capacitors C1 and C2, and two inductors L1 and L2. The first H-bridge unit consists of the switching transistor S. 11 S 12 S 13 S 14 Composition, in which S 11 With S 12 The first bridge arm is formed by connecting them in series, S 13 With S 14 The first and second bridge arms are connected in series to form the second bridge arm, and the first and second bridge arms are connected in parallel to form the first H-bridge inverter unit. 11 With S 12 The connection point is the first output terminal on the AC side of the first H-bridge inverter unit, S 13 With S 14 The connection point is the second output terminal on the AC side of the first H-bridge inverter unit; The second H-bridge unit consists of the switching transistor S. 21 S 22 S 23 S 24 Composition, in which S 21 With S 22 The third bridge arm is formed by connecting them in series, S 23 With S 24 The fourth bridge arm is formed by connecting the third and fourth bridge arms in series, and the second H-bridge inverter unit is formed by connecting the third and fourth bridge arms in parallel. 21 With S 22 The connection point is the first input terminal on the AC side of the second H-bridge inverter unit, S 23 With S 24 The connection point is the second input terminal on the AC side of the second H-bridge inverter unit, and the AC output terminal on the AC side of the second H-bridge inverter unit is the total AC output terminal of the five-level inverter. DC power supply U dc The inductor L1 and capacitor C1 are connected to the input terminal of the first H-bridge unit. Capacitor C2 is connected in parallel across the DC side of the second H-bridge unit. Inductor L2 is connected between the first and second H-bridge units. The two H-bridge units are cascaded to form a five-level output structure. Example 3

[0021] A wireless power transfer (WPT) system includes the five-level inverter described in Embodiment 2 above, and further includes a transmitting resonant module, a picking resonant module, a rectifier and filter module, and a load, wherein: The transmitting resonant module includes a transmitting coil L p and transmitter compensation capacitor C p transmitting coil L p With the transmitter compensation capacitor C p Connected in series to the AC output terminal of a five-level inverter; The pickup resonant module includes a pickup coil L s and pickup end compensation capacitor C s Pick-up coil L s Compensation capacitor C at the pickup end s Series connection, pickup coil L s With the transmitting coil L p Non-contact energy coupling is achieved between them through mutual inductance M; The rectifier and filter module includes a rectifier bridge and a filter capacitor C. f The AC input terminal of the rectifier bridge is connected to the output terminal of the pickup resonant module, and the filter capacitor C... f The load is connected in parallel to the DC output terminal of the rectifier bridge, and the filter capacitor C is connected in parallel. f in parallel.

[0022] The above rectifier bridge is an uncontrolled rectifier bridge, consisting of four diodes D1, D2, D3, D4, D5, D6, D7, D8, D9, D1, D1, D2 ...1, D2, D1, D2, D2, D2 2、 Composed of D3 and D4, the four diodes D1-D4 form a full-bridge rectifier structure, which converts the AC power output from the pickup resonant module into DC power. The filter capacitor Cf filters out the ripple in the DC power before supplying power to the load. Example 4

[0023] The five-level inverter in the WPT system of Example 3 adopts a closest-level approximation modulation strategy, and the resonant angular frequency is... ω 0 and resonant frequency f 0 is: ; When the inverter switching frequency f s With the system resonant frequency f When 0 is the same, the main operating waveforms of the five-level inverter are as follows: Figure 3 As shown, where T= 1 / f s For the inverter's duty cycle, and Z r This is the equivalent reflection resistance of the energy pickup end at the transmitting end. θ 1 and θ2 represents the two phase angles for switching the inverter output level, and they satisfy the following relationship: ; This embodiment provides a control method for an inductor-driven boost five-level inverter, including the five-level inverter in Embodiment 2, in one operating cycle. T= 1 / f s Internally, the five-level inverter has the following eight operating modes: (1) 0- t 1, t 8- T Internal, Mode 1: such as Figure 4 As shown in (a), the switching transistor S 11 , S 13 , S 21 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1 and capacitor C 1. Parallel energy release leads to i L1 Decrease linearly, U dc With capacitor C 1 and series through inductor L 2 and capacitor C 2. A charging circuit is formed, due to C There is an inductance in the charging circuit of 2. L 2. Its charging current spikes are suppressed, and the inverter output voltage is reduced. u p =0, due to resonance. i p Starting from zero and increasing positively; (2) t 1- t Within 2, mode 2: such as Figure 4 (b) shows the switching transistor S 12 , S 13 , S 21 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1 with DC power supply U dc Parallel energy storage, therefore i L1 It begins to increase linearly, while the DC power supply... Udc and capacitor C One path is connected in series and then through an inductor. L 2 is a capacitor C One path powers the charging circuit, while the other powers the transmitter resonant network of the WPT system. The inverter output voltage... u p = U dc +u C1 , i p Continue to increase; (3) t 2- t Within 3, mode 3: such as Figure 4 As shown in (c), the switching transistor S 12 , S 13 , S 22 and S 23 The transistor is in the ON state, while the other switches are in the OFF state. L 1. Maintain and U dc in parallel, i L1 The inductance continues to increase linearly. L 2 with DC power supply U dc and capacitor C 1. Connected in parallel to store energy, therefore i L2 The DC power supply begins to increase linearly. U dc ,capacitance C 1 and electricity C Two series-connected resistors power the transmitter resonant network of the WPT system, and the inverter output voltage is [value missing]. u p = U dc +u C1 + u C2 , i p It increases to its peak value and then begins to decrease. (4) t 3- t Within 4, mode 4: such as Figure 4 As shown in (d), the switching transistor S 12 , S 14 , S 22 and S23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain connection with DC power supply U dc in parallel, i L1 The inductance continues to rise linearly. L 2. Through the switching transistor S 14 and S 22 Short circuit, therefore i L2 The capacitance remains unchanged. C 1. Enters an open circuit state, while the capacitor... C 2. Power supply is provided separately for the resonant network. u p = u C2 , i p Continue to decrease; (5) t 4- t Within 5, mode 5: such as Figure 4 As shown in (e), the switching transistor S 12 , S 14 , S 22 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain connection with DC power supply U dc in parallel, i L1 The inductance continues to increase linearly. L 2 is still in a short-circuit state. i L2 The capacitance remains unchanged. C 1 and C Both 2 are in open circuit state, inverter output voltage u p =0, i p Continue decreasing to zero, then increasing in the opposite direction; (6) t 5- t Within 6, mode 6: such as Figure 4 As shown in (f), the switching transistor S 11 , S 14 , S 22 and S 24The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Convert to capacitor C 1. Connected in parallel to release energy, therefore through L 1 current i L1 After reaching its peak, the inductance begins to decline linearly. L 2 is still in a short-circuit state. i L2 The capacitance remains unchanged. C 2. Keep the circuit open, DC power supply U dc and capacitor C 1. A series-connected resonant network in reverse configuration supplies power to the inverter output voltage. u p =- U dc - u C1 , i p Continue to increase in the opposite direction; (7) t 6- t Within 7, mode 7: such as Figure 4 As shown in (g), the switching transistor S 11 , S 14 , S 21 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain with capacitor C 1. Connect in parallel to release energy. i L1 The inductance continues to decrease linearly, while... L 2 and capacitor C 2 are connected in parallel to release energy, therefore i L2 Starts to decrease linearly, DC power supply U dc ,capacitance C 1 and capacitor C The inverter output voltage is supplied by a series-connected resonant network in reverse configuration. u p =- U dc -u C1 - u C2 , i p It increases in the opposite direction until it reaches a negative peak, then begins to decrease. (8) t 7-t Within 8, mode 8: such as Figure 4 As shown in (h), the switching transistor S 11 , S 13 , S 21 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain with capacitor C 1. Connect in parallel to release energy. i L1 Continue to decrease linearly, DC power supply U dc and capacitor C 1. Series through inductor L 2 is a capacitor C 2 charging, and C 2. Powering the resonant network separately in reverse, the inverter output voltage... u p =- u C2 , i p Continue to decrease in the opposite direction.

[0024] from Figure 3 and Figure 4 It can be seen that, in t 1- t Within 5, L 1. Stores energy, with a terminal voltage of U dc , in 0- t 1 and t 1- t Within 5, L 1 is in an energy release state, and its terminal voltage is - u C1 In 0- t 2 and t 7- T Inside, L The voltage of 2 is U dc +u C1 - u C2 ,exist t 2- t Within 3, L The voltage of 2 is U dc +u C1 .exist t 3- t Within 6, L The voltage of 2 is 0;t 6- t Within 7, L The voltage of 2 is - u C2 Under steady-state conditions, the duration of the inverter output at the same voltage level should be symmetrical, and both inductors must satisfy the volt-second balance principle. Based on this, the voltage across the two capacitors can be expressed as: ; Therefore, this five-level inverter can generate 0, ±2 U dc and ±4 U dc These five output levels all have an output voltage amplitude gain of 4. According to... Figure 3 , can be obtained u p The Fourier series expression is: ; According to equation (4), u p The fundamental effective value phasor expression is: ; when θ 1 and θ When both 2 are zero, the maximum effective value of the fundamental voltage that the inverter can output is: ; Define the modulation index of a five-level inverter M I for: ; To reduce inverter losses and output voltage THD, a nearest-level approximation modulation strategy is adopted for the proposed inverter. Under the nearest-level approximation modulation strategy, u p The harmonic distortion rate can be expressed as: ; Using the fundamental wave equivalent, it can be Figure 2 The WPT system shown is simplified as follows: Figure 5 The equivalent circuit shown is as follows, in which, R p and R s These are the internal resistances of the transmitting coil and the pickup coil, respectively. R eq The equivalent load resistance for AC is expressed as follows: ; According to KVL's law, the system equations are described as follows: ; In the formula, Z p = jω 0 L p +1 / ( jω 0 L p ), Z s = jω 0 L s +1 / ( jω 0 L s In the resonant state, Z p = Z s =0, then and The solution is as follows: ; From this we can obtain i p The time-domain expression is: ; Simultaneously, the system output power can be obtained. P o The expression is: ;

[0025] Assumption i L1 and i L2 The maximum values ​​are respectively i L1-max and i L2-max , i L1 and i L2 The minimum values ​​are respectively i L1-min and i L2-min .according to Figure 3 It can be concluded that i L1-max and i L1-min Relationship, i L2-max and i L2-min The relationship is: ; Depend on Figure 4 achievable iL1 , i L2 , i C1 and i C2 The time-domain expression is: ; According to equations (18) and (19), we can obtain i C1 and i C2 The waveform is as follows Figure 6 As shown, it can be seen that within each cycle... C 1 and C 2. Charging and discharging will alternate. t 2- t Within 4, i C2 = - i p <0, C 2 is in a discharge state; in 0- t 2 and t 6- T Inside, i C2 >0, C 2 is in a charging state; t 4- t Within 6, i C2 =0, C 2 is in an open circuit state; t 1- t Within 3, i C1 <0, C 1 is in a discharge state; in 0- t 1 and t 5- T Inside, i C1 >0, C 1. In charging state; t 3- t Within 5, i C1 =0, C 1 is in an open circuit state. Under steady state, C 1 and C 2. The ampere-second balance principle should be satisfied, that is... ; Substituting equations (12) and (14)-(19) into equation (20) yields the solution. i L1-min , i L1-max ,i L2-min and i L2-max The expression is: ; It can be seen from equations (21) and (22) that, due to i L1 and i L2 The existence of C The discharge current of capacitor 2 is less than the inverter output current, while in a traditional single-supply cascaded H-bridge multilevel inverter, the discharge current of the capacitor is equal to the inverter output current. It can also be seen from equation (22) that... i L2-min < I p-p It is always true, therefore C The charging current of the capacitor is always less than the inverter output current. Compared to traditional single-supply cascaded H-bridge multilevel inverters, the capacitor charging current spike in this topology is effectively eliminated. In summary, the inverter proposed in this paper can effectively reduce the capacitor charging and discharging current and reduce the capacitor voltage drop, making it closer to the DC-side voltage of the preceding H-bridge. This improvement not only extends the capacitor's lifespan but also improves the waveform quality of the output voltage, thereby enhancing the reliability of the inverter operation.

[0026] Example 5

[0027] The WPT system in Example 3 was simulated and analyzed using MATLAB / Simulink, and a physical experimental platform was built for experimental verification. The simulation and experimental results are as follows: Select modulation index M I It is 0.6, that is θ 1 = 0.351888 θ 2 = 1.30571, simulation waveform as follows Figure 7 As shown, Figure 7 (a) shows the simulated waveforms of the inverter output voltage and current. Figure 7 (b) shows the simulated waveforms of the pickup coil current, pickup voltage, and load voltage. According to the simulation waveforms, the inverter achieves a five-level output, with an intermediate output voltage of 100V and a maximum level of 200V, demonstrating the feasibility of the inverter and its modulation strategy, as well as the inverter's boost capability. Inverter output voltage u p With inverter output current i p Same phase, but with the system pickup coil i sThe phase difference of 90° proves that the proposed inverter is applicable to the WPT system, and the main parameters of the system are shown in Table 1.

[0028]

[0029] Figure 8 The inverter that can be derived from C 1 and C 2. Voltage of capacitor u C1 =50V, u C2 =100V, from C 1 and C 2. The capacitor current analysis shows that, compared to traditional single-supply cascaded H-bridge multilevel inverters, the peak value of the capacitor charging current is reduced, and the charging and discharging current of the capacitor is effectively decreased, thus reducing the voltage drop across the capacitor. C The voltage across capacitor 2 is closer to the DC-side voltage of the first H-bridge, which is basically consistent with the theoretical analysis.

[0030] Figure 9 The inductor in the inverter can be seen from this. L 1 and L 2 current i L1 < i L2 Furthermore, the charging and discharging processes of the two inductors each have their own maximum and minimum values. Because the presence of inductors reduces the effect of capacitance, it effectively lowers the charging and discharging current of the capacitor.

[0031] Figure 10 This demonstrates the effect of the inverter modulation index. M I The system output voltage at values ​​of 0.3, 0.5, and 0.8 respectively. u s With inverter side voltage u p The steady-state experimental waveform. For example... Figure 10 As shown in (a), when M I When the voltage is 0.3, the inverter generates a three-level output voltage with an amplitude of 100V. u s The amplitude is 23V. When M I When increased to 0.5, as Figure 10 As shown in (b), the inverter outputs a five-level voltage with an amplitude of 200V. u s The amplitude increased to 38V. Continue increasing. M I Up to 0.8 Figure 10As shown in (c), the inverter maintains a five-level voltage with an output amplitude of 200V. u s The amplitude reached 61V, and the experimental results show that the proposed inverter topology has the ability to boost voltage.

[0032] Figure 11 It can be seen from this that the THD of the inverter output voltage is... M I At a modulation index of 0.8, the total harmonic distortion (THD) is 18.31%. It can be observed that when the modulation index is low, the proposed inverter generates a three-level output voltage. As the modulation index increases, the THD significantly decreases. This trend indicates that increasing the modulation index can effectively improve the quality of the inverter's output waveform, which is consistent with the theoretical characteristic of multi-level inverters that optimize waveform harmonic characteristics by increasing the number of output levels.

[0033] The above description is merely a preferred embodiment of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention. Structures, devices, and operating methods not specifically described or explained in this invention are implemented according to conventional methods in the art unless otherwise specified or limited.

Claims

1. A single-supply integrated inductor boost-type cascaded multilevel inverter for wireless power transfer, characterized in that: Includes a DC power supply U dc It consists of N H-bridges, N capacitors, and N inductors, where N is a positive integer greater than or equal to 2. Each H-bridge is a basic unit, and each H-bridge unit contains 4 switching transistors, each of which is connected in parallel with a reverse diode. Adjacent H-bridge units are connected through inductors, which are the core components for increasing the output voltage and reducing capacitor charging current spikes. DC power supply U dc The first H-bridge is connected to the input terminal via the first inductor L1 and the first capacitor C1. The DC sides of the remaining H-bridges are connected in parallel with corresponding capacitors C2-C1. N And the remaining H bridges are connected through their corresponding inductors L2-L N Connect and cascade N H-bridge units.

2. The single-supply integrated inductor boost-type cascaded multilevel inverter for wireless power transmission according to claim 1, characterized in that: When N=2, the inverter is a five-level inverter, including two H-bridge units, two capacitors C1 and C2, and two inductors L1 and L2; The first H-bridge unit consists of the switching transistor S. 11 S 12 S 13 S 14 Composition, in which S 11 With S 12 The first bridge arm is formed by connecting them in series, S 13 With S 14 The first and second bridge arms are connected in series to form the second bridge arm, and the first and second bridge arms are connected in parallel to form the first H-bridge inverter unit. 11 With S 12 The connection point is the first output terminal on the AC side of the first H-bridge inverter unit, S 13 With S 14 The connection point is the second output terminal on the AC side of the first H-bridge inverter unit; The second H-bridge unit consists of the switching transistor S. 21 S 22 S 23 S 24 Composition, in which S 21 With S 22 The third bridge arm is formed by connecting them in series, S 23 With S 24 The fourth bridge arm is formed by connecting the third and fourth bridge arms in series, and the second H-bridge inverter unit is formed by connecting the third and fourth bridge arms in parallel. 21 With S 22 The connection point is the first input terminal on the AC side of the second H-bridge inverter unit, S 23 With S 24 The connection point is the second input terminal on the AC side of the second H-bridge inverter unit, and the AC output terminal on the AC side of the second H-bridge inverter unit is the total AC output terminal of the five-level inverter. DC power supply U dc The inductor L1 and capacitor C1 are connected to the input terminal of the first H-bridge unit. Capacitor C2 is connected in parallel across the DC side of the second H-bridge unit. Inductor L2 is connected between the first and second H-bridge units. The two H-bridge units are cascaded to form a five-level output structure.

3. The single-supply integrated inductor boost-type cascaded multilevel inverter for wireless power transmission according to claim 2, characterized in that: The switching frequency of the five-level inverter f S Resonant frequency with external WPT system f 0 remains consistent, resonant angular frequency ω 0 and resonant frequency f 0 is: ; Where L p C is the inductance value of the transmitting coil. p For the capacitance value of the transmitter resonant compensation capacitor, L s To pick up the coil inductance value, C s The capacitance value is used for resonance compensation at the pickup end.

4. The single-supply integrated inductor boost-type cascaded multilevel inverter for wireless power transmission according to claim 1, characterized in that: When the inverter operates in steady state, the energy storage inductors satisfy the volt-second balance principle, and the energy storage capacitors satisfy the ampere-second balance principle, so that the 2nd to Nth capacitors C2-C N As the voltage difference decreases, the output voltage waveform at the inverter's total AC output terminal becomes symmetrically distributed.

5. A control method for an inductor-boosted five-level inverter, comprising the five-level inverter as described in claim 2, characterized in that: In a work cycle T= 1 / f s Internally, the five-level inverter has the following eight operating modes: (1) 0- t 1, t 8- T Internal, Mode 1: Switching transistor S 11 , S 13 , S 21 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1 and capacitor C 1. Parallel connection releases energy. U dc With capacitor C 1 and series through inductor L 2 and capacitor C 2. Form a charging circuit; (2) t 1- t 2. Mode 2: Switching transistor S 12 , S 13 , S 21 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1 with DC power supply U dc Parallel energy storage, while DC power supply U dc and capacitor C One path is connected in series and then through an inductor. L 2 is a capacitor C One path powers the charging circuit, while the other powers the transmitter resonant network of the WPT system. (3) t 2- t Mode 3: Switching transistor S 12 , S 13 , S 22 and S 23 The transistor is in the ON state, while the other switches are in the OFF state. L 1. Maintain and U dc Parallel connection, inductor L 2 with DC power supply U dc and capacitor C 1. Connected in parallel to store energy, DC power supply U dc ,capacitance C 1 and electricity C 2 are connected in series to power the transmitter resonant network of the WPT system; (4) t 3- t Mode 4: Switching transistor S 12 , S 14 , S 22 and S 23 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain connection with DC power supply U dc Parallel connection, inductor L 2. Through the switching transistor S 14 and S 22 Short circuit, capacitor C 1. Enters an open circuit state, while the capacitor... C 2. Power supply is provided separately for the resonant network; (5) t 4- t Mode 5: Switching transistor S 12 , S 14 , S 22 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain connection with DC power supply U dc Parallel connection, inductor L 2 is still in a short-circuit state, capacitor C 1 and C Both are now in an open circuit state; (6) t 5- t Mode 6: Switching transistor S 11 , S 14 , S 22 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Convert to capacitor C 1. Inductors connected in parallel to release energy L 2 is still in a short-circuit state, capacitor C 2. Keep the circuit open, DC power supply U dc and capacitor C 1. A series-connected resonant network in reverse configuration is used for power supply; (7) t 6- t Mode 7: Switching transistor S 11 , S 14 , S 21 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain with capacitor C 1. Connected in parallel to release energy, while inductors L 2 and capacitor C 2. Connected in parallel to release energy, DC power supply U dc ,capacitance C 1 and capacitor C Two series-connected resonant networks in opposite directions are powered. (8) t 7- t Mode 8: Switching transistor S 11 , S 13 , S 21 and S 24 The circuit is in the ON state, all other switching transistors are in the OFF state, and the inductor is in the OFF state. L 1. Maintain with capacitor C 1. Connect in parallel to release energy, DC power supply U dc and capacitor C 1. Series through inductor L 2 is a capacitor C 2 charging, and C 2. A separate power supply is provided for the inverted resonant network.

6. The control method for an inductor-boosted five-level inverter according to claim 5, characterized in that: exist t 1- t 5. Inductance L 1. Stores energy, with a terminal voltage of U dc ; In 0- t 1 and t 1- t 5. Inductance L 1 is in an energy release state, and its terminal voltage is - u C1 ; In 0- t 2 and t 7- T Inside, L The voltage of 2 is U dc +u C1 - u C2 ; exist t 2- t Within 3, L The voltage of 2 is U dc +u C1 ; exist t 3- t Within 6, L The voltage of 2 is 0; exist t 6- t Within 7, L The voltage of 2 is - u C2 .

7. A wireless power transfer (WPT) system, characterized in that: The five-level inverter of claim 2 further includes a transmitter resonant module, a pickup resonant module, a rectifier filter module, and a load, wherein: The transmitting resonant module includes a transmitting coil L p and transmitter compensation capacitor C p The transmitting coil L p Compensation capacitor C at the transmitter p It is connected in series to the AC output terminal of the five-level inverter; The pickup resonant module includes a pickup coil L. s and pickup end compensation capacitor C s The pickup coil L s Compensation capacitor C at the pickup end s The pickup coil L is connected in series. s With the transmitting coil L p Non-contact energy coupling is achieved between them through mutual inductance M; The rectifier and filter module includes a rectifier bridge and a filter capacitor C. f The AC input terminal of the rectifier bridge is connected to the output terminal of the pickup resonant module, and the filter capacitor C f The load is connected in parallel to the DC output terminal of the rectifier bridge, and the filter capacitor C is connected in parallel. f in parallel.

8. A wireless power transfer (WPT) system according to claim 7, characterized in that, The rectifier bridge is an uncontrolled rectifier bridge, consisting of four diodes D1, D2, and D3. 2、 Composed of D3 and D4, the four diodes D1-D4 form a full-bridge rectifier structure, which converts the AC power output from the pickup resonant module into DC power. The filter capacitor Cf filters out the ripple in the DC power and supplies power to the load.

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