Method and apparatus for amplifying a signal using amplifier circuitry

Abstract

This disclosure relates to methods and apparatus for amplifying signals using an amplifier circuit system. An example apparatus includes: a transconductance circuit system (205) having an input and an output; a first capacitor (210) having terminals; an amplifier (215) having an input and an output, the input of the amplifier being coupled to the output of the transconductance circuit system and the terminals of the first capacitor; a resistor (220) having a first terminal and a second terminal; and a second capacitor (225) having a first terminal and a second terminal, the first terminal of the second capacitor being coupled to the output of the amplifier and the first terminal of the resistor, and the second terminal of the second capacitor being coupled to the input of the transconductance circuit system and the second terminal of the resistor.

Description

[0001] Cross-reference to related applications

[0002] This patent application claims the benefit and priority of Indian Provisional Patent Application No. 202441100224, filed on December 18, 2024, which is hereby incorporated herein by reference in its entirety. Technical Field

[0003] This specification generally relates to amplifiers, and more specifically to methods and apparatus for amplifying signals using amplifier circuitry systems. Background Technology

[0004] An amplifier circuit system amplifies an input signal by a certain gain. Amplifiers can be used for a wide range of functions, such as modulation, buffering, and transmission. Some amplifier circuit systems include a feedback loop between the input and output to set the gain, improve stability, etc. This type of amplifier circuit system configuration is called a closed-loop amplifier. A closed-loop amplifier generates its output voltage based on the difference between the input voltage and the output voltage (also known as the error). Summary of the Invention

[0005] For methods and apparatuses using amplifier circuit systems to amplify signals, an exemplary apparatus includes: a transconductance circuit system having an input and an output; a first capacitor having terminals; an amplifier having an input and an output, the input of the amplifier being coupled to the output of the transconductance circuit system and the terminals of the first capacitor; a resistor having a first terminal and a second terminal; and a second capacitor having a first terminal and a second terminal, the first terminal of the second capacitor being coupled to the output of the amplifier and the first terminal of the resistor, and the second terminal of the second capacitor being coupled to the input of the transconductance circuit system and the second terminal of the resistor. Other examples are described.

[0006] For methods and apparatuses using amplifier circuit systems to amplify signals, an exemplary apparatus includes: a transconducting circuit system having an input and an output; a first capacitor having terminals; an amplifier having an input and an output, the input of the amplifier being coupled to the output of the transconducting circuit system and the terminals of the first capacitor; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the output of the amplifier; a second resistor having terminals; a third resistor having a first terminal and a second terminal, the first terminal of the third resistor being coupled to the input of the transconducting circuit system, the second terminal of the first resistor, and the terminals of the second resistor; and a second capacitor having a terminal coupled to the second terminal of the third resistor. Other examples are described.

[0007] For methods and apparatuses using amplifier circuit systems to amplify signals, an exemplary apparatus includes: a transconductance circuit system having an input and an output; an amplifier having an input and an output, the input of the amplifier being coupled to the output of the transconductance circuit system; a first resistor having a first terminal and a second terminal; a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the output of the amplifier and the first terminal of the first resistor; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the input of the transconductance circuit system, the second terminal of the first resistor, and the second terminal of the first capacitor; and a second capacitor having a terminal coupled to the second terminal of the second resistor. Other examples are described. Attached Figure Description

[0008] Figure 1 This is a block diagram of an example ultrasound system that includes an example amplifier circuit system and an example controller.

[0009] Figure 2 yes Figure 1 A schematic diagram of an example amplifier circuit system.

[0010] Figure 3 yes Figure 1 and 2 A schematic diagram of another example of an amplifier circuit system.

[0011] Figure 4 yes Figure 1 , 2 A schematic diagram of another example of an amplifier circuit system of type 3.

[0012] Figure 5 yes Figure 1 A block diagram of an example controller.

[0013] Figure 6 This is a flowchart illustrating example machine-readable instructions or example operations that can be used... Figure 1 , 2 Amplifier circuit systems 3 and 4 and Figure 1 and 5 The controller or more generally used Figure 1 Examples of implementation schemes for ultrasound systems are used for implementation, instantiation, or execution of at least one of them.

[0014] Figure 7 This is a flowchart illustrating example machine-readable instructions or example operations that can be used... Figure 1 and5 The example implementation of the controller is used to implement, instantiate, or execute at least one of them to calibrate for the first voltage swing condition. Figure 1 , 2 Amplifier circuit systems 3 and 4.

[0015] Figure 8A and 8B It is aimed at Figure 1 , 2 Amplifier circuit systems 3 and 4 Figure 7 A plot of an example calibration operation.

[0016] Figure 9 This is a flowchart illustrating example machine-readable instructions or example operations that can be used... Figure 1 and 5 The example implementation of the controller is carried out, instantiated, or executed at least one of the following: to calibrate for the second voltage swing condition. Figure 1 , 2 Amplifier circuit systems 3 and 4.

[0017] Figure 10 It is aimed at Figure 1 , 2 Amplifier circuit systems 3 and 4 Figure 9 A plot of an example calibration operation.

[0018] Figure 11 This is a block diagram of an example processing platform containing a programmable circuit system, which is structured to implement, instantiate, and / or execute example machine-readable instructions or execute... Figure 6 , 7 Example operations for 9 to implement Figure 1 and 5 The controller.

[0019] Figure 12 yes Figure 11 A block diagram of an example implementation of a programmable circuit system.

[0020] Figure 13 yes Figure 11 A block diagram of another example implementation of a programmable circuit system.

[0021] The accompanying drawings are not necessarily drawn to scale. Generally, the same reference numerals in the drawings and this specification refer to the same or similar features and / or parts (functionally and / or structurally). Although the drawings show areas with clearly defined lines and boundaries, some or all of these lines and boundaries may be idealized. In reality, boundaries or lines may be unobservable, mixed, or irregular. Detailed Implementation

[0022] An amplifier circuit system amplifies an input signal by a certain gain. Amplifiers can be used for a wide range of functions, such as modulation, buffering, and transmission. Some amplifier circuit systems include a feedback loop between the input and output to set the gain, improve stability, etc. This type of amplifier circuit system configuration is called a closed-loop amplifier. A closed-loop amplifier generates its output voltage based on the difference between the input voltage and the output voltage (also known as the error).

[0023] In devices such as ultrasound systems, amplifier circuitry may experience a wide range of operating conditions. For example, during ultrasound imaging, a transducer transmits a signal at ultrasonic frequencies (frequencies above the audible spectrum) in response to an electrical signal received from the amplifier circuitry. In such examples, the amplifier circuitry operates across a relatively wide bandwidth (e.g., 15 to 25 MHz) and a relatively wide voltage swing range (e.g., + / - 5 V to + / - 100 V). Such a wide voltage and frequency range increases power consumption and negatively impacts loop stability in closed-loop amplifiers. Furthermore, in medical devices, the tolerances of amplifier circuitry are limited by regulatory or industry standards. As electronics continue to advance, amplifier circuitry needs to support ever-increasing bandwidth and output voltage.

[0024] The examples described herein include methods and apparatus for amplifying signals using amplifier circuit systems. In some of the described examples, the amplifier circuit system includes a transconductance circuit system, capacitors, buffers, a feedback resistor-capacitor (RC) circuit system, an input resistor, and a zero-pair circuit system. The transconductance circuit system uses an input voltage (V... IN ) and error voltage (V E Determine the error current (I) E A transconductance circuit system amplifies the error current based on the transconductance constant (K). The capacitor generates an output voltage (V) by converting the amplified error current into a voltage. OUT The buffer provides the output voltage to the output of the feedback RC circuit system and the amplifier circuit system. The feedback RC circuit system filters out relatively high frequencies from the output voltage. The feedback RC circuit system and the input resistor generate a feedback current (I) in response to the output voltage. F The zero-pair circuit system and the input resistor generate an error voltage in response to the feedback current and error current. Advantageously, the output voltage of the amplifier circuit system is related to the input voltage (V). IN ) and error voltage (V E The difference between them is proportional, and the difference is the output voltage (V). OUT The function of ).

[0025] In some of the described examples, the amplifier circuitry is coupled to a controller. The controller provides fine-tuning values ​​to set the components of the amplifier circuitry. For example, the controller provides a first fine-tuning value to set the transconductance constant (K) of the transconductance circuitry and a second fine-tuning value to set the capacitance (C) of the feedback RC circuitry. F In example operation, if the gain of the amplifier circuit system is close to one (e.g., gain 1), the controller adjusts the transconductance constant and capacitance (C). F This produces a relatively low output voltage. In this type of unity-gain operation, the transconductance factor controls the amplitude response, which sets the bandwidth, and the feedback RC circuitry adjusts the non-dominant pole of the open-loop gain to a lower frequency. For relatively low voltages, such as less than 20 volts peak-to-peak (V)... PP The voltage of the feedback circuit system modifies the phase margin of the amplifier circuit system using the non-dominant poles of the feedback circuit system. Advantageously, the controller can use the transconductance constant and the capacitance of the feedback RC circuit system to calibrate the bandwidth and phase margin of the amplifier circuit system.

[0026] In example operation, if the gain of the amplifier circuitry is not close to one, for example, is relatively high, the controller adjusts the transconductance constant and the zero-pair circuitry to produce a relatively high voltage. In this type of example non-unity-gain operation, the transconductance factor sets the gain of the transconductance circuitry, and the zero-pair circuitry modifies the closed-loop gain of the amplifier circuitry. For relatively high voltages, such as those greater than 20 volts peak-to-peak, the non-dominant pole of the open-loop gain is far from the unity-gain frequency. In such cases, shifting the non-dominant pole of the open-loop gain would overdamp the amplifier circuitry. However, the zero-pair circuitry includes a resistor connected in parallel with the input resistor. The resistance of the zero-pair circuitry (R0) is... Z ) and the resistance (R) of the input resistor IN The relationship between the input resistor and the zero-pair circuitry produces a factor that modifies the error voltage. This relationship is illustrated by the closed-loop gain equation, which is further explained and described below. Under relatively high voltage swing conditions, adjusting the resistance of the zero-pair circuitry will shift the frequency response of the amplifier circuitry based on the relationship between the input resistor and the zero-pair circuitry. Advantageously, the controller can use the zero-pair circuitry to calibrate the closed-loop bandwidth of the amplifier circuitry with non-unity gain. Example operation of the amplifier circuitry and controller is further illustrated and described below.

[0027] Figure 1 This is a block diagram of an example ultrasound system 100. Figure 1The example ultrasound system 100 includes an example controller 105, an example amplifier circuit system 110, an example transducer 115, an example switching circuit system 120, an example analog front-end (AFE) circuit system 125, an example signal processing circuit system 130, and an example display 135. The ultrasound system 100 uses sound waves to generate images. Unlike audible sound waves, the ultrasound system 100 generates sound waves at frequencies outside the ultrasonic frequency range that are not audible.

[0028] Controller 105 controls the transmission of ultrasonic waves. Controller 105 provides a relatively low-power representation of the ultrasonic signal to amplifier circuitry 110. Combined with... Figure 5 An example of controller 105 is further illustrated and described.

[0029] Amplifier circuitry 110 generates ultrasonic signals in response to signals from controller 105. In some examples, amplifier circuitry 110 is referred to as transmitter circuitry. Figure 2 , 3 4 further illustrates and describes an example of amplifier circuit system 110.

[0030] Transducer 115 transmits an ultrasonic signal from amplifier circuitry 110. In some examples, transducer 115 is positioned to guide the propagation of the ultrasonic signal. The ultrasonic signal propagates through the medium in response to the positioning of transducer 115. In example ultrasound imaging, objects in the medium reflect the ultrasonic signal in response. Transducer 115 receives the reflected ultrasonic signal.

[0031] Switching circuitry 120 provides the reflected signal from transducer 115 to AFE circuitry 125. Switching circuitry 120 prevents AFE circuitry 125 from receiving ultrasonic signals from amplifier circuitry 110. For example, if transducer 115 is transmitting an ultrasonic signal, switching circuitry 120 disconnects AFE circuitry 125 from transducer 115. In such an example, after transmission is complete, switching circuitry 120 reconnects AFE circuitry 125 to transducer 115.

[0032] AFE circuitry 125 receives the reflected signal from transducer 115. AFE circuitry 125 converts the reflected signal from analog to digital. In some examples, AFE circuitry 125 modulates the reflected signal, for example, by filtering frequencies outside the ultrasonic frequency range. AFE circuitry 125 provides a digital representation of the reflected signal to signal processing circuitry 130.

[0033] Signal processing circuitry 130 processes data of the reflected signal to form an image of the medium through which the ultrasound signal passes. In some examples, signal processing circuitry 130 uses beamforming to construct an image using the reflected signal. In other examples, signal processing circuitry 130 may use one or more Fast Fourier Transforms (FFTs) to generate ultrasound data, which may be further processed.

[0034] Display 135 displays images from signal processing circuitry system 130. In some examples, display 135 is communicatively coupled to signal processing circuitry system 130 via a communication interface. For example, display 135 could be a smartphone connected to signal processing circuitry system 130 via Bluetooth. Alternatively, ultrasound system 100 may not include display 135. In such examples, ultrasound system 100 may store images in a data storage area for later analysis.

[0035] Figure 2 yes Figure 1 A schematic diagram of an example amplifier circuit system 110. In Figure 2 In the example, amplifier circuit system 110 includes example transconductance circuit system 205, first example capacitor 210, example buffer 215, first example resistor 220, second example capacitor 225 and second example resistor 230. Figure 2 The example transconducting circuit system 205 includes an example buffer 235, an example resistor 240, and an example current source circuit system 245.

[0036] Amplifier circuit system 110 receives input voltage (V) IN ), transconductance trim value (TRIM) K ), Input fine-tuning value (TRIM) RIN ), feedback resistor adjustment value (TRIM) RF ) and capacitor trim value (TRIM) CF In some examples, controller 105 provides the input voltage and a fine-tuning value. Input voltage (V) IN This represents the ultrasonic signal used for transmission. Transconductance trimming value (TRIM) K Set the transconductance factor (K) of the transconductance circuit system 205. The transconductance factor (K) corresponds to the gain of the transconductance circuit system 205. Input the trim value (TRIM). RIN Set the resistance of resistor 230 (R) IN Feedback resistor trim value (TRIM) RF Set the resistance of resistor 220 (R) F Capacitor trim value (TRIM) CF Set the capacitance of capacitor 225 (C) FThe amplifier circuit system 110 uses an input voltage (V). IN ) generates an output signal (V) OUT ).

[0037] Transconducting circuit system 205 receives input voltage (V) IN ), transconductance trim value (TRIM) K ) and error voltage (V E Error voltage (V) E ) is related to the feedback current (I) F Multiply by the resistance of resistor 230 (R) IN The voltage is proportional to the input voltage. The transconductance circuit system 205 responds to the input voltage (V). IN Transconductance trim value (TRIM) K ) and error voltage (V E This generates an amplified error current (K*I). E ).

[0038] In an example operation of the transconductance circuit system 205, the buffer 235 buffers the input voltage (V). IN This isolates resistor 240 from the input of amplifier circuitry 110. In some examples, this isolation, using buffer 235, sets the input of amplifier circuitry 110 to a relatively high impedance. Resistor 240 is used to isolate the input signal (V... IN ) and error voltage (V E Voltage division is performed based on the voltage difference between the resistor and the resistor (R). O ) generates error current (I) E ).exist Figure 2 In the example shown by the dashed line, resistor 240 is an illustrative representation of the look-in impedance across the conductive circuit system 205. In some examples, resistor 240 may not be shown.

[0039] In this example operation of the transconductance circuit system 205, the current source circuit system 245 amplifies the error current (I) according to the transconductance factor (K). E Transconductance trim value (TRIM) K The transconductance factor (K) of the current source circuit system 245 is set. In some examples, the amplifier circuit system 110 includes a function to amplify the error current (I0). E Additional circuitry for ) . In such examples, the current source circuitry 245 mirrors the error current (I E The additional circuitry applies a transconductance factor (K) to generate an amplified error current (K*I). E The transconducting circuit system 205 will amplify the error current (K*I). E) is provided to capacitor 210 and buffer 215.

[0040] Capacitor 210 receives the amplified error current (K*I) from the transconductance circuit system 205. E Capacitor 210 responds to the amplified error current (K*I). E This generates an output voltage (V). OUT In the example operation, the output voltage (V) OUT ) and the amplified error current (K*I) E It is directly proportional to and related to the capacitance (C) of capacitor 210. C The amplified error current (K*I) is inversely proportional. In this type of example, capacitor 210 will amplify the error current (K*I). E ) converted to output voltage (V OUT ).

[0041] Buffer 215 receives the output voltage (V) from capacitor 210. OUT ). Buffer 215 buffers the output voltage (V) OUT In the example operation, buffer 215 isolates capacitor 210 from the circuitry coupled to the output of amplifier circuitry 110. Buffer 215 stores the output voltage (V... OUT ) Provided to resistor 220, capacitor 225 and Figure 1 The transducer 115.

[0042] Resistor 220 and capacitor 225 receive the output voltage (V) OUT In some examples, resistor 220 and capacitor 225 are referred to as a feedback RC circuit system. Resistor 220 and capacitor 225 form a low-pass filter. In example operation, the resistance (R) of resistor 220 is... F ) and the capacitance of capacitor 225 (C F The feedback resistor controls the cutoff frequency of the filter. In some examples, the feedback resistor is fine-tuned (TRIM). RF Set the resistor to 220Ω and adjust the capacitor's trim value (TRIM). CF The capacitance of capacitor 225 is set. Resistor 220 and capacitor 225 are connected to the output voltage (V) OUT ) is filtered to generate feedback current (I) F ).

[0043] Resistor 230 receives feedback current (I) from resistor 220 and capacitor 225. F Resistor 230 uses feedback current (I). F ) and the resistance (R) of resistor 230 IN ) generates error voltage (V) E In some examples, the input is a trim value (TRIM).RIN Set the resistance of resistor 230 (R) IN ).

[0044] In some devices, such as medical systems Figure 1 The controller 105 calibrates the amplifier circuitry 110 to support the increased bandwidth. In combination Figure 7 , 8A As further illustrated and described in 8B, during this type of calibration, controller 105 modifies the transconductance trim value (TRIM). K ), Input fine-tuning value (TRIM) RIN ), feedback resistor trim value (TRIM) RF ) and capacitor trim value (TRIM) CF This is used to adjust the bandwidth of the amplifier circuit system 110. Figure 2 In the example, amplifier circuit system 110 has a capacitance (C) based on transconductance constant (K) and capacitor 210. C ), resistor 220 (R) F ), the capacitance of capacitor 225 (C) F ), resistor 230 (R) IN ) and the resistance of resistor 240 (R) O Open-loop gain (LG) OP In some examples, equation (1) represents the open-loop gain of amplifier circuit system 110 at different frequencies.

[0045] Equation (1)

[0046] In some examples, such as medical implementations, the phase margin of amplifier circuitry 110 is calibrated to account for process variations. Advantageously, the gain of the low-pass filter formed by resistor 220 and capacitor 225 creates an additional zero in the open-loop gain equation (1). Advantageously, the additional zero of resistor 220 and capacitor 225 allows adjustment of the open-loop gain of amplifier circuitry 110 to account for process variations. Advantageously, for relatively low voltage swings, such as close to one, the phase margin is a function of the non-dominant pole. In example operation, the capacitance of capacitor 225 changes the phase margin of amplifier circuitry 110. Advantageously, controller 105 can use the capacitor trimming value (TRIM) CF This is used to compensate for changes in phase margin.

[0047] Furthermore, in some examples, such as medical implementations, the amplitude response of amplifier circuitry 110 is calibrated to account for process variations. Figure 2 In the example, the capacitance of capacitor 210 (C) CThe input to buffer 215 cannot be fine-tuned in response to the high voltage terminal. Advantageously, as illustrated in equation (1), the capacitance (C) of capacitor 210 is... C The process variations can be accounted for by adjusting the transconductance constant (K) of the transconductance circuit system 205. Advantageously, the controller 105 can use a transconductance trimmer (TRIM) value. K This is used to compensate for changes in the amplitude response. Combined with... Figure 7 , 8A 8B further illustrates and describes an example calibration operation of the amplifier circuit system 110.

[0048] Figure 3 Is as Figure 1 and 2 A schematic diagram of an example amplifier circuit system 300, which is an example of an amplifier circuit system 110. Figure 3 The example amplifier circuit system 300 includes a transconductance circuit system 205, a capacitor 210, a buffer 215, resistors 220 and 230, another example resistor 305, and another example capacitor 310. In some examples, resistor 305 and capacitor 310 are referred to as a zero-pair circuit system.

[0049] Amplifier circuit system 300 receives input voltage (V) IN ), transconductance trim value (TRIM) K ), Input fine-tuning value (TRIM) RIN ), resistance trimming value (TRIM) RZ ) and capacitor trim value (TRIM) CZ In some examples, controller 105 provides the input voltage and a trim value. The resistor trim value (TRIM) RZ Set the resistance (R) of resistor 305. Z Capacitor trim value (TRIM) CZ Set the capacitance of capacitor 310 (C) Z The amplifier circuit system 300 uses an input voltage (V). IN ) generates an output signal (V) OUT ).

[0050] exist Figure 3 In the example, resistor 220 will feed back current (I F This is provided to resistors 230 and 305. Resistors 230 and 305 and capacitor 310 respond to the feedback current (If). F ) generates error voltage (V) E ).exist Figure 3 In the example, amplifier circuit system 300 utilizes a current feedback path to create an error voltage (V). EThe low-impedance terminal is referred to as a virtual ground. Advantageously, adding resistor 305 and capacitor 310 at the low-impedance terminal does not change the stability of amplifier circuit system 300.

[0051] and Figure 2 Unlike amplifier circuit system 110, amplifier circuit system 300 includes resistor 305 and capacitor 310 for relatively high voltage gain, such as a peak-to-peak output voltage swing greater than 20 volts. In example operation, as the gain and output voltage of amplifier circuit system 300 increase, the non-dominant pole of the open-loop gain becomes overdamped. In this type of example operation, overdamping the non-dominant pole reduces the closed-loop bandwidth, which reduces... Figure 2 The bandwidth of the amplifier circuit system 110. Advantageously, Figure 3 The example amplifier circuit system 300 uses resistor 305 and capacitor 310 to form pole-zero pairs that increase closed-loop bandwidth to support high output voltage.

[0052] In the example operation, the resistance (R) of resistor 305 Z ) and the capacitance (C) of capacitor 310 Z The resistor controls the position of the poles. In some examples, the resistor trimming value (TRIM) RZ Set the resistance (R) of resistor 305. Z ), and the capacitor trim value (TRIM) CZ Set the capacitance of capacitor 310 (C) Z ).

[0053] In some examples, such as medical implementations, amplifier circuitry 300 needs to support increased bandwidth. For instance, in ultrasound imaging, amplifier circuitry 300 might need to support a bandwidth of 25 MHz. In some such examples, controller 105 can calibrate the frequency response of amplifier circuitry 300 to meet the bandwidth requirements.

[0054] If the gain of the amplifier circuit system 300 is relatively high, for example, substantially greater than one, then the frequency response is a factor of the closed-loop gain. Figure 3 In the example, amplifier circuit system 300 has a resistance (R) based on resistor 220. F ), the capacitance of capacitor 225 (C) F ), resistor 230 (R) IN ), resistor 305 (R) Z ), the capacitance of capacitor 310 (C) Z ) and open-loop gain (LG) OP The closed-loop gain (LG) CLThe value can be determined using equation (1). In some examples, equation (2) represents the closed-loop gain of the amplifier circuit system 300 at different frequencies.

[0055] Equation (2)

[0056] In some examples, controller 105 uses the pole-zero pair of resistor 305 and capacitor 310 to calibrate the frequency response of amplifier circuit system 300. For example, modifying the resistance (R) of resistors 230 and 305... IN R Z The factor ) will shift the frequency response of the amplifier circuit system 300. Advantageously, as illustrated in equation (2), this can be achieved by adjusting the resistance (R) of resistors 230 and 305. IN R Z This takes into account frequency response variations in the amplifier circuit system 300. Advantageously, the controller 105 can use the input trim value (TRIM) to account for frequency response variations in the amplifier circuit system 300. RIN ) and resistor trim value (TRIM) RZ Compensation for changes in frequency response.

[0057] In addition, the capacitance (C) of capacitor 310 Z The corner frequency is set beyond the shifted frequency response. For example, if the bandwidth of amplifier circuit system 300 is 25 MHz, then the capacitance of capacitor 310 (C) is... Z It is configured to filter frequencies greater than 30 MHz. Advantageously, the controller 105 can use a capacitor trimmer (TRIM) value. CZ To adjust capacitor 310. Combined with... Figure 9 and 10 Further explanation and description of example calibration operations for amplifier circuit system 300.

[0058] Figure 4 Is as Figure 1 , 2 A schematic diagram of another example amplifier circuit system 400, which is an example amplifier circuit system 110, 300 and 3. Figure 4 The example amplifier circuit system 400 includes a transconductance circuit system 205, capacitors 210 and 310, a buffer 215, and resistors 220, 230, and 305. Figure 4 In the example, amplifier circuit system 400 implements two embodiments of amplifier circuit systems 110 and 300. For example, amplifier circuit system 400 includes capacitor 225 for adjusting phase margin. Similarly, amplifier circuit system 400 includes resistor 305 and capacitor 310 for adjusting frequency response. Advantageously, as combined... Figure 6 , 7As further described in 9, the controller 105 can use a fine-tuning value to calibrate the amplifier circuitry 400 to obtain a wide range of gains over a relatively large bandwidth.

[0059] Figure 5 yes Figure 1 A block diagram of an example implementation of the controller 105. Figure 5 The controller 105 can be instantiated (e.g., instantiated, made to exist for any length of time, materialized, implemented, etc.) by a programmable circuit system such as a central processing unit (CPU), field-programmable gate array, programmable logic device (PLD), general-purpose array logic (GAL) device, programmable array logic (PAL) device, complex programmable logic device (CPLD), simple programmable logic device (SPLD), microcontroller (MCU), programmable system-on-chip (PSoC), etc., that executes the first instruction. Alternatively, Figure 5 The controller 105 can be instantiated by (i) an application-specific integrated circuit (ASIC) or (ii) a field-programmable gate array (FPGA) (e.g., creating an instance, making it exist for any duration, materializing, implementing, etc.), which ASIC or FPGA is structured or configured to perform an operation corresponding to the first instruction in response to the execution of the second instruction. Therefore, Figure 5 Some or all of the circuit systems in a circuit system can be instantiated at the same or different times. Figure 5 Some or all of the circuit systems in the system can be instantiated in one or more threads that execute simultaneously or sequentially on the hardware. Furthermore, in some examples, Figure 5 Some or all of the circuitry in the system can be implemented by a microprocessor circuitry that executes instructions or by an FPGA circuitry that performs operations to implement one or more virtual machines or containers. Figure 5 The example controller 105 includes an example calibration circuit system 505, an example signal generator circuit system 510, a first example voltage swing circuit system 515, a second example voltage swing circuit system 520, an example digital-to-analog converter (DAC) 525, a first example fine-tuning circuit system 530, a second example fine-tuning circuit system 535, a third example fine-tuning circuit system 540, a fourth example fine-tuning circuit system 545, a fifth example fine-tuning circuit system 550, and a sixth example fine-tuning circuit system 555.

[0060] Controller 105 receives output voltage (V) from amplifier circuit systems 110, 300, and 400. OUT The controller 105 provides input voltage (V) to the amplifier circuit systems 110, 300, and 400. IN ), transconductance trim value (TRIM) K ), Input fine-tuning value (TRIM) RIN), capacitor trim value (TRIM) CF ), resistor trim value (TRIM) RZ ) and capacitor trim value (TRIM) CZ As described above, controller 105 uses a trim value (TRIM). K TRIM RIN TRIM RF TRIM CF TRIM RZ TRIM CZ The corresponding trim value in the control input controls the transconductance circuit system 205, capacitors 225 and 310, and resistors 230 and 305. In some examples, the controller 105 provides a trim value (TRIM) at the control input to the transconductance circuit system 205, capacitors 225 and 310, and resistors 230 and 305. K TRIM RIN TRIM RF TRIM CF TRIM RZ TRIM CZ In such examples, the control input can be one or more terminals, nodes, inputs, etc., which control the transconductance factor (K) and capacitance (C). F C Z ) or resistor (R) IN R Z R F At least one of the following. Alternatively, in some examples, one or more of the transconducting circuit system 205, capacitors 225, 310, and resistors 230, 305 may have a set value. In such examples, the value of one or more of the transconducting circuit system 205, capacitors 225, 310, and resistors 230, 305 may be used in combination. Figure 7 and 9 The described calibration operation is used to determine this. Advantageously, the controller 105 can modify one or more of the transconductance circuit system 205, capacitors 225, 310, and resistors 230, 305 during operation.

[0061] The calibration circuit system 505 receives the output voltage (V) from the amplifier circuit system 300. OUTThe calibration circuit system 505 calibrates the amplifier circuit systems 110, 300, and 400 by adjusting the fine-tuning values ​​of the fine-tuning circuit systems 530, 535, 540, 545, and 550. Advantageously, calibrating the amplifier circuit systems 110, 300, and 400 reduces process variations. In some examples, the calibration circuit system 505 may be shown or described as being external to the controller 105. In such examples, the operation of the calibration circuit system 505 may be performed during manufacturing. In some examples, the calibration circuit system 505 is instantiated by a programmable circuit system that executes calibration instructions to perform the operation, for example by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0062] Signal generator circuitry 510 generates digital signals. Signal generator circuitry 510 provides these digital signals to voltage swing circuitry systems 515 and 520 and DAC 525. In some examples, such as in... Figure 1 In the ultrasound system 100, a signal generator circuit system 510 generates ultrasound signals for ultrasound imaging. In some examples, the signal generator circuit system 510 is instantiated by a programmable circuit system that executes signal generation instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0063] Voltage swing circuit system 515 (also referred to as low voltage swing circuit system) monitors the signal from signal generator circuit system 510. Voltage swing circuit system 515 determines whether signal generator circuit system 510 is generating a signal with a relatively low gain (e.g., a gain close to one). In response to determining that the outputs of amplifier circuit systems 110, 300, 400 have a voltage swing less than a threshold, voltage swing circuit system 515 sets the fine-tuning values ​​of fine-tuning circuit systems 530, 535, 540, 545, 550 for the relatively low gain. In some examples, voltage swing circuit system 515 is instantiated by a programmable circuit system that executes swing control instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0064] Voltage swing circuit system 520 (also referred to as high voltage swing circuit system) monitors the signal from signal generator circuit system 510. Voltage swing circuit system 520 determines whether signal generator circuit system 510 is generating a signal with a relatively high gain (e.g., not close to one). In response to determining that the output of amplifier circuit systems 110, 300, 400 has a voltage swing greater than a threshold, voltage swing circuit system 520 sets the fine-tuning values ​​of fine-tuning circuit systems 535, 540, 545, 550 for the relatively high gain. In some examples, voltage swing circuit system 520 is instantiated by a programmable circuit system that executes swing control instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0065] DAC 525 receives digital signals from signal generator circuitry 510. DAC 525 converts the digital signals into digital values ​​to generate the input voltages (V) for amplifier circuitry 110, 300, and 400. IN In some examples, the DAC 525 is instantiated by a programmable circuit system that executes calibration instructions to perform operations, for example by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0066] The fine-tuning circuit system 530 provides the capacitor trim value (TRIM) to the capacitor 225. CF The 530 fine-tuning circuit system uses a capacitor to fine-tune the value (TRIM). CF Set the capacitance of capacitor 225 (C) F In some examples, the trimmer circuitry 530 stores the trimmer value of the capacitor (TRIM). CF This refers to a portion of the memory, such as a register, a location in random access memory (RAM), etc. In some examples, the fine-tuning circuitry 530 is instantiated by a programmable circuitry system that executes fine-tuning instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0067] The 535 trimmer circuitry provides the input trimmer value (TRIM) to resistor 230. RIN The 535 fine-tuning circuit system uses an input fine-tuning value (TRIM). RIN Set the resistance of resistor 230 (R) IN In some examples, the trimmer circuitry 535 stores the input trimmer value (TRIM). RINThis refers to a portion of the memory, such as a register, a location in random access memory (RAM), etc. In some examples, the fine-tuning circuitry 535 is instantiated by a programmable circuitry system that executes fine-tuning instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0068] The fine-tuning circuit system 540 provides the capacitor 310 with a capacitor trim value (TRIM). CZ The 540 fine-tuning circuit system uses a capacitor to fine-tune the value (TRIM). CZ Set the capacitance of capacitor 310 (C) Z In some examples, the trimmer circuitry 540 stores the trimmer value of the capacitor (TRIM). CZ This refers to a portion of the memory, such as a register, a location in random access memory (RAM), etc. In some examples, the fine-tuning circuitry 540 is instantiated by a programmable circuitry system that executes fine-tuning instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0069] The trim circuit system 545 provides the resistor trim value (TRIM) to resistor 305. RZ The 545 fine-tuning circuit system uses a resistor to fine-tune the value (TRIM). RZ Set the resistance (R) of resistor 305. Z In some examples, the trimmer circuit system 545 stores the trimmer value of the resistor (TRIM). RZ This refers to a portion of the memory, such as a register, a location in random access memory (RAM), etc. In some examples, the fine-tuning circuitry 545 is instantiated by a programmable circuitry system that executes fine-tuning instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0070] The 550 fine-tuning circuit system will adjust the transconductance trim value (TRIM). K The current source circuit system 245, or more generally, the transconductance circuit system 205, is provided. The fine-tuning circuit system 550 uses the transconductance trimming value (TRIM). K This is used to set the transconductance factor (K) of the transconductance circuit system 205. In some examples, the trimmer circuit system 550 stores the transconductance trim value (TRIM). KThis refers to a portion of the memory, such as a register, a location in random access memory (RAM), etc. In some examples, the fine-tuning circuitry 550 is instantiated by a programmable circuitry system that executes fine-tuning instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0071] The 555 timer provides feedback resistor trimming value (TRIM) to resistor 220. RF The 555 timer system uses a feedback resistor to fine-tune the value (TRIM). RF Set the resistance of resistor 220 (R) F In some examples, the 555 trimmer circuitry stores the trim value of the feedback resistor (TRIM). RF This refers to a portion of the memory, such as a register, a location in random access memory (RAM), etc. In some examples, the fine-tuning circuitry 555 is instantiated by a programmable circuitry system that executes fine-tuning instructions to perform operations, such as by... Figure 6 , 7 The operations are represented by flowcharts 9 and 1.

[0072] Figure 6 This is a flowchart illustrating example machine-readable instructions or example operations 600, which can be used... Figure 1 , 2 Amplifier circuit systems 110, 300, 400 and 3, and 4 Figure 1 and 5 The controller 105 or more generally used Figure 1 The example implementation of the ultrasound system 100 is used for at least one of the following: implementation, instantiation, or execution. Example operation 600 begins at... Figure 7 and 9 Example calibration operations 700 and 900.

[0073] Figure 7 Example operation 700 is for low-voltage swing calibration amplifier circuit systems 110, 400. As described above, when amplifier circuit systems 110, 300, 400 generate signals with low-voltage swing conditions (e.g., gain close to one), the phase margin is a function of the non-dominant pole of the open-loop gain. Such open-loop gain of amplifier circuit systems 110, 400 is illustrated by equation (1). In this example, resistor 220 and capacitor 225 form additional zeros. Furthermore, during low-voltage swing conditions, adjusting the transconductance constant (K) fine-tunes the amplitude response, thereby determining the unity-gain bandwidth. Figure 7 In example operation 700, controller 105 calibrates the capacitance (C) of capacitor 225. FThe transconductance constant (K) of the transconductance circuit system 205 and capacitor 225 is determined. Advantageously, calibrating the transconductance circuit system 205 and capacitor 225 reduces changes in unity-gain bandwidth and phase margin caused by process variations. Figure 7 Further explanation and description of example operation 700.

[0074] Figure 9 Example operation 900 is for high-voltage swing calibration amplifier circuit systems 110, 300, and 400. As described above, when amplifier circuit systems 110, 300, and 400 generate signals with high-voltage swing conditions (e.g., gain not close to one), the non-dominant poles of the open-loop gain are overdamped, which reduces the closed-loop bandwidth. Figure 3 and 4 In the example, resistor 305 and capacitor 310 add a pole-zero pair, which modifies the closed-loop bandwidth without affecting the open-loop bandwidth. The closed-loop gain of amplifier circuit systems 300 and 400 is illustrated by equation (2). In this example, the resistance (R) of resistors 230 and 305 is modified. IN R Z The factor in equation (2) will shift the frequency response of amplifier circuit systems 110, 300, and 400. Furthermore, adjusting the capacitance (C) of capacitor 310... Z This will add an additional corner frequency beyond the cutoff frequency of the amplifier circuitry's frequency response of 110, 300, and 400 Hz. For example, the capacitance (C) of capacitor 310... Z The frequency response drop can be increased beyond the target bandwidth by setting it. Advantageously, calibration resistor 305 and capacitor 310 reduce bandwidth variations caused by process variations. Figure 9 Further explanation and description of example operation 900. Control proceeds to box 605.

[0075] The fine-tuning circuitry 530 sets up a frequency response capacitor (box 605). In example operation, the fine-tuning circuitry 530 provides a capacitor trimming code (TRIM). CF ), which sets the capacitance (C) of capacitor 225. F In some examples, capacitor 225 is referred to as a frequency-response capacitor. In such example operation, the capacitance (C) of capacitor 225 is... F This determines the phase margin of amplifier circuit systems 110 and 400 during low-voltage conditions. In some devices, such as medical systems, the trimmer circuit system 530 provides a calibrated capacitor trimmer code (TRIM). CF The phase margin is set to be approximately equal in different instances of amplifier circuit systems 110, 300, and 400 for a gain close to one.

[0076] Signal generator circuitry 510 determines whether a signal to be transmitted exists (block 610). In example operation, signal generator circuitry 510 generates a digital signal in response to determining that amplifier circuitry 110, 300, 400 will drive transducer 115. In some examples, signal generator circuitry 510 generates a digital signal in response to indications from external circuitry, periodic intervals, etc. In such example operation, DAC 525 generates the input voltage (V) of amplifier circuitry 110, 300, 400 in response to the digital signal from signal generator circuitry 510. IN If the signal generator circuitry 510 determines that there is no signal to transmit (e.g., block 610 returns a result of "no"), then control proceeds back to block 610.

[0077] If signal generator circuitry 510 determines that a signal to be transmitted exists (e.g., block 610 returns a result of "yes"), then voltage swing circuitry systems 515, 520 determine whether the signal has a low voltage swing (block 615). In example operation, voltage swing circuitry systems 515, 520 determine the voltage swing of the output of amplifier circuitry systems 110, 300, 400 based on signal generator circuitry system 510. In some examples, signal generator circuitry system 510 provides gain to voltage swing circuitry systems 515, 520. In such examples, for a gain close to one, voltage swing circuitry systems 515, 520 determine the output voltage (V) of amplifier circuitry systems 110, 300, 400. OUT This will have a low voltage swing. Alternatively, if the gain value is not close to one, the voltage swing circuit systems 515, 520 determine the output voltage (V) of the amplifier circuit systems 110, 300, 400. OUT This will have a relatively high voltage swing. In this type of example operation, the voltage swing circuit system 515 sets the fine-tuning values ​​of the fine-tuning circuit systems 530, 535, 540, 545, and 550 in response to determining that the amplifier circuit systems 110, 300, and 400 have a gain close to one. This type of condition is also referred to as a low voltage condition. Similarly, the voltage swing circuit system 520 sets the fine-tuning values ​​of the fine-tuning circuit systems 535, 540, 545, and 550 in response to determining that the amplifier circuit systems 110, 300, and 400 have a gain not close to one. Advantageously, the voltage swing circuit systems 515 and 520 dynamically adjust the amplifier circuit systems 110, 300, and 400 in response to the gain.

[0078] If voltage swing circuit systems 515, 520 determine that the signal has a low voltage swing (e.g., box 615 returns a result of "yes"), then fine-tuning circuit system 550 sets an error gain for the low voltage swing (box 620). In some examples, the transconductance factor (K) of transconductance circuit system 205 is referred to as the error gain. Fine-tuning circuit system 545 sets a corner frequency resistor (box 625) for the low voltage swing. Fine-tuning circuit system 540 sets a corner frequency capacitor (box 630) for the low voltage swing. In example operation, for a relatively low gain, voltage swing circuit system 515 adjusts the transconductance factor (K) of transconductance circuit system 205 and the resistance (R) of resistor 305. Z ) and the capacitance (C) of capacitor 310. Z In some examples, the voltage swing circuit system 515 responds to... Figure 7 Example operation 700 determines the fine-tuning values ​​for fine-tuning circuit systems 540, 545, and 550. In other examples, the fine-tuning values ​​for fine-tuning circuit systems 540, 545, and 550 are provided to voltage swing circuit system 515. In such example operations, the resistance (R) of resistor 305... Z ) and the capacitance (C) of capacitor 310 Z It has been configured to reduce the impact on open-loop gain.

[0079] If voltage swing circuit systems 515 and 520 determine that the signal does not have a low voltage swing (e.g., box 615 returns a result of "No"), then fine-tuning circuit system 550 sets the error gain for a high voltage swing (box 635). Fine-tuning circuit system 545 sets the corner frequency resistor for a high voltage swing (box 640). Fine-tuning circuit system 540 sets the corner frequency capacitor for a high voltage swing (box 645). In example operation, for a relatively high gain, voltage swing circuit system 520 adjusts the transconductance factor (K) of transconductance circuit system 205 and the resistance (R) of resistor 305. Z ) and the capacitance (C) of capacitor 310 Z In some examples, the voltage swing circuit system 520 responds to... Figure 9 Example operation 900 determines the fine-tuning values ​​for fine-tuning circuit systems 540, 545, and 550. In other examples, the fine-tuning values ​​for fine-tuning circuit systems 540, 545, and 550 are provided to voltage swing circuit system 520.

[0080] Amplifier circuitry 110, 300, and 400 transmit signals (box 650). (As in combination...) Figure 2 , 3 As further described in section 4, the amplifier circuit systems 110, 300, and 400 respond to the input voltage (V IN ) and fine-tuning value (TRIM) K TRIMCF TRIM RIN TRIM RZ TRIM CZ ) generates output voltage (V OUT Advantageously, the controller 105 dynamically adjusts the amplifier circuit systems 110, 300, and 400 for different operating conditions. Advantageously, in high-precision systems such as medical devices, the phase margin of the amplifier circuit systems 110, 300, and 400 and the frequency response of the set bandwidth can be calibrated to account for process variations.

[0081] Control returns to box 610. (See reference) Figure 6 The example method is described using the flowchart illustrated in the diagram. However, implementation... Figure 1 , 2 Amplifier circuit systems 110, 300, 400 and 3, and 4 Figure 1 and 5 The controller 105 or more generally Figure 1 Many other methods of the ultrasound system 100 may also be used in this specification. For example, the execution order of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined. Similarly, additional operations may be included before, between, or after the blocks shown in the illustrated example during the manufacturing process.

[0082] Figure 7 This is a flowchart illustrating example machine-readable instructions or example operations 700, which can be used... Figure 1 and 5 The example implementation of controller 105 is used to implement, instantiate, or execute at least one of them to calibrate for the first voltage swing condition. Figure 1 , 2 Amplifier circuit systems 110, 300, and 400, 3 and 4.

[0083] Example operation 700 begins at box 705, where the fine-tuning circuit system 550 sets the error gain to an initial value. In some examples, the transconductance factor (K) of the transconductance circuit system 205 is referred to as the error gain.

[0084] Fine-tuning circuit system 530 sets the frequency response capacitor to an initial value (box 710). Fine-tuning circuit system 545 sets the corner frequency resistor to an initial value (box 715). Fine-tuning circuit system 540 sets the corner frequency capacitor to an initial value (box 720). In example operation, calibration circuit system 505 initializes low-voltage swing calibration by providing initial fine-tuning values ​​to voltage swing circuit system 515, which adjusts fine-tuning circuit systems 530, 535, 540, 545, and 550 for low-voltage swing conditions. Voltage swing circuit system 515 sets the fine-tuning values ​​of fine-tuning circuit systems 530, 535, 540, 545, and 550 to initial values. In some examples, the initial values ​​of fine-tuning circuit systems 530, 535, 540, 545, and 550 correspond to target values ​​for the transconductance factor (K), capacitors 225 and 310, and resistors 230 and 305. In such examples, the target value can be the result of empirical calculations of the transconductance factor (K), capacitors 225 and 310, and resistors 230 and 305. For instance, the designer determines the transconductance factor (K), the capacitance of capacitors 225 and 310, and the resistance of resistors 230 and 305 to achieve a bandwidth of 25 MHz. In such examples, the initial fine-tuning value corresponds to the determined value.

[0085] Signal generator circuitry 510 generates a low-oscillation signal within a certain frequency range (box 725). In example operation, signal generator circuitry 510 generates a series of digital signals with a gain close to one within a certain frequency range. For example, if the target bandwidth of amplifier circuitry 110, 300, 400 is 25 MHz, then signal generator circuitry 510 generates multiple signals with frequencies spanning 30 MHz. In this type of example operation, the initial values ​​of trimmer circuitry 530, 535, 540, 545, 550 ideally set the gain of amplifier circuitry 110, 300, 400 to one.

[0086] The calibration circuit system 505 determines the unity-gain bandwidth (box 730). The unity-gain bandwidth is the bandwidth of the amplifier circuit systems 110, 300, and 400 when the gain is one. In example operation, the calibration circuit system 505 monitors the output voltage (V) of the amplifier circuit systems 110, 300, and 400 in response to signals in the stated frequency range. OUT In some examples, calibration circuitry 505 determines unity-gain bandwidth based on the power drop at the outputs of amplifier circuitry 110, 300, and 400.

[0087] The calibration circuitry 505 determines whether the unity-gain bandwidth equals the target bandwidth (box 735). In example operation, the calibration circuitry 505 compares the determined unity-gain bandwidth with the target unity-gain bandwidth. In some examples, the target unity-gain bandwidth represents the design specification of amplifier circuitry 110, 300, 400. For example, the ultrasound system 100 may require amplifier circuitry 110 to support 25 MHz. In such examples, the target unity-gain bandwidth of amplifier circuitry 110 is 25 MHz.

[0088] If calibration circuitry 505 determines that the unity-gain bandwidth is not equal to the target bandwidth (e.g., box 735 returns a result of "No"), then fine-tuning circuitry 550 adjusts the error gain (box 740). In example operation, voltage swing circuitry 515 modifies the transconductance trim value (TRIM) of fine-tuning circuitry 550 in response to determining that the unity-gain bandwidth is not equal to the target unity-gain bandwidth. K In some examples, the voltage swing circuit system 515 increases or decreases the transconductance factor (K) of the transconductance circuit system 205 to shift the amplitude response of the amplifier circuit systems 110, 400. In such example operation, the trimming circuit system 550 changes the transconductance factor (K) of the transconductance circuit system 205 in response to the modified transconductance trim value. Advantageously, the calibration circuit system 505 continues to adjust the transconductance trim value (TRIM). K (), until the unity-gain bandwidth is approximately equal to the target unity-gain bandwidth.

[0089] If calibration circuitry 505 determines that the unity-gain bandwidth equals the target bandwidth (e.g., box 735 returns "Yes"), then signal generator circuitry 510 generates a low-swing signal within a certain frequency range (box 745). Similar to the example operation in box 725, signal generator circuitry 510 generates a series of digital signals with a gain close to one within a certain frequency range. In this example operation, fine-tuning circuitry 550 sets the transconductance factor (K) of transconductance circuitry 205 to produce the target unity-gain bandwidth.

[0090] Calibration circuitry 505 determines the phase margin (box 750). In example operation, calibration circuitry 505 monitors the output voltage (V) of amplifier circuitry 110, 300, 400 in response to signals in the stated frequency range. OUT In some examples, the calibration circuit system 505 determines the phase margin based on the outputs of the amplifier circuit systems 110, 300, and 400.

[0091] The calibration circuitry 505 determines whether the phase margin is equal to the target phase margin (box 755). In example operation, the calibration circuitry 505 compares the determined phase margin with the target phase margin. In some examples, the target phase margin represents the design specification of amplifier circuitry 110, 300, 400. For example, ultrasound system 100 may require amplifier circuitry 110 to support 25 MHz. In such an example, the target phase margin of amplifier circuitry 110 is 45 degrees.

[0092] If calibration circuitry 505 determines that the phase margin is not equal to the target phase margin (e.g., box 755 returns a result of "No"), then trimming circuitry 530 adjusts the frequency response capacitor (box 760). In example operation, voltage swing circuitry 515 modifies the capacitor trimming value (TRIM) of trimming circuitry 550 in response to determining that the phase margin is not equal to the target phase margin. CF In some examples, the voltage swing circuit system 515 increases or decreases the capacitance (C) of capacitor 225. F To adjust the phase margin.

[0093] If the calibration circuit system 505 determines that the phase margin equals the target phase margin (e.g., block 755 returns a "Yes" result), then control proceeds to return. Reference Figure 7 The example method is described using the flowchart illustrated in the diagram. However, using... Figure 1 and 5 Controller 105 calibration Figure 1 , 2 Many other methods of the amplifier circuit systems 110, 300, and 400 of 3 and 4 may also be used in this specification. For example, the execution order of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined. Similarly, additional operations may be included before, between, or after the blocks shown in the illustrated examples during the manufacturing process.

[0094] Figure 8A It is aimed at Figure 1 , 2 Amplifier circuit systems 110, 300, and 400 (units unspecified) Figure 7 The example calibration operation plot 800. Figure 8A Example plot 800 includes a first example measurement 810, a second example measurement 820, and a third example measurement 830. Measurements 810, 820, and 830 represent the output voltage (V) of amplifier circuit systems 110, 300, and 400 during the example frequency sweep of block 725. OUT The average fundamental power is calculated. Measurement 810 indicates that the transconductance factor (K) of the transconductance circuit system 205 is set to the first transconductance trimming value (TRIM) in the fine-tuning circuit system 550. K_1The operation under the condition of ), Measurement 820 indicates that the transconductance factor (K) of the transconductance circuit system 205 is set to the second transconductance fine-tuning value (TRIM) in the fine-tuning circuit system 550. K_2 The operation under the condition of ), Measurement 830 indicates that the transconductance factor (K) of the transconductance circuit system 205 is set to the third transconductance fine-tuning value (TRIM) in the fine-tuning circuit system 550. K_3 This describes the operation under certain conditions. Advantageously, adjusting the transconductance factor (K) modifies the amplitude response of amplifier circuit systems 110, 300, and 400 at unity gain. Advantageously, controller 105 can adjust the transconductance trimmer value (TRIM) to... K This can be used to reduce the variation in amplitude response at unity gain.

[0095] Figure 8B It is aimed at Figure 1 , 2 Amplifier circuit systems 110, 300, and 400 (units unspecified) Figure 7 The example calibration operation is plotted in diagram 840. Figure 8B Example plot 840 includes a first example measurement 850, a second example measurement 860, and a third example measurement 870. Measurements 850, 860, and 870 represent the output voltages (V) of amplifier circuit systems 110, 300, and 400 during the example frequency sweep of block 725. OUT The average fundamental power is calculated. Measurement 850 indicates that the capacitance (C) of capacitor 225 is adjusted in the fine-tuning circuit system 530. F Set to the first capacitor trim value (TRIM) CF_1 The measured value 860 indicates the operation under the condition that the fine-tuning circuit system 530 adjusts the capacitance (C) of capacitor 225. F Set to the second capacitor trim value (TRIM) CF_2 The measured value 870 indicates the operation under the condition that the fine-tuning circuit system 530 adjusts the capacitance (C) of capacitor 225. F Set to the third capacitor trim value (TRIM) CF_3 Operation under the condition of ), advantageously, adjusting the capacitor (C) F This will modify the phase margin of amplifier circuit systems 110, 300, and 400 under relatively low voltage swings (e.g., less than 20 volt peak-to-peak voltage swings). Advantageously, controller 105 can adjust the phase margin of the capacitor trimmer value (TRIM). CF This reduces the change in phase margin under unity gain.

[0096] Figure 9 This is a flowchart representing an example machine-readable instruction or example operation 900, which can be used... Figure 1 and 5The example implementation of controller 105 is used to implement, instantiate, or execute at least one of them for calibration. Figure 1 , 2 Amplifier circuit systems 110, 300, and 400 are used for 3 and 4. Example operation 900 begins at box 905, where the fine-tuning circuit system 545 sets the corner frequency resistor to its initial value. The fine-tuning circuit system 540 sets the corner frequency capacitor to its initial value (box 910).

[0097] In example operation, calibration circuit system 505 initializes high-voltage swing calibration by providing initial fine-tuning values ​​to voltage swing circuit system 520, which adjusts fine-tuning circuit systems 535, 540, 545, and 550 for high-voltage swing conditions. Voltage swing circuit system 520 sets the fine-tuning values ​​of fine-tuning circuit systems 535, 540, 545, and 550 to initial values. In some examples, the initial values ​​of fine-tuning circuit systems 535, 540, 545, and 550 correspond to target values ​​for the transconductance factor (K), resistors 230 and 305, and capacitor 310. In such examples, the target values ​​may be the result of empirical calculations of the transconductance factor (K), resistors 230 and 305, and capacitor 310. For example, the designer determines the transconductance factor (K), the resistance of resistors 230 and 305, and the capacitance of capacitor 310 to achieve a bandwidth of 25 MHz. In such examples, the initial fine-tuning values ​​correspond to the determined values.

[0098] Signal generator circuitry 510 generates a high-oscillation signal within a certain frequency range (box 915). In example operation, signal generator circuitry 510 generates a series of digital signals with a gain significantly greater than one within a certain frequency range. For example, if the target bandwidth of amplifier circuitry 110, 300, 400 is 25 MHz, then signal generator circuitry 510 generates multiple signals with frequencies spanning 30 MHz. In this type of example operation, the initial values ​​of fine-tuning circuitry 530, 535, 540, 545, 550 set the gain of amplifier circuitry 110, 300, 400 to one.

[0099] Calibration circuitry 505 determines the bandwidth (box 920). In example operation, calibration circuitry 505 monitors the output voltage (V) of amplifier circuitry 110, 300, 400 in response to signals within the stated frequency range. OUT In some examples, calibration circuitry 505 determines bandwidth based on the power drop at the outputs of amplifier circuitry 110, 300, and 400.

[0100] The calibration circuitry 505 determines whether the bandwidth equals the target bandwidth (box 925). In example operation, the calibration circuitry 505 compares the determined bandwidth with the target bandwidth. In some examples, the target bandwidth represents the design specification of amplifier circuitry 110, 300, 400. For example, the ultrasound system 100 may require amplifier circuitry 110 to support 25 MHz. In such examples, the target bandwidth of amplifier circuitry 110 is 25 MHz.

[0101] If calibration circuitry 505 determines that the bandwidth is not equal to the target bandwidth (e.g., box 925 returns a "No"), then trimming circuitry 545 adjusts the corner frequency resistor (box 930). Trimming circuitry 540 adjusts the corner frequency capacitor (box 935). In example operation, voltage swing circuitry 520 modifies the capacitor trim value (TRIM) of trimming circuitry 540 in response to determining that the bandwidth is not equal to the target bandwidth. CZ ) and the resistor trimming value of the 545 fine-tuning circuit system (TRIM) RZ In some examples, the voltage swing circuit system 520 increases or decreases the resistance of resistor 305 and / or the capacitance of capacitor 310 to shift the frequency response of amplifier circuit systems 110, 300, 400. In such example operation, in response to a new tuning value, the tuning circuit system 540 changes the capacitance (C) of capacitor 310. Z Furthermore, the fine-tuning circuit system 545 changes the resistance (R) of resistor 305. Z Advantageously, the calibration circuit system 505 continues to adjust the trim value (TRIM). RZ TRIM CZ Continue until the bandwidth is approximately equal to the target bandwidth. Control then returns to box 915.

[0102] If the calibration circuitry 505 determines that the bandwidth equals the target bandwidth (e.g., block 925 returns a "Yes" result), then control proceeds to return. Reference Figure 9 The example method is described using the flowchart illustrated in the diagram. However, using... Figure 1 and 5 Controller 105 calibration Figure 1 , 2 Many other methods of the amplifier circuit systems 110, 300, and 400 of 3 and 4 may also be used in this specification. For example, the execution order of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined. Similarly, additional operations may be included before, between, or after the blocks shown in the illustrated examples during the manufacturing process.

[0103] Figure 10 It is aimed at Figure 1 , 2Amplifier circuit systems 110, 300, and 400 (units unspecified) Figure 9 The example calibration operation plot 1000. Figure 10 Example plot 1000 includes a first example measurement 1010, a second example measurement 1020, and a third example measurement 1030. Measurements 1010, 1020, and 1030 represent the output voltage (V) of amplifier circuit systems 110, 300, and 400 during the example frequency sweep of block 915. OUT The average fundamental power is calculated. Measurement 1010 indicates that the first trim value (TRIM) is used in the trim circuit system 540, 545. RZ_1 TRIM CZ_1 The operation is performed with resistor 305 and capacitor 310 configured. Measurement 1020 indicates the use of the second trim value (TRIM) in the trimming circuit system 540, 545. RZ_2 TRIM CZ_2 The operation is performed with resistor 305 and capacitor 310 configured. Measurement 1030 indicates the use of the third trim value (TRIM) in the trimming circuit system 540, 545. RZ_3 TRIM CZ_3 Operation with resistor 305 and capacitor 310 set. Advantageously, adjusting the resistor (R) Z ) and capacitor (C Z This will modify the frequency response of the amplifier circuit system 110, 300, and 400 MHz with a relatively high gain. Advantageously, the controller 105 can adjust the trim value (TRIM) by... RZ TRIM CZ This can be used to reduce changes in the frequency response.

[0104] Figure 11 This is a block diagram of an example programmable circuit system platform 1100, which is structured to perform one or a combination of the following operations: execution or instantiation. Figure 6 , 7 One or more of the example machine-readable instructions or example operations in 9 are used to implement Figure 1 and 5 The controller 105 is located in the system. The programmable circuit system platform 1100 can be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), or a mobile device (e.g., a cellular phone, a smartphone, or an iPad). TM Tablet computers, personal digital assistants (PDAs), internet devices, DVD players, CD players, digital video recorders, Blu-ray players, game consoles, personal video recorders, set-top boxes, headsets (e.g., augmented reality (AR) headsets, virtual reality (VR) headsets, etc.) or other wearable devices, or any other type of computing or electronic device.

[0105] The illustrated example programmable circuit system platform 1100 includes a programmable circuit system 1112. The illustrated example programmable circuit system 1112 is hardware. For example, the programmable circuit system 1112 may be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, or microcontrollers from any desired family or manufacturer. The programmable circuit system 1112 may be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the programmable circuit system 1112 is implemented... Figure 1 and 5 The controller 105.

[0106] The illustrated example programmable circuit system 1112 includes local memory 1113 (e.g., cache, registers, etc.). The illustrated example programmable circuit system 1112 communicates with main memories 1114 and 1116 via bus 1118, the main memories including volatile memory 1114 and non-volatile memory 1116. Volatile memory 1114 may be implemented by one or more synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), RAMBUS® dynamic random access memory (RDRAM®), or any other type of RAM device. Non-volatile memory 1116 may be implemented by flash memory or any other desired type of memory device, or a combination thereof. Access to the illustrated example main memories 1114 and 1116 is controlled by memory controller 1117. In some examples, the memory controller 1117 may be implemented by one or more integrated circuits, logic circuits, microcontrollers, or any other type of circuit system for managing the flow of data to and from the main memory 1114, 1116 from any desired series or manufacturer.

[0107] The illustrated programmable circuit system platform 1100 also includes an interface circuit system 1120. The interface circuit system 1120 can be implemented by hardware according to any type of interface standard, such as an Ethernet interface, a Universal Serial Bus (USB) interface, a Bluetooth® interface, a Near Field Communication (NFC) interface, a Peripheral Component Interconnect (PCI) interface, or a Peripheral Component Interconnect High Speed ​​(PCIe) interface.

[0108] In the illustrated example, one or more input devices 1122 are connected to the interface circuitry 1120. The input devices 1122 allow a user (e.g., a human user, machine user, etc.) to input one or a combination of data and / or commands into the programmable circuitry 1112. The input devices 1122 may be implemented using, for example, one or a combination of an audio sensor, microphone, camera (still or video), keyboard, buttons, mouse, touchscreen, touchpad, trackball, stationary device, or speech recognition system.

[0109] One or more output devices 1124 are also connected to the interface circuit system 1120 of the illustrated example. The output devices 1124 may be implemented, for example, by one or a combination of a display device (e.g., a light-emitting diode (LED), an organic light-emitting diode (OLED), a liquid crystal display (LCD), a cathode ray tube (CRT) display, an in-place switching (IPS) display, a touchscreen, etc.), a haptic output device, a printer, or a speaker. Therefore, the interface circuit system 1120 of the illustrated example may include one or a combination of a graphics driver card, a graphics driver chip, or a graphics processor circuit system such as a GPU.

[0110] The illustrated interface circuit system 1120 also includes communication devices, such as a transmitter, receiver, transceiver, modem, residential gateway, wireless access point, or network interface, or a combination thereof, to facilitate the exchange of data with external machines (e.g., any kind of computing device) via network 1126. Communication can be achieved through, for example, Ethernet connections, digital subscriber line (DSL) connections, telephone line connections, coaxial cable systems, satellite systems, beyond-line-of-sight wireless systems, line-of-sight wireless systems, cellular telephone systems, optical connections, etc.

[0111] The illustrated programmable circuit system platform 1100 also includes one or more mass storage disks or devices 1128 for storing one or more firmware, software, or data. Examples of such mass storage disks or devices 1128 include one or more magnetic storage devices (e.g., floppy disks, drives, HDDs, etc.), optical storage devices (e.g., Blu-ray discs, CDs, DVDs, etc.), RAID systems, or solid-state storage disks or devices, such as flash memory devices and SSDs.

[0112] can be Figure 6 , 7 The machine-readable instructions 1132 implemented by the machine-readable instructions of 9 may be stored in one or a combination of the following: mass storage device 1128, volatile memory 1114, non-volatile memory 1116, or on at least one non-transitory computer-readable storage medium, such as a removable CD or DVD.

[0113] Figure 12 yes Figure 11A block diagram of an example implementation of the programmable circuit system 1112. In this example, Figure 11 The programmable circuit system 1112 is implemented by the microprocessor 1200. For example, the microprocessor 1200 may be a general-purpose microprocessor (e.g., a general-purpose microprocessor circuit system). The microprocessor 1200 executes... Figure 6 , 7 The flowchart in section 9 contains some or all machine-readable instructions to effectively translate... Figure 5 The circuit system is instantiated as a logic circuit to perform operations corresponding to these machine-readable instructions. In some such examples, Figure 5 The circuit system is instantiated by the hardware circuitry of the microprocessor 1200 in conjunction with machine-readable instructions. For example, the microprocessor 1200 may be implemented by a multi-core hardware circuitry system such as a CPU, DSP, GPU, or XPU. Although the microprocessor may contain any number of example cores 1202 (e.g., one core), this example microprocessor 1200 is a multi-core semiconductor device containing N cores. The cores 1202 of the microprocessor 1200 may operate independently or collaboratively to execute machine-readable instructions. For example, machine code corresponding to firmware, embedded software, or software programs may be executed by one core of the cores 1202, or by multiple cores of the cores 1202 at the same or different times. In some examples, the machine code corresponding to firmware, embedded software, or software programs is divided into threads and executed in parallel by two or more cores of the cores 1202. Software programs may correspond to... Figure 6 , 7 The flowcharts in 9 represent part or all of the machine-readable instructions and / or operations.

[0114] Core 1202 can communicate via a first example bus 1204. In some examples, the first bus 1204 may be implemented as a communication bus to enable communication associated with one or more cores in core 1202. For example, the first bus 1204 may be implemented as at least one of an internal integrated circuit (I2C) bus, a serial peripheral interface (SPI) bus, a PCI bus, or a PCIe bus. Alternatively, the first bus 1204 may be implemented as any other type of computing or electrical bus. Core 1202 can receive data, instructions, and signals from one or more external devices via example interface circuitry 1206. Core 1202 can output data, instructions, and signals to one or more external devices via interface circuitry 1206. Although the core 1202 in this example includes example local memory 1220 (e.g., a Level 1 (L1) cache, which can be divided into an L1 data cache and an L1 instruction cache), the microprocessor 1200 also includes example shared memory 1210 (e.g., a Level 2 (L2) cache) that can be shared by the cores for high-speed access to data and instructions. Data and instructions can be transferred (e.g., shared) by performing one or a combination of writing to or reading from shared memory 1210. The local memory 1220 and shared memory 1210 of each core 1202 may be a combination of multi-level cache memory and main memory (e.g., Figure 11 The cache hierarchy (1114, 1116) is part of the main memory's storage device hierarchy. In some examples, higher-level memories in the hierarchy exhibit lower access times and smaller storage capacities compared to lower-level memories. Changes to the various levels of the cache hierarchy are managed (e.g., coordinated) through cache coherence strategies.

[0115] Each core 1202 may be referred to as a CPU, DSP, GPU, or any other type of hardware circuitry. Each core 1202 includes a control unit circuitry 1214, an arithmetic and logic (AL) circuitry (sometimes called an ALU) 1216, multiple registers 1218, local memory 1220, and a second example bus 1222. Other structures may exist. For example, each core 1202 may include a vector unit circuitry, a single instruction multiple data (SIMD) unit circuitry, a load / store unit (LSU) circuitry, a branch / jump unit circuitry, a floating-point unit (FPU) circuitry, etc. The control unit circuitry 1214 includes semiconductor-based circuitry structured to control (e.g., coordinate) data movement within the corresponding core 1202. The AL circuitry 1216 includes semiconductor-based circuitry structured to perform one or more mathematical or logical operations on the data within the corresponding core 1202. Some examples of the AL circuitry 1216 perform integer-based operations. In other examples, the AL circuit system 1216 also performs floating-point operations. In still other examples, the AL circuit system 1216 may comprise a first AL circuit system that performs integer-based operations and a second AL circuit system that performs floating-point operations. In some examples, the AL circuit system 1216 may be referred to as an arithmetic logic unit (ALU).

[0116] Register 1218 is a semiconductor-based architecture used to store data and instructions, such as the results of one or more operations performed by the AL circuit system 1216 corresponding to core 1202. For example, register 1218 may contain vector registers, SIMD registers, general-purpose registers, flag registers, segment registers, machine-specific registers, instruction pointer registers, control registers, debug registers, memory management registers, machine check registers, etc. Register 1218 may be arranged in... Figure 12 The memory bank shown. Alternatively, register 1218 can be organized in any other arrangement, format, or structure, for example, by distributing it throughout core 1202 to reduce access time. The second bus 1222 can be implemented by at least one of an I2C bus, an SPI bus, a PCI bus, or a PCIe bus.

[0117] Each core 1202, or more generally, the microprocessor 1200, may include additional or alternative structures to those shown and described above. For example, one or more clock circuits, one or more power supplies, one or more power gates, one or more cache home agents (CHAs), one or more convergent / common grid stoppers (CMS), one or more shifters (e.g., barrel shifters), or other circuitry may be present. The microprocessor 1200 is a semiconductor device fabricated to include a plurality of interconnected transistors to implement the above-described structures in one or more integrated circuits (ICs) contained in one or more packages.

[0118] Microprocessor 1200 may include or cooperate with one or more accelerators (e.g., acceleration circuitry, hardware accelerators, etc.). In some examples, accelerators are implemented by logic circuitry to perform certain tasks faster and more efficiently than a general-purpose processor can. Examples of accelerators include ASICs and FPGAs, such as those described herein. GPUs, DSPs, or other programmable devices may also be accelerators. Accelerators may be on microprocessor 1200, in the same chip package as microprocessor 1200, or in one or more separate packages from microprocessor 1200.

[0119] Figure 13 yes Figure 11 A block diagram of another example embodiment of the programmable circuit system 1112 is shown. In this example, the programmable circuit system 1112 is implemented by an FPGA circuit system 1300. For example, the FPGA circuit system 1300 may be implemented by an FPGA. The FPGA circuit system 1300 can be used, for example, to perform operations that would otherwise be performed by... Figure 12 The example microprocessor 1200 executes the corresponding machine-readable instructions. However, once configured, the FPGA circuit system 1300 instantiates the operations and functions corresponding to the machine-readable instructions in hardware, and therefore can typically execute the operations / functions faster than a general-purpose microprocessor executing the corresponding software.

[0120] More specifically, as described above Figure 12 The microprocessor 1200 (which is a general-purpose device that can be programmed to execute commands) Figure 6 , 7 The flowcharts in Figure 9 represent some or all of the machine-readable instructions, but their interconnection structure and logic circuitry are fixed once manufactured. Conversely, Figure 13 The example FPGA circuit system 1300 includes one or a combination of configuration, structuring, programming and / or interconnection in different ways after manufacturing to instantiate, for example with, by Figure 6 , 7 The flowchart 9 illustrates the interconnect structures and logic circuitry corresponding to some or all of the machine-readable instructions. Specifically, the FPGA circuitry 1300 can be considered as a series of logic gates, interconnect structures, and switches. Switches can be programmed to change the way logic gates are interconnected through the interconnect structures, thereby effectively forming one or more dedicated logic circuits (unless and until the FPGA circuitry 1300 is reprogrammed). The logic circuitry is configured so that logic gates can cooperate in different ways to perform different operations on data received from the input circuitry. These operations can correspond to... Figure 6 , 7The flowcharts in 9 represent some or all of the instructions (e.g., software and / or firmware). Thus, the FPGA circuit system 1300 can be configured or structured at least one of the following to effectively integrate with... Figure 6 , 7 Some or all of the operations / functions corresponding to the machine-readable instructions in flowchart 9 are instantiated as dedicated logic circuits to execute the operations / functions corresponding to those software instructions in a dedicated manner similar to that of an ASIC. Therefore, the FPGA circuit system 1300 can perform operations and functions corresponding to those software instructions. Figure 6 , 7 The operations / functions corresponding to some or all of the machine-readable instructions in 9 are faster than those of general-purpose microprocessors that can perform the same operations / functions.

[0121] exist Figure 13 In some examples, the FPGA circuit system 1300 is configured or structured in response to programming (and / or reprogramming one or more times) based on a binary file. In some examples, the binary file can be compiled or generated based on instructions in a hardware description language (HDL) such as Lucid, VHSIC (Very High Speed ​​Integrated Circuit) Hardware Description Language (VHDL), or Verilog, or both. For example, a user (e.g., a human user, a machine user, etc.) can use HDL to write code or programs corresponding to one or more operations / functions; the code / program can be translated into a low-level language as needed; and the code / program (e.g., code / program in a low-level language) can be translated into a binary file (e.g., by a compiler, software application, etc.). In some examples, Figure 13 The FPGA circuit system 1300 can at least perform binary file access or loading. Figure 13 One of the FPGA circuitry systems 1300 is configured or structured to perform the one or more operations / functions. For example, the binary file may consist of a bit stream (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.) or... Figure 13 The FPGA circuit system 1300 can be implemented using one or a combination of machine-readable instructions to perform operations. Figure 13 At least one of the FPGA circuit system 1300 or a portion thereof is configured or structured.

[0122] In some examples, at least one of the following is performed: compiling, generating, transforming, or otherwise outputting the binary file from a unified software platform used for programming the FPGA. For example, the unified software platform can translate a first instruction (e.g., code or program) corresponding to one or more operations / functions in a high-level language (e.g., C, C++, Python, etc.) into a second instruction corresponding to one or more operations / functions in an HDL. In some such examples, at least one of the following is performed: compiling, generating, or otherwise outputting the binary file from the unified software platform based on the second instruction. In some examples, Figure 13 The FPGA circuit system 1300 can at least perform binary file access or loading. Figure 13 One of the FPGA circuitry systems 1300 is configured or structured to perform the one or more operations / functions. For example, the binary file may consist of a bit stream (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.) or... Figure 13 The FPGA circuit system 1300 can be implemented using one or a combination of machine-readable instructions to perform operations. Figure 13 At least one of the FPGA circuit system 1300 or a portion thereof is configured or structured.

[0123] Figure 13 The FPGA circuit system 1300 includes an example input / output (I / O) circuit system 1302 to receive data from or output data to at least one of the example configuration circuit system 1304 or external hardware 1306. For example, the configuration circuit system 1304 may be implemented by an interface circuit system that can receive binary files (which may be implemented by one or more of bit streams, data, or machine-readable instructions) to configure the FPGA circuit system 1300 or portions thereof. In some such examples, the configuration circuit system 1304 may receive binary files from one or a combination of: a user, a machine (e.g., a hardware circuit system (e.g., a programmable or dedicated circuit system) that can implement an artificial intelligence / machine learning (AI / ML) model to generate binary files), or any combination thereof. In some examples, the external hardware 1306 may be implemented by an external hardware circuit system. For example, the external hardware 1306 may be implemented by... Figure 12 The microprocessor 1200 is implemented.

[0124] The FPGA circuit system 1300 also includes a series of example logic gate systems 1308, multiple example configurable interconnect structures 1310, and example memory circuit systems 1312. The logic gate systems 1308 and configurable interconnect structures 1310 are configurable to instantiate corresponding to... Figure 6 ,7 One or more operations / functions in at least some of the machine-readable instructions in 9, and / or other desired operations. Figure 13 The logic gate system 1308 shown is fabricated as blocks or groups. Each block contains semiconductor-based electrical structures that can be configured into logic circuits. In some examples, the electrical structures contain logic gates (e.g., AND gates, OR gates, Nor gates, etc.) that provide basic building blocks for the logic circuits. Electrically controllable switches (e.g., transistors) are present in each of the logic gate system 1308 to enable the configuration of one or a combination of electrical structures or logic gates to form a circuit that performs the desired operation / function. The logic gate system 1308 may include other electrical structures such as lookup tables (LUTs), registers (e.g., flip-flops or latches), multiplexers, etc.

[0125] The configurable interconnect structure 1310 illustrated is a conductive path, trace, via, etc., which may contain electrically controllable switches (e.g., transistors) whose states can be changed by programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more of the logic gate circuit system 1308, thereby programming the desired logic circuit.

[0126] The illustrated storage circuitry 1312 is structured to store the results of one or more operations performed by corresponding logic gates. Storage circuitry 1312 may be implemented using registers, etc. In the illustrated example, storage circuitry 1312 is distributed among logic gate circuitry 1308 to facilitate access and improve execution speed.

[0127] Figure 13 The example FPGA circuit system 1300 also includes an example dedicated operating circuit system 1314. In this example, the dedicated operating circuit system 1314 includes a dedicated circuit system 1316 that can be invoked to implement common functions to avoid the need for field programming of those functions. Examples of such dedicated circuit systems 1316 include memory (e.g., DRAM) controller circuit systems, PCIe controller circuit systems, clock circuit systems, transceiver circuit systems, memory and multiplier-accumulator circuit systems. Other types of dedicated circuit systems may be present. In some examples, the FPGA circuit system 1300 may also include an example general-purpose programmable circuit system 1318, such as an example CPU 1320 or an example DSP 1322. Other general-purpose programmable circuit systems 1318, such as GPUs, XPUs, etc., may also be present, which can be programmed to perform other operations.

[0128] Although Figure 12 and 13 Show Figure 11Two example implementations of the programmable circuit system 1112 are provided, but many other approaches are anticipated. For example, the FPGA circuit system may include an onboard CPU, such as... Figure 12 One or more of the example CPUs 1320. Therefore, Figure 11 The programmable circuit system 1112 can be configured by at least combining Figure 12 Example microprocessor 1200 and Figure 13 The example FPGA circuit system 1300 is used for implementation. In some such hybrid examples, Figure 12 One or more cores 1202 can execute by Figure 6 , 7 The flowchart in Figure 9 represents the first part of the machine-readable instructions to perform a first operation / function. Figure 13 The FPGA circuit system 1300 can be configured or structured at least one of them to perform actions corresponding to those performed by the FPGA circuit system 1300. Figure 6 , 7 The second operation / function of the second part of the machine-readable instructions represented by flowchart 9, and / or at least one of the ASIC configuration or structuring, can be executed to perform the corresponding operation / function. Figure 6 , 7 The flowchart of part 9 represents the third operation / function of the third part of the machine-readable instruction.

[0129] therefore, Figure 5 Some or all of the circuit systems in a given circuit system can be instantiated at the same or different times. For example, Figure 12 The same and / or different parts of the microprocessor 1200 can be programmed to execute machine-readable instructions at the same and / or different times. In some examples, Figure 13 The same and / or different parts of the FPGA circuit system 1300 can be configured or structured at least one of them to perform the operation / function corresponding to the part of the machine-readable instruction at the same and / or different times.

[0130] In some examples, Figure 5 Some or all of the circuit system can be instantiated, for example, in one or more threads that execute simultaneously and / or sequentially. Figure 12 The microprocessor 1200 can execute machine-readable instructions in one or more threads that execute simultaneously and / or serially. In some examples, Figure 13 The FPGA circuit system 1300 can be configured or structured at least one of the following to perform operations / functions simultaneously and / or serially. Furthermore, in some examples, Figure 5 Some or all of the circuit systems can be in Figure 12 Implemented within one or more virtual machines or containers running on a microprocessor 1200.

[0131] In some examples, Figure 11 The programmable circuit system 1112 can be in one or more packages. For example, Figure 12 microprocessor 1200 or Figure 13 At least one of the FPGA circuitry systems 1300 may be housed in one or more packages. In some examples, the XPU may be housed in one or more packages. Figure 11 The programmable circuit system 1112 is implemented. For example, the XPU may contain a CPU in a package (e.g., Figure 12 Microprocessor 1200, Figure 13 CPU 1320, etc.), and DSP in another package ( Figure 13 The DSP 1322), the GPU in another package, and the FPGA in yet another package (e.g., Figure 13 FPGA circuit system 1300).

[0132] Although Figure 5 Implementation instructions Figure 1 The example method of controller 105, but Figure 5 One or more of the elements, processes, or apparatus described herein may be combined, divided, rearranged, omitted, eliminated, or implemented in any other way. Furthermore, Figure 1 and 5 The controller 105 can be implemented via standalone hardware or via a combination of hardware, software, and firmware. Therefore, for example, Figure 1 and 5 Any part of the controller 105, or more generally, Figure 1 and 5 Example controller 105 can be implemented by a programmable circuit system in combination with one or more machine-readable instructions (e.g., firmware or software), processor circuit system, analog circuitry, digital circuitry, logic circuitry, programmable processor, programmable microcontroller, graphics processing unit (GPU), digital signal processor (DSP), ASIC, programmable logic device (PLD), or field-programmable logic device (FPLD) such as FPGA. Furthermore, Figure 1 and 5 Example controller 105 may include, in addition to Figure 5 It may include one or more elements, processes or devices other than or in place of those described herein, or may include more than one of any or all of the described elements, processes and devices.

[0133] Figure 6 , 7 The flowchart shown in Figure 9 represents an implementation that can be executed by a programmable circuit system to at least perform the following tasks. Figure 1 and 5The controller 105 or example machine-readable instructions that instantiate at least one of the controllers, or indicate that they can be executed by a programmable circuit system to at least perform the implementation. Figure 1 and 5 The example operation of controller 105 or instantiating at least one of the controllers. Machine-readable instructions may be used for, for example, in conjunction with, the following Figure 11 The example processor platform 1100 described herein illustrates a programmable circuit system such as programmable circuit system 1112 that executes one or more executable programs or portions thereof, and may be derived from the following description. Figure 12 and 13 The described example programmable circuit system (e.g., FPGA) performs one or more functions or portions of functions. In some examples, machine-readable instructions cause operations, tasks, etc., to be performed or executed automatically in the real world. As used herein, “automatic” means without human intervention.

[0134] The program may be embodied in instructions (e.g., software and / or firmware) stored on one or more non-transitory computer-readable and / or machine-readable storage media, such as cache memory, magnetic storage devices or disks (e.g., floppy disks, hard disk drives (HDDs), etc.), optical storage devices or disks (e.g., Blu-ray discs, compact discs (CDs), digital versatile optical discs (DVDs), etc.), redundant arrays of independent disks (RAID), registers, ROM, solid-state drives (SSDs), SSD memory, non-volatile memory (e.g., electrically erasable programmable read-only memory (EEPROM), flash memory, etc.), volatile memory (e.g., random access memory (RAM) of any type), or any other storage device or storage disk, or a combination thereof. The instructions on the non-transitory computer-readable and / or machine-readable media may be programmed or executed by a programmable circuit system located in one or more hardware devices, but the entire program or a portion thereof may alternatively be executed or instantiated by one or more hardware devices other than the programmable circuit system, or embodied in dedicated hardware. Machine-readable instructions may be distributed across multiple hardware devices or executed by two or more hardware devices (e.g., server and client hardware devices). For example, client hardware devices may be implemented by endpoint client hardware devices (e.g., hardware devices associated with human users and / or machine users) or intermediate client hardware device gateways (e.g., radio access networks (RAN)) that facilitate communication between the server and endpoint client hardware devices. Similarly, non-transitory computer-readable storage media may comprise one or more media. Furthermore, although references... Figure 6 , 7 The flowcharts in section 9 illustrate the example program, but alternatively, implementations can be used. Figure 1 and 5Many other methods exist for the example controller 105. For example, the execution order of the flowchart blocks may be changed, or some of the described blocks may be altered, eliminated, or combined. Alternatively or additionally, any or all blocks of the flowchart may be implemented by one or more hardware circuits (e.g., processor circuitry, discrete, integrated analog and / or digital circuitry, FPGA, ASIC, comparator, operational amplifier, logic circuitry, etc.) structured to perform corresponding operations without executing software or firmware. Programmable circuitry may be distributed across different network locations or local to one or more hardware devices (e.g., a single-core processor (e.g., a single-core CPU), a multi-core processor (e.g., a multi-core CPU, XPU, etc.)). As used herein, programmable circuitry includes any type of circuitry, such as one or a combination of a CPU or FPGA, that can be programmed to perform a desired function. Programmable circuit systems may include one or more CPUs and / or one or more FPGAs located in the same package (e.g., the same integrated circuit (IC) package or two or more separate housings), one or more CPUs or FPGAs in a single machine, one or more CPUs or FPGAs distributed across multiple servers in a server rack, or multiple processors distributed across one or more server racks. Alternatively or additionally, programmable circuit systems may include programmable logic devices (PLDs), general-purpose array logic (GAL) devices, programmable array logic (PAL) devices, complex programmable logic devices (CPLDs), simple programmable logic devices (SPLDs), microcontrollers (MCUs), programmable system-on-chip (PSoCs), etc., or any combination thereof in any context described above.

[0135] The machine-readable instructions described herein can be stored in one or more of the following formats: compressed format, encrypted format, segmented format, compiled format, executable format, and packaged format. The machine-readable instructions described herein can be stored as data (e.g., computer-readable data, machine-readable data, one or more bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), bit streams (e.g., computer-readable bit streams, machine-readable bit streams, etc.)) or data structures (e.g., as parts of instructions, code, representations of code, etc.) that can be used to create, manufacture, or produce machine-executable instructions. For example, machine-readable instructions can be segmented and stored on one or more storage devices, disks, or computing devices (e.g., servers) located at the same or different locations within a network or network set (e.g., in the cloud, at an edge device, etc.). Machine-readable instructions may require one or more of the following to be installed, modified, adapted, updated, combined, supplemented, configured, decrypted, decompressed, unpacked, distributed, redistributed, compiled, etc., so that they can be directly read, interpreted, or executed by a computing device or other machine. For example, machine-readable instructions may be stored in multiple parts, which are individually compressed, encrypted, or stored on separate computing devices, and which, when decrypted, decompressed, or combined, form a set of one or more computer-executable or machine-executable instructions, the implementation of which together form one or more functions or operations of a program, such as those described herein.

[0136] In another example, machine-readable instructions may be stored in a state that can be read by a programmable circuit system, but require the addition of libraries (e.g., dynamic link libraries (DLLs)), software development kits (SDKs), application programming interfaces (APIs), etc., to execute the machine-readable instructions on a specific computing device or other device. In another example, machine-readable instructions may need to be configured (e.g., storing settings, input data, recording network addresses, etc.) before the machine-readable instructions or their corresponding programs can be executed in whole or in part. Therefore, as used herein, machine-readable, computer-readable, or machine-readable media may contain one or a combination of instructions and programs, regardless of the specific format or state of the machine-readable instructions or programs.

[0137] The machine-readable instructions described in this article can be represented by any past, present, or future instruction language, scripting language, programming language, etc. For example, machine-readable instructions can be represented using any of the following languages: C, C++, Java, C-Sharp, Perl, Python, JavaScript, Hypertext Markup Language (HTML), Structured Query Language (SQL), Swift, etc.

[0138] As mentioned above, Figure 6 , 7The example operations in section 9 can be implemented using executable instructions (e.g., computer-readable and / or machine-readable instructions) stored on one or more non-transitory computer-readable or machine-readable media. As used herein, the terms non-transitory computer-readable medium, non-transitory computer-readable storage medium, non-transitory machine-readable medium, and non-transitory machine-readable storage medium are expressly defined to include any type of computer-readable storage device or disk, excluding propagation signals and transmission media. Examples of such non-transitory computer-readable media, non-transitory computer-readable storage media, non-transitory machine-readable media, or non-transitory machine-readable storage media include optical storage devices, magnetic storage devices, HDDs, flash memory, read-only memory (ROM), CDs, DVDs, caches, any type of RAM, registers, or any other storage device or disk in which information is stored for any duration (e.g., extended time period, permanent, short time, temporary buffer, cached information). As used herein, the terms "non-transitory computer-readable storage device" and "non-transitory machine-readable storage device" are defined as comprising any physical (mechanical, magnetic, electromechanical, or electrical) hardware designed to retain information for a period of time, excluding the propagation of signals and the transmission medium. Examples of non-transitory computer-readable storage devices or non-transitory machine-readable storage devices include one or a combination of any type of random access memory, any type of read-only memory, solid-state memory, flash memory, optical disk, magnetic disk, disk drive, or redundant array of independent disks (RAID) system. As used herein, the term "device" refers to a physical structure, such as one or a combination of mechanical, electromechanical, or electrical equipment, hardware, or circuitry, which may or may not be configured or manufactured to execute computer-readable instructions, machine-readable instructions, etc.

[0139] "Comprising" and "including" (and all their forms and tenses) are used herein as open terms. Therefore, whenever a claim uses any form of "comprising" or "including" (e.g., comprising, comprising, having, etc.) as a preamble or in any type of claim statement, additional elements, terms, etc., may be present without exceeding the scope of the corresponding claim or reference. As used herein, the phrase "at least" is open in the same way as the terms "comprising" and "including" are open when used as a transitional term, for example, in the preamble of a claim. The term "and / or," when used in the form of, for example, A, B, and / or C, refers to any combination or subset of A, B, and C, such as (1) only A, (2) only B, (3) only C, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing structures, components, projects, objects, and things, the phrase “at least one of A and B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, projects, objects, and things, the phrase “at least one of A or B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the conduct or execution of processes, instructions, actions, activities, etc., the phrase “at least one of A and B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the conduct or execution of processes, instructions, actions, activities, etc., the phrase “at least one of A or B” means an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0140] As used herein, singular quotations (e.g., “a,” “an,” “first,” “second,” etc.) do not exclude plurals. As used herein, the term “a” or “an” refers to one or more of the objects mentioned. The terms “a” (or “an”), “one or more,” and “at least one” are used interchangeably herein. Furthermore, although listed separately, multiple components, elements, or actions may be performed by, for example, the same entity or object. Additionally, although individual features may be included in different examples or claims, these features may be combined, and their inclusion in different examples or claims does not imply that at least one of the combinations of features is unfeasible or disadvantageous.

[0141] As used herein, unless otherwise stated, the term "above" describes the relationship of two parts relative to the earth. The first part is above the second part if the second part has at least one portion between the earth and the first part. Similarly, as used herein, the first part is "below" the second part when the first part is closer to the earth than the second part. As noted above, the first part may be above or below the second part, accompanied by one or more of the following: there are other parts between them; there are no other parts between them; the first and second parts are in contact; or the first and second parts are not in direct contact with each other.

[0142] As used in this patent, stating that any part (e.g., layer, film, region, area or plate) is on another part in any way (e.g., positioned on it, located on it, disposed on it or formed on it, etc.) indicates that the mentioned part is in contact with the other part, or that the mentioned part is above the other part and has one or more intermediate parts therebetween.

[0143] As used herein, unless otherwise indicated, a connection reference (e.g., attachment, coupling, connection, and joining) may include an intermediate part between elements referenced by a connection reference between those elements or by at least one of the elements in relative movement. Thus, a connection reference does not necessarily imply that two elements are directly connected or fixed to each other. As used herein, a statement that any part is "in contact" with another part is defined to mean that there is no intermediate part between the two parts.

[0144] Unless otherwise specifically stated, descriptive terms such as “first,” “second,” and “third” are used herein without intending or otherwise indicating any meaning of priority, physical order, arrangement, or sorting in the list, but merely as markers or at least one of any name to distinguish elements in order to facilitate understanding of the described examples. In some examples, the descriptive term “first” may be used to refer to an element in a particular embodiment, while the same element may be referred to in the claims by different descriptive terms such as “second” or “third.” In such cases, such descriptive terms are used only to clearly identify elements, such as those that may have the same name within the context of the discussion (e.g., within the claims).

[0145] As used herein, “approximately” and “about” modify their objects / values ​​to identify the potential for variation in real-world applications. For example, “approximately” and “about” may modify dimensions that may be imprecise due to at least one of manufacturing tolerances or other real-world defects. For example, unless otherwise specified herein, “approximately” and “about” may indicate that such dimensions are within a tolerance of + / - 10%.

[0146] As used herein, the phrase “communication” (including variations thereof) includes one or a combination of direct communication or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication or continuous communication, but also includes selective communication at at least one of periodic intervals, scheduled intervals, non-periodic intervals or one-off events.

[0147] As used herein, a “programmable circuit system” is defined to include at least one of the following: (i) one or more special-purpose circuits (e.g., application-specific integrated circuits (ASICs)) structured to perform specific operations and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors); or (ii) one or more general-purpose semiconductor-based circuits programmable with instructions to perform one or more specific functions or operations and including one or more semiconductor-based logic devices (e.g., electronic hardware implemented by one or more transistors). Examples of programmable circuit systems include programmable microprocessors, such as: a central processing unit (CPU) capable of executing first instructions to perform one or more operations or functions; a field-programmable gate array (FPGA) programmable with second instructions to configure or structure at least one of the FPGAs, thereby instantiating one or more operations or functions corresponding to the first instructions; a graphics processing unit (GPU) capable of executing first instructions to perform one or more operations or functions; a digital signal processor (DSP) capable of executing first instructions to perform one or more operations or functions; an XPU; a network processing unit (NPU); one or more microcontrollers capable of executing first instructions to perform one or more operations or functions; or an integrated circuit, such as an application-specific integrated circuit (ASIC). For example, an XPU can be implemented by a heterogeneous computing system that includes various types of programmable circuit systems (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and any combination thereof) and configuration technologies (e.g., application programming interfaces (APIs) that can assign computing tasks to any one or more types of programmable circuit systems that are suitable and can be used to perform computing tasks).

[0148] As used herein, an integrated circuit / circuit system is defined as one or more semiconductor packages that contain one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit can be implemented as one or more of an ASIC, FPGA, chip, microchip, programmable circuit system, semiconductor substrate coupling multiple circuit elements, system-on-a-chip (SoC), etc.

[0149] In this specification, the term "coupling" may encompass a connection, link, or signal path that achieves a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in the first example, device A is coupled to device B via a direct connection; or (b) in the second example, device A is coupled to device B via an intermediate component C, provided that the intermediate component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.

[0150] A device “configured to” perform a task or function may be configured (e.g., programmed or hardwired at least) to perform the function during manufacturing by the manufacturer, or may be configured (or reconfigurable) by the user after manufacturing to perform the function or at least other additional or alternative functions. The configuration may be performed by at least one of the device’s firmware or software programming, by at least one of the device’s hardware components and interconnect structure construction or layout, or by a combination thereof.

[0151] As used herein, the terms “terminal,” “node,” “interconnection structure,” “pin,” and “lead” are used interchangeably. Unless otherwise specified, these terms are generally used to refer to interconnection structures or their ends between device elements, circuit elements, integrated circuits, devices, or other electronic or semiconductor components.

[0152] In the specification and claims, the described "circuit system" may comprise one or more circuits. A circuit or device described herein as including certain components may be substantially adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as comprising one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., one or a combination of resistors, capacitors, or inductors), or one or more sources (e.g., voltage sources and / or current sources) may substantially comprise only the semiconductor element within a single physical device (e.g., at least one of a semiconductor die or an integrated circuit (IC) package), and may be adapted to be coupled at manufacturing time or after manufacturing time, for example by at least one of an end user or a third party, to at least some of the passive elements or sources to form the described structure.

[0153] The circuits described herein can be reconfigured to include replacement components to provide functionality at least partially similar to that available before the component replacement. Unless otherwise stated, components shown as resistors generally represent any one or more elements coupled in at least one of series or parallel connections to provide the impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component can be replaced with multiple resistors or capacitors respectively coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component can be replaced with multiple resistors or capacitors respectively coupled in series between the same two nodes as the single resistor or capacitor. While some elements in the described examples are included in the integrated circuit and others are outside the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. Additionally, some or all features described as outside the integrated circuit may be included in the integrated circuit, and some features described as inside the integrated circuit may be incorporated outside the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are at least one of the following: (i) incorporated in / above a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated in the same module; or (iv) incorporated in / on the same printed circuit board.

[0154] The use of the phrase “ground” in the foregoing description includes at least one of chassis ground, ground wire ground, floating ground, virtual ground, digital ground, common ground, or any other form of grounding connection applicable to or suited to the teachings of this description. Unless otherwise stated, “about,” “approximately,” or “substantially” preceding a value indicates + / - 10% of said value, or, if the value is zero, a reasonable range of values ​​near zero.

[0155] Modifications may be made to the described embodiments, and other embodiments within the scope of the claims are possible.

Claims

1. An apparatus comprising: A transconducting circuit system that has inputs and outputs; A first capacitor, which has terminals; An amplifier having an input and an output, the input of the amplifier being coupled to the output of the transconductance circuit system and the terminal of the first capacitor; A resistor having a first terminal and a second terminal; as well as A second capacitor has a first terminal and a second terminal, the first terminal of the second capacitor being coupled to the output of the amplifier and the first terminal of the resistor, and the second terminal of the second capacitor being coupled to the input of the transconductance circuit system and the second terminal of the resistor.

2. The device of claim 1, wherein the amplifier is a first amplifier, the resistor is a first resistor, and the transconductance circuit system comprises: A second amplifier, which has an output; A second resistor has a first terminal and a second terminal, the first terminal of the second resistor being coupled to the output of the second amplifier, and the second terminal of the second resistor being coupled to the second terminal of the first resistor and the second terminal of the second capacitor; as well as A current source circuit system having an output coupled to the terminal of the first capacitor and the input of the first amplifier.

3. The device of claim 1, wherein the resistor is a first resistor, and the device further includes a second resistor having a terminal coupled to the input of the transconductance circuit system, a second terminal of the first resistor, and a second terminal of the second capacitor.

4. The device according to claim 3, further comprising: A third resistor has a first terminal and a second terminal, the first terminal of the third resistor being coupled to the input of the transconductance circuit system, the second terminal of the first resistor, the second terminal of the second capacitor, and the terminal of the second resistor; as well as A third capacitor has a terminal coupled to the second terminal of the third resistor.

5. The device of claim 1, wherein the input of the transconductance circuit system is a first input, the transconductance circuit system further has a second input and a control input, the second capacitor further has a control input, and the device further includes a controller circuit system having a first output, a second output and a third output, the first output of the controller circuit system being coupled to the second input of the transconductance circuit system, the second output of the controller circuit system being coupled to the control input of the transconductance circuit system, and the third output of the controller circuit system being coupled to the control input of the second capacitor.

6. The device of claim 5, wherein the controller circuit system comprises: A signal generator circuit system that has an output; A digital-to-analog converter (DAC) having an input and an output, the output of the DAC being coupled to the second input of the transconductance circuit system; The first voltage swing circuit system has input and output; as well as A second voltage swing circuit system has an input and an output, wherein the input of the second voltage swing circuit system is coupled to the output of the signal generator circuit system, the input of the DAC and the input of the first voltage swing circuit system, and the output of the second voltage swing circuit system is coupled to the output of the first voltage swing circuit system and the control input of the transconductance circuit system.

7. The device according to claim 1, further comprising: A transducer having terminals; A switching circuit system having a first terminal and a second terminal, wherein the first terminal of the switching circuit system is coupled to the output of the amplifier, the first terminal of the resistor, the first terminal of the second capacitor, and the transducer; as well as An analog front-end AFE circuit system having an input coupled to the second terminal of the switching circuit system.

8. An apparatus comprising: A transconducting circuit system that has inputs and outputs; A first capacitor, which has terminals; An amplifier having an input and an output, the input of the amplifier being coupled to the output of the transconductance circuit system and the terminal of the first capacitor; A first resistor having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the output of the amplifier; The second resistor has terminals; A third resistor has a first terminal and a second terminal, the first terminal of the third resistor being coupled to the input of the transconductance circuit system, the second terminal of the first resistor, and the terminal of the second resistor; as well as The second capacitor has a terminal coupled to the second terminal of the third resistor.

9. The device of claim 8, wherein the amplifier is a first amplifier, and the transconductance circuit system comprises: A second amplifier, which has an output; A fourth resistor having a first terminal and a second terminal, the first terminal of the fourth resistor being coupled to the output of the second amplifier, and the second terminal of the fourth resistor being coupled to the second terminal of the first resistor, the terminal of the second resistor, and the first terminal of the third resistor; and A current source circuit system having an output coupled to the terminal of the first capacitor and the input of the first amplifier.

10. The device of claim 8, further comprising a third capacitor having a first terminal and a second terminal, the first terminal of the third capacitor being coupled to the output of the amplifier and the first terminal of the first resistor, the second terminal of the third capacitor being coupled to the second terminal of the first resistor, the terminal of the second resistor and the first terminal of the third resistor.

11. The device of claim 8, wherein the input of the transconductance circuit system is a first input, the transconductance circuit system further has a second input and a control input, the third resistor further has a control input, the second capacitor further has a control input, and the device further includes a controller circuit system having a first output, a second output, a third output and a fourth output, the first output of the controller circuit system being coupled to the second input of the transconductance circuit system, the second output of the controller circuit system being coupled to the control input of the transconductance circuit system, the third output of the controller circuit system being coupled to the control input of the third resistor, and the fourth output of the controller circuit system being coupled to the control input of the second capacitor.

12. The device of claim 11, wherein the controller circuitry comprises: A signal generator circuit system that has an output; A digital-to-analog converter (DAC) having an input and an output, the output of the DAC being coupled to the second input of the transconductance circuit system; The first voltage swing circuit system has input and output; as well as A second voltage swing circuit system has an input and an output, wherein the input of the second voltage swing circuit system is coupled to the output of the signal generator circuit system, the input of the DAC and the input of the first voltage swing circuit system, and the output of the second voltage swing circuit system is coupled to the output of the first voltage swing circuit system and the control input of the transconductance circuit system.

13. The device according to claim 8, further comprising: A transducer having terminals; A switching circuit system having a first terminal and a second terminal, the first terminal of the switching circuit system being coupled to the output of the amplifier, the first terminal of the first resistor, the first terminal of the second capacitor, and the transducer; as well as An analog front-end AFE circuit system having an input coupled to the second terminal of the switching circuit system.

14. An apparatus comprising: A transconducting circuit system that has inputs and outputs; An amplifier having an input and an output, wherein the input of the amplifier is coupled to the output of the transconductance circuit system; A first resistor having a first terminal and a second terminal; A first capacitor has a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the output of the amplifier and the first terminal of the first resistor; A second resistor having a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the input of the transconductance circuit system, the second terminal of the first resistor and the second terminal of the first capacitor; as well as The second capacitor has a terminal coupled to the second terminal of the second resistor.

15. The device of claim 14, further comprising a third capacitor having terminals coupled to the output of the transconductance circuit system and the input of the amplifier.

16. The device of claim 15, wherein the amplifier is a first amplifier, and the transconductance circuit system comprises: A second amplifier, which has an output; A third resistor having a first terminal and a second terminal, the first terminal of the third resistor being coupled to the output of the second amplifier, and the second terminal of the third resistor being coupled to the second terminal of the first resistor and the first terminal of the second resistor; and A current source circuit system having an output coupled to the terminal of the third capacitor and the input of the first amplifier.

17. The device of claim 14, further comprising a third resistor having a terminal coupled to the input of the transconductance circuit system, a second terminal of the first resistor, a second terminal of the first capacitor, and a terminal of the first terminal of the second resistor.

18. The device of claim 14, wherein the input of the transconductance circuit system is a first input, the transconductance circuit system further has a second input and a control input, the second resistor further has a control input, the second capacitor further has a control input, and the device further includes a controller circuit system having a first output, a second output, a third output, and a fourth output, the first output of the controller circuit system being coupled to the second input of the transconductance circuit system, the second output of the controller circuit system being coupled to the control input of the transconductance circuit system, the third output of the controller circuit system being coupled to the control input of the second resistor, and the fourth output of the controller circuit system being coupled to the control input of the second capacitor.

19. The device of claim 18, wherein the controller circuitry comprises: A signal generator circuit system that has an output; A digital-to-analog converter (DAC) having an input and an output, the output of the DAC being coupled to the second input of the transconductance circuit system; A first voltage swing circuit system has an input, a first output, a second output, and a third output; as well as A second voltage swing circuit system has an input, a first output, a second output, and a third output. The input of the second voltage swing circuit system is coupled to the output of the signal generator circuit system, the input of the DAC, and the input of the first voltage swing circuit system. The first output of the second voltage swing circuit system is coupled to the first output of the first voltage swing circuit system and the control input of the transconductance circuit system. The second output of the second voltage swing circuit system is coupled to the second output of the first voltage swing circuit system and the control input of the second resistor. The third output of the second voltage swing circuit system is coupled to the third output of the first voltage swing circuit system and the control input of the second capacitor.

20. The device according to claim 14, further comprising: A transducer having terminals; A switching circuit system having a first terminal and a second terminal, wherein the first terminal of the switching circuit system is coupled to the output of the amplifier, the first terminal of the first resistor, the first terminal of the first capacitor, and the transducer; as well as An analog front-end AFE circuit system having an input coupled to the second terminal of the switching circuit system.

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