Power-on reset circuit, method, power module and electronic device

Abstract

This application provides a power-on reset circuit, method, power module, and electronic device. A reference current is generated by a reference current generation unit, and the reference current and its corresponding temperature are related to the circuit parameters of the reference current generation unit. At the same time, a sampling current is obtained by a power sampling unit. A comparison unit outputs a comparison result signal based on the comparison result of the two. Finally, a shaping unit shapes the comparison result signal to form a reset signal, thereby indicating the power-on state of the power supply. The power-on reset circuit provided in this application uses dynamic comparison between the reference current and the power sampling current to form a reset signal, which can form a reset signal based on a more stable threshold voltage, thus improving the stability of the power-on reset circuit.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a power-on reset circuit, method, power supply module and electronic device. Background Technology

[0002] Power-on reset (POR) circuits are widely used in electronic devices that require power supply stability and system initialization reliability, playing a crucial role, especially in scenarios with low power consumption and high reliability requirements. They can be used to generate a low-level reset signal before the power supply voltage reaches a stable threshold, and release the reset signal after the voltage stabilizes, ensuring that all system modules start up in the expected sequence.

[0003] The power-on reset circuit in the prior art typically includes a MOSFET and a capacitor, and is connected to a power supply. The threshold voltage is formed by the superposition of the gate-source voltage of the MOSFET by the power supply. When the power supply is powered on and the power supply voltage exceeds the threshold, the capacitor charges to the trigger point of the Schmitt trigger, so that the power-on reset circuit outputs a reset signal to indicate the power supply's power-on status.

[0004] However, in the prior art, the threshold voltage of the power-on reset circuit is easily affected by the process and temperature of the MOSFET, resulting in poor stability of the power-on reset circuit. Summary of the Invention

[0005] This application provides a power-on reset circuit, method, power module, and electronic device to improve the stability of the power-on reset circuit operation.

[0006] This application provides a power-on reset circuit, comprising: a reference current generation unit for generating a reference current, wherein the current value of the reference current and its corresponding temperature are related to the circuit parameters of the reference current generation unit; a power supply sampling unit for sampling a power supply sampling current; a comparison unit connected to the reference current generation unit and the power supply sampling unit respectively, for comparing the magnitude of the reference current and the sampling current, and outputting a comparison result signal; and a shaping unit connected to the comparison unit for shaping the comparison result signal to form a reset signal, wherein the reset signal is used to indicate the power-on state of the power supply.

[0007] In one embodiment of the first aspect of this application, the reference current generation unit specifically includes: a first current mirror connected to the power supply and configured to provide a target current to a second current mirror based on the power supply; a second current mirror connected to the first current mirror and configured to operate in subthreshold mode based on the target current to form the reference current on a first resistor; and a first resistor having one end connected to the second current mirror and the other end grounded and configured to form the reference current.

[0008] In one embodiment of the first aspect of this application, the first current mirror includes: a first switching transistor and a second switching transistor, the source of the first switching transistor and the source of the second switching transistor are both connected to the power supply, the gate of the first switching transistor and the gate of the second switching transistor are connected, and the drain of the first switching transistor and the drain of the second switching transistor are connected to the second current mirror; the second current mirror includes: a third switching transistor and a fourth switching transistor, the drain of the third switching transistor is connected to the drain of the first switching transistor, the drain of the fourth switching transistor is connected to the drain of the second switching transistor, the gate of the third switching transistor and the gate of the fourth switching transistor are connected, the source of the third switching transistor is grounded, and the source of the fourth switching transistor is grounded through the first resistor.

[0009] In one embodiment of the first aspect of this application, the reference current is specifically related to temperature, the resistance value of the first resistor, the aspect ratio of the third switch, and the aspect ratio of the fourth switch.

[0010] In one embodiment of the first aspect of this application, the reference current can be expressed by the following formula:

[0011]

[0012] Where k is the Boltzmann constant, q is the electron charge, T is the absolute temperature calculated based on the stated temperature, n is a process-related parameter, and R1 is the resistance value of the first resistor. The aspect ratio of the fourth switching transistor is given. The width-to-length ratio of the third switching transistor.

[0013] In one embodiment of the first aspect of this application, the power sampling unit specifically includes: a second resistor, a fifth switch, and a sixth switch, wherein the source of the fifth switch is connected to the power supply, the gate and drain are connected to one end of the second resistor, the other end of the second resistor is connected to the drain and gate of the sixth switch, and the source of the sixth switch is grounded; the sampling current is related to the voltage of the power supply, the gate-source voltage of the fifth switch, the gate-source voltage of the sixth switch, and the resistance value of the second resistor.

[0014] In one embodiment of the first aspect of this application, the sampling current can be expressed by the following formula:

[0015]

[0016] Wherein, VDD is the voltage of the power supply, Vgns is the absolute value of the gate-source voltage of the fifth switch, Vgsp is the absolute value of the gate-source voltage of the sixth switch, and R2 is the resistance value of the second resistor.

[0017] In one embodiment of the first aspect of this application, the comparison unit specifically includes: a seventh switch, the source of which is connected to the power supply, the gate of which is connected to the gates of the first switch and the second switch, and the logic connection of which is connected to the drain of an eighth switch, configured to replicate the reference current; and an eighth switch, the gate of which is connected to the gate of the sixth switch, and the source of which is grounded, configured to replicate the sampling current; wherein the current difference between the drain current of the seventh switch and the drain current of the eighth switch is used to form the comparison result signal.

[0018] In one embodiment of the first aspect of this application, when the sampling current is less than the reference current, and the drain current of the seventh switch is greater than the drain current of the eighth switch, the current difference causes the drains of the seventh and eighth switches to output a first voltage signal indicating that the reference current is greater than the sampling current; when the sampling current is greater than the reference current, and the drain current of the seventh switch is less than the drain current of the eighth switch, the current difference causes the drains of the seventh and eighth switches to output a second voltage signal indicating that the sampling current is greater than the reference current.

[0019] In one embodiment of the first aspect of this application, the shaping unit includes a Schmitt trigger configured to: shape the first voltage signal to form a first reset signal, the first reset signal indicating that the voltage of the power supply is less than a reset threshold; or, shape the second voltage signal to form a second reset signal, the second reset signal indicating that the voltage of the power supply is greater than the reset threshold. In one embodiment of the first aspect of this application, the reset threshold is related to the temperature, the resistance value of the first resistor, the resistance value of the second resistor, the aspect ratio of the third switch, the aspect ratio of the fourth switch, the gate-source voltage of the fifth switch, and the gate-source voltage of the sixth switch.

[0020] In one embodiment of the first aspect of this application, the reset threshold can be expressed by the following formula:

[0021]

[0022] Where k is Boltzmann's constant, q is the electron charge, T is the absolute temperature, n is a process-related parameter, R1 is the resistance of the first resistor, and R2 is the resistance of the second resistor. The aspect ratio of the fourth switching transistor is given. Vgns is the width-to-length ratio of the third switch, Vgsp is the absolute value of the gate-source voltage of the fifth switch, and Vgsp is the absolute value of the gate-source voltage of the sixth switch.

[0023] In one embodiment of the first aspect of this application, the first resistor and the second resistor are variable resistors; the power-on reset circuit further includes: an adjustment unit configured to adjust the resistance values ​​of the first resistor and the second resistor to adjust the reset threshold.

[0024] A second aspect of this application provides a power-on reset method, comprising: generating a reference current, wherein the current value of the reference current and its corresponding temperature are related to the circuit parameters of the reference current generation unit; sampling a power supply current; comparing the magnitudes of the reference current and the sampling current to obtain a comparison result signal; and shaping the comparison result signal to form a reset signal, wherein the reset signal is used to indicate the power-on state of the power supply.

[0025] A third aspect of this application provides a power module including a power-on reset circuit as described in the first aspect of this application.

[0026] A fourth aspect of this application provides an electronic device including a power module as described in a third aspect of this application.

[0027] In summary, the power-on reset circuit, method, power module, and electronic device provided in this application can generate a reference current using a reference current generation unit, making the reference current and its corresponding temperature related to the circuit parameters of the reference current generation unit. Simultaneously, a sampling current is obtained through a power sampling unit. A comparison unit outputs a comparison result signal based on the comparison result, and finally, a shaping unit shapes the comparison result signal to form a reset signal. This reset signal indicates the power-on state of the power supply. Compared to existing power-on reset circuits, which are significantly affected by the MOSFET's manufacturing process and temperature, the power-on reset circuit provided in this application dynamically compares the reference current and the power sampling current to form the reset signal. During the reset signal formation process, the circuit parameters can be adjusted to achieve more precise control of the reset threshold, thereby enabling the formation of a reset signal based on a more stable threshold voltage and improving the stability of the power-on reset circuit. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of a power-on reset circuit in the prior art;

[0030] Figure 2 A schematic diagram of an embodiment of the power-on reset circuit provided in this application;

[0031] Figure 3 A schematic diagram of the circuit structure of an embodiment of the power-on reset circuit provided in this application;

[0032] Figure 4 This is a flowchart illustrating an embodiment of the power-on reset method provided in this application. Detailed Implementation

[0033] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0034] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] Power-on reset (POR) circuits are widely used in electronic devices requiring power stability and system initialization reliability, playing a crucial role, especially in scenarios with low power consumption and high reliability requirements. Typical application scenarios include:

[0036] In the consumer electronics sector, such as smartphones, wearable devices (smartwatches, health monitoring devices), and Internet of Things (IoT) terminals, it is necessary to ensure the stability of the system's power-on reset under conditions of battery voltage fluctuations or low / high temperature environments.

[0037] Industrial control and automation equipment, such as sensor modules, industrial controllers, and PLCs (programmable logic controllers), need to avoid system malfunctions caused by abnormal power supply under complex electromagnetic interference or temperature changes.

[0038] Automotive electronic systems, such as on-board power management units and ECUs (electronic control units), must meet the reliability requirements for transient changes in power supply voltage during vehicle startup.

[0039] Embedded systems and communication devices, such as microcontrollers, FPGAs, and communication modules, need to generate a reset signal quickly when the power is turned on to initialize the sequential logic and analog circuits, preventing the system from entering an uncertain state.

[0040] Specifically, the power-on reset circuit is connected to the power supply and can be used to issue a reset signal, denoted as the power-on reset signal POR, when the power supply is powered on and the voltage exceeds a threshold. This power-on reset signal POR is sent to other analog and digital circuits to ensure that they are effectively reset or enabled based on the power-on reset signal, avoiding intermediate or undefined states that could cause system malfunctions. The analog circuits include reference circuits, detection circuits, comparators, oscillators, etc. The digital circuits, especially sequential logic, include registers, state machines, input / output interfaces, protocol modules, etc.

[0041] As can be seen, in the above scenario, the core function of the power-on reset circuit is to generate a high-level reset signal after the power supply voltage exceeds the threshold, ensuring that each module of the system starts up in the expected order. If the power-on reset circuit is poorly designed, it may lead to system initialization failure, false reset, or excessive power consumption, thereby affecting device performance and user experience.

[0042] Figure 1 This is a schematic diagram of a power-on reset circuit in the prior art, illustrating one implementation of such a circuit, which includes a MOSFET and a capacitor. Specifically, as shown... Figure 1 The power-on reset circuit shown includes PMOS transistor PM3, NMOS transistor NM2, and NMOS transistor NM1, which are connected in series between the power supply and reference ground. This power-on reset circuit uses the sum of the gate-source voltages (VGS) of PMOS transistors PM3, NMOS transistor NM2, and NMOS transistor NM1 to form the power-on reset threshold voltage. When the power supply voltage VDD exceeds this threshold, PMOS transistor PM4 turns on, causing the power supply to charge capacitor C1. When the capacitor voltage of C1 is charged to the trigger point of Schmitt trigger I1, Schmitt trigger I1 outputs a power-on reset signal POR to indicate that power-on is complete. The power-on reset signal POR can be used to trigger subsequent system initialization, enabling the internal system to start and operate normally. This application does not limit the subsequent processing of the power-on reset signal POR.

[0043] However, the threshold voltage of the power-on reset circuit provided in the prior art is easily affected by the process technology and temperature of the MOSFETs and is not adjustable. Specifically, the series connection of multiple MOSFETs leads to a substrate bias effect, causing the threshold voltage to fluctuate significantly with process deviations and temperature changes. For example, at high temperatures, the gate-source voltage of the NMOS transistor decreases, resulting in a lower threshold voltage and potentially triggering a false reset; at low temperatures, the gate-source voltage of the NMOS transistor increases, leading to an increased threshold voltage and potentially failing to release the reset signal in a timely manner. Furthermore, the accuracy and temperature coefficient of the resistors in the power-on reset circuit are difficult to control, further exacerbating the instability of the threshold voltage. Moreover, the threshold voltage in the prior art is directly determined by the parameters of the fixed resistors and MOSFETs, and cannot be dynamically adjusted according to the application scenario. Additionally, the power-on reset circuit provided in the prior art still needs to maintain capacitor charging and Schmitt trigger operation in steady state, and this power consumption increases with the power supply voltage. For low-power devices, this power consumption is unacceptable.

[0044] Based on this, this application provides a power-on reset circuit, method, power module, and electronic device, which solves the shortcomings of the prior art in terms of threshold stability, power consumption, adjustability, and power-on adaptability through current comparison mechanism and subthreshold mode design, thereby improving the stability of the power-on reset circuit and providing a better power management solution for low-power, high-reliability electronic devices.

[0045] The technical solutions of this application will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0046] Figure 2 This is a schematic diagram of an embodiment of the power-on reset circuit provided in this application, as shown below. Figure 2 The power-on reset circuit shown includes:

[0047] The reference current generating unit 101 is used to generate a reference current, wherein the current value of the reference current and its corresponding temperature are related to the circuit parameters of the reference current generating unit 101.

[0048] The power sampling unit 102 is used to sample the power supply current.

[0049] The comparison unit 103 is connected to the reference current generation unit 101 and the power sampling unit 102 respectively. It is used to compare the magnitude of the reference current and the sampled current and output the comparison result signal. In a specific implementation, the comparison result signal can be recorded as the preceding signal of the power-on reset signal POR.

[0050] Shaping unit 104, connected to comparison unit 103, is used to shape the comparison result signal to form a reset signal, wherein the reset signal is used to indicate the power-on state of the power supply.

[0051] Furthermore, Figure 3 A schematic diagram of the circuit structure of an embodiment of the power-on reset circuit provided in this application is shown. Figure 2 The power-on reset circuit provided in this paper is a specific circuit implementation method.

[0052] Specifically, such as Figure 3 The reference current generation unit 101 shown includes a first current mirror 1011, a second current mirror 1012, and a first resistor R1, wherein the first current mirror 1011, the second current mirror 1012, and the first resistor R1 are sequentially connected between a power supply and a reference ground. The first current mirror 1011 is connected to the power supply and is configured to provide a target current to the second current mirror 1012 based on the unit. The first end of the second current mirror 1012 is connected to the first current mirror 1011, and the second end is connected to the first resistor R1. It is configured to actively operate in subthreshold mode with the target current, thereby forming a reference current across the first resistor R1. The first end of the first resistor R1 is connected to the second current mirror, and the second end is connected to the reference ground. It is configured to form a reference current.

[0053] More specifically, the first current mirror 1011 includes a first switching transistor M1 and a second switching transistor M2. The sources of both the first switching transistor M1 and the second switching transistor M2 are connected to a power supply. The gates of both transistors are connected. The drain of the first switching transistor M1 is connected to the source of the third switching transistor M3 in the second current mirror 1012, and the drain of the second switching transistor M2 is connected to the drain of the fourth switching transistor M4 in the second current mirror 1012. The first switching transistors M1 and M2 form a current mirror structure, and the current mirror can achieve a certain scaling ratio of the currents of the first switching transistors M1 and M2. Figure 3 In the example shown, the scaling ratio of the first current mirror 1011 is 1:1.

[0054] The second current mirror 1022 includes a third switch M3 and a fourth switch M4. The drain of the third switch M3 is connected to the drain of the first switch M1, and the drain of the fourth switch M4 is connected to the drain of the second switch M2. The gates of the third switch M3 and the fourth switch M4 are connected and also connected to the drain of the third switch M3. The source of the third switch M3 is grounded, and the source of the fourth switch M4 is grounded through a first resistor R1. Therefore, when the currents flowing through the first switch M1 and the second switch M2 are the same, the third switch M3 and the fourth switch M4 can generate a reference current in subthreshold mode by adjusting their dimensions.

[0055] Specifically, the third switch M3 and the fourth switch M4 in the second current mirror 1022 can generate a reference current on the first resistor R1 by adjusting their size. The temperature coefficient of the generated reference current is a positive temperature coefficient, and the reference current is independent of the power supply voltage.

[0056] Furthermore, subthreshold mode refers to the operating mode of a MOSFET when the gate voltage Vgs is lower than the threshold voltage VT and no conductive channel has been formed; it is also known as the subthreshold region. In this mode, a subthreshold current exists between the source and drain of the MOSFET, formed by the diffusion of minority carriers. Its magnitude is exponentially related to the gate voltage Vgs. Current consumption is very small in this mode, and it is often used in low-power designs.

[0057] In one embodiment, the reference current I1 flowing through the first switch transistor M1 and the reference current I2 flowing through the second switch transistor M2 generated by the reference current generation unit 101 provided in this embodiment are specifically related to the temperature, the resistance value of the first resistor R1, the width-to-length ratio of the third switch transistor M3, and the width-to-length ratio of the fourth switch transistor M4.

[0058] For example, the reference current can be expressed by the following formula:

[0059]

[0060] Where k is Boltzmann constant, q is electron charge, T is absolute temperature calculated based on temperature, n is process-related parameter, and R1 is the resistance value of the first resistor R1. The aspect ratio of the fourth switching transistor M4 is... The aspect ratio of the third switching transistor M3 is given.

[0061] As can be seen from the above formula, the reference current flowing through the first switch M1 and the second switch M2 exhibits a positive temperature coefficient and is independent of the power supply voltage, making it a low-cost, high-quality current source.

[0062] Furthermore, the reference current provided in this embodiment is related to the current ambient temperature of the power-on reset circuit. Temperature t can also be called Celsius temperature, based on the freezing point (0°C) and boiling point (100°C) of water. Absolute temperature T can also be called thermodynamic temperature, with the unit Kelvin (K), starting from absolute zero (0K, approximately -273.15°C), and is the basic temperature unit in the International System of Units (SI). The two can be related through a linear conversion formula, for example, T = t + 273.15. Therefore, in specific calculations, the current ambient temperature can be converted to absolute temperature, and the reference current can be calculated using the above formula. Alternatively, the absolute temperature in the above formula can also be converted to ambient temperature for calculation, and the calculated reference current is the same.

[0063] It should be noted that, as Figure 3 The specific implementation of the reference current unit 101 shown is merely an example. Other possible implementations of the reference current unit 101 may include, but are not limited to, implementations using NMOS, PMOS, NPN, PNP, and combinations thereof, including but not limited to combinations of NMOS and NMOS, NMOS and PMOS, NMOS and NPN, NMOS and PNP, PMOS and NPN, and PMOS and PNP. The current generation method includes, but is not limited to, the results of voltage and resistance effects obtained from various threshold values ​​and their combinations.

[0064] Specifically, such as Figure 3 The power sampling unit 102 shown includes:

[0065] The second resistor R2, the fifth switch M5, and the sixth switch M6. The drain of the sixth switch M6 is connected to the drain of the fifth switch M5 through the second resistor R2. The source of the fifth switch M5 is connected to the power supply, and the drain of the fifth switch M5 is connected to the gate. The source of the sixth switch M6 is connected to the reference ground.

[0066] The gate-source voltages of the fifth switch M5 and the sixth switch M6 generate a sampling current that is positively correlated with the power supply voltage, based on the second resistor R2. In other words, the sampling current is related to the power supply voltage, the gate-source voltages of the fifth switch M5 and the sixth switch M6, and the resistance value of the second resistor R2.

[0067] In one embodiment, the sampling current generated by the power sampling unit 102 provided in this embodiment can be expressed by the following formula:

[0068]

[0069] Where VDD is the power supply voltage, Vgns is the absolute value of the gate-source voltage of the fifth switch M5, Vgsp is the absolute value of the gate-source voltage of the sixth switch M6, and R2 is the resistance value of the second resistor R2.

[0070] When the absolute values ​​of the gate-source voltages of the fifth switch M5 (Vgns) and the sixth switch M6 (Vgsp) are both negative temperature coefficients and in the subtractive position, the sampling current generated by the power supply sampling unit 102 exhibits a positive temperature coefficient.

[0071] It should be noted that, as Figure 3The specific implementation of the current sampling unit 102 shown is merely an example. Other possible implementations of the current sampling unit 102 may include, but are not limited to, implementations using NMOS, PMOS, NPN, PNP, and combinations thereof, including but not limited to combinations of NMOS and NMOS, NMOS and PMOS, NMOS and NPN, NMOS and PNP, PMOS and NPN, and PMOS and PNP. The current generation method includes, but is not limited to, the results of voltage and resistance effects obtained from various threshold values ​​and their combinations.

[0072] Specifically, such as Figure 3 The comparison unit 103 shown includes:

[0073] The seventh switch M7 and the eighth switch M8 are provided. The gate of the seventh switch M7 is connected to the gate of the first switch M1 and the gate of the second switch M2. The source of the seventh switch M7 is connected to the power supply. The drain of the seventh switch M7 is connected to the drain of the eighth switch M8. The source of the eighth switch M8 is connected to the reference ground. The gate of the eighth switch M8 is connected to the gate of the sixth switch M6.

[0074] The seventh switch M7 can be used to scale the reference current provided by the first switch M1 and the second switch M2 based on the current mirror structure, thereby achieving proportional adjustment of the reference current. The current mirror formed by the seventh switch M7 can be set with a certain scaling factor. In this embodiment, the scaling factor is 1 as an example.

[0075] The eighth switch M8 can be used to form a current mirror structure with the sixth switch M6, and based on the current mirror structure, the sampling current provided by the power sampling unit 102 is scaled proportionally to achieve proportional adjustment of the sampling current. The current mirror formed by the eighth switch M8 can be set with a certain scaling factor. In this embodiment, the scaling factor is 1 as an example.

[0076] Furthermore, the seventh switch M7 and the eighth switch M8 form a comparator, with the current on the seventh switch M7 used to characterize the reference current and the current on the eighth switch M8 used to characterize the sampling current.

[0077] When the sampling current is greater than the reference current, it indicates that the power supply voltage VDD is greater than the power-on reset voltage threshold. At this time, the drain current of the seventh switch M7 is greater than the drain current of the eighth switch M8. The current difference between the drain currents of the seventh switch M7 and the eighth switch M8 causes the drains of the seventh switch M7 and the eighth switch M8 to output a first voltage signal to the shaping unit 104. The first voltage signal is used to indicate that the reference current is greater than the sampling current. For example, the first voltage signal can be a high-level signal.

[0078] When the sampling current is less than the reference current, it indicates that the power supply voltage VDD is less than the power-on reset voltage. At this time, the drain current of the seventh switch M7 is less than the drain current of the eighth switch M8. The current difference between the drain currents of the seventh switch M7 and the eighth switch M8 causes the drains of the seventh switch M7 and the eighth switch M8 to output a second voltage signal to the shaping unit 104. The second voltage signal is used to indicate that the sampling current is greater than the reference current. For example, the second voltage signal can be a low-level signal.

[0079] It should be noted that, as Figure 3 The specific implementation of the comparison unit 103 shown is merely an example. Other possible implementations of the comparison unit 103 may include, but are not limited to, implementations using NMOS, PMOS, NPN, PNP, and improved / extended structures by adding resistors. Any method of current replication is within the scope of this invention. The comparison methods in the comparison unit 103 between the reference current and the sampled current include, but are not limited to, implementations nested within a current replication unit, a reference current unit, or a power sampling unit; implementations using completely independent comparators; and implementations that compare relevant signals after single or multiple conversions.

[0080] Specifically, such as Figure 3 The shaping unit 104 shown includes a Schmitt trigger, which can be used to shape the high-level or low-level reset signal provided by the comparator unit 103 to eliminate critical oscillation. The hysteresis of the Schmitt trigger ensures that the comparator will not oscillate at the critical value, thus preventing signal oscillation from causing disorder in the system control logic. It should be noted that, as... Figure 3 The specific implementation of the shaping unit 104 shown is only an example. In other possible implementations, the shaping unit 104 may also include, but is not limited to, using a Schmitt trigger, using an RC filter shaping network, or using a delay circuit.

[0081] In one embodiment, when a first voltage signal is received from the comparison unit 103, the shaping unit 104 can be used to shape the first voltage signal to form a first reset signal, wherein the first reset signal is used to indicate that the voltage of the power supply is less than a reset threshold.

[0082] When the second voltage signal sent by the comparison unit 103 is received, the shaping unit 104 can be used to shape the second voltage signal to form a second reset signal, wherein the second reset signal is used to indicate that the voltage of the power supply is greater than the reset threshold.

[0083] In one embodiment, the reset threshold provided in this embodiment is related to temperature, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the width-to-length ratio of the third switch M3, the width-to-length ratio of the fourth switch M4, the gate-source voltage of the fifth switch M5, and the gate-source voltage of the sixth switch M6.

[0084] For example, the reset threshold can be expressed by the following formula:

[0085]

[0086] Where k is Boltzmann's constant, q is the electron charge, T is the absolute temperature calculated from the temperature, n is a process-related parameter, R1 is the resistance value of the first resistor R1, and R2 is the resistance value of the second resistor R2. The aspect ratio of the fourth switching transistor M4 is... Vgns is the width-to-length ratio of the third switch M3, Vgns is the absolute value of the gate-source voltage of the fifth switch M5, and Vgsp is the absolute value of the gate-source voltage of the sixth switch M6.

[0087] As can be seen from the above formula, the voltage threshold for power-on reset formed by the comparison unit 103 can be adjusted by adjusting the ratio of R2 / R1 to regulate its temperature coefficient, thereby achieving the goal of zero temperature coefficient.

[0088] In one specific implementation of this application, combined with Figure 3 In the circuit structure shown, both the first resistor R1 and the second resistor R2 can be variable resistors. Therefore, the power-on reset circuit can also include an adjustment unit, which can be used to adjust the resistance values ​​of the first resistor R1 and the second resistor R2, thereby adjusting the power-on reset voltage threshold in the power-on reset circuit.

[0089] For example, the adjustment unit is configured to receive external commands and dynamically adjust the ratio of the first resistor R1 and the second resistor R2 to adjust the reset threshold. For instance, in a low-temperature environment, the adjustment unit can increase the R2 / R1 ratio to compensate for the decrease in the negative temperature coefficient of Vgsn / Vgsp by increasing the reference current, ensuring the stability of the POR threshold. This solves the problem of the threshold being unadjustable due to fixed resistors in traditional power-on reset circuits. By adjusting the resistor ratio in real time, it can adapt to the needs of different application scenarios such as high and low voltage power supply and high and low temperature environments.

[0090] In summary, the power-on reset circuit provided in this application embodiment can generate a reference current by a reference current generation unit 101, making the reference current and its corresponding temperature related to the circuit parameters of the reference current generation unit. Simultaneously, a sampling current is obtained by a power supply sampling unit 102. A comparison unit 103 outputs a comparison result signal based on the comparison result, and finally, a shaping unit 104 shapes the comparison result signal to form a reset signal. This reset signal indicates the power-on state of the power supply. Compared to existing power-on reset circuits, which are significantly affected by the MOSFET's manufacturing process and temperature, the power-on reset circuit provided in this application embodiment dynamically compares the reference current and the power supply sampling current to form the reset signal. During the reset signal formation process, the circuit parameters can be adjusted to achieve more precise control of the reset threshold, thereby enabling the formation of a reset signal based on a more stable threshold voltage and improving the stability of the power-on reset circuit.

[0091] Furthermore, the power-on reset circuit provided in this application embodiment can flexibly control the reset threshold by adjusting the width-to-length ratio of the MOS transistor in the reference current unit 101, thereby solving the instability problem caused by reset threshold changes due to process deviations and temperature drift in traditional power-on reset circuits. It also directly correlates the sampling current collected by the power sampling unit 102 with the power supply voltage and utilizes the negative temperature coefficient of the MOS transistor (Vgsn / Vgsp) to make the sampling current exhibit negative temperature characteristics, thus solving the problem of mismatch between the temperature characteristics of the sampling current and the reference current caused by temperature changes in traditional power-on reset circuits. Moreover, by combining the negative temperature coefficient of the sampling current with the positive temperature coefficient of the reference current and adjusting the ratio R2 / R1 of the second resistor to the first resistor, the temperature characteristics of the two can be canceled out, thereby generating a power-on reset voltage threshold with near-zero temperature drift.

[0092] The reference current provided by the reference current unit 101 is decoupled from the power supply voltage and incorporates a positive temperature coefficient design to offset the negative temperature coefficient of the power supply sampling current, achieving a near-zero temperature drift voltage threshold for power-on reset, thereby effectively ensuring the stability of the power-on reset circuit. Furthermore, the power-on reset circuit provided in this application exhibits less variation with process variations compared to conventional power-on reset circuits. Conventional power-on reset circuits typically involve a superposition of Vgs and resistor voltage, which varies significantly with process deviations. The power-on reset circuit provided in this application uses a superposition of Vgs and a process-independent voltage constant, resulting in less fluctuation with process deviations.

[0093] Furthermore, since the MOS transistor in the reference current generation unit 101 of the power-on reset circuit provided in this application embodiment can operate in subthreshold mode, the MOS transistor can still conduct when the gate voltage is lower than the threshold voltage, and the current consumption is extremely low, which can also significantly reduce the static power consumption of the power-on reset circuit. Figure 3 Taking the circuit result shown as an example, the power-on reset circuit can achieve a power consumption in the range of tens to hundreds of nA, which is much lower than that of a normal power-on reset circuit, whose power consumption is in the range of uA.

[0094] Furthermore, the power-on reset circuit provided in this application can be implemented using DC, which is different from the AC coupling method used in the prior art power-on reset circuit, which only guarantees that a reset signal can be issued when the power-on is powered on quickly, and the system function is abnormal under slow power-on conditions. This application can guarantee that a correct reset signal can be issued under both slow and fast power-on conditions.

[0095] Figure 4 A flowchart illustrating an embodiment of the power-on reset method provided in this application is shown below. Figure 4 As shown, the power-on reset method provided in this application can be applied to, for example... Figure 2 The power-on reset circuit shown includes:

[0096] S101: Generate a reference current, wherein the current value of the reference current and its corresponding temperature are related to the circuit parameters of the reference current generation unit 101.

[0097] S102: Sample the current of the power supply.

[0098] S103: Compare the magnitudes of the reference current and the sampled current to obtain the comparison result signal.

[0099] S104: The comparison result signal is shaped to form a reset signal, which is used to indicate the power-on status of the power supply.

[0100] This application also provides a power module, including a power-on reset circuit as provided in any of the foregoing embodiments of this application.

[0101] This application also provides an electronic device, including a power module as provided in any of the foregoing embodiments of this application, the power module including a power-on reset circuit as provided in any of the foregoing embodiments of this application.

[0102] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A power-on reset circuit, characterized in that, include: A reference current generation unit is used to generate a reference current. The current value of the reference current and its corresponding temperature are related to the circuit parameters of the reference current generation unit. The power sampling unit is used to sample the power supply current. The comparison unit is connected to the reference current generation unit and the power sampling unit respectively, and is used to compare the magnitude of the reference current and the sampled current, and output the comparison result signal; A shaping unit, connected to the comparison unit, is used to shape the comparison result signal to form a reset signal, which is used to indicate the power-on state of the power supply.

2. The power-on reset circuit according to claim 1, characterized in that, The reference current generation unit specifically includes: A first current mirror, connected to the power supply, is configured to provide a target current to a second current mirror based on the power supply. The second current mirror, connected to the first current mirror, is configured to operate in subthreshold mode based on the target current, and to form the reference current across the first resistor; The first resistor, with its first end connected to the second current mirror and its second end connected to a reference ground, is configured to form the reference current.

3. The power-on reset circuit according to claim 2, characterized in that, The first current mirror includes: a first switching transistor and a second switching transistor. The source of the first switching transistor and the source of the second switching transistor are both connected to the power supply. The gate of the first switching transistor and the gate of the second switching transistor are connected. The drain of the first switching transistor and the drain of the second switching transistor are connected to the second current mirror. The second current mirror includes a third switch and a fourth switch. The drain of the third switch is connected to the drain of the first switch, the drain of the fourth switch is connected to the drain of the second switch, the gates of the third switch and the fourth switch are connected, the source of the third switch is grounded, and the source of the fourth switch is grounded through the first resistor.

4. The power-on reset circuit according to claim 3, characterized in that, The reference current is specifically related to the temperature, the resistance value of the first resistor, the width-to-length ratio of the third switch, and the width-to-length ratio of the fourth switch.

5. The power-on reset circuit according to claim 4, characterized in that, The reference current can be expressed by the following formula: Where k is the Boltzmann constant, q is the electron charge, T is the absolute temperature calculated based on the stated temperature, n is a process-related parameter, and R1 is the resistance value of the first resistor. The aspect ratio of the fourth switching transistor is given. The width-to-length ratio of the third switching transistor.

6. The power-on reset circuit according to any one of claims 2-5, characterized in that, The power sampling unit specifically includes: The second resistor, the fifth switch, and the sixth switch are provided, wherein the source of the fifth switch is connected to the power supply, the gate and drain are connected to one end of the second resistor, the other end of the second resistor is connected to the drain and gate of the sixth switch, and the source of the sixth switch is connected to reference ground. The sampling current is related to the voltage of the power supply, the gate-source voltage of the fifth switch, the gate-source voltage of the sixth switch, and the resistance value of the second resistor.

7. The power-on reset circuit according to claim 6, characterized in that, The sampling current can be expressed by the following formula: Wherein, VDD is the voltage of the power supply, Vgns is the absolute value of the gate-source voltage of the fifth switch, Vgsp is the absolute value of the gate-source voltage of the sixth switch, and R2 is the resistance value of the second resistor.

8. The power-on reset circuit according to claim 6 or 7, characterized in that, The comparison unit specifically includes: A seventh switch, the source of which is connected to the power supply, the gate of which is connected to the gates of the first and second switches, and the drain of which is connected to the drain of the eighth switch, is configured to replicate the reference current. The eighth switch, whose gate is connected to the gate of the sixth switch and whose source is connected to reference ground, is configured to replicate the sampling current. The current difference between the drain current of the seventh switch and the drain current of the eighth switch is used to form the comparison result signal.

9. The power-on reset circuit according to claim 8, characterized in that, When the sampling current is less than the reference current, the drain current of the seventh switch is greater than the drain current of the eighth switch, and the current difference causes the drains of the seventh switch and the eighth switch to output a first voltage signal indicating that the reference current is greater than the sampling current. When the sampling current is greater than the reference current, the drain current of the seventh switch is less than the drain current of the eighth switch, and the current difference causes the drains of the seventh and eighth switches to output a second voltage signal indicating that the sampling current is greater than the reference current.

10. The power-on reset circuit according to claim 9, characterized in that, The shaping unit includes: The Schmitt trigger is configured as follows: The first voltage signal is shaped to form a first reset signal, which is used to indicate that the voltage of the power supply is less than a reset threshold. Alternatively, the second voltage signal can be shaped to form a second reset signal, which indicates that the voltage of the power supply is greater than the reset threshold.

11. The power-on reset circuit according to claim 10, characterized in that, The reset threshold is related to the temperature, the resistance value of the first resistor, the resistance value of the second resistor, the width-to-length ratio of the third switch, the width-to-length ratio of the fourth switch, the gate-source voltage of the fifth switch, and the gate-source voltage of the sixth switch.

12. The power-on reset circuit according to claim 10, characterized in that, The reset threshold can be expressed by the following formula: Where k is Boltzmann's constant, q is the electron charge, T is the absolute temperature calculated based on the stated temperature, n is a process-related parameter, R1 is the resistance value of the first resistor, and R2 is the resistance value of the second resistor. The aspect ratio of the fourth switching transistor. Vgns is the width-to-length ratio of the third switch, Vgsp is the absolute value of the gate-source voltage of the fifth switch, and Vgsp is the absolute value of the gate-source voltage of the sixth switch.

13. The power-on reset circuit according to claim 11 or 12, characterized in that, The first resistor and the second resistor are variable resistors; The power-on reset circuit further includes an adjustment unit configured to adjust the resistance values ​​of the first resistor and the second resistor to adjust the reset threshold.

14. A power-on reset method, characterized in that, include: A reference current is generated, the current value of which and its corresponding temperature are related to the circuit parameters of the reference current generation unit. The sampled current of the power supply is obtained by sampling; The magnitudes of the reference current and the sampled current are compared to obtain a comparison result signal; The comparison result signal is shaped to form a reset signal, which is used to indicate the power-on status of the power supply.

15. A power supply module, characterized in that, Includes the power-on reset circuit as described in any one of claims 1-13.

16. An electronic device, characterized in that, Includes the power module as described in claim 15.

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