Mine communication data processing method and system based on edge computing

Abstract

This invention relates to the field of edge data processing technology, specifically to a mine communication data processing method and system based on edge computing. The method includes the following steps: acquiring probe waveforms to generate a buffer stream, matching frame identifiers to obtain the protocol offset span, combining the first address to move the pointer to obtain the payload memory address, intercepting the payload to establish a service message, and sending an interrupt signal to move memory to obtain the mine communication processing result. In this invention, relying on the addition offset operation between the edge computing network card queue memory address and the message protocol span, the network protocol data area is directly skipped. Pure service payloads are extracted and reassembled into mine service messages. Local warning boundary comparisons are performed to remove redundant encroachment of invalid protocol header fields on physical memory space, eliminating clock delays caused by cross-layer data movement in the mine. Furthermore, in abnormal states, a direct memory access controller is triggered to perform physical movement, reducing the overall processing cycle from mine abnormal waveform acquisition to hardware alarm response.

Description

Technical Field

[0001] This invention relates to the field of edge data processing technology, and in particular to a method and system for processing mine communication data based on edge computing. Background Technology

[0002] Edge data processing technology primarily involves deploying computing power and storage media closer to the data source nodes to perform local computations. This is achieved by configuring edge gateways or industrial control computers as physical entities between the terminal sensing terminals and the central data center, directly performing network protocol conversion, message field extraction, and feature cleaning operations on the raw data stream at the front-end generation side. Specifically, mine communication data processing methods refer to the technology of aggregating, processing, and parsing environmental and business message streams collected by gas probes, temperature and humidity sensors, and personnel positioning cards at the underground working face. Typically, underground wireless base stations or mine explosion-proof switches are used to assemble the raw binary message streams generated by each monitoring node into Ethernet data packets, which are then transmitted directly to the central physical server on the ground via the mine's main fiber optic link. Finally, the central processing unit within the ground server sequentially performs fixed steps on the received Ethernet data packets, including unpacking and framing, aligning message timestamp fields, comparing static threshold parameters, and writing log details to the physical disk.

[0003] In the current mine communication data processing, the original communication messages are mainly transmitted directly to the ground equipment room via the backbone link for centralized parsing. This full-transmission processing mode relies on the software layer to perform layer-by-layer frame splitting and unpacking operations on Ethernet data packets. In the complicated message protocol conversion process, physical memory is excessively occupied by invalid network protocol header fields, causing cross-layer data copying time to exceed the set limit. At the same time, the long-distance transmission of massive messages exacerbates the bandwidth load of the network backbone communication, making it difficult to meet the stringent response requirements for instantaneous early warning and judgment of sudden abnormal situations in the mine operation environment. Summary of the Invention

[0004] To address the technical problems existing in the prior art, embodiments of the present invention provide a mine communication data processing method based on edge computing, comprising the following steps: To achieve the above objectives, the present invention adopts the following technical solution: a mine communication data processing method based on edge computing, comprising the following steps: S1: Collect the original electromagnetic waveform voltage of the underground gas probe, extract the modulus to determine the voltage reference, compare and arrange the magnitudes, and write the arranged communication data into the bottom layer receive buffer queue of the edge computing network card in chronological order to generate an edge buffer binary stream. S2: Based on the edge buffer binary stream, extract the frame type identifier inside the initial medium access control frame header of the queue head, perform equal-value matching and filtering with the correspondence between the reserved standard protocol length of the edge gateway, extract the total byte span of the message frame header bound by the equal-value matching conditions, and obtain the message protocol offset span; S3: Based on the message protocol offset span, extract the initial memory address of the current head position of the receiving buffer queue at the bottom layer of the edge computing network card, perform offset operation with the message protocol offset span, locate the starting memory address of the payload that is separated from the network protocol data area, intercept the reading pointer associated with the edge computing gateway memory controller, move the reading pointer to the addressing coordinate position corresponding to the starting memory address of the payload, and obtain the payload extraction memory address. S4: Extract the memory address for the load, extract the gateway preset single-time environment service data bit width, adjust the read pointer to continuously read backward, intercept the service load data and write it into the static memory with the hardware clock data for merging and arrangement, and establish the mine service message. S5: Based on the mine business message, intercept the corresponding hardware interrupt level signal along with the memory start address, send the hardware interrupt level signal to the memory access controller, perform physical memory transfer operation, and obtain the mine communication data processing result.

[0005] As a further aspect of the present invention, when performing the size comparison and arrangement, if the original electromagnetic waveform voltage is greater than the modulus determination voltage reference, the arrangement logic is one; otherwise, the arrangement logic is zero.

[0006] As a further embodiment of the present invention, the edge buffer binary stream includes waveform digital sampling segments, queue position indexes, and timing flag bits; the message protocol offset span includes media control layer header limits, virtual LAN tag segments, and routing encapsulation append bits; the payload extraction memory address includes absolute spatial anchor points, bus transmission base addresses, and physical page frame mapping segments; the mine business message includes environmental status monitoring fields, equipment synchronization timestamps, and business sequence encoding; and the mine communication data processing results include abnormal limit alarms, transfer task scheduling blocks, and ground center distribution orders.

[0007] As a further aspect of the present invention, the edge buffer binary stream acquisition step is as follows: S111: Collect the original electromagnetic waveform voltage at the output end of the underground gas probe port, extract the center division point between the peak and the trough as the modulus determination voltage reference, aggregate the original electromagnetic waveform voltage and the modulus determination voltage reference at the same time according to a unified time reference, establish the corresponding mapping relationship between the original electromagnetic waveform voltage and the modulus determination voltage reference, and obtain the voltage waveform reference frame; S112: Compare the original electromagnetic waveform voltage within the voltage waveform reference frame with the modulus determination voltage reference. If the condition that the original electromagnetic waveform voltage is greater than the modulus determination voltage reference is met, arrange logic state one; otherwise, arrange logic state zero. Assemble the above logic states in time order to establish a timing logic sequence. S113: Retrieve the tail cursor address inside the receiving buffer queue of the edge computing network card, move the logic states in the time sequence into the region pointed to by the tail cursor address one by one, and synchronously increment the tail cursor offset. Then, summarize and write the data into the receiving buffer queue of the edge computing network card to generate an edge buffer binary stream.

[0008] As a further aspect of the present invention, the message protocol offset span acquisition step is as follows: S211: Locate the first addressing pointer of the edge buffer binary stream front end, extract the initial medium access control frame header in the starting segment according to the first addressing pointer, parse the basic data structure of the initial medium access control frame header, separate the frame type control field carried by the initial medium access control frame header, read the value status of the frame type control field, and generate a frame type identifier. S212: Obtain the pre-set edge gateway reserved standard protocol length correspondence, traverse each mapping index in the edge gateway reserved standard protocol length correspondence, perform equal value matching comparison between the frame type identifier value and each mapping index, determine that they are completely equal to trigger the filtering action, extract the total byte span of the bound message frame header of the equal mapping index, and obtain the total span of the target frame header. S213: Based on the total span calibration value of the target frame header, define the truncation boundary inside the edge buffer binary stream, truncate the sequence corresponding to the total span of the target frame header from the initial address of the edge buffer binary stream, isolate irrelevant service payload segments, extract the absolute length index of the space occupied by the communication protocol header, and generate the message protocol offset span.

[0009] As a further aspect of the present invention, the step of obtaining the memory address for load extraction is as follows: S311: Based on the message protocol offset span, retrieve the storage area layout of the head end of the receiving buffer queue of the edge computing network card, extract the hexadecimal underlying hardware addressing label bound to the head end area, read the first and second position information of the register carried in the underlying addressing label, remove redundant byte segments, extract the effective access reference boundary, and generate the initial memory address. S312: Extend the storage unit span corresponding to the number of message protocol offset spans sequentially backward from the initial memory address boundary, cross the underlying hardware device storage area occupied by the network protocol data area, locate the absolute addressing coordinates of the first valid service data segment after leaving the network protocol area, and generate the payload starting memory address. S313: Intercept the read pointer associated with the memory controller of the motherboard inside the edge computing gateway, obtain the current coordinate register status of the pointer inside the memory controller, overwrite and replace the internal status parameter of the read pointer with the value of the payload starting memory address, drive the read pointer to reside at the coordinate position corresponding to the head of the service data segment, lock the dedicated read access hardware channel for the target service data, and obtain the payload extraction memory address.

[0010] As a further aspect of the present invention, the step of obtaining the mine business message is as follows: S411: Extract the memory address for the payload, access the gateway configuration register, extract the gateway preset single-time environment service data bit width, parse the number of bits defined inside the single-time environment service data bit width, extract the current resident coordinates of the read pointer, limit the continuous backward access range of the read pointer according to the single-time environment service data bit width, reshape the continuous scan addressing boundary, and generate a single-time read control order. S412: Using the header boundary of the load extraction memory address indicator as the scanning start point, the memory addressing module data capture mechanism is triggered. The underlying data sequence is intercepted according to the single read control order limit bit quota. The effective application layer load data encoding is extracted, encapsulated to obtain a discrete state sequence, and the mine business load data is obtained. S413: Collect the current timestamp output by the hardware clock chip, parse the internal digital structure of the timestamp, and concatenate the mine business load data and the timestamp in the prescribed order to construct a business time sequence composite structure. Address the continuous free blocks inside the static memory, write the complete business time sequence composite structure into the static memory, and establish a mine business message.

[0011] As a further aspect of the present invention, the step of obtaining the mine communication data processing result is as follows: S511: Monitor the progress of writing the mine business message to the static memory, capture the hardware interrupt level signal triggered at the moment the writing is completed, extract the first byte of the mine business message to occupy the first hardware coordinate inside the static memory, and bind and splice the hardware interrupt level signal and the first hardware coordinate in binary format to generate memory transfer parameters. S512: Separate the hardware interrupt level signal and the first and second hardware coordinates carried in the memory transfer parameter, send the hardware interrupt level signal to the physical port of the direct memory access controller through the internal bus, change the waiting state of the receiving channel of the direct memory access controller, push the first and second hardware coordinates into the source address register, and establish a hardware transfer mechanism. S513: Based on the hardware transfer mechanism, according to the first hardware coordinate pointed to by the source address register, read the complete byte sequence of the mine business message in the corresponding block of the static memory, perform the underlying physical byte extraction operation, change the interrupt status register identifier, and obtain the mine communication data processing result.

[0012] A mine communication data processing system based on edge computing includes: The waveform conversion and queuing module collects the original electromagnetic waveform voltage from the underground gas probe, extracts the modulus to determine the voltage reference, compares and arranges the magnitudes, and writes the arranged communication data into the bottom-level receive buffer queue of the edge computing network card in chronological order to generate an edge buffer binary stream. The frame type filtering module extracts the frame type identifier inside the initial medium access control frame header of the queue head according to the edge buffer binary stream, performs equal-value matching and filtering with the correspondence between the reserved standard protocol length of the edge gateway, extracts the total byte span of the message frame header bound by the equal-value matching conditions, and obtains the message protocol offset span. The memory pointer positioning module extracts the initial memory address of the current head position of the receiving buffer queue at the bottom layer of the edge computing network card based on the message protocol offset span, performs offset calculation with the message protocol offset span, locates the starting memory address of the payload that is outside the network protocol data area, intercepts the reading pointer associated with the edge computing gateway memory controller, moves the reading pointer to the addressing coordinate position corresponding to the starting memory address of the payload, and obtains the payload extraction memory address. The business data reorganization module extracts the memory address of the payload, extracts the gateway preset single-environment business data bit width, adjusts the read pointer to continuously read backward, intercepts the business payload data and writes it with the hardware clock data into the static memory for merging and arrangement, and establishes the mine business message. The communication data processing module, based on the mine business message, intercepts the corresponding hardware interrupt level signal along with the memory start address, sends the hardware interrupt level signal to the memory access controller, performs physical memory transfer operations, and obtains the mine communication data processing result.

[0013] Compared with the prior art, the advantages and positive effects of the present invention are as follows: In this invention, the network protocol data area is directly skipped by relying on the addition offset operation of the edge computing network card queue memory address and the packet protocol span. The pure service payload is extracted and reassembled into a mine service packet to perform local warning boundary comparison. The software layer full cache unpacking mechanism is abandoned, the redundant occupation of physical memory space by invalid protocol header fields is removed, the clock delay caused by cross-layer data transportation in the mine is eliminated, and the direct memory access controller is triggered to perform physical transportation in abnormal state. On the basis of reducing the backbone network bandwidth load, the overall processing cycle from the acquisition of abnormal waveforms in the mine to the hardware alarm response is shortened. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of the steps of the present invention; Figure 2 This is a flowchart of the edge buffer binary stream acquisition process of the present invention; Figure 3 This is a flowchart of the message protocol offset span acquisition process of the present invention; Figure 4 This is a flowchart of the process for obtaining the memory address for payload extraction in this invention; Figure 5 This is a flowchart of the mine business message acquisition process of the present invention; Figure 6 This is a flowchart of the process for obtaining mine communication data processing results according to the present invention; Figure 7 This is a system module diagram of the present invention. Detailed Implementation

[0016] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0017] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0018] Please see Figure 1 This invention provides a mine communication data processing method based on edge computing, comprising the following steps: S1: Collect the original electromagnetic waveform voltage of the underground gas probe, extract the modulus determination voltage reference, compare the original electromagnetic waveform voltage with the modulus determination voltage reference and arrange them. If the original electromagnetic waveform voltage is greater than the modulus determination voltage reference, arrange it with logic 1; otherwise, arrange it with logic 0. Write the arranged communication data into the bottom layer receive buffer queue of the edge computing network card in chronological order to generate an edge buffer binary stream. S2: Based on the edge buffer binary stream, extract the frame type identifier inside the initial medium access control frame header at the head of the queue, perform equal-value matching and filtering on the correspondence between the frame type identifier and the reserved standard protocol length of the edge gateway, extract the total byte span of the message frame header bound by the equal-value matching conditions, and obtain the message protocol offset span; S3: Based on the message protocol offset span, extract the initial memory address of the current head position of the receiving buffer queue at the bottom layer of the edge computing network card, perform an offset operation by adding the initial memory address and the message protocol offset span, locate the starting memory address of the payload that is outside the network protocol data area, intercept the read pointer associated with the edge computing gateway memory controller, move the read pointer to the addressing coordinate position corresponding to the starting memory address of the payload, and obtain the payload extraction memory address; S4: Extract the memory address for the payload, extract the gateway's preset single-environment service data bit width, adjust the read pointer to continuously read backwards according to the single-environment service data bit width, intercept the service payload data and write it into the static memory for merging and arrangement, and establish the mine service message. S5: Based on the mine business message, intercept the corresponding hardware interrupt level signal along with the memory start address, send the hardware interrupt level signal to the memory access controller, execute the physical memory transfer operation, and obtain the mine communication data processing result.

[0019] The edge-buffered binary stream includes waveform digital sampling segments, queue position indexes, and timing flags; the message protocol offset span includes media control layer header limits, virtual LAN tag segments, and routing encapsulation append bits; the payload extraction memory address includes absolute spatial anchors, bus transmission base addresses, and physical page frame mapping segments; the mine business message includes environmental status monitoring fields, equipment synchronization timestamps, and business sequence encodings; and the mine communication data processing results include abnormal limit alarms, transferred task scheduling blocks, and ground center distribution orders.

[0020] Please see Figure 2 The specific steps of S1 are as follows: S111: Collect the original electromagnetic waveform voltage at the output end of the underground gas probe port, extract the center division point between the peak and trough intervals as the modulus determination voltage reference, aggregate the original electromagnetic waveform voltage and the modulus determination voltage reference collected at the same time according to a unified time reference, establish the corresponding mapping relationship between the original electromagnetic waveform voltage and the modulus determination voltage reference, and obtain the voltage waveform reference frame. The analog output pins of a specific type of gas probe deployed at the underground working face are retrieved and used as the front-end sensing node of the edge computing network, within the set parameters. At a Hertz sampling frequency, the original electromagnetic waveform voltage analog signal generated at the pin is continuously read. This continuously read analog signal is then sent to a high-precision analog-to-digital converter channel to generate a discrete decimal voltage amplitude sequence. This process involves acquiring signals containing... After obtaining the discrete voltage amplitude sequence of each sampling point, the local computing power of the edge computing device is used to traverse the sequence using a sliding window scanning mechanism to extract local extrema. Specifically, the voltage amplitude of the current sampling point is compared with its adjacent previous values. Each sampling point and afterwards The voltage amplitudes at each sampling point are compared. If the voltage amplitude at the current sampling point is simultaneously greater than the values ​​at the previous and next sampling points... If the voltage amplitude of two adjacent sampling points is less than the voltage amplitude of the two adjacent sampling points, then the current sampling point is marked as the peak point and its peak voltage value is recorded. Conversely, if the voltage amplitude of the current sampling point is less than the voltage amplitude of the two adjacent sampling points, then the current sampling point is marked as the peak point and its peak voltage value is recorded. If the voltage amplitude of two adjacent sampling points is determined, it is marked as a trough point and its trough voltage value is recorded. In determining adjacent... Each peak point and After identifying the troughs, the interval formed by the two peaks and troughs is extracted, and the maximum peak voltage value and minimum trough voltage value within this interval are read. The extracted maximum peak voltage value and minimum trough voltage value are then summed, and the summation result is divided by a constant. This allows for the calculation of the voltage value at the center dividing point between the peak and trough intervals. This voltage value at the center dividing point is then directly set as the voltage reference for modulus determination. For example, within a certain sampling interval, the extracted maximum peak voltage value is... V, the minimum voltage value at the trough is V, will V and V is obtained by adding V. V, then V divided by The final calculation yielded V, the V represents the modulus determination voltage reference for the current interval. The advantage of this operational logic lies in its ability to effectively eliminate probe zero-point drift errors caused by temperature or electromagnetic interference in the downhole environment by dynamically tracking peaks and troughs and calculating the center segmentation point in real time. This demonstrates the advantage of edge computing in real-time data source cleaning. After calculating the modulus determination voltage reference, the absolute timestamp generated by the internal high-frequency crystal oscillator is extracted. Using this absolute timestamp as a unified time reference, the voltage amplitudes of various original electromagnetic waveforms acquired at the same time and the modulus determination voltage reference calculated for that interval are structurally encapsulated and aggregated. An independent mapping table space is allocated in the internal memory. Each aggregated original electromagnetic waveform voltage amplitude and its corresponding modulus determination voltage reference are written row-by-row into the mapping table, thus establishing a corresponding mapping relationship between the original electromagnetic waveform voltage and the modulus determination voltage reference at each sampling time. The data blocks mapping the time intervals are output as a whole to obtain the voltage waveform reference frame.

[0021] S112: Compare the original electromagnetic waveform voltage within the voltage waveform reference frame with the modulus determination voltage reference. If the condition that the original electromagnetic waveform voltage is greater than the modulus determination voltage reference is met, arrange logic state one; otherwise, arrange logic state zero. Assemble the above logic states in time order to establish a timing logic sequence. The generated voltage waveform reference frame is extracted. Leveraging the distributed processing capabilities of the edge computing architecture, the original electromagnetic waveform voltage and the analog-to-digital (A / D) determination voltage reference corresponding to each sampling moment within the data block are read line by line in chronological order. The original electromagnetic waveform voltage value read at the current moment and the corresponding A / D determination voltage reference value are sent to a digital comparator for comparison. It is determined whether the original electromagnetic waveform voltage value is strictly greater than the A / D determination voltage reference value. If the condition that the original electromagnetic waveform voltage value is strictly greater than the A / D determination voltage reference value is met, a binary number is written to the output register. That is, the arrangement is in logic state 1. Conversely, if the original electromagnetic waveform voltage value is determined to be less than or equal to the modulus determination voltage reference value, then a binary number is written to the output register. This means that the sequence is arranged into logical zero states. For example, in a certain extracted time series, the first... The original electromagnetic waveform voltage at each moment is V, the voltage reference for determining the modulus is the one calculated above. V, will V and Compare V to determine If the condition is met, then a logical state is generated for that moment. In the The original electromagnetic waveform voltage at each moment is V, the voltage reference for determining the modulus is the same. V, judgment If the condition is not met, then generate a logical state for that moment. According to the chronological order of the data within the reference frame, all the generated data will be compared. Each logical state is sequentially stored in a shift register, and each input... A logical state, the shift register moves to the higher bit. 1 bit, until all logical states are assembled, forming a structure of length . A continuous binary sequence of bits is used to establish a complete temporal logic sequence, thereby completing the initial feature discretization at the edge and greatly reducing the data dimension transmitted to the central server.

[0022] S113: Retrieve the tail cursor address inside the receiving buffer queue of the edge computing network card, move the logic states in the time sequence into the area pointed to by the tail cursor address one by one, synchronously increment the tail cursor offset, summarize and write it into the receiving buffer queue of the edge computing network card to generate the edge buffer binary stream. A control command is sent to the Direct Memory Access Controller (DMI) of the edge computing network interface card (NIC), which acts as the core edge computing offloading engine. The command reads the cursor address parameter at the tail of the receive buffer queue recorded in the controller's internal hardware status register group. This address parameter indicates the absolute physical location of the next available free memory byte within the current NIC's underlying circular buffer memory area. The length established in the preceding steps is then extracted. A sequence of sequential logic bits, which is then processed using... Each bit is The data is divided into slices of a fixed length of bytes, resulting in a total of [number] slices. Each segment contains one byte of logical state data. The segmented logical state data is then moved one byte at a time, from least significant byte to most significant byte, and shifted into the physical memory region pointed to by the previously retrieved tail cursor address. After each... After each byte shift-in / write operation, the tail cursor offset value is synchronously increased by a constant in the underlying status register. For example, if the initially retrieved tail cursor address is represented in decimal as... , in the move After 10 bytes of data, change the cursor address from Plus Updated to The increment and write operations are executed in a loop until all are completed. Every byte of data is aggregated and written into the receive buffer queue at the bottom layer of the edge computing network card. After all the data is written, all bytes from the initial tail cursor address to the final updated cursor address in the receive buffer queue are extracted through the internal data bus, generating a continuous edge buffer binary stream that can be processed by the upper-layer network protocol stack. This provides high-speed buffer support for subsequent edge-side protocol unpacking and deep data mining, effectively alleviating the pressure of sudden traffic surges in the core backbone network.

[0023] Please see Figure 3 The specific steps of S2 are as follows: S211: Locate the first addressing pointer of the edge buffer binary stream front end, extract the initial medium access control frame header in the starting segment based on the first addressing pointer, parse the basic data structure of the initial medium access control frame header, separate the frame type control field carried in the initial medium access control frame header, read the value status of the frame type control field, and generate the frame type identifier. The system reads the initial starting memory physical address of the edge buffer binary stream recorded in the internal status register, starts the lightweight protocol analysis microservice inside the edge gateway, and uses this address value directly as the first address pointer for location. Based on the memory physical coordinates pointed to by this first address pointer, it continuously extracts the starting segment data of the very beginning of the edge buffer binary stream through the data bus, with the truncation length set to a fixed value. bytes, will this A series of consecutive bytes of data are identified as the Initial Media Access Control (IMC) frame header. The extracted IMC frame header is parsed using basic data structure parsing, and then, according to the Ethernet underlying transmission protocol specification, the preceding data is... The byte separation is defined as the target physical address field, and the byte is defined as the target physical address field. To the The byte separation is defined as the source physical address field, and the byte is defined as the source physical address field. To the The byte separation is defined as a frame type control field. This applies to the separated bytes of length... The frame type control field, consisting of 1 byte, is read to determine its specific hexadecimal value. The read value... The hexadecimal value status is concatenated with its high and low bytes, converted into a corresponding decimal identifier, and then used to generate the frame type identifier for the current message. For example, if the first byte of the hexadecimal value is read... The hexadecimal value of the byte is 08, the 1st byte... The hexadecimal value of each byte is 00, and the concatenated hexadecimal number is 0800. Converting this to decimal gives us... Then directly The frame type identifier is generated and recorded for this parsing process, enabling rapid authentication and classification of multi-source heterogeneous downhole data at the edge.

[0024] S212: Obtain the correspondence of the reserved standard protocol length of the pre-set edge gateway, traverse each mapping index in the correspondence of the reserved standard protocol length of the edge gateway, perform an equal value matching comparison between the frame type identifier value and each mapping index, determine that they are completely equal to trigger the filtering action, extract the total byte span of the bound message frame header of the equal mapping index, and obtain the total span of the target frame header. Access the read-only area of ​​the pre-installed solid-state storage chip inside the edge gateway. This area stores a mapping table of the reserved standard protocol length correspondence of the edge gateway, which is specifically optimized for edge computing scenarios and is burned by the factory-installed program.

[0025] Table 1 Mapping Table of Reserved Standard Protocol Lengths

[0026] Read the mapping index identifier values ​​from the edge gateway reserved standard protocol length correspondence shown in Table 1, and initiate a linear traversal process to extract each mapping index identifier value sequentially. Then, input the frame type identifier value generated in the previous steps and the currently extracted mapping index identifier values ​​into the arithmetic logic unit to perform an equality matching comparison operation. Determine whether the result of subtracting the mapping index identifier value from the frame type identifier value is strictly equal to a constant. If the result of the subtraction operation equals If the results are exactly equal, the selection is immediately triggered and the traversal process is stopped. If the result of the subtraction is not equal to... If the mapping index identifier value is not found, the next mapping index identifier value will be extracted for matching. When the filtering action is triggered, the total byte span of the message frame header bound in the same row as the matching mapping index identifier value is extracted from Table 1. For example, the frame type identifier value obtained in the previous steps... Substitute the comparison, and iterate to the first table in Table 1. When traveling, Subtract the first item in Table 1 Row mapping index identifier value The result equals If the condition of complete equality is met, then the total byte span value of the message frame header bound to that line is extracted. Thus, the total span of the target frame header of the message is obtained as follows: The advantage of this operation logic is that it directly locks the frame header length through low-level table lookup and hard decoding, which greatly reduces the overhead of parsing layer by layer in the protocol stack and significantly improves the concurrent packet processing throughput of edge nodes.

[0027] S213: Based on the total span calibration value of the target frame header, define the truncation boundary inside the edge buffer binary stream, truncate the sequence corresponding to the total span of the target frame header from the initial address of the edge buffer binary stream, isolate irrelevant service payload segments, extract the absolute length index of the space occupied by the communication protocol header, and generate the message protocol offset span. Obtain the target frame header total span calibration value calculated above. Retrieve the initial starting memory physical address of the edge buffer binary stream located in the previous steps. Perform an addition operation on this initial address value and the target frame header total span calibration value to calculate the memory coordinates of the truncation endpoint, thereby defining a strict truncation boundary within the edge buffer binary stream. According to this truncation boundary, using the initial starting memory physical address of the edge buffer binary stream as the scanning starting point, continuously truncate all byte sequences with a length equal to the target frame header total span calibration value. Mark all remaining bytes after the truncation boundary as irrelevant service payload fragments and perform isolation and masking operations to prevent the underlying protocol parsing engine from pre-reading them. Through this truncation action, directly extract the absolute length index of the storage space actually occupied by the current network communication protocol header. Use the value of this absolute length index as the reference benchmark for packet data block stripping to generate the packet protocol offset span. This edge-side data stripping mechanism ensures that the service payload is preserved, which is in line with the redundancy removal and integrity preservation concept of edge computing. For example, by substituting the previously obtained initial starting memory physical address of the edge buffer binary stream... and the total span of the target frame header ,Will and Adding them together gives ,Will to Between The byte sequence is truncated into the protocol header, and the rest is isolated, ultimately generating a message protocol offset span of 35.

[0028] Please see Figure 4 The specific steps of S3 are as follows: S311: Based on the message protocol offset span, retrieve the storage area layout of the head end of the receiving buffer queue of the edge computing network card, extract the hexadecimal underlying hardware addressing label bound to the head end area, read the first and second position information of the register carried by the underlying addressing label, remove redundant byte segments, extract the effective access reference boundary, and generate the initial memory address. Based on the aforementioned generated values, The message protocol offset span is used to retrieve the current storage area layout in the circular list of the head descriptor of the underlying receive buffer queue of the edge computing network card. The hexadecimal underlying hardware addressing number of the head area bound to the received data block is extracted from the head descriptor record. This addressing number contains... A data structure of 16 bits. Read the position information of the first bit of the register carried internally at the underlying level of this hexadecimal hardware addressing label, and then... Perform a bitwise AND operation between the data bits and a preset mask, removing redundant bytes used to identify buffer status, lock flags, etc. Specifically, the process involves... The hardware addressing label for each bit and the constant in hexadecimal. Perform a bitwise AND logical operation, forcing the lowest-order bit to be used. Each bit is cleared to zero, thus eliminating interference from the parity bit and status bit, and extracting the baseline boundary address purely for effective physical memory access. For example, if the extracted starting region is bound to a hexadecimal underlying hardware addressing label of hexadecimal... to After performing a bitwise AND operation, the least significant bit... That is, binary Cleared to zero, resulting in hexadecimal. Converting it to decimal gives us The effective access baseline boundary values ​​extracted in this way are used to generate the corresponding initial memory address. During this process, the memory mapping mechanism at the bottom layer of edge computing ensures the zero-copy characteristic of data flow, which greatly reduces the frequency of processor intervention.

[0029] S312: Extend the storage unit span corresponding to the number of message protocol offset spans sequentially backward from the initial memory address boundary, cross the underlying hardware device storage area occupied by the network protocol data area, locate the absolute addressing coordinates of the first valid service data segment after leaving the network protocol area, and generate the payload starting memory address. Read the previously generated initial memory address calibration value. Using this initial memory address calibration value as the starting point, extend the calculation sequentially backward from this starting boundary. Summate the initial memory address value with the previously generated message protocol offset span value. By adding the corresponding storage unit span value equal to the message protocol offset span, calculate the absolute physical coordinates of skipping the protocol header. The result of this addition directly spans the underlying hardware device storage area occupied by the network protocol data region, accurately locating the absolute addressing coordinates of the first valid service data segment after leaving the network protocol header region. For example, inputting the initial memory address decimal value generated in the previous steps... and the generated message protocol offset span value ,Will and Add them together and calculate the result. ,Should This refers to the exact starting coordinates of the business data payload in the underlying physical memory. The absolute addressing coordinate value obtained by offset calculation is generated and recorded as the payload's starting memory address, providing a physical coordinate reference for the advanced application container on the edge to directly access the underlying data.

[0030] S313: Intercept the read pointer associated with the memory controller of the motherboard inside the edge computing gateway, obtain the current coordinate register status of the internal pointer of the memory controller, overwrite and replace the internal status parameter of the read pointer with the value of the payload starting memory address, drive the read pointer to reside at the coordinate position corresponding to the head of the business data segment, lock the dedicated read access hardware channel for the target business data, and obtain the payload extraction memory address. A control signal is sent to the memory controller on the motherboard inside the edge computing gateway to intercept the direct read pointer register associated with the controller. The current stored value of this register is read to obtain the registered status value of the current coordinates of the pointer inside the memory controller. The payload starting memory address indicator value calculated in the previous steps is retrieved, and a memory overwrite operation is performed directly on the current status parameter inside the read pointer via the data bus, forcibly replacing the original registered status value with the payload starting memory address indicator value. After this overwrite operation is completed, a hardware-level address bus redirection is immediately triggered, driving the read pointer at the underlying memory controller to directly bypass the kernel buffer's regular queuing mechanism and reside at the coordinate position corresponding to the header of the service data segment. By writing a privileged access mask to the access control list register, the dedicated read access hardware physical channel for the current target service data is locked, preventing other concurrent processes from preempting this memory block. The physical address indicated by the read pointer in this locked state is used as the precise reference for subsequent data transfer, obtaining the payload extraction memory address, ensuring that the edge computing task has a deterministic low-latency physical memory response during execution. Applying the aforementioned example, the value of the memory controller's read pointer is directly overwritten and replaced with decimal values. Therefore The memory address is extracted as the final fixed payload.

[0031] Please see Figure 5 The specific steps of S4 are as follows: S411: Extract the memory address for the payload, access the gateway configuration register, extract the gateway's preset single-environment service data bit width, parse the number of bits defined inside the single-environment service data bit width, capture the current resident coordinates of the read pointer, limit the continuous backward access range of the read pointer according to the single-environment service data bit width, reshape the continuous scan addressing boundary, and generate a single-read control command. For the fixed load extracted in the aforementioned steps, the memory address is accessed via the static configuration register of the gateway's specific address space through the integrated circuit's internal control bus. The gateway's factory-preset single-environment service data bit width parameter is extracted from a specific offset in the configuration register. This parameter can be uniformly distributed and dynamically optimized by the edge computing cluster controller based on the actual underground conditions.

[0032] Table 2 Business Data Width Definition Table

[0033] The read hexadecimal encoding is parsed, and the predefined bit span is extracted according to Table 2. This predefined bit span is then converted into the specific number of bytes occupied by the single-environment business data bit width. The specific conversion logic is to divide the extracted predefined bit span value by a constant. The corresponding byte span value is calculated. The coordinates where the memory read pointer currently resides are extracted, and based on the calculated single-pass environmental business data bit width in bytes, the range of continuous forward access by the read pointer is limited. The coordinates where the read pointer resides are added to the data bit width in bytes to reshape the continuous scan addressing boundary from the start to the end. For example, if the encoding obtained from reading the configuration register is... For high-precision gas concentration loads, the number of predefined bits is obtained from Table 2. ,Will Divide by The conclusion is One byte. Substitute the aforementioned payload to extract the memory address. ,Will Plus get In this way to By defining a precise addressing boundary range, the instruction set containing the start and end coordinates and the read length is encapsulated to generate a single read control command, thereby realizing dynamic resource allocation and precise delimitation in the edge computing environment.

[0034] S412: Using the header boundary of the load extraction memory address as the starting point of the scan, the data capture mechanism of the memory addressing module is triggered. The underlying data sequence is truncated according to the single read control command limit bit quota, the effective application layer load data encoding is extracted, and the discrete state sequence is encapsulated to obtain the mine business load data. Using the header boundary coordinates indicated by the payload extraction memory address determined in the aforementioned steps as the starting point of the data scan, a pulse trigger signal is sent to the underlying main memory controller to activate the high-speed data capture mechanism of the memory addressing module. Upon receiving the signal, the memory controller strictly adheres to the bit limit and endpoint coordinates specified in the generated single-read control order, performing continuous burst read operations between the start and end addresses to batch extract the underlying data sequence. Through these burst read operations, the level signals stored in the memory physical units are converted into hexadecimal data streams, thereby extracting pure, valid application-layer payload data encoding. The extracted discrete state sequence is then endpoint-aligned and encapsulated to remove invalid padding bits that may be generated by the memory data alignment mechanism, ensuring the purity of the payload data. For example, in... to Within the addressing limits, the underlying memory addressing module strictly captures the range. A continuous stream of byte data, after endpoint-aligned encapsulation, The effective application layer payload data of a few bytes constitutes the mining business payload data required for the current operation cycle. This process is completely closed-loop on the edge gateway, avoiding uncontrollable latency caused by round-trip communication to the cloud.

[0035] S413: Acquires the current timestamp output by the hardware clock chip, parses the internal digital structure of the timestamp, concatenates the mine business load data and the timestamp in the prescribed order to construct a business time sequence composite structure, addresses the continuous free blocks inside the static memory, writes the complete business time sequence composite structure into the static memory, and establishes the mine business message. The real-time timestamp output by the hardware clock chip on the gateway motherboard is acquired via a dedicated built-in integrated circuit interface channel. The internal digital structure of the acquired timestamp is parsed to extract the absolute millisecond-level integer value calculated from the self-coordinated universal time starting point. The mine operation load data acquired in the previous steps and the parsed absolute millisecond-level timestamp are then concatenated in a pre-defined fixed format. The concatenation rule is as follows: [The text abruptly ends here, so the translation stops.] A millisecond-level timestamp data of a specific byte length is placed in the header, followed by the previously extracted mine business payload data of a specific byte length. This combination constructs a business time-series composite structure containing time attributes and business data. Subsequently, the internal static memory space allocation table is read, and a contiguous free storage block with a capacity larger than the length of the business time-series composite structure is addressed. A write operation instruction is invoked to write the completed business time-series composite structure completely and continuously, byte by byte, into the addressed free static memory block. For example, if the timestamp value obtained from parsing the hardware clock chip is... ,correspond A sequence of bytes, the aforementioned mine operation payload data is bytes, will this byte and The total is formed by concatenating the bytes. A byte-level sequential composite structure for business operations. The starting physical address of the static memory was retrieved. The free block, will 1 byte completely written from The initial physical interval is used to establish mine business messages that can be further transferred or distributed, supporting spatiotemporal sequence aggregation analysis and localized early warning model construction at the edge.

[0036] Please see Figure 6 The specific steps of S5 are as follows: S511: Monitor the progress of writing mine business messages to static memory, capture the hardware interrupt level signal triggered at the moment of completion of writing, extract the first byte of the mine business message to occupy the first hardware coordinate inside the static memory, and bind the hardware interrupt level signal and the first hardware coordinate in binary format to generate memory transfer parameters. During the data writing process to static memory, the progress of the mine business message writing operation is monitored in real time. The underlying hardware monitoring circuit continuously acquires the level status of the static memory write enable pin. When the last byte is successfully written to static memory and triggers the write enable pin level to flip from low to high, the high-level hardware interrupt signal generated at the moment of completion is captured. The static memory address management register is accessed synchronously to extract the first hardware coordinate value of the first byte of the newly written mine business message. In the arithmetic logic unit inside the memory controller, the captured hardware interrupt signal and the extracted first hardware coordinate value are bound together in binary format. Specifically, the concatenation logic allocates the first hardware coordinate value to the low... The high-bit data segment allocates values ​​representing the specific source identifier of the hardware interrupt level signal. A bit data segment is combined into a complete bit data segment through logical OR operations and left shift operations. Bit data parameter. For example, if the extracted first hardware coordinate decimal value is... Convert it to The binary format is placed in the low-order bits. If the interrupt level signal source identifier is encoded in decimal... Convert it to binary and shift it left. The bit is placed in the high-order bit, and the two are concatenated and added to generate an independent value that includes both the position and the trigger state. The bit width parameter is used to generate memory transport parameters, establishing a hardware-level synchronization beacon for multi-core asynchronous collaborative processing within edge devices.

[0037] S512: The separate memory transfer parameter carries a hardware interrupt level signal and the first and second hardware coordinates. The hardware interrupt level signal is sent to the physical port of the direct memory access controller through the internal bus, which changes the waiting state of the direct memory access controller's receiving channel, pushes the first and second hardware coordinates into the source address register, and establishes a hardware transfer mechanism. In the memory management unit, the aforementioned generated... Bit-width memory transfer parameter. Using bitmasking extraction techniques, the data carried within this memory transfer parameter is separated. This is achieved by combining the memory transfer parameter with high-order... Perform a bitwise AND operation on the bitmask and then right-shift. The interrupt source identifier, i.e., the hardware interrupt level signal, is obtained by separating the memory transfer parameter and the low bit. A bitwise AND operation is performed on the bitmask to extract the first hardware coordinate. After separation, a hardware interrupt level signal is directly sent to the physical control port of the direct memory access controller (DMC) via the internal high-speed peripheral component interconnect bus. This signal forcibly changes the idle wait state of the corresponding receive channel of the DMC, activating it into the ready-to-operate mode. Simultaneously, the extracted first hardware coordinate value is forcibly pushed into a specific source address register inside the DMC via the register write bus. For example, the previously extracted decimal value... Sending the data to the control port activates the transmission channel, and the extracted decimal value is then transmitted. By pushing the source address register, the source of data transmission is located, thus formally establishing a hardware transfer mechanism that directly controls the transmission from memory at the hardware level. This is the core foundation for edge computing gateways to achieve high real-time perception of data flow.

[0038] S513: Based on the hardware transfer mechanism, according to the first hardware coordinate pointed to by the source address register, read the complete byte sequence of the mine business message in the corresponding block of the static memory, perform the underlying physical byte extraction operation, change the interrupt status register flag, and obtain the mine communication data processing result; A start flag is written to the command register of the Direct Memory Access Controller (DMI), invoking the previously established hardware transfer mechanism. After being invoked, the DMI operates independently of the CPU, strictly adhering to the first hardware coordinate pointed to by its internal source address register to take over control of the corresponding bus. Starting from the first hardware coordinate, it automatically generates continuous memory read timing signals to read the complete byte sequence of the mine business message stored in the corresponding block of static memory. During this process, it performs low-level physical byte extraction, directly transporting the read byte sequence to the target application buffer area via the bus. Once all configured bytes have been transported, the DMI actively sends a completion pulse to the CPU's interrupt controller, forcibly changing the completion flag bit inside the low-level interrupt status register from an incomplete 0 to a completed 1. Upon detecting this change in the completion flag bit, the CPU directly retrieves the transported data block from the target application buffer area, thus obtaining the final mine communication data processing result, freeing the processor from computational load. The advantage of this operational logic is that by intervening in the direct memory access controller and hardware-level flipping of the underlying interrupt flag, the polling consumption of the central processing unit during data transfer is freed up, improving the throughput and real-time performance of processing massive mining business messages. This enables edge computing nodes to cope with the surge of sensing data during sudden underground disasters, truly giving full play to the local autonomy and rapid response efficiency of the edge side.

[0039] A comparative test was conducted over a period of 30 days in a real mine working environment.

[0040] Test data results show that, compared to the traditional processing mode of transmitting massive amounts of raw communication messages back over long distances to a ground-based data center for centralized parsing, the edge computing processing method of this invention effectively eliminates redundant encroachment on physical memory space by skipping network protocol data areas and clearing invalid protocol header fields at the lower level through offset operations. This significantly reduces the amount of data transmitted to the backbone network, resulting in an average reduction of 78.6% in backbone network communication bandwidth load. Simultaneously, relying on the physical transport mechanism of the direct memory access controller, it successfully avoids the severe clock delays caused by cross-layer data copying during complex message protocol conversion, drastically reducing the overall processing cycle from the acquisition of abnormal mine waveforms to hardware alarm response from the traditional average of 215 milliseconds to 12 milliseconds. The above test results fully demonstrate that this invention significantly reduces the backbone network bandwidth load while greatly shortening the overall processing cycle, perfectly solving the response delay and network overload problems caused by cross-layer data copying and long-distance backhaul.

[0041] Please see Figure 7 A mine communication data processing system based on edge computing includes: The waveform conversion and queuing module collects the original electromagnetic waveform voltage from the underground gas probe, extracts the modulus to determine the voltage reference, compares and arranges the magnitudes, and writes the arranged communication data into the bottom-level receive buffer queue of the edge computing network card in chronological order to generate an edge buffer binary stream. The frame type filtering module extracts the frame type identifier inside the initial medium access control frame header at the front of the queue based on the edge buffer binary stream, performs equal-value matching and filtering with the correspondence between the frame type and the reserved standard protocol length of the edge gateway, extracts the total byte span of the message frame header bound by the equal-value matching conditions, and obtains the message protocol offset span. The memory pointer positioning module extracts the initial memory address of the current head of the receiving buffer queue at the bottom layer of the edge computing network card based on the message protocol offset span. It performs offset calculation with the message protocol offset span to locate the starting memory address of the payload that is outside the network protocol data area. It intercepts the read pointer associated with the edge computing gateway memory controller and moves the read pointer to the addressing coordinate position corresponding to the starting memory address of the payload to obtain the payload extraction memory address. The business data reassembly module extracts the memory address of the payload, extracts the bit width of the gateway's preset single-environment business data, adjusts the read pointer to continuously read backwards, intercepts the business payload data and writes it into the static memory with the hardware clock data for merging and arrangement, and establishes the mine business message. The communication data processing module, based on the mine business message, intercepts the corresponding hardware interrupt level signal along with the memory start address, sends the hardware interrupt level signal to the memory access controller, performs physical memory transfer operations, and obtains the mine communication data processing result.

[0042] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of protection of the described technical solutions.

Claims

1. A mine communication data processing method based on edge computing, characterized in that, Includes the following steps: S1: Collect the original electromagnetic waveform voltage of the underground gas probe, extract the modulus to determine the voltage reference, compare and arrange the magnitudes, and write the arranged communication data into the bottom layer receive buffer queue of the edge computing network card in chronological order to generate an edge buffer binary stream. S2: Based on the edge buffer binary stream, extract the frame type identifier inside the initial medium access control frame header of the queue head, perform equal-value matching and filtering with the correspondence between the reserved standard protocol length of the edge gateway, extract the total byte span of the message frame header bound by the equal-value matching conditions, and obtain the message protocol offset span; S3: Based on the message protocol offset span, extract the initial memory address of the current head position of the receiving buffer queue at the bottom layer of the edge computing network card, perform offset operation with the message protocol offset span, locate the starting memory address of the payload that is separated from the network protocol data area, intercept the reading pointer associated with the edge computing gateway memory controller, move the reading pointer to the addressing coordinate position corresponding to the starting memory address of the payload, and obtain the payload extraction memory address. S4: Extract the memory address for the load, extract the gateway preset single-time environment service data bit width, adjust the read pointer to continuously read backward, intercept the service load data and write it into the static memory with the hardware clock data for merging and arrangement, and establish the mine service message. S5: Based on the mine business message, intercept the corresponding hardware interrupt level signal along with the memory start address, send the hardware interrupt level signal to the memory access controller, perform physical memory transfer operation, and perform business logic parsing to obtain the mine communication data processing result.

2. The mine communication data processing method based on edge computing according to claim 1, characterized in that: When performing the size comparison and arrangement, if the original electromagnetic waveform voltage is greater than the modulus determination voltage reference, the arrangement logic is one; otherwise, the arrangement logic is zero.

3. The mine communication data processing method based on edge computing according to claim 1, characterized in that: The edge-buffered binary stream includes waveform digital sampling segments, queue position indexes, and timing flags; the message protocol offset span includes media control layer header limits, virtual LAN tag segments, and routing encapsulation append bits; the payload extraction memory address includes absolute spatial anchors, bus transmission base addresses, and physical page frame mapping segments; the mine service message includes environmental status monitoring fields, equipment synchronization timestamps, and service sequence encodings; the mine communication data processing results include abnormal limit alarms, transferred task scheduling blocks, and ground center distribution orders.

4. The mine communication data processing method based on edge computing according to claim 1, characterized in that, The steps for obtaining the edge-buffered binary stream are as follows: S111: Collect the original electromagnetic waveform voltage at the output end of the underground gas probe port, extract the center division point between the peak and the trough as the modulus determination voltage reference, aggregate the original electromagnetic waveform voltage and the modulus determination voltage reference at the same time according to a unified time reference, establish the corresponding mapping relationship between the original electromagnetic waveform voltage and the modulus determination voltage reference, and obtain the voltage waveform reference frame; S112: Compare the original electromagnetic waveform voltage within the voltage waveform reference frame with the modulus determination voltage reference. If the condition that the original electromagnetic waveform voltage is greater than the modulus determination voltage reference is met, arrange logic state 1; otherwise, arrange logic state 0. Assemble and establish a timing logic sequence according to the time order. S113: Retrieve the tail cursor address inside the receiving buffer queue of the edge computing network card, move the logic states in the time sequence into the region pointed to by the tail cursor address one by one, and synchronously increment the tail cursor offset. Then, summarize and write the data into the receiving buffer queue of the edge computing network card to generate an edge buffer binary stream.

5. The mine communication data processing method based on edge computing according to claim 1, characterized in that, The steps for obtaining the message protocol offset span are as follows: S211: Locate the first addressing pointer of the edge buffer binary stream front end, extract the initial medium access control frame header in the starting segment according to the first addressing pointer, parse the basic data structure of the initial medium access control frame header, separate the frame type control field carried by the initial medium access control frame header, read the value status of the frame type control field, and generate a frame type identifier. S212: Obtain the pre-set edge gateway reserved standard protocol length correspondence, traverse each mapping index in the edge gateway reserved standard protocol length correspondence, perform equal value matching comparison between the frame type identifier value and each mapping index, determine that they are completely equal to trigger the filtering action, extract the total byte span of the bound message frame header of the equal mapping index, and obtain the total span of the target frame header. S213: Based on the total span calibration value of the target frame header, define the truncation boundary inside the edge buffer binary stream, truncate the sequence corresponding to the total span of the target frame header from the initial address of the edge buffer binary stream, isolate irrelevant service payload segments, extract the absolute length index of the space occupied by the communication protocol header, and generate the message protocol offset span.

6. The mine communication data processing method based on edge computing according to claim 1, characterized in that, The step of obtaining the memory address for load extraction is as follows: S311: Based on the message protocol offset span, retrieve the storage area layout of the head end of the receiving buffer queue of the edge computing network card, extract the hexadecimal underlying hardware addressing label bound to the head end area, read the first and second position information of the register carried in the underlying addressing label, remove redundant byte segments, extract the effective access reference boundary, and generate the initial memory address. S312: Extend the storage unit span corresponding to the number of message protocol offset spans sequentially backward from the initial memory address boundary, cross the underlying hardware device storage area occupied by the network protocol data area, locate the absolute addressing coordinates of the first valid service data segment after leaving the network protocol area, and generate the payload starting memory address. S313: Intercept the read pointer associated with the memory controller of the motherboard inside the edge computing gateway, obtain the current coordinate register status of the pointer inside the memory controller, overwrite and replace the internal status parameter of the read pointer with the value of the payload starting memory address, drive the read pointer to reside at the coordinate position corresponding to the head of the service data segment, lock the dedicated read access hardware channel for the target service data, and obtain the payload extraction memory address.

7. The mine communication data processing method based on edge computing according to claim 1, characterized in that, The steps for obtaining the mine business message are as follows: S411: Extract the memory address for the payload, access the gateway configuration register, extract the gateway preset single-time environment service data bit width, parse the number of bits defined inside the single-time environment service data bit width, extract the current resident coordinates of the read pointer, limit the continuous backward access range of the read pointer according to the single-time environment service data bit width, reshape the continuous scan addressing boundary, and generate a single-time read control order. S412: Using the header boundary of the load extraction memory address indicator as the scanning start point, the memory addressing module data capture mechanism is triggered. The underlying data sequence is intercepted according to the single read control order limit bit quota. The effective application layer load data encoding is extracted, encapsulated to obtain a discrete state sequence, and the mine business load data is obtained. S413: Collect the current timestamp output by the hardware clock chip, parse the internal digital structure of the timestamp, and concatenate the mine business load data and the timestamp in the prescribed order to construct a business time sequence composite structure. Address the continuous free blocks inside the static memory, write the complete business time sequence composite structure into the static memory, and establish a mine business message.

8. The mine communication data processing method based on edge computing according to claim 1, characterized in that, The steps for obtaining the mine communication data processing results are as follows: S511: Monitor the progress of writing the mine business message to the static memory, capture the hardware interrupt level signal triggered at the moment the writing is completed, extract the first byte of the mine business message to occupy the first hardware coordinate inside the static memory, and bind and splice the hardware interrupt level signal and the first hardware coordinate in binary format to generate memory transfer parameters. S512: Separate the hardware interrupt level signal and the first and second hardware coordinates carried in the memory transfer parameter, send the hardware interrupt level signal to the physical port of the direct memory access controller through the internal bus, change the waiting state of the receiving channel of the direct memory access controller, push the first and second hardware coordinates into the source address register, and establish a hardware transfer mechanism. S513: Based on the hardware transfer mechanism, according to the first hardware coordinate pointed to by the source address register, read the complete byte sequence of the mine business message in the corresponding block of the static memory, perform the underlying physical byte extraction operation, change the interrupt status register identifier, and obtain the mine communication data processing result.

9. A mine communication data processing system based on edge computing, characterized in that, The system is used to implement the method according to any one of claims 1-8, comprising: The waveform conversion and queuing module collects the original electromagnetic waveform voltage from the underground gas probe, extracts the modulus to determine the voltage reference, compares and arranges the magnitudes, and writes the arranged communication data into the bottom-level receive buffer queue of the edge computing network card in chronological order to generate an edge buffer binary stream. The frame type filtering module extracts the frame type identifier inside the initial medium access control frame header of the queue head according to the edge buffer binary stream, performs equal-value matching and filtering with the correspondence between the reserved standard protocol length of the edge gateway, extracts the total byte span of the message frame header bound by the equal-value matching conditions, and obtains the message protocol offset span. The memory pointer positioning module extracts the initial memory address of the current head position of the receiving buffer queue at the bottom layer of the edge computing network card based on the message protocol offset span, performs offset calculation with the message protocol offset span, locates the starting memory address of the payload that is outside the network protocol data area, intercepts the reading pointer associated with the edge computing gateway memory controller, moves the reading pointer to the addressing coordinate position corresponding to the starting memory address of the payload, and obtains the payload extraction memory address. The business data reorganization module extracts the memory address of the payload, extracts the gateway preset single-environment business data bit width, adjusts the read pointer to continuously read backward, intercepts the business payload data and writes it with the hardware clock data into the static memory for merging and arrangement, and establishes the mine business message. The communication data processing module, based on the mine business message, intercepts the corresponding hardware interrupt level signal along with the memory start address, sends the hardware interrupt level signal to the memory access controller, performs physical memory transfer operations, and obtains the mine communication data processing result.

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