Dynamic scheduling method and device for ternary content addressable memory

Abstract

This application relates to a dynamic scheduling method and apparatus for a three-state content-addressable memory (TRM). The method includes: acquiring operational status information corresponding to a network device, the operational status information including network traffic information and rule hit information of the TRM; determining current hotspot rules and hotspot sub-blocks in the TRM based on the operational status information; generating a scheduling policy according to the hotspot rules and the hotspot sub-blocks, the scheduling policy including a sub-block power control policy and a matching field control policy; and distributing the scheduling policy to the TRM for dynamic scheduling operations. This application enables the TRM to operate on demand while meeting current service processing requirements, thereby effectively reducing the overall power consumption of the TRM and improving the energy efficiency of network devices while ensuring matching performance and service continuity.

Description

Technical Field

[0001] This application relates to the field of computer information processing, and more specifically, to a dynamic scheduling method and apparatus for a three-state content-addressable memory. Background Technology

[0002] Ternary Content Addressable Memory (TCAM) is a special type of high-speed memory widely used in network devices (such as routers, switches, aggregation and distribution devices) to implement critical functions such as high-speed packet identification, forwarding decisions, and hit statistics. Unlike traditional random access memory (RAM), TCAM does not access data through addresses but performs parallel lookups through content. It can complete the matching of the entire table entry within a single clock cycle, thus possessing extremely high lookup speed and becoming the core engine for achieving fast packet matching in network devices.

[0003] However, the most significant drawback of TCAM is its high power consumption. This is because the hardware architecture of TCAM requires activating the entire memory array for parallel comparisons with each query, and even if only one rule is matched, all circuits will consume energy. This "one query, all activated" working mode results in power consumption far exceeding that of traditional memories such as SRAM. In network offloading devices that use multiple cascaded TCAMs, this problem is further amplified, becoming a bottleneck in system design.

[0004] In existing aggregation and distribution equipment, TCAM typically employs a collaborative hardware architecture of "TCAM + index + system processor," combined with software management. When a network packet enters the device, the software layer primarily handles processes such as policy distribution, rule compilation and optimization, hardware programming, traffic matching, and statistics. However, in existing solutions, TCAMs are often operating at full power, even when network traffic is low, resulting in energy waste.

[0005] It is worth noting that network traffic exhibits a significant "tidal effect"—the difference between peak and off-peak periods is substantial. For example, during the early morning hours, network traffic may drop to one-tenth or even less of the peak level. However, current device software manages TCAM rather rudimentarily, typically placing it in a fixed high-performance mode. Even in scenarios with no packets or only a few rules to match, all comparison units and storage blocks within the TCAM operate at full speed continuously, resulting in a significant waste of power on ineffective circuit switching activities.

[0006] While some low-power designs exist at the TCAM circuit level, these designs are inherent capabilities of the chip and cannot be flexibly invoked by software, nor can they be dynamically adjusted according to actual network traffic changes. Furthermore, existing TCAM chips already support multi-chip cascading and independent power control, providing a hardware foundation for the implementation of this invention. However, how to fully utilize these hardware features on the software side to achieve intelligent scheduling of TCAM remains a problem to be solved.

[0007] Therefore, a new dynamic scheduling method and apparatus for tri-state content-addressable memory is needed.

[0008] The information disclosed in the background section is only intended to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0009] In view of this, this application provides a dynamic scheduling method and apparatus for a tri-state content-addressable memory, which can dynamically schedule the power state and matching field of the sub-blocks of the tri-state content-addressable memory, so that the tri-state content-addressable memory can work on demand while meeting the current service processing requirements. This effectively reduces the overall power consumption of the tri-state content-addressable memory and improves the energy efficiency of network equipment while ensuring matching performance and service continuity.

[0010] Other features and advantages of this application will become apparent from the following detailed description, or may be learned in part from practice of this application.

[0011] According to one aspect of this application, a dynamic scheduling method for a three-state content-addressable memory (TRM) is proposed. The method includes: acquiring operating status information corresponding to a network device, the operating status information including network traffic information and rule hit information of the TRM; determining current hotspot rules and hotspot sub-blocks in the TRM based on the operating status information; generating a scheduling strategy based on the hotspot rules and the hotspot sub-blocks, the scheduling strategy including a sub-block power control strategy and a matching field control strategy; and distributing the scheduling strategy to the TRM for dynamic scheduling operations.

[0012] In one exemplary embodiment of this application, obtaining the operating status information corresponding to the network device includes: acquiring the packet arrival rate and average packet length in real time as network traffic information; and generating rule hit information through the performance counter inside the three-state content addressing memory chip.

[0013] In one exemplary embodiment of this application, determining the current hotspot rule and the hotspot sub-block in the tri-state content addressing memory based on the running status information includes: determining the current hotspot rule according to the rule distribution data in the rule hit information; and determining the hotspot sub-block in the tri-state content addressing memory according to the hotspot rule.

[0014] In one exemplary embodiment of this application, determining a hotspot sub-block in the tri-state content-addressable memory according to the hotspot rule includes: determining the address range corresponding to the hotspot rule in the tri-state content-addressable memory; and determining the storage space corresponding to the address range as the hotspot sub-block.

[0015] In one exemplary embodiment of this application, generating a scheduling strategy based on the hotspot rule and the hotspot sub-block includes: determining the minimum number of sub-blocks to be activated based on the network traffic information; and generating a scheduling strategy based on the minimum number of sub-blocks to be activated, the hotspot rule, and the hotspot sub-block.

[0016] In one exemplary embodiment of this application, a scheduling strategy is generated based on the minimum number of activated sub-blocks, the hotspot rule, and the hotspot sub-blocks, including: keeping the hotspot sub-blocks in a powered-on state; and turning off the power supply to the non-hotspot sub-blocks.

[0017] In one exemplary embodiment of this application, the method further includes: before turning off the power to the non-hotspot sub-block, migrating the rules stored in the non-hotspot sub-block to the sub-block that is in the powered-on state.

[0018] In one exemplary embodiment of this application, a scheduling strategy is generated based on the minimum number of activated sub-blocks, the hotspot rule, and the hotspot sub-blocks, including: when performing tri-state content-addressable memory matching, only some fields of the message are involved in the comparison, and the comparison circuit corresponding to at least one non-critical field is masked.

[0019] In one exemplary embodiment of this application, the scheduling policy is sent to the tri-state content-addressable memory for dynamic scheduling operation, including: implementing the dynamic scheduling operation by writing a configuration register to the tri-state content-addressable memory.

[0020] According to one aspect of this application, a dynamic scheduling device for a three-state content-addressable memory (TRM) is proposed. The device includes: an information module for acquiring operational status information corresponding to a network device, the operational status information including network traffic information and rule hit information of the TRM; a hotspot module for determining current hotspot rules and hotspot sub-blocks in the TRM based on the operational status information; a strategy module for generating a scheduling strategy based on the hotspot rules and the hotspot sub-blocks, the scheduling strategy including a sub-block power control strategy and a matching field control strategy; and a distribution module for distributing the scheduling strategy to the TRM for dynamic scheduling operations.

[0021] According to one aspect of this application, an electronic device is provided, comprising: one or more processors; a storage device for storing one or more programs; and, when the one or more programs are executed by the one or more processors, causing the one or more processors to implement the method as described above.

[0022] According to one aspect of this application, a computer-readable medium is provided having a computer program stored thereon that, when executed by a processor, implements the method described above.

[0023] According to the dynamic scheduling method and apparatus for a three-state content-addressable memory (TMN) of this application, the following steps are taken: First, the operating status information of the network device is acquired, including network traffic information and rule hit information of the TMN. Based on the operating status information, current hotspot rules and hotspot sub-blocks in the TMN are determined. Second, a scheduling strategy is generated based on the hotspot rules and hotspot sub-blocks, including a sub-block power control strategy and a matching field control strategy. Third, the scheduling strategy is distributed to the TMN for dynamic scheduling. This allows for dynamic scheduling of the sub-block power status and matching fields of the TMN, enabling the TMN to operate on demand while meeting current service processing requirements. This effectively reduces the overall power consumption of the TMN and improves the energy efficiency of the network device while ensuring matching performance and service continuity.

[0024] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0025] The above and other objects, features, and advantages of this application will become more apparent from the detailed description of exemplary embodiments with reference to the accompanying drawings. The drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0026] Figure 1 This is a flowchart illustrating a dynamic scheduling method for a three-state content-addressable memory according to an exemplary embodiment.

[0027] Figure 2 This is a flowchart illustrating a dynamic scheduling method for a three-state content-addressable memory according to another exemplary embodiment.

[0028] Figure 3 This is a flowchart illustrating a dynamic scheduling method for a three-state content-addressable memory according to another exemplary embodiment.

[0029] Figure 4 This is a block diagram illustrating a dynamic scheduling device for a tri-state content-addressable memory according to an exemplary embodiment.

[0030] Figure 5 This is a block diagram illustrating an electronic device according to an exemplary embodiment.

[0031] Figure 6 This is a block diagram illustrating a computer-readable medium according to an exemplary embodiment. Detailed Implementation

[0032] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this application will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0033] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0034] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0035] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0036] It should be understood that although the terms first, second, third, etc., may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another. Therefore, the first component discussed below may be referred to as the second component without departing from the teachings of this application. As used herein, the term "and / or" includes all combinations of any one and more of the associated listed items.

[0037] Those skilled in the art will understand that the accompanying drawings are merely schematic diagrams of exemplary embodiments, and the modules or processes in the drawings are not necessarily essential for implementing this application, and therefore cannot be used to limit the scope of protection of this application.

[0038] The technical abbreviations used in this application are explained as follows: FPGA, or Field Programmable Gate Array, is a type of chip whose internal structure can be reprogrammed to achieve a specific purpose.

[0039] A network offloading device is a network device used in computer networks to forward data, distribute network traffic load, or redistribute traffic according to specific rules.

[0040] "Traffic load" typically refers to the pressure or burden that the amount of data transmitted in a network system places on network devices or links. It is a key indicator in network performance evaluation and is widely used in network planning, system operation and maintenance, load balancing, capacity management, and other fields.

[0041] TCAM (Ternary Content Addressable Memory) is a special type of high-speed memory primarily used in network devices (such as routers and switches) to enable fast lookup and matching operations. Unlike ordinary RAM (Random Access Memory), TCAM does not access data through addresses but performs parallel lookups through content, enabling the matching of an entire entry within a single clock cycle, thus achieving extremely high lookup speeds.

[0042] The IP protocol is a core protocol of the network layer, responsible for addressing and routing data packets. It assigns unique IP addresses to devices, transmits datagrams in a connectionless and unreliable manner, and provides best-effort service. It supports fragmentation and reassembly, and its main versions are IPv4 and IPv6. It is the foundation for achieving interconnectivity on the Internet.

[0043] In existing traffic offloading devices, TCAM is the core engine for achieving high-speed packet matching, forwarding decisions, and hit statistics. A typical implementation scheme is a collaborative hardware architecture of "TCAM + index + system processor" combined with software management.

[0044] When a network packet enters the aggregation and distribution device, it goes through the following process. Taking a newly added rule as an example, the main software-level processing flow is as follows: 1. Policy Deployment: The user deploys a rule policy via the command line. The rule undergoes a series of validity checks before being deployed to the kernel for subsequent operations.

[0045] 2. Rule Compilation and Optimization: Rule compilation translates rules into TCAM entries and SRAM actions. The resource manager evaluates the existing TCAM space and determines the optimal storage location and index.

[0046] 3. Hardware Programming: Through the driver layer, new TCAM entries and SRAM actions are precisely written to the specified hardware location. This process is usually very careful and generally needs to follow the order of "writing SRAM actions first, then writing TCAM indexes" to avoid intermediate states where a match is found but an incorrect action is performed.

[0047] 4. Traffic matching and statistics: The hardware begins to process packets according to the new rules and automatically updates the counter.

[0048] 5. Data collection and analysis: The monitoring plane collects hit data.

[0049] The applicant found that the high power consumption of the TCAM has consistently been a design bottleneck. In aggregation and distribution equipment, the TCAM typically operates at full capacity 24 / 7, but network traffic exhibits a significant "tidal effect"—with huge differences between peak and off-peak periods. Currently, the device software manages the TCAM rather rudimentarily, usually placing it in a fixed high-performance mode. Even in scenarios with no packets or only a few rules to match, all comparison units and memory blocks within the TCAM still operate at full speed, resulting in a significant waste of power on ineffective circuit switching activities.

[0050] While some low-power designs exist at the TCAM circuit level, these are inherent capabilities of the chip and cannot be flexibly invoked through software. Therefore, there is an urgent need for a software-side intelligent management solution that can sense changes in business operations and dynamically configure the TCAM chip to "work on demand," thereby achieving deep energy savings at the system level.

[0051] In view of the technical deficiencies in the prior art, the purpose of this application is to minimize the shortcomings of the prior art and provide a low-power configuration method for TCAM chips in aggregation and distribution equipment, implemented through software. This method dynamically adjusts the internal operating mode and activation range of the TCAM chip by sensing network traffic and service demands in real time, thereby significantly reducing the overall power consumption of the device while ensuring packet processing performance. This method can also alleviate the problem of excessive power consumption of TCAM chips.

[0052] Figure 1 This is a flowchart illustrating a dynamic scheduling method for a tri-state content-addressable memory according to an exemplary embodiment. The dynamic scheduling method 10 for the tri-state content-addressable memory includes at least steps S102 to S108.

[0053] like Figure 1 As shown, in S102, the operating status information corresponding to the network device is obtained. The operating status information includes network traffic information and rule hit information of the tri-state content addressing memory.

[0054] In one embodiment, for example, the message arrival rate and average packet length can be acquired in real time as network traffic information; and rule hit information can be generated through the performance counter inside the three-state content addressing memory chip.

[0055] More specifically, for example, the system monitor can collect two types of key information in real time: first, network traffic information, including packet arrival rate and average packet length; second, rule hit distribution data read from the TCAM chip performance counter to identify which TCAM address ranges are frequently hit. The read data is stored in global variables and a database, and this data is sorted in ascending order according to the frequency of TCAM address range hits.

[0056] In S104, based on the running status information, the current hotspot rule and the hotspot sub-block in the three-state content addressing memory are determined.

[0057] In one embodiment, for example, the current hot spot rule can be determined based on the rule distribution data in the rule hit information; and the hot spot sub-block can be determined in the tri-state content addressing memory based on the hot spot rule.

[0058] More specifically, for example, a traffic feature analyzer can be used to analyze monitoring data to examine traffic trends over time and identify which address range among the issued rules has the highest hit rate. For instance, during the early morning hours, the analyzer might identify traffic rates below 10 Mbps, with 90% of packets hitting a rule set in the TCAM that represents only 5% of the total. Based on the rule distribution data in the rule hit information, the current hotspot rules are determined; and based on these hotspot rules, hotspot sub-blocks are determined in the tri-state content addressing memory.

[0059] More specifically, the address range corresponding to the hotspot rule in the tri-state content-addressable memory can be determined; the storage space corresponding to the address range is determined as the hotspot sub-block. Simultaneously, the rule analysis module can also analyze that in this batch of hotspot rules, certain fields (such as "source port") are almost entirely "ignored" bits, providing a basis for subsequent field matching optimization.

[0060] In S106, a scheduling policy is generated based on the hotspot rules and the hotspot sub-blocks. The scheduling policy includes a sub-block power control policy and a matching field control policy. For example, the minimum number of active sub-blocks can be determined based on the network traffic information; the scheduling policy is then generated based on the minimum number of active sub-blocks, the hotspot rules, and the hotspot sub-blocks.

[0061] More specifically, the sub-block power control strategy includes: keeping the hot spot sub-block powered on; and turning off the power supply to the non-hot spot sub-blocks.

[0062] Before shutting down the power supply to the non-hotspot sub-block, the process also includes: migrating the rules stored in the non-hotspot sub-block to the sub-block that is powered on.

[0063] More specifically, the matching field control strategy includes: when performing tri-state content-addressable memory matching, only some fields of the message are involved in the comparison, and the comparison circuit corresponding to at least one non-critical field is masked.

[0064] In one embodiment, for example, the policy decision-maker may make a decision based on the aforementioned characteristics. For the aforementioned early morning scenario, assuming there are 16 sub-blocks in the current TCAM chip, the decision-maker generates a scheduling policy to close 15 of these sub-blocks based on the characteristic analysis results, retaining only the TCAM sub-block containing the current packet hotspot rule.

[0065] More specifically, for example, the minimum number of activated sub-blocks can be determined based on the network traffic information; and a scheduling strategy can be generated based on the minimum number of activated sub-blocks, the hotspot rules, and the hotspot sub-blocks.

[0066] The sub-block power control strategy includes: keeping the hot spot sub-block powered on; and turning off the power supply to the non-hot spot sub-blocks.

[0067] Before shutting down the power to the non-hotspot sub-blocks, the process includes migrating the rules stored in the non-hotspot sub-blocks to the sub-blocks that are currently powered on. Before the TCAM is powered off, the issued rules are automatically migrated to ensure service continuity. This process typically follows the order of "writing SRAM actions first, then writing TCAM indexes" to avoid intermediate states where a match is found but an incorrect action is taken.

[0068] The matching field control strategy includes: when performing tri-state content-addressable memory matching, configuring the chip to extract only a portion of the packet's fields (such as "destination IP address" and "protocol type") for matching during the search, and disabling the comparison circuit corresponding to at least one non-critical field (such as "source port"). In this mode, the hardware will block level changes of the corresponding fields on the search line, thereby preventing the operation of the corresponding comparison circuit and saving switching power consumption.

[0069] In S108, the scheduling policy is sent to the tri-state content-addressable memory for dynamic scheduling. For example, dynamic scheduling can be implemented by writing configuration registers to the tri-state content-addressable memory.

[0070] In one embodiment, for example, a strategy can be received via a TCAM configurator, translated into a sequence of operations on specific registers of the TCAM chip, and dynamically scheduled by writing configuration registers to the tri-state content-addressable memory. On the hardware side, the platform receives power-on / off instructions for the TCAM sub-blocks and receives platform rule data sent to the TCAM.

[0071] According to the dynamic scheduling method for the tri-state content-addressable memory (TCM) of this application, the operating status information of the network device is obtained, including network traffic information and rule hit information of the TCM. Based on the operating status information, the current hotspot rules and hotspot sub-blocks in the TCM are determined. A scheduling strategy is generated based on the hotspot rules and the hotspot sub-blocks, including a sub-block power control strategy and a matching field control strategy. The scheduling strategy is then distributed to the TCM for dynamic scheduling. This allows for dynamic scheduling of the sub-block power status and matching fields of the TCM, enabling the TCM to operate on demand while meeting current service processing requirements. This effectively reduces the overall power consumption of the TCM and improves the energy efficiency of the network device while ensuring matching performance and service continuity.

[0072] It should be clearly understood that this application describes how specific examples are formed and used, but the principles of this application are not limited to any details of these examples. Rather, based on the teachings of the disclosure of this application, these principles can be applied to many other embodiments.

[0073] Figure 2 This is a flowchart illustrating a dynamic scheduling method for a three-state content-addressable memory according to another exemplary embodiment. Figure 2 The process shown in step 20 is... Figure 1 The flowchart shown describes the process step S106, "Generate a scheduling strategy based on the hotspot rules and the hotspot sub-blocks".

[0074] like Figure 2 As shown, in S202, the hotspot rule and the hotspot sub-block are obtained.

[0075] In S204, the scheduling policy is generated.

[0076] This can be further expanded to include predictive analysis of network traffic trends. For example, after device startup, the board initializes, and all TCAMs in the current board start. In the live network, the system detection will acquire real-time traffic data changes according to the system-set period, recording data such as the current rule hit count, packet arrival rate, and average packet length. This achieves real-time recording of the data, ensuring its authenticity and accuracy. Traffic analysis will make specific decisions based on the previously stored information. For instance, if the TCAM chip in the board experiences the highest traffic between 10:00 and 24:00, the strategy decision will send an instruction requiring all TCAM sub-blocks in the current board to power on and run; if the traffic is low between 0:00 and 6:00, the decision module will calculate the optimal number of required TCAM sub-blocks.

[0077] In S206, the sub-block power control strategy is generated.

[0078] This strategy determines the specific number of TCAM sub-blocks that need to be powered on or off based on traffic analysis results. The software sends the required number of TCAM sub-blocks to the hardware for power-on. If the required number is large, a power-on operation is performed; otherwise, a power-off operation is performed. By utilizing the independent power management features of multiple chips, a gradual power-on / off process is achieved.

[0079] After the strategy is executed, a feedback optimization step is also included: updating the current device power consumption status and the power-on / off status of the TCAM sub-module, updating the status every certain period of time, and returning the data to the system for detection, so that it can be used in the next TCAM sub-module power-on / off status decision, thus forming a closed-loop optimization.

[0080] Figure 3This is a flowchart illustrating a dynamic scheduling method for a three-state content-addressable memory according to another exemplary embodiment. Figure 3 The process shown in step 30 is... Figure 1 A detailed description of the process shown.

[0081] like Figure 3 As shown, in S302, the system starts and initializes all TCAMs on the board. The device starts, the board is initialized, and all TCAMs on the current board are started.

[0082] In S304, system detection is used. In the live network, system detection acquires real-time traffic data changes according to the system's set period, records data such as the current rule hit count, packet arrival rate, and average packet length, and stores this data to ensure its authenticity and accuracy.

[0083] In one specific embodiment, the system monitor collects two types of key information in real time: first, network traffic information, including packet arrival rate and average packet length; and second, rule hit distribution data read from the TCAM chip performance counter to identify which TCAM address ranges are frequently hit. The read data is stored in global variables and a database, and this data is sorted in ascending order according to the frequency of TCAM address range hits.

[0084] In S306, flow analysis.

[0085] The monitoring data can be analyzed using a traffic feature analyzer. This allows you to view traffic trends over time and identify which address range of rules hits most frequently. For example, during the early morning hours, the analyzer might identify traffic rates below 10Mbps, with 90% of packets hitting a rule set in TCAM that only accounts for 5% of the total. Simultaneously, the rule analysis module indicates that the "source port" field in these hot rules is almost entirely set to "ignore".

[0086] In S308, the strategy decision is whether the traffic changes.

[0087] The policy decision-maker can make decisions based on the above characteristics. For the aforementioned early morning scenario, the decision-maker provides feedback based on feature analysis: assuming there are 16 sub-blocks in the current TCAM chip, 15 of these sub-blocks will be closed. Only the TCAM sub-block containing the current packet hotspot rule will be retained. When configuring the chip search, only the "destination IP address" and "protocol type" fields of the packet will be extracted for matching, ignoring the "source port" field.

[0088] In S310, calculate the required number of TCAM sub-blocks N.

[0089] Traffic analysis makes specific decisions based on the specific information content stored previously. For example, the TCAM chip in the board card has the most traffic during the period from 10:00 to 24:00. The policy decision will send a command to power on all the TCAM sub - blocks in the current board card. When the traffic is less during the period from 0:00 to 6:00, the decision - making module will calculate the optimal number of required TCAM sub - blocks, and the software will send the number of TCAM sub - blocks to be powered on currently required to the hardware.

[0090] In S312, the current number of powered - on sub - blocks M.

[0091] In S314, when M > N, (M - N) sub - blocks are turned off.

[0092] In S316, when M = N, the current state is maintained.

[0093] In S318, when M < N, (N - M) sub - blocks are turned on. If the required number of powered - on units is large, the power - on operation will be executed; otherwise, the power - off operation will be executed.

[0094] In S320, the power state is updated, and the power consumption and the state of the TCAM sub - blocks are recorded.

[0095] Receive the instruction from the platform to power on and off the TCAM sub - blocks, and receive the platform rule data and send it to the TCAM.

[0096] The TCAM configurator receives the policy and translates it into an operation sequence for specific registers of the TCAM chip. For example, under the above - mentioned policy, the hardware in this mode will mask the level change of the "source port" field on the search line, thus preventing the corresponding comparison circuit from operating and saving the switching power consumption.

[0097] After the policy is executed, the current device power - consumption state and the power - on and off state of the TCAM sub - modules are updated. This state is updated at regular intervals and the data is returned to the system for detection to facilitate the next execution of the power - on and off state of the TCAM sub - blocks.

[0098] This application realizes the collaborative energy - saving of software and hardware. It is not a simple timed switch, but a fine - tuned control based on traffic prediction, achieving the optimal energy - saving effect. For the rule content issued by the device side, the software side can achieve lossless migration. Before the TCAM is powered off, the issued rules are automatically migrated to ensure business continuity. It is applicable to the current TCAM architecture and uses the characteristics of multi - chip independent power management to achieve progressive power - on and off.

[0099] It's worth noting that in practical applications, the characteristics of TCAM chips can also be modified at the hardware level. Reducing the power consumption of TCAM (Tri-State Content Addressable Memory) chips at the hardware architecture level is a key challenge in improving the energy efficiency of network devices. Because TCAM activates all memory cells for parallel comparison during each lookup, its static and dynamic power consumption is much higher than traditional memories (such as SRAM). Dynamically adjusting the operating voltage and clock frequency of TCAM based on traffic load is crucial. Reducing voltage and frequency during low-load periods can significantly reduce dynamic power consumption (power consumption is proportional to the square of the voltage) and restore performance under high load. Using improved TCAM cell circuit structures, such as differential structures, single-ended structures, or heterogeneous architectures based on SRAM + comparators, can reduce leakage current and toggle power consumption per memory cell. Despite various architecture-level energy-saving techniques, TCAM power optimization is limited by its inherent parallel comparison mechanism. While reducing energy consumption, it is essential to carefully address issues such as performance degradation, increased complexity, difficulties in rule management, and process bottlenecks. Therefore, practical applications often require a comprehensive trade-off between power consumption, speed, area, and cost, making it difficult to achieve ultimate optimization in a single dimension.

[0100] Those skilled in the art will understand that all or part of the steps of the above embodiments are implemented as a computer program executed by a CPU. When the computer program is executed by the CPU, it performs the functions defined by the method provided in this application. The program can be stored in a computer-readable storage medium, such as a read-only memory, a magnetic disk, or an optical disk.

[0101] Furthermore, it should be noted that the above figures are merely illustrative representations of the processes included in the method according to exemplary embodiments of this application, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0102] The following are embodiments of the apparatus described in this application, which can be used to execute the embodiments of the method described in this application. For details not disclosed in the apparatus embodiments of this application, please refer to the embodiments of the method described in this application.

[0103] Figure 4 This is a block diagram illustrating a dynamic scheduling device for a three-state content-addressable memory according to an exemplary embodiment. Figure 4 As shown, the dynamic scheduling device 40 of the tri-state content-addressable memory includes: an information module 402, a hotspot module 404, a strategy module 406, and a distribution module 408.

[0104] The information module 402 is used to obtain the operating status information corresponding to the network device. The operating status information includes network traffic information and rule hit information of the tri-state content addressing memory. The information module 402 is also used to obtain the packet arrival rate and average packet length in real time as network traffic information. The rule hit information is generated through the performance counter inside the tri-state content addressing memory chip.

[0105] The hotspot module 404 is used to determine the current hotspot rule and the hotspot sub-block in the three-state content addressing memory based on the running status information; the hotspot module 404 is also used to determine the current hotspot rule according to the rule distribution data in the rule hit information; and to determine the hotspot sub-block in the three-state content addressing memory according to the hotspot rule.

[0106] The strategy module 406 is used to generate a scheduling strategy based on the hotspot rules and the hotspot sub-blocks. The scheduling strategy includes a sub-block power control strategy and a matching field control strategy. The strategy module 406 is also used to determine the minimum number of activated sub-blocks based on the network traffic information. The strategy module 406 is used to generate a scheduling strategy based on the minimum number of activated sub-blocks, the hotspot rules, and the hotspot sub-blocks.

[0107] The distribution module 408 is used to distribute the scheduling policy to the tri-state content-addressable memory for dynamic scheduling operations. The distribution module 408 is also used to implement the dynamic scheduling operation by writing configuration registers to the tri-state content-addressable memory.

[0108] According to the dynamic scheduling device for the tri-state content-addressable memory (TCM) of this application, the device acquires the operating status information corresponding to the network device, including network traffic information and rule hit information of the TCM; based on the operating status information, it determines the current hotspot rules and hotspot sub-blocks in the TCM; based on the hotspot rules and hotspot sub-blocks, it generates a scheduling strategy, including a sub-block power control strategy and a matching field control strategy; and it distributes the scheduling strategy to the TCM for dynamic scheduling. This allows for dynamic scheduling of the sub-block power status and matching fields of the TCM, enabling the TCM to operate on demand while meeting current service processing requirements. This effectively reduces the overall power consumption of the TCM and improves the energy efficiency of the network device while ensuring matching performance and service continuity.

[0109] Figure 5 This is a block diagram illustrating an electronic device according to an exemplary embodiment.

[0110] The following reference Figure 5 To describe an electronic device 500 according to this embodiment of the present application. Figure 5 The electronic device 500 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0111] like Figure 5 As shown, the electronic device 500 is presented in the form of a general-purpose computing device. The components of the electronic device 500 may include, but are not limited to: at least one processing unit 510, at least one storage unit 520, a bus 530 connecting different system components (including storage unit 520 and processing unit 510), a display unit 540, etc.

[0112] The storage unit stores program code that can be executed by the processing unit 510, causing the processing unit 510 to perform the steps described in this specification according to various exemplary embodiments of this application. For example, the processing unit 510 can perform actions such as... Figure 1 , Figure 2 , Figure 3 The steps are shown in the figure.

[0113] The storage unit 520 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 5201 and / or a cache storage unit 5202, and may further include a read-only memory unit (ROM) 5203.

[0114] The storage unit 520 may also include a program / utility 5204 having a set (at least one) program module 5205, such program module 5205 including but not limited to: an operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0115] Bus 530 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0116] Electronic device 500 can also communicate with one or more external devices 500' (e.g., keyboard, pointing device, Bluetooth device, etc.), enabling users to communicate with devices that interact with electronic device 500, and / or any device (e.g., router, modem, etc.) that allows electronic device 500 to communicate with one or more other computing devices. This communication can be performed via input / output (I / O) interface 550. Furthermore, electronic device 500 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 560. Network adapter 560 can communicate with other modules of electronic device 500 via bus 530. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 500, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0117] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software, or by combining software with necessary hardware. Therefore, as... Figure 6 As shown, the technical solution according to the embodiments of this application can be embodied in the form of a software product. The software product can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, mobile hard drive, etc.) or on a network, and includes several instructions to cause a computing device (such as a personal computer, server, or network device, etc.) to execute the above-described method according to the embodiments of this application.

[0118] The software product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0119] The computer-readable storage medium may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0120] Program code for performing the operations of this application can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0121] The aforementioned computer-readable medium carries one or more programs. When these programs are executed by a device, the computer-readable medium performs the following functions: acquiring operational status information corresponding to the network device, the operational status information including network traffic information and rule hit information of the tri-state content-addressable memory; determining the current hotspot rules and hotspot sub-blocks in the tri-state content-addressable memory based on the operational status information; generating a scheduling policy according to the hotspot rules and the hotspot sub-blocks, the scheduling policy including a sub-block power control policy and a matching field control policy; and distributing the scheduling policy to the tri-state content-addressable memory for dynamic scheduling operations.

[0122] Those skilled in the art will understand that the above modules can be distributed in the device as described in the embodiments, or they can be modified accordingly and placed in one or more devices that are unique to this embodiment. The modules in the above embodiments can be combined into one module, or they can be further divided into multiple sub-modules.

[0123] Through the description of the above embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, mobile terminal, or network device, etc.) to execute the methods according to the embodiments of this application.

[0124] Exemplary embodiments of this application have been specifically shown and described above. It should be understood that this application is not limited to the detailed structures, arrangements, or implementation methods described herein; rather, this application is intended to cover various modifications and equivalent arrangements contained within the spirit and scope of the appended claims.

Claims

1. A dynamic scheduling method for a tri-state content-addressable memory, characterized in that, include: Obtain the operating status information corresponding to the network device, the operating status information including network traffic information and rule hit information of the tri-state content addressing memory; Based on the aforementioned operational status information, the current hotspot rules and the hotspot sub-blocks in the three-state content addressing memory are determined. Based on the hotspot rules and the hotspot sub-blocks, a scheduling strategy is generated, which includes a sub-block power control strategy and a matching field control strategy. The scheduling policy is sent to the tri-state content-addressable memory for dynamic scheduling.

2. The method as described in claim 1, characterized in that, Obtain the operating status information of the network device, including: Real-time acquisition of message arrival rate and average packet length as network traffic information; Rule hit information is generated by using the performance counter inside the tri-state content-addressable memory chip.

3. The method as described in claim 1, characterized in that, Based on the aforementioned operational status information, the current hotspot rules and hotspot sub-blocks in the tri-state content-addressable memory are determined, including: Based on the rule distribution data in the rule hit information, determine the current hot rules; Hotspot sub-blocks are determined in the tri-state content addressing memory according to the hotspot rules.

4. The method as described in claim 3, characterized in that, Determining hotspot sub-blocks in the tri-state content-addressable memory according to the hotspot rules includes: Determine the address range corresponding to the hotspot rule in the tri-state content addressing memory; The storage space corresponding to the address range is identified as a hotspot sub-block.

5. The method as described in claim 1, characterized in that, Based on the hotspot rules and the hotspot sub-blocks, a scheduling strategy is generated, including: Based on the network traffic information, determine the minimum number of activated sub-blocks; A scheduling strategy is generated based on the minimum number of activated sub-blocks, the hotspot rules, and the hotspot sub-blocks.

6. The method as described in claim 5, characterized in that, The sub-block power control strategy includes: Keep the hotspot sub-block powered on; Turn off the power supply to the non-hotspot sub-blocks.

7. The method as described in claim 6, characterized in that, Before shutting down the power supply to the non-hotspot sub-block, the following steps are also included: The rules stored in the non-hotspot sub-blocks are migrated to the sub-blocks that are powered on.

8. The method as described in claim 5, characterized in that, The matching field control strategy includes: When performing tri-state content-addressable memory matching, only some fields of the message are compared, and the comparison circuit corresponding to at least one non-critical field is masked.

9. The method as described in claim 1, characterized in that, The scheduling policy is distributed to the tri-state content-addressable memory for dynamic scheduling operations, including: Dynamic scheduling is achieved by writing configuration registers to the tri-state content-addressable memory.

10. A dynamic scheduling device for a tri-state content-addressable memory, characterized in that, include: The information module is used to obtain the operating status information of the network device, which includes network traffic information and rule hit information of the tri-state content addressing memory. The hotspot module is used to determine the current hotspot rules and the hotspot sub-blocks in the tri-state content addressing memory based on the running status information. The strategy module is used to generate a scheduling strategy based on the hotspot rules and the hotspot sub-blocks. The scheduling strategy includes a sub-block power control strategy and a matching field control strategy. The distribution module is used to distribute the scheduling strategy to the tri-state content-addressable memory for dynamic scheduling operations.

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