Connector circuit board

Abstract

This invention provides a connector circuit board, comprising a circuit layer including multiple parallel circuit traces, multiple left metal pads, and multiple right metal pads. The multiple parallel circuit traces extend laterally; each parallel circuit trace has a left end electrically coupled to a corresponding left metal pad; each parallel circuit trace has a right end electrically coupled to a corresponding right metal pad; the multiple parallel circuit traces occupy a left height E1; the multiple right metal pads occupy a right height E2; wherein the left height E1 is smaller than the right height E2. This circuit board is suitable for use as an interface between an ASIC and an Ethernet port for Very Short Pitch (XSR).

Description

Technical Field

[0001] This invention relates to a circuit board specifically designed for high-frequency and high-speed data transmission, particularly suitable for manufacturing connectors for data transmission. The circuit board of this invention has a funnel shape, comprising a narrow end and a wide end. The narrow end is suitable for electrical coupling to an ASIC substrate, and the wide end is suitable for electrical coupling to at least one Ethernet port. Multiple parallel circuit traces of this invention are arranged in a closely spaced configuration at the narrow end of the circuit board. Background Technology

[0002] like Figure 1 As shown, US Patent US20240128665A1 discloses a conventional differential pair circuit 105 disposed on a circuit board 104. The conventional differential pair circuit 105 occupies a rectangular space. The figure shows two conventional differential pair circuits 105 disposed on the circuit board 104.

[0003] The diagram uses only two sets of differential pair circuits 105 as examples. The middle section of each differential pair circuit 105 is a parallel circuit trace 105P, with its right end electrically coupled to the corresponding rectangular metal pad 106 and its left end electrically coupled to the corresponding circular metal pad 107. The two left circular metal pads 107 are located on opposite sides of the circuit traces 105P arranged parallel to each other along the X direction.

[0004] The left-side height E1 and right-side height E2 of each differential pair circuit 105 are equal, for example: E1 = 1,200 micrometers, E2 = 1,200 micrometers. This dimension is calculated based on the following parameters: each of the right-side rectangular metal pads 106 has a height of 300 micrometers, and the spacing between adjacent metal pads is also 300 micrometers. The rectangular outline of the conventional differential pair circuit 105 cannot simultaneously electrically couple to both the ASIC substrate and the Ethernet port, limiting its miniaturization applications. Especially in today's applications requiring high-frequency and high-speed data transmission, the conventional rectangular differential pair circuit 105 is insufficient. Summary of the Invention

[0005] In view of the problems existing in the prior art, the present invention provides a circuit board for high-frequency and high-speed data transmission. The differential pair circuits on the circuit board are arranged in a compact manner, which reduces the area and height occupied by one end of the circuit board, forming a funnel shape with a narrow end and a wide end. This overcomes the shortcomings of the traditional rectangular outline of the differential pair circuit 105, which cannot be electrically coupled to both the ASIC substrate and the Ethernet port at the same time, thus limiting its miniaturization application.

[0006] To achieve the above and other related objectives, the present invention provides a connector circuit board, comprising a circuit layer including multiple parallel circuit traces, multiple left metal pads, and multiple right metal pads, wherein...

[0007] The multiple parallel circuit traces extend laterally;

[0008] Each parallel circuit trace has a left end that is electrically coupled to the corresponding left metal pad;

[0009] Each parallel circuit trace has a right end that is electrically coupled to the corresponding right metal pad;

[0010] The multiple parallel circuit traces occupy the left side height E1; and

[0011] The plurality of right metal pads occupy a height of E2 on the right side; wherein...

[0012] The left side height E1 is less than the right side height E2.

[0013] Compared to traditional differential pair circuits, the present invention is characterized by the circuit layout design of the differential pair circuit: in some embodiments, the left circular metal pad is positioned on the same side as the parallel circuit trace, thereby reducing the space occupied on the left side. The narrower left end can be directly electrically coupled to the ASIC substrate, while the wider right end is suitable for electrical coupling to the Ethernet port. This design makes the circuit board funnel-shaped, with the height E1 of the narrow end of the funnel shape being smaller than the height E2 of the wide end. The narrow end E1 is suitable for electrical coupling to the ASIC substrate, while the wide end E2 is suitable for electrical coupling to at least one Ethernet port, making it suitable as an extremely short distance (XSR) interface between the ASIC and the Ethernet port.

[0014] The differential pair circuits on the circuit board of this invention are arranged in a compact layout, which reduces the area and height occupied by one end of the circuit board, forming a funnel shape with a narrow end and a wide end. The narrow end of the circuit board of this invention is suitable for electrical coupling to an ASIC substrate; the wide end of the circuit board of this invention is suitable for electrical coupling to at least one Ethernet port. The circuit board of this invention is suitable for making an extremely short distance (XSR) interface between the ASIC and the Ethernet port. Attached Figure Description

[0015] Figure 1 This shows a schematic diagram of a conventional differential pair circuit disclosed in US Patent US20240128665A1.

[0016] Figure 2 This illustrates a circuit layout embodiment of the present invention.

[0017] Figures 3A-3E This invention illustrates five circuit layouts.

[0018] Figures 4A-4D This illustrates a second embodiment of the circuit layout of the present invention.

[0019] Figure 5 This illustrates a third embodiment of the circuit layout of the present invention.

[0020] Figure 6 This illustrates embodiment four of the circuit layout of the present invention.

[0021] Figures 7A-7C This illustrates embodiment five of the circuit layout of the present invention.

[0022] Figures 8A-8B This invention displays a circuit layout embodiment six.

[0023] Figure 9 The outline of the circuit board of the present invention is shown.

[0024] Figure 10 This illustrates embodiment seven of the circuit layout of the present invention.

[0025] Figure 11 This invention demonstrates an application example of its circuit board.

[0026] Figure 12 Shows the circuit layout with dimensions.

[0027] Figure 13 This invention demonstrates the present invention. Figure 11 Side view.

[0028] Figures 14A-14B This invention illustrates an embodiment of the connector.

[0029] Figure 15 This illustrates an application example of the connector of the present invention.

[0030] Figure 16 The connector of this invention adopts a circuit board stack structure.

[0031] Figure 17 This illustrates a second application example of the connector of the present invention.

[0032] Figures 18A-18B This invention illustrates the first type of metal spring contact structure.

[0033] Figures 19A-19B This invention illustrates a second type of metal spring contact structure.

[0034] Figure 20 This illustrates a third application example of the connector of the present invention.

[0035] Figures 21A-21B This illustrates embodiment eight of the circuit layout of the present invention.

[0036] Figure 22 Shows the circuit layout with dimensions.

[0037] Figure 23 This illustrates embodiment nine of the circuit layout of the present invention.

[0038] Figure 24 This illustrates embodiment ten of the circuit layout of the present invention.

[0039] Figure 25 This invention demonstrates the present invention. Figure 22 Cross-sectional view.

[0040] Figure 26 This illustrates a fourth application example of the connector of the present invention.

[0041] Figures 27A-27B This illustrates embodiment eleven of the circuit layout of the present invention.

[0042] Figures 28A-28B This invention demonstrates a first design for the blank area of ​​the grounding layer.

[0043] Figures 29A-29B This invention demonstrates a second design for the blank area of ​​the grounding layer.

[0044] Figures 30A-30B This invention shows the third design of the blank area of ​​the grounding layer.

[0045] Figures 31A-31B This invention demonstrates the fourth design for the blank area of ​​the grounding layer.

[0046] Figures 32A-32B This invention displays the fifth design of the blank area of ​​the grounding layer.

[0047] Figures 33A-33B This invention displays the sixth design of the blank area of ​​the grounding layer.

[0048] Wherein: 51 is a metal pad; 52 is a through-hole / via; 53 is an input circuit trace; 55 is a blank area; 56 is a flat boundary; 100 is the ASIC; 101 is the substrate; 102 is the motherboard; 103 is the Ethernet port; 104 is the circuit board; 105 is the differential pair circuit; 105P is the parallel circuit trace; 106-107 are metal pads; 204, 204B, and 204C are circuit boards; 205 is... Differential pair circuit; 205B is the bottom circuit trace; 205G is the ground trace; 205P is the parallel circuit trace; 205T is the top circuit trace; 206 and 206B are metal pads; 207, 207A, 207B, 207C, 207D, and 207E are metal pads; 2071 and 2072 are metal pads; 208 is the ground plane; 209 is the insulating layer; 212 is the transition connection; 213 B and 213T are circuit layers; 214 is a via; 304, 304B, 304C, and 304D are circuit boards; 306, 306B, and 306C are circuit board stacks; 307 is a pad; 308 is a bracket; 311-316 are circuit layers; B10, B11, B12, and B13 are metal balls; B21, B22, and B23 are metal balls; B31, B32, and B33 are metal balls; B41, B... 42 and B43 are metal balls; C1-C10 are metal contact points; E1 is the left side height; E2 is the right side height; EOCB is the optical circuit board; HB1, HB2, and HB3 are rigid boards; L1, L2, L3, and L4 are circuit layers; S1 and S2 are metal springs; NS is the narrow side; P11, P12, and P13 are spacers; V, V10, V11, V12, V13, and V15 are through holes; WS is the wide side. Detailed Implementation

[0049] Figure 2 This illustrates a circuit layout embodiment of the present invention.

[0050] Figure 2 Multiple differential pair circuits 205 are shown arranged on circuit board 204. The left circular metal pad 207 of the differential pair circuit 205 is positioned on the same side of the parallel circuit trace 205P along the X direction. Accordingly, the left height E1 can be reduced to half the right height E2. The left height E1 is approximately 600 micrometers, and the right height E2 is 1,200 micrometers. This dimension is calculated based on the following parameters: the height of the circuit trace along the Y direction (i.e., the trace width) is 100 micrometers, the spacing between adjacent traces is 100 micrometers, the diameter of the circular metal pad 207 is 300 micrometers, the height of the rectangular metal pad 206 is 300 micrometers, and the spacing between adjacent rectangular metal pads 206 is 300 micrometers. It should be noted that these are illustrative dimensions; with technological advancements, smaller dimensions can be used.

[0051] Figures 3A-3E This invention illustrates five circuit layouts.

[0052] Figure 3A The two circular metal pads 207A of the differential pair circuit 205 are aligned in a straight line along the Y direction. Example parameters: circular metal pad diameter 150 micrometers, circuit trace height 100 micrometers. The left side height E1 of the differential pair circuit 205 is approximately 425 micrometers, accounting for 35.4% of the right side height E2 = 1,200 micrometers.

[0053] Figure 3B The two circular metal pads 207B of the differential pair circuit 205 are arranged in a staggered pattern to avoid overlapping and short circuits if the metal pads were arranged vertically if they were large. Example parameters: circular metal pad diameter 200 micrometers, trace or trace spacing height both 100 micrometers. The left side height E1 of the differential pair circuit 205 is approximately 450 micrometers, accounting for 37.5% of the right side height E2.

[0054] Figure 3C The differential pair circuit 205 has two circular metal pads 207C arranged in a straight line along the X direction. The circuit traces of the differential pair circuit 205 are electrically coupled to the metal pads 207C through bends. Example parameters: the diameter of the circular metal pads is 200 micrometers, and the height of the traces or trace spacing is 100 micrometers. The left side height E1 of the differential pair circuit 205 is approximately 400 micrometers, and the right side height E is approximately 1,200 micrometers. The height E1 is one-third of the height E2.

[0055] Figure 3D The differential pair circuit 205 has two large, circular metal pads 207D, arranged in a straight line along the X-direction. Each trace is electrically coupled to the metal pad 207D through a bend. Example parameters: circular metal pad diameter 300 micrometers, trace or trace spacing height 100 micrometers. The left side height E1 of the differential pair circuit 205 is approximately 600 micrometers, and the right side height E2 is approximately 1,200 micrometers; the height E1 is 50% of the height E2.

[0056] Figure 3E The differential pair circuit 205 has two circular metal pads 207E arranged in a straight line along the X direction. The traces of the differential pair circuit 205 are electrically coupled to the metal pads through bends, with the bottom traces directly coupled to them. Example parameters: circular metal pad diameter 300 micrometers, trace or trace spacing height 100 micrometers. The left side height E1 of the differential pair circuit 205 is approximately 600 micrometers, accounting for 50% of the right side height E2.

[0057] Figures 4A-4D This illustrates a second embodiment of the circuit layout of the present invention.

[0058] Figure 4AA top view is shown, which shows the differential pair circuit 205 including parallel circuit traces 205P, a circular metal pad 207 on the left and a rectangular metal pad 206 on the right.

[0059] Figure 4B Display along Figure 4A The cross-sectional view of the BB' line shows that the ground layer 208 is positioned below the circuit trace 205, and an insulating layer 209 is provided between the circuit trace 205 and the ground layer. Multiple circular metal pads 207 are positioned on the left side of the differential pair circuit 205, and multiple metal vias V10 penetrate the top and bottom sides of the circuit board. The top of each via V10 is electrically coupled to the corresponding circular metal pad 207, and the bottom of each via V10 is electrically coupled to a metal ball B10 positioned on the bottom surface of the circuit board.

[0060] Figure 4C A top view is shown, illustrating the connection structure between the rectangular metal pad 206 and the input circuit trace 205P.

[0061] Figure 4D A blank area (non-metallic area) 55 is formed on the ground layer 208, the size of which is larger than that of the rectangular metal pad 206. The blank area (non-metallic area) 55 has the following characteristics: the size of the blank area 55 is larger than that of the rectangular metal pad 206; the area of ​​the blank area 55 covers the rectangular metal pad 206; the boundary 56 of the blank area 55 is straight and overlaps the junction line between the rectangular metal pad 206 and the input circuit trace 205P.

[0062] Figure 5 This illustrates a third embodiment of the circuit layout of the present invention.

[0063] Figure 5 This diagram shows a plurality of differential pair circuits 205 configured on circuit board 204B, each having horizontally arranged parallel circuit traces 205P. According to the invention, these parallel circuit traces 205P are closely arranged along the Y direction. The left-side height E1 of the parallel circuit traces 205P, i.e., the area occupied by adjacent parallel circuit traces 205P, is measured to be approximately E1 = 800 micrometers. This is one-third of the right-side height E2 occupied by the rectangular metal pads 206, E2 = 2400 micrometers. The dimensional calculations are based on the following parameters: the diameter of each circular metal pad 207 is 200 micrometers, the height of each circuit trace of the parallel circuit traces 205P is 100 micrometers, the space between each adjacent circuit trace in the parallel portion is 100 micrometers, the height of each rectangular metal pad 206 is 300 micrometers, and the space between each adjacent rectangular metal pad is 300 micrometers.

[0064] Figure 6 This illustrates embodiment four of the circuit layout of the present invention.

[0065] Figure 6This shows the direct connection between each parallel circuit trace 205P and its corresponding circular metal pad 207. With this configuration, the left-side height E1 occupied by the parallel circuit trace 205P is approximately 850 micrometers, and E1 is 35.4% of the right-side height E2 occupied by the rectangular metal pad 206, where E2 = 2,400 micrometers.

[0066] Figures 7A-7C This illustrates embodiment five of the circuit layout of the present invention.

[0067] Figure 7A The two circular metal pads 207 of the differential pair circuit 205 are arranged in a straight line along the horizontal or X direction; the parallel circuit trace 205P is electrically coupled to the corresponding circular metal pad 207 through a turn connection 212.

[0068] Figure 7B The two circular metal pads 207 of the differential pair circuit 205 are arranged in a straight line in the horizontal or X direction. The top circuit trace is electrically coupled to the left circular metal pad 207 through a turn connection 212, while the bottom circuit trace is electrically coupled to the corresponding circular metal pad 207 through a direct connection.

[0069] Figure 7C The two circular metal pads 207 of the differential pair circuit 205 are arranged in a straight line at a 45-degree angle relative to the horizontal direction; the top circuit trace is electrically coupled to the corresponding circular metal pad 207 through a direct connection, while the bottom circuit trace is electrically coupled to the corresponding circular metal pad 207 through a turn connection 212.

[0070] Figures 8A-8B This invention displays a circuit layout embodiment six.

[0071] Figure 8A Shows a top view of multiple differential pair circuits configured on circuit board 204C. On the right side of circuit board 204C are multiple vertically arranged first rectangular metal pads 206 and multiple vertically arranged second rectangular metal pads 206B. The first rectangular metal pads 206 are extensions of the first circuit layer 213T configured on the top side of circuit board 204C; while the second rectangular metal pads 206B are extensions of the second circuit layer 213B configured on the bottom side of circuit board 204C.

[0072] Figure 8B Display along Figure 8A A cross-sectional view of the centerline CC'.

[0073] Figure 8BThe second rectangular metal pad 206B is an extended contact surface of the second circuit layer 213B disposed on the bottom side of the circuit board 204C. The second rectangular metal pad 206B is electrically coupled to the second circuit layer 213B through a vertical metal via 214. A ground plane 208 is located between the two circuit layers 213B.

[0074] Multiple first metal balls B11, B12 are disposed on the bottom side of circuit board 204C. Each first metal ball B11, B12 is electrically coupled to a corresponding circuit trace of the first circuit layer 213T. Multiple second metal balls B21, B22 are disposed on the bottom side of circuit board 204C, and each second metal ball B21, B22 is electrically coupled to a corresponding circuit trace of the second circuit layer 213B. Multiple metal vias V11, V12 are disposed on the left side of circuit board 204C, and each metal via V11, V12 is electrically coupled to a corresponding circular metal pad 207 above it. These metal vias V11, V12 are vertically arranged, and each metal via is electrically coupled to a corresponding metal pad 207 of the first circuit layer 213T.

[0075] Figure 9 The outline of the circuit board of the present invention is shown.

[0076] Figure 9 The display circuit board 304 is funnel-shaped, with a narrow side (NS) on the left and a wide side (WS) on the right. Multiple differential pair circuits 205 are disposed on the circuit board 304. Multiple circular metal pads 207 are disposed on the left side of the circuit board 304, and multiple rectangular metal pads 206 are disposed on the right side of the circuit board 304. The left end of each circuit trace of the differential pair circuit 205 is electrically coupled to the corresponding circular metal pad 207, and the right end of each circuit trace of the differential pair circuit 205 is electrically coupled to the corresponding rectangular metal pad 206.

[0077] Multiple metal through holes V11, V12 ( Figures 8A-8B The parallel circuit traces 205P are arranged on the left side of circuit board 304. Each metal via V11, V12 is electrically coupled to its corresponding circular metal pad 207 on top. The left end of each parallel circuit trace 205P is electrically coupled to the corresponding metal via V11, V12 via the corresponding metal pad 207; the parallel circuit traces 205P extend horizontally and are arranged on the left side of circuit board 304. On the right side, multiple rectangular metal pads 206 are arranged vertically in a straight line along the Y direction and are arranged on the right side of circuit board 304. The right end of each parallel circuit trace 205P is electrically coupled to the corresponding rectangular metal pad 206.

[0078] Parallel circuit trace 205P is arranged vertically along the Y direction on the narrow side (NS) end of circuit board 304, occupying the left side height E1 of circuit board 304. Multiple right-side metal pads 206 are arranged vertically along the wide side (WS) of circuit board 304, occupying the right side height E2 of circuit board 304. Based on the compact circuit layout of this invention, the circular metal pads 207 are rearranged, causing the left side height E1 of the circuit layout to be smaller than the right side height E2.

[0079] The narrow side (NS) with multiple metal vias V11, V12 is suitable for electrical coupling to one of the following substrates: interposer, ASIC substrate, CPU substrate, IC substrate, and circuit board; while the wide side (WS) with multiple rectangular metal pads 206 is suitable for electrical coupling to at least one high-speed input / output (I / O) interface (such as an Ethernet port).

[0080] Figure 9 The upper half of the parallel circuit trace 205P is shown, with the right ends staggered and shifted to the right from top to bottom; the lower half of the parallel circuit trace 205P has the right ends staggered and shifted to the left.

[0081] Figure 10 This illustrates embodiment seven of the circuit layout of the present invention.

[0082] Figure 10 The circular metal pads 207 are arranged in a staggered manner to prevent short circuits between them when the circular metal pads 207 are large, while the rest is similar to the previous figure.

[0083] Figure 11 This invention demonstrates an application example of its circuit board.

[0084] Figure 11 The left side NS of the display circuit board 304 is suitable for electrical coupling with the ASIC substrate, while the right side WS is suitable for electrical coupling with at least one Ethernet port 103.

[0085] Figure 12 Shows the circuit layout with dimensions.

[0086] Figure 12Only the upper portion of circuit board 304C is shown, where multiple parallel circuit traces 205P are closely arranged and occupy the left side of the narrow side (NS) with a height E1 = 2,400 micrometers; multiple rectangular metal pads 206, 206B occupy the right side of the wide side (WS) with a height E2 = 7,200 micrometers. The left height E1 is one-third of the right height E2, calculated based on the following parameters: the diameter of each left circular metal pad 207 is 200 micrometers, the width of each parallel circuit trace is 100 micrometers, the spacing between each parallel circuit trace is 100 micrometers, the height of each rectangular metal pad 206 is 300 micrometers, and the spacing between adjacent rectangular metal pads 226 is 300 micrometers.

[0087] Figure 13 This invention demonstrates the present invention. Figure 11 Side view.

[0088] Figure 13 The narrow side (NS) of the display board 304C is directly disposed on the ASIC substrate 101, while the wide side (WS) of the board 304C is configured to be electrically coupled to at least one Ethernet port 103 to provide EOCB connectivity.

[0089] Figures 14A-14B This invention illustrates an embodiment of the connector.

[0090] Figure 14A This illustrates the first connector embodiment of the present invention. Figure 14A Two board stacks 304C are shown, with their right sides flexible. These flexible right sides are adapted to form a female connector suitable for coupling with a male connector. The first board 304C has a first signal circuit layer 311, and the second board 304C has a second signal circuit layer 312. The female connector consists of a top metal contact array C1 of the first signal circuit layer 311 and a bottom metal contact array C2 of the second signal circuit layer 312. The female connector is designed to accept a male connector. The EOCB has a male connector consisting of a top first metal contact array IO1 and a bottom second metal contact array IO2.

[0091] Figure 14B This invention shows a second connector embodiment.

[0092] Figure 14BTwo separate circuit boards 304D are shown. The first circuit board 304D has two signal circuit layers 313, 314, and the second circuit board 304D has two signal circuit layers 315, 316. Their flexible right sides are adapted to form a female connector designed to accept a male connector. The female connector consists of two top metal contact arrays C3, C4, which are extended contacts of the two signal circuit layers 313, 314, and two bottom metal contact arrays C5, C6, which are extended contacts of the two signal circuit layers 315, 316. This configuration is suitable for accepting male connectors with dual arrays of metal contacts, such as EOCB in the diagram, which has a male connector consisting of a first dual array of metal contacts IO3, IO4 on the top and a second dual array of metal contacts IO5, IO6 on the bottom.

[0093] Figure 15 This illustrates an application example of the connector of the present invention.

[0094] Figure 15 The diagram shows two connectors configured on top of an ASIC substrate designed to accept electrical coupling of dual male connectors.

[0095] Figure 16 The connector of this invention adopts a circuit board stack structure.

[0096] Figure 16 Display board 306 has four signal circuit layers, suitable for forming two connectors. The top female connector has corresponding metal contact arrays C7, C8, suitable for receiving electrical coupling from a first male connector (e.g., EOCB in the figure). The bottom female connector has corresponding metal contact arrays C9, C10, suitable for receiving electrical coupling from a second male connector (e.g., EOCB in the figure).

[0097] Figure 17 This illustrates a second application example of the connector of the present invention.

[0098] Figure 17 The display board stack 306 is suitable for configuration on the ASIC substrate 101, with a flexible portion on the right end that can accommodate the electrical coupling of two male connectors.

[0099] Figures 18A-18B This invention illustrates the first type of metal spring contact structure.

[0100] Figure 18AThe diagram shows multiple first metal springs S1 designed into the connector. Each first metal spring S1 is shaped like a lowercase sigma and has a flat portion for mounting on the surface of the corresponding metal contact assembly. It also has a V-shaped portion, with the tip of the V away from the surface of the corresponding metal contact assembly, serving as an extended electrical contact for the EOCB connector. A bracket 308 frames the flexible end of the circuit board, making it a female connector. This configuration ensures that the flexible end is securely held, allowing it to be electrically coupled to the corresponding male connector.

[0101] Figure 18B The first metal spring S1 can also be used in male connectors, such as EOCB. Each first metal spring S1 is shaped like a lowercase sigma and has a flat portion for mounting on the surface of the corresponding metal contact assembly of the EOCB. It also has a V-shaped portion, with the tip of the V away from the surface of the corresponding metal contact assembly, serving as an extended electrical contact for the EOCB connector.

[0102] Figures 19A-19B This invention illustrates a second type of metal spring contact structure.

[0103] Figure 19A The diagram shows multiple second metal springs S2 designed into the connector. Each second metal spring S2 is shaped like a teaspoon and has a flat portion for mounting on the surface of the corresponding metal contact assembly. It also has a V-shaped portion, with the tip of the V away from the surface of the corresponding metal contact assembly, serving as an extended electrical contact for the EOCB connector.

[0104] Figure 19B The second metal spring S2 can also be used in male connectors, such as EOCB. Each second metal spring S2 is shaped like a teaspoon. Each second spring S2 has a flat portion for mounting on the surface of the corresponding metal contact assembly of the EOCB. It also has a V-shaped portion, with the tip of the V away from the surface of the corresponding metal contact assembly, serving as an extended electrical contact for the EOCB connector.

[0105] Figure 20 This illustrates a third application example of the connector of the present invention.

[0106] Figure 20 This diagram shows a circuit board stack 306B consisting of rigid boards HB10, HB11, HB12, and HB13, where the top board HB10 can be either a rigid or flexible board. All rigid boards are made flexible at their right ends by removing most of the substrate and retaining only a few circuit layers. The rigid boards have flexible right ends by partially removing the top portion of the rigid boards while retaining at least the bottom circuit layers to ensure flexibility.

[0107] Figure 20The diagram shows four signal circuitry layers L1, L2, L3, and L4 configured in the circuit board stack 306B. Multiple coaxial metal vias V11, V12, and V13 are configured on the left side to electrically couple these signal circuitry layers to their corresponding bottom metal balls B11. Four flexible right ends form two female connectors, functioning similarly to the connectors in Figure 18 or Figure 19.

[0108] Figures 21A-21B This illustrates embodiment eight of the circuit layout of the present invention.

[0109] Figure 21A This shows a top view of the revised circuit layout, with a ground trace 205G added to the differential pair circuits. The ground trace 205G is positioned between adjacent differential pair circuits to prevent signal crosstalk between them. A ground metal pad 307 is positioned between two circular metal pads 2071 and 2072.

[0110] Figure 21B Display along Figure 21A The sectional view of line DD' in the middle.

[0111] A top circuit layer 213T is disposed on the top of the board, and a bottom circuit layer 213B is disposed on the bottom of the board, with a ground plane 208 disposed in between. A ground trace 205G is electrically coupled to the ground plane 208 through a metal pad 307 and a corresponding metal via 11. The figure shows multiple vertical metal vias V11 electrically coupling the first circuit layer 213T to the corresponding bottom metal ball B11.

[0112] Figure 22 Shows the circuit layout with dimensions.

[0113] Figure 22 Only a portion of the circuit board is shown. The diagram shows that each differential pair circuit 205 has an added ground trace 205G, located between adjacent differential pairs. Multiple parallel circuit traces 205P are closely spaced, occupying the narrow side (NS), i.e., the left side height E1 = 2 < 400 micrometers. Multiple rectangular metal pads 206, 206B occupy the wide side (WS), i.e., the right side height E2 = 7,200 micrometers. The diagram shows that the left side height E1 is one-third of the right side height E2.

[0114] Figure 23 This illustrates embodiment nine of the circuit layout of the present invention.

[0115] Figure 23 Explanation Figure 22The grounding trace 205G was removed, making the layout of the parallel circuit trace 205P more compact.

[0116] Figure 23 The diagram shows multiple parallel circuit traces 205P closely spaced, occupying a height of 1,600 micrometers on the left side of the narrow side (NS) of the board, while multiple rectangular metal pads 206 occupy a height of 7,200 micrometers on the right side (WS). The left height E1 is one-third the right height E2.

[0117] Figure 24 This illustrates embodiment ten of the circuit layout of the present invention.

[0118] Figure 24 show Figure 22 The ground trace 205G in the parallel circuit trace 205P is removed, while the remaining ground traces remain unchanged.

[0119] Figure 25 This invention demonstrates the present invention. Figure 22 Cross-sectional view.

[0120] Figure 25 A vertical metal through-hole V15 is shown, which will connect to the top ground trace 205G. Figure 22 The metal balls B10 are electrically coupled to the bottom of the circuit board. Metal balls B11, B12, and B13 are electrically coupled to the first circuit layer 213T, and metal balls B21, B22, and B23 are electrically coupled to the second circuit layer 213B.

[0121] Figure 26 This illustrates a fourth application example of the connector of the present invention.

[0122] Figure 26 The diagram shows a board stack 306C with four circuit layers L1, L2, L3, and L4. Multiple vertical coaxial metal vias V are disposed on the left side of the board stack 306C. Each vertical coaxial metal via V electrically couples the circuit traces of the corresponding circuit layer to corresponding bottom metal balls B11, B12, B13, B21, B22, and B23. Bottom metal balls B11, B12, and B13 are electrically coupled to the first circuit layer L1; bottom metal balls B21, B22, and B23 are electrically coupled to the second circuit layer L2; bottom metal balls B31, B32, and B33 are electrically coupled to the third circuit layer L3; and bottom metal balls B41, B42, and B43 are electrically coupled to the fourth circuit layer L4.

[0123] Figures 27A-27B This illustrates embodiment eleven of the circuit layout of the present invention.

[0124] Figure 27AThree grounding pads, P11, P12, and P13, are shown. These three grounding pads are aligned in a straight line with the two circular metal pads 207 of the corresponding differential pair circuit 205, and are arranged alternately. One of the lower traces of the pair of circuit traces 205 runs in a loop around the grounding pad P12. This looping trace can compensate for part of the signal skew.

[0125] Figure 27B Each grounding pad P11, P12, P13 is electrically coupled to the ground plane 208 through its corresponding vertical metal via V10. Grounding pads P11, P12, P13 and their corresponding metal via V10 help prevent signal crosstalk during signal transmission.

[0126] Figures 28A-28B This invention demonstrates a first design for the blank area of ​​the grounding layer.

[0127] Figure 28A This diagram shows an annular metal pad 51, a plated through-hole or metal through-hole 52, and an input circuit 53 connected to the annular metal pad 51.

[0128] Figure 28B A ground plane 208 is positioned below a circular metal pad 51, i.e., in the Z direction. An insulating layer (not shown) lies between the ground plane 208 and the circular metal pad 51. A clearance 55 is positioned on the ground plane 208. The clearance 55 is larger than the plated via or metal via 52; the clearance 55 overlaps with the plated via or metal via 52; and the clearance 55 has a flat boundary 56 that is tangent to but does not contact the edge of the plated via or metal via 52. The flat boundary 56 is perpendicular to the corresponding input circuit trace 53.

[0129] Figures 29A-29B This invention demonstrates a second design for the blank area of ​​the grounding layer.

[0130] Figure 29A This shows an oval metal pad 51B, or teardrop metal pad 51B, a plated through-hole or metal through-hole 52, and an input circuit 53 connected to the teardrop metal pad 51B.

[0131] Figure 29BA ground plane 208 is positioned below a circular metal pad 51, i.e., in the Z direction. An insulating layer (not shown) lies between the ground plane 208 and the circular metal pad 51. A blank area 55 is positioned on the ground plane 208. The blank area 55 is larger than the plated via or metal via 52; the blank area 55 overlaps with the plated via or metal via 52; and the blank area 55 has a flat boundary 56 that is tangent to but does not contact the edge of the plated via or metal via 52. The flat boundary 56 is designed perpendicular to the corresponding input circuit trace 53.

[0132] Figures 30A-30B This invention shows the third design of the blank area of ​​the grounding layer.

[0133] Figure 30A This diagram shows a blade metal pad 51C, a plated through-hole or metal through-hole 52, and an input circuit 53 connected to the plated through-hole or metal through-hole 52. The blade metal pad 51C is positioned opposite or 180 degrees to the input circuit trace 53.

[0134] Figure 30B A ground plane 208 is positioned below a circular metal pad 51, i.e., in the Z direction. An insulating layer (not shown) exists between the ground plane 208 and the circular metal pad 51. A blank area 55 is positioned on the ground plane 208. The blank area 55 is larger than the plated via or metal via 52; the blank area 55 overlaps with the plated via or metal via 52; and the blank area 55 has a flat boundary 56 that is tangent to but does not contact the edge of the plated via or metal via 52. The flat boundary 56 is perpendicular to the corresponding input circuit trace 53.

[0135] Figures 31A-31B This invention demonstrates the fourth design for the blank area of ​​the grounding layer.

[0136] Figure 31A This diagram shows two blade metal pads 51D, a plated through-hole or metal via 52, and an input circuit 53 connected to the plated through-hole or metal via 52. The two blade metal pads 51D are positioned at a 90-degree angle to the input circuit trace 53.

[0137] Figure 31BA ground plane 208 is positioned below a circular metal pad 51, in the Z direction, with an insulating layer (not shown) between the ground plane 208 and the circular metal pad 51. A blank area 55 is positioned on the ground plane 208. The blank area 55 is larger than the plated through-hole or metal via 52; the blank area 55 overlaps with the plated through-hole or metal via 52; and the blank area 55 has a flat boundary 56 that is tangent to but does not contact the edge of the plated through-hole or metal via 52. The flat boundary 56 is perpendicular to the corresponding input circuit trace 53.

[0138] Figures 32A-32B This invention displays the fifth design of the blank area of ​​the grounding layer.

[0139] Figure 32A This diagram shows two blade metal pads 51E, a plated through-hole or metal via 52, and an input circuit 53 connected to the plated through-hole or metal via 52. The two blade metal pads 51E are arranged at a 120-degree angle to the input circuit trace 53.

[0140] Figure 32B A ground plane 208 is positioned below a circular metal pad 51, in the Z direction. An insulating layer (not shown) lies between the ground plane 208 and the circular metal pad 51. A blank area 55 is disposed on the ground plane 208. The blank area 55 is larger than the plated via or metal via 52; the blank area 55 overlaps with the plated via or metal via 52; and the blank area 55 has a flat boundary 56 that is tangent to but does not contact the edge of the plated via or metal via 52. The flat boundary 56 is perpendicular to the corresponding input circuit trace 53.

[0141] Figures 33A-33B This invention displays the sixth design of the blank area of ​​the grounding layer.

[0142] Figure 33A This diagram shows three blade metal pads 51F, a plated through-hole or metal through-hole 52, and an input circuit 53 connected to the plated through-hole or metal through-hole 52. The three blade metal pads 51F and the input circuit trace 53 are arranged at 90 degrees to each other.

[0143] Figure 33BA ground plane 208 is shown positioned below a circular metal pad 51, in the Z direction. An insulating layer (not shown) lies between the ground plane 208 and the circular metal pad 51. A blank area 55 is positioned on the ground plane 208. The blank area 55 is larger than the plated via or metal via 52; the blank area 55 overlaps with the plated via or metal via 52; the blank area 55 has a flat boundary 56 that is tangent to but does not contact the edge of the plated via or metal via 52. The flat boundary 56 is perpendicular to the corresponding input circuit trace 53.

[0144] Although several possible implementations of this invention have been described through examples, various modifications made by those skilled in the art without departing from the spirit of the appended claims still fall within the scope of the inventor's rights.

Claims

1. A circuit board for a connector, comprising: A circuit layer, comprising multiple parallel circuit traces, multiple left metal pads, and multiple right metal pads, characterized in that... The multiple parallel circuit traces extend laterally; Each parallel circuit trace has a left end that is electrically coupled to the corresponding left metal pad; Each parallel circuit trace has a right end that is electrically coupled to the corresponding right metal pad; The multiple parallel circuit traces occupy the left side height E1; and The plurality of right metal pads occupy a height of E2 on the right side; wherein... The left side height E1 is less than the right side height E2.

2. The connector circuit board according to claim 1, characterized in that, further... include: Multiple metal vias are configured on the left side of the circuit board; wherein the top of each metal via is electrically coupled to the corresponding left metal pad.

3. The connector circuit board according to claim 2, characterized in that, further... include: Multiple metal balls are disposed on the bottom side of the circuit board; each metal ball is electrically coupled to the bottom end of a corresponding metal via.

4. The connector circuit board according to claim 3, characterized in that, The right ends of the parallel circuit traces are arranged in one of the following ways: sequential right shift, sequential left shift, or a combination thereof.

5. The connector circuit board according to claim 4, characterized in that, The parallel circuit traces, each with an equal trace width.

6. The connector circuit board according to claim 5, characterized in that, The spacing and width between adjacent parallel circuit traces are equal.

7. The circuit board for the connector according to claim 6, characterized in that, The spacing between adjacent parallel circuit traces is the same as the trace width.

8. The circuit board for the connector according to claim 7, characterized in that, The circuit layer has a circuit trace distribution where the height on the left side is half or less than the height on the right side.

9. The circuit board for the connector according to claim 8, characterized in that, The circuit layer has a circuit trace distribution where the height on the left side is one-third or less of the height on the right side.

10. The circuit board for the connector according to claim 9, characterized in that, The circuit layer has circuit traces selected from one of the following trace families: signal traces, ground traces, and differential pair circuit traces.

11. The circuit board for the connector according to claim 10, characterized in that, The circuit layer has circuit traces that are electrically coupled to the corresponding metal via at the left end.

12. The circuit board for the connector according to claim 11, characterized in that, The connection between the circuit traces and the corresponding metal vias in the circuit layer is either a straight trace connection or a bent trace connection.

13. The circuit board for the connector according to claim 12, characterized in that, The bending wiring connection has a turning angle of 45 degrees relative to the horizontal direction.

14. The circuit board for the connector according to claim 13, characterized in that, For differential pair circuit traces, the two corresponding metal vias are connected to each other at an angle between 0 and 90 degrees relative to the horizontal direction.

15. The circuit board for the connector according to claim 14, characterized in that, The two corresponding metal through holes are arranged along the Y direction or the X direction.

16. The circuit board for the connector according to claim 15, characterized in that, The differential pair circuit trace with ground trace further includes: a ground pad electrically coupled to the corresponding ground trace; and a ground via electrically coupled to the corresponding ground pad.

17. The circuit board for the connector according to claim 16, characterized in that, The grounding pad is disposed between the two metal pads; and the grounding through hole is disposed between the two metal through holes.

18. The circuit board for the connector according to claim 17, characterized in that, The two metal through holes and the grounding through hole are arranged in a straight line, which forms an angle between 0 and 90 degrees with respect to the horizontal direction.

19. The circuit board for the connector according to claim 18, characterized in that, The metal through hole is a coaxial through hole or a plated through hole.

20. The circuit board for the connector according to claim 19, characterized in that, Further includes: An elliptical metal gasket is disposed around the end of the corresponding metal through hole.

21. The circuit board for the connector according to claim 20, characterized in that, The elliptical metal gasket is larger than the corresponding metal through hole, and the elliptical metal gasket clamps the corresponding metal through hole with its two sides.

22. The circuit board for the connector according to claim 19, characterized in that, Further includes: A single blade pad is disposed around the metal through-hole.

23. The circuit board for the connector according to claim 22, characterized in that, The single blade pad is positioned opposite to the corresponding input circuit trace.

24. The circuit board for the connector according to claim 19, characterized in that, Further includes: Two blade pads are positioned around the metal through-hole.

25. The circuit board for the connector according to claim 24, characterized in that, The two blade pads are arranged at a 90-degree angle to the corresponding input circuit trace.

26. The circuit board for the connector according to claim 24, characterized in that, The two blade pads are arranged at a 120-degree angle relative to the corresponding input circuit trace.

27. The circuit board for the connector according to claim 19, characterized in that, Further includes: Three blade pads are positioned around the metal through-hole.

28. The circuit board for the connector according to claim 27, characterized in that, The three blade pads are arranged at 90 degrees to each other.

29. The connector circuit board according to claim 1, characterized in that, further... include: A ground plane is disposed below the circuit layer; and an insulating layer is provided between the circuit layer and the ground plane; The first blank area is configured on the grounding plane; wherein, For the corresponding metal through-hole, the size of the blank area is larger than that of the metal through-hole; The blank area overlaps with the metal through-hole; and The blank area has a flat boundary that is tangent to the edge of the metal through hole but does not contact the through hole.

30. The circuit board for the connector according to claim 29, characterized in that, The flat boundary is perpendicular to the corresponding input circuit trace.

31. The connector circuit board according to claim 29, characterized in that, further... include: The second blank area is configured on the grounding plane; wherein, For the corresponding rectangular metal interface, the blank area has a larger size than the rectangular metal interface; The blank area overlaps with the rectangular metal interface; and The blank area has a flat boundary and overlaps at the junction between the rectangular metal pad and the input circuit trace.

32. The circuit board for the connector according to claim 1, characterized in that, The circuit board is funnel-shaped.

33. The circuit board for the connector according to claim 32, characterized in that, Further includes: Multiple metal springs, each metal spring being disposed on the surface of a corresponding metal contact surface.

34. The circuit board for the connector according to claim 33, characterized in that, The metal spring has a V-shaped portion, and the tip of the V-shape is away from the surface of the corresponding metal contact surface.

35. A connector comprising: The circuit board, further comprising a plurality of metal contact surfaces; as well as Multiple metal springs, each metal spring disposed on the surface of a corresponding metal contact surface; characterized in that, Each metal spring has a V-shaped portion, with the tip of the V pointing away from the surface of the corresponding metal contact surface.

36. The connector according to claim 35, characterized in that, The metal spring has a cross-sectional shape in the shape of a lowercase sigma or a teaspoon.

37. A circuit board, comprising: A circuit layer with metal vias; The first input circuit trace is electrically coupled to the metal via. A ground plane is disposed below the circuit layer, and an insulating layer is located between the circuit layer and the ground plane; as well as The first blank area is configured on the ground plane; its characteristic is that... The first blank area is larger than and overlaps with the metal through-hole; The first blank area has a flat boundary that is tangent to but does not contact the edge of the metal through hole; and the flat boundary is perpendicular to the first circuit trace.

38. The circuit board for the connector according to claim 37, characterized in that, The circuit layer further includes rectangular metal pads; The second input circuit trace is electrically coupled to the rectangular metal pad; A second blank area is configured on the grounding plane; wherein... The second blank area is larger than and overlaps the rectangular metal pad; The second blank area has a flat boundary that overlaps at the junction between the rectangular metal pad and the second input circuit trace.

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