A multi-oscillator true random number generator based on independent auxiliary TRNG control

Abstract

This invention discloses a multi-oscillator true random number generator based on independent auxiliary TRNG control. It is characterized by comprising a main TRNG module and an auxiliary TRNG module. The main TRNG module provides a true random number sequence TR via an internal bus. The main TRNG module includes a random signal generation module, an asynchronous sampling circuit, and a post-processing circuit. The random signal generation module includes N ring oscillators RO_i, each RO_i having an independent enable terminal EN_i, i=0~N-1. The auxiliary TRNG module is a complete TRNG, outputting an M-bit auxiliary random number sequence F[M-1:0], where M>N≥2. The lower N bits of the auxiliary TRNG module's output F[N-1:0] are directly connected one-to-one to the enable terminal EN_i of the corresponding RO_i in the main TRNG module without any synchronization circuit, achieving EN_i=F[i], where F[i] corresponds to the i-th bit in F[N-1:0]. This invention can improve the entropy quality and attack resistance of the overall system.

Description

Technical Field

[0001] This invention belongs to the field of information security hardware design, specifically involving a system architecture that enhances the entropy quality of a master true random number generator by working in collaboration with heterogeneous dual true random sources. It is particularly suitable for security chips and general-purpose SoCs that have high requirements for randomness robustness, resistance to environmental interference and anti-modeling capabilities. Background Technology

[0002] With advancements in integrated circuit technology, traditional true random number generators based on a single physical entropy source face challenges such as decreasing entropy density, increased environmental sensitivity, and rising predictability. To improve the quality of randomness, researchers have proposed a multi-source oscillator architecture, which enhances entropy output by integrating multiple ring oscillators and dynamically adjusting their operating states.

[0003] In existing technologies, the oscillator enable signal is often generated by the post-processing module within the TRNG system, forming a self-feedback control loop. While this method can disrupt the oscillator's operating mode to some extent, the control signal shares the same clock domain or processing path with the main entropy source, resulting in temporal or logical coupling. This can lead to potential regularities in the control behavior, weakening the independence of the overall entropy source. More importantly, in the face of modeling attacks, attackers can analyze the output sequence to deduce the enable logic, thereby reducing system security. Summary of the Invention

[0004] To overcome the shortcomings of the prior art, this invention proposes a multi-oscillation source true random number generator based on independent auxiliary TRNG control, so as to improve the entropy quality and anti-attack capability of the overall system.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: A multi-oscillation source true random number generator based on independent auxiliary TRNG control includes a main TRNG module and an auxiliary TRN module; the main TRNG module provides a true random number sequence TR via an internal bus. The main TRNG module includes a random signal generation source module, an asynchronous sampling circuit, and a post-processing circuit; the random signal generation source module includes N ring oscillators RO_i, each RO_i has an independent enable terminal EN_i, i=0~N-1; The auxiliary TRNG module is a complete TRNG, containing its own oscillation source, sampling and post-processing unit. Its output is an M-bit auxiliary random number machine sequence F[M-1:0], where M>N≥2. Crucially, the lower N bits of the auxiliary TRNG module's output F[N-1:0] are directly connected one-to-one to the enable terminal EN_i of the corresponding RO_i in the main TRNG module as an enable signal, without any synchronization circuit (synchronizer, FIFO, or rate matching circuit, etc.), thus achieving EN_i=F[i]. F[i] corresponds to the i-th bit in F[N-1:0], where i=0~M. 1.

[0006] This invention integrates two physically independent true random number generators on the same chip: a main TRNG and an auxiliary TRNG. The two share the same power network and CMOS process manufacturing environment, but use completely independent clock domains, with no clock synchronization or reset dependency.

[0007] In this invention, both the main TRNG and the auxiliary TRNG start autonomously and run continuously after the chip is powered on. The main TRNG does not depend on the ready state of the auxiliary TRNG, and vice versa; there is no mutual dependency on each other's ready states. Since the operating clock of the auxiliary TRNG has no phase or frequency locked relationship with the main TRNG, its output bit switching time is completely asynchronous with the sampling clock and RO phase of the main TRNG. Therefore, the transition of EN_i exhibits strong random perturbation in the time domain of the main TRNG.

[0008] The sampling module of this invention uses the system clock to asynchronously sample the RO output, and the post-processing module is used to perform algorithmic processing on the digital signal with random characteristics, and finally generate a true random number sequence TR. Conventional designs typically include, for example, a combination of a linear feedback shift register (LSFR) and an asynchronous FIFO memory (but are not limited to conventional designs), and data is read through the on-chip bus.

[0009] The auxiliary TRNG module of this invention may adopt the same or different entropy source structure as the main TRNG (e.g., it may also be a multi-source RO, or based on a metastable trigger).

[0010] This invention controls the operation of multiple ring oscillators in the main TRNG module by using an auxiliary random number sequence generated by the auxiliary TRNG module, ultimately achieving a high degree of unpredictability in the control signal.

[0011] The beneficial effects of this invention include: 1) The physical and logical decoupling of control enable and main entropy source is achieved. This design fundamentally avoids the potential regularity of control behavior, especially against modeling attacks (such as time series analysis or machine learning prediction), thus improving system security. 2) The asynchronous output of the auxiliary TRNG module introduces unpredictable random disturbances in the time domain of the main TRNG, which directly affect the switching of the working state of the ring oscillator. The randomness quality is improved through the strong random disturbance mechanism, and the output performance of the entropy source is optimized.

[0012] Furthermore, this invention does not require complex interface circuits and can be activated simply by connecting, making it suitable for deployment of highly reliable and secure chips. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the architecture of a multi-oscillation source true random number generator based on independent auxiliary TRNG control according to the present invention. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0016] When using a closed-loop TRNG system to generate the oscillator enable signal, the control behavior may exhibit predictable patterns, requiring improvement. To address this, this invention, based on a completely different logic within the closed-loop structure, employs a physically independent auxiliary TRNG with a different operating frequency as the enable controller, building upon the main TRNG. This achieves asynchronous and uncorrelated disturbances between the two entropy sources in the time domain. Because the two TRNGs differ in oscillation frequency, manufacturing process deviations, and noise sources, the control signal generated by the auxiliary TRNG is highly unpredictable and has no common cause correlation with the main TRNG. This effectively overcomes the correlation risks inherent in the internal closed loop, significantly improving the overall system's entropy quality and attack resistance.

[0017] like Figure 1 As shown, this invention integrates two physically independent true random number generators on the same chip: a main TRNG module and an auxiliary TRNG module. They share the same power network and CMOS manufacturing environment, but use completely independent clock domains, with no clock synchronization or reset dependencies.

[0018] The main TRNG includes: The random signal generator module contains N ring oscillators (RO_i, i=0~N). 1) Each RO_i has an independent enable terminal EN_i; The sampling module uses the system clock to asynchronously sample the RO output. That is, since the sampling clock and the noise source do not have a fixed phase or frequency relationship, the sampling time is unpredictable relative to the instantaneous state of the noise, so the sampling results have a high degree of randomness.

[0019] The post-processing module is used to perform algorithmic processing on digital signals with random characteristics. Its main function is to store the sampled random values, read them in a specific order, and generate a true random number sequence TR. This embodiment uses a common combination of a linear feedback shift register (LSFR) and an asynchronous FIFO memory. The lower x bits are read from the FIFO to generate the true random number sequence TR, and the data is read via the on-chip bus.

[0020] The auxiliary TRNG is a complete TRNG module that can adopt the same or different entropy source structure as the main TRNG (e.g., the same multi-source RO, or based on metastable triggers). It contains its own oscillation source, sampling and post-processing unit, and outputs an M-bit auxiliary random number sequence F[M-1:0], where M>N≥2 (e.g., M=16, N=8).

[0021] The key to this invention is that the output of the auxiliary TRNG does not pass through any synchronizer, FIFO, or rate matching circuit; it directly outputs its lower N bits (i.e., F[N]). 1:0]) as the enable signal EN[N [1:0], connected one-to-one to the enable pin of each RO_i in the main TRNG, i.e., EN_i = F[i], i=0~M 1.

[0022] Both TRNG modules in this invention start autonomously and run continuously after the chip is powered on. The main TRNG module does not depend on the ready state of the auxiliary TRNG module, and vice versa. Since the operating clock of the auxiliary TRNG module has no phase or frequency locked relationship with the main TRNG module, its output bit switching time is completely asynchronous with the sampling clock and RO phase of the main TRNG module. Therefore, the transition of EN_i exhibits strong random perturbation in the time domain of the main TRNG module.

[0023] This invention's "asynchronous enable drive" mechanism enables the active oscillator set of the master TRNG to change non-periodicly and uncorrelatedly over time, greatly increasing the spatiotemporal complexity of the entropy source. Even if an attacker has knowledge of the master TRNG's process parameters or environmental conditions, they cannot predict its enable state because the control signal originates from another independent physical process.

[0024] In a typical implementation, the main TRNG module contains 8 ROs as entropy sources; the auxiliary TRNG module can output a 16-bit auxiliary random number sequence F[15:0], and take the lower 8 bits F[7:0] as the enable signal EN[7:0] to enable the 8 ROs of the main TRNG, with each bit connected to the enable terminal of one RO. The main TRNG module uses a system clock, which is provided by the chip's main clock generator through a global clock network; the auxiliary TRNG module uses an auxiliary clock, which is generated by an auxiliary clock generator independent of the chip's main clock generator. The auxiliary clock generator is powered by the chip's power supply and can use common clock modules.

[0025] After the auxiliary TRNG module is powered on, it automatically works and provides the main TRNG module with a real-time changing enable signal EN[7:0], which helps the main TRNG module improve the randomness of the entropy source. The entire system does not require additional control logic and can be implemented through hard wiring. It has high reliability, controllable power consumption, and significantly better entropy quality than the traditional self-feedback architecture.

[0026] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein; without departing from the technical solutions of the present invention, all such modifications or substitutions should be covered within the scope of the technical solutions claimed in the present invention.

Claims

1. A multiple-oscillator source true random number generator based on independent auxiliary TRNG control, characterized by, Includes a main TRNG module and an auxiliary TRNG module; The main TRNG module connects to the internal bus to provide a true random number sequence TR; The main TRNG module includes a random signal generation source module, an asynchronous sampling circuit, and a post-processing circuit; the random signal generation source module includes N ring oscillators RO_i, each RO_i has an independent enable terminal EN_i, i=0~N-1; The auxiliary TRNG module is a complete TRNG, which outputs an M-bit auxiliary random number machine sequence F[M-1:0], where M>N≥2; the lower N bits of the output F[N-1:0] of the auxiliary TRNG module are directly connected one-to-one to the enable terminal EN_i of the corresponding RO_i in the main TRNG module without any synchronization circuit, so that EN_i=F[i], and F[i] corresponds to the i-th bit in F[N-1:0].

2. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control according to claim 1, characterized in that, The main TRNG module and the auxiliary TRNG module share the same power network and CMOS process manufacturing environment, but use completely independent clock domains with no clock synchronization or reset dependency.

3. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control according to claim 2, characterized in that, The working clock of the auxiliary TRNG module has no phase or frequency locked relationship with the main TRNG module. Its output bit switching time is completely asynchronous with the sampling clock and RO phase of the main TRNG module, which makes the transition of EN_i exhibit strong random disturbance in the time domain of the main TRNG module.

4. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control of claim 2, wherein, The main TRNG module uses a system clock, which is provided by the chip's main clock generator through a global clock network, and the main clock generator is powered by the chip's power supply. The auxiliary TRNG module uses an auxiliary clock, which is generated by an auxiliary clock generator that is independent of the chip's main clock generator. The auxiliary clock generator is powered by the chip's power supply, and the two do not affect each other.

5. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control of claim 1, wherein, The main TRNG module and the auxiliary TRNG module start autonomously after the chip is powered on, and there is no mutual dependency on each other's ready state.

6. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control of claim 1, wherein, The sampling module is used to asynchronously sample the output of the ring oscillator; the post-processing module is used to perform algorithmic processing on the digital signal with random characteristics to generate a true random number sequence TR, which is read from the data via the on-chip bus.

7. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control according to claim 1, wherein, The auxiliary TRNG module adopts the same or different entropy source structure as the main TRNG module.

8. The multiple-oscillator source true random number generator based on independent auxiliary TRNG control of claim 1, wherein, The auxiliary random number sequence generated by the auxiliary TRNG module controls whether multiple ring oscillators of the main TRNG module work, thereby achieving a high degree of unpredictability of the control signal.

Images