Process wake-up method, apparatus, device, storage medium, and program product

By obtaining the memory access address during a write operation and triggering an interrupt to wake up the virtual processor process, the problem of low CPU utilization caused by VCPU execution monitoring-waiting instructions is solved, and efficient CPU task execution and multi-process monitoring are achieved.

CN122363759APending Publication Date: 2026-07-10CLOUD INTELLIGENCE ASSETS HOLDING (SINGAPORE) PTE LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-10
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

In virtual machines, the problem of low CPU utilization is mainly due to the fact that when the VCPU executes the monitor-wait instruction, the entire CPU is in a low-power waiting state, which blocks the execution of CPU instructions and causes it to be idle.

Method used

By obtaining the memory access address of the write operation and triggering an interrupt to wake up the corresponding virtual processor process when the monitoring address is stored in the monitoring address vector register, the use of the monitor-wait instruction is avoided, and asynchronous hardware monitoring of the monitoring address is achieved.

Benefits of technology

It improves CPU utilization, prevents the CPU from entering a low-power waiting state, allows simultaneous monitoring of multiple virtual processor processes, and improves CPU task execution efficiency.

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Abstract

This application provides a process wake-up method, apparatus, device, storage medium, and program product. The method includes: when performing a write operation, obtaining the memory access address of the write operation; if the memory access address is a monitoring address stored in a monitoring address vector register, triggering an interrupt to wake up the virtual processor process corresponding to the memory access address, wherein the monitoring address stored in the monitoring address vector register is a monitoring address with a status attribute of monitoring. This improves CPU utilization.
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