A power electronic package module and a packaging method

Abstract

The present application relates to the technical field of electronic packaging, and especially relates to a power electronic packaging module and a packaging method, wherein a pyrolyzable polymer film is used as a temporary carrier, and a microgroove array is constructed on the surface; nano metal solder paste is filled in the microgroove array to form a patterned metal layer; a power chip and a substrate are respectively arranged on two sides of the patterned metal layer, and are attached and temporarily fixed; the whole structure after attachment is arranged in a sintering cavity, and under the condition of 200-260 DEG C and no external pressure, the atmosphere composition and the temperature are controlled in stages, so that the polymer film is pyrolyzed and removed, the nano metal solder paste is sintered to form a metal network structure, and metallurgical interconnection between the power chip surface and the substrate is completed. Compared with a traditional interconnection scheme, the present application has design flexibility, process compatibility and long-term reliability, and provides an interconnection solution with stable structure, controllable process and suitability for mass production for a new generation of high-power module packaging.

Description

Technical Field

[0001] This invention relates to the field of electronic packaging technology, and in particular to a power electronic packaging module based on a pyrolytic polymer carrier and a low-temperature sintering interconnection method. Background Technology

[0002] With the rapid development of high-power electronic systems such as new energy vehicles, rail transit, and smart grids, power semiconductor devices (such as silicon (Si), silicon carbide (SiC), and gallium nitride (GaN)) are facing higher requirements for packaging and interconnection technologies, especially in terms of current carrying capacity, thermal management efficiency, and service reliability. The interconnection method between the top of the chip and the substrate directly determines the electrical, thermal, and mechanical stability of the power module, and is one of the core technological bottlenecks currently limiting the continuous improvement of device performance.

[0003] Currently, the mainstream chip interconnect method still relies primarily on metal wire bonding (such as aluminum or copper wires). However, this method has significant limitations under complex operating conditions such as high power, high temperature, and high humidity: the wire structure limits current density, has high thermal resistance, and is prone to electromigration failure and poor heat dissipation; at the same time, the bonding points have poor stability and insufficient reliability under thermomechanical stress, making it difficult to meet the requirements of next-generation power modules for long lifespan and high stability. Some systems have attempted to use copper strip interconnects to improve current carrying capacity, but traditional electrolytic or rolled copper strips are difficult to pattern with high precision, and the soldering temperature usually exceeds 280 ℃, which easily introduces thermal stress and reduces the packaging yield of thermistor chips.

[0004] To overcome the aforementioned problems, existing technologies have proposed various interconnection techniques. For example, Chinese patent CN121843544A discloses a power module packaging structure based on stacked copper clip interconnection. This packaging structure uses multiple copper clips with different structures to replace traditional bonding wires for electrical connection between the chip and the metal layer, and arranges the copper clips in a stacked manner, which can reduce the parasitic inductance of the power module and improve stability. At the same time, by slotting the copper clips and the metal layer, the length of the power circuit of each chip can be balanced, improving the current sharing performance of the power module. However, in this solution, the copper clips need to be pre-customized according to the module layout, which is highly dependent on molds, has a long design cycle, and is difficult to adapt to complex packaging requirements such as diverse, irregular shapes, or multi-chip bridging.

[0005] Chinese patent CN121398626A proposes a power module packaging structure and its packaging process. It uses copper clips to replace traditional bonding wires and achieves interconnection between the copper clips and the chip source through a pressureless silver sintering layer. Combined with designs such as arched copper clips, perforated stress-relieving structures, and needle-shaped fin heat dissipation base plates, it significantly reduces the module's on-resistance and parasitic inductance, improving heat dissipation and thermomechanical fatigue resistance. However, this solution still requires the copper clips to be pre-customized according to the module layout, resulting in strong mold dependence, long design cycles, and limited patterning capabilities. This makes it difficult to adapt to multi-chip bridging, irregular interconnection, or diverse small-batch packaging requirements.

[0006] In summary, the key challenges currently facing packaging interconnect technology lie in how to achieve high-precision patterned metal structure fabrication at low temperatures while ensuring the reliability of interface metallurgical connections, and how to achieve packaging flexibility to accommodate irregularly shaped structures. Therefore, there is an urgent need for a novel interconnect method that combines high patterning freedom, low-temperature process compatibility, interface connection reliability, and large-scale manufacturing feasibility to meet the integration and high reliability requirements of next-generation power device modules.

[0007] In view of this, the present invention is proposed. Summary of the Invention

[0008] The purpose of this invention is to provide a power module packaging method that combines design flexibility, process compatibility, and long-term reliability.

[0009] In a first aspect, the present invention provides a power module packaging method, characterized by comprising the following steps: S1. A polymer film with pyrolytic properties is used as a temporary carrier, and a microgroove array is constructed on the surface of the polymer film. S2. Fill the microgroove array with nano-metal solder paste containing low-temperature sintering aid to form a patterned metal layer; S3. Place the power chip and the substrate on both sides of the patterned metal layer, align and mount them, and temporarily fix them in place. S4. Place the assembled structure obtained in step S3 into a sintering chamber. Under conditions of 200-260 ℃ and no external pressure, control the atmosphere composition and temperature in stages to pyrolyze and remove the polymer film, sinter the nano-metal solder paste to form a metal network structure, and complete the metallurgical interconnection between the power chip surface and the substrate.

[0010] As a preferred embodiment of this technical solution, the polymer film includes any one of polyacrylonitrile film, polyvinyl chloride film, and modified polyimide film; Preferably, the polymer film has a thickness of 25-100 μm and a pyrolysis temperature of about 200 °C.

[0011] As a preferred embodiment of this technical solution, the groove depth of the microgroove array is 5-20 μm and the width is 500-5000 μm; Preferably, the microgroove array is prepared by laser micromachining or mechanical micromachining to enhance the adhesion and pattern retention capabilities of the metal solder paste, and the pattern of the carrier polymer film can be pre-processed by laser or mechanical micro-patterning according to the chip interconnect structure to achieve precise pattern control.

[0012] As a preferred embodiment of this technical solution, the nano-metal solder paste contains 2 wt%-5 wt% of organic acid metal salts or metal-organic complexes, such as copper formate or copper oxalate, and the particle size range of the metal particles in the nano-metal solder paste is 10 nm-5 μm, so as to improve the sintering density, welding activity and reducibility of the nano-metal solder paste under low temperature conditions, so as to ensure the uniformity and continuity of the solder coating, and at the same time meet the integrated packaging requirements of complex pattern structures.

[0013] More preferably, a nano-metal solder paste containing a low-temperature sintering aid (such as copper-based, silver-based, or intermetallic compound-based solder paste) is coated on the surface of the film by screen printing, stencil printing, or high-precision spraying technology.

[0014] As a preferred embodiment of this technical solution, the thickness of the patterned metal layer is 50-200 μm.

[0015] In a preferred embodiment of this technical solution, during the mounting process, an infrared vision recognition system is first used to automatically detect the relative positions of the power chip (metallized electrodes such as Ti / Ni / Ag or Cu) and the DBC substrate (Cu or Ag pads). A high-precision mounting device is then used to position the carrier of the patterned nano-metal solder paste between the two. Precise alignment within ±5μm is achieved using thermal expansion marks on the edge of the carrier. Vacuum adsorption or micro-pressure mounting processes are employed. During the mounting process, temporary fixation is achieved using vacuum adsorption or micro-pressure mounting (<0.5MPa), eliminating the need for high-temperature pre-curing or pre-burning treatment. This method is suitable for complex packaging structures such as multi-chip bridging and stacked interconnection.

[0016] As a preferred embodiment of this technical solution, during the temporary fixation, a local laser irradiation process is used to activate the surface adhesive of the nano-metal solder paste, forming a short-term reversible chemical bond, ensuring mounting stability, and providing a good initial contact interface for subsequent heat treatment processes.

[0017] More preferably, the laser wavelength is 1064 nm, the pulse width is 10 ps, ​​the maximum output power is 100 W, the frequency is adjustable in the range of 10-1000 kHz, and the spot diameter is 20-100 μm.

[0018] To achieve efficient decomposition of the carrier polymer film and organic binder, low-temperature densification of copper solder paste, and clean metallurgical bonding of the interconnect interface, this invention employs a staged controlled atmosphere composition and temperature coordinated control process, which can complete metal foil forming and chip interconnection without external pressure.

[0019] Specifically, the phased control of atmosphere composition and temperature includes: In the first stage, a composite gas of nitrogen and oxygen is introduced into the sintering chamber to create a mild oxidizing atmosphere, accelerating the pyrolysis of the pyrolytic polymer film carrier such as polyacrylonitrile or polyester and the complete volatilization of organic additives. Simultaneously, 2 wt%-5 wt% of a reducing organometallic salt is pre-doped into the nano-metal solder paste. During heating, this salt decomposes and releases reducing gases such as CO and H2, forming a localized self-reducing environment on the copper powder surface, thereby inhibiting oxidation and maintaining interfacial activity. This stage maintains the temperature at 200-240℃ for 5-10 minutes, allowing for complete pyrolysis of the carrier and initial shrinkage and molding of the solder paste. In the second stage, the atmosphere is switched to a composite gas of nitrogen and formic acid vapor. Under constant temperature conditions, residual oxides on the metal surface are further removed, interparticle diffusion reactions are activated, and the metal layer is gradually densified. In this stage, the temperature is slowly raised to 260℃ and held for 10-30 minutes to allow the solder paste particles to fuse and form a continuous metal network structure. In the second stage, the atmosphere is switched to pure nitrogen and maintained at 260 °C for 30-60 min to avoid formic acid residue. This completes the interfacial atomic diffusion and metallurgical bonding between the chip, metal foil, and substrate, forming a dense and stable metal interconnect structure. At the same time, the phase transformation of the metal skeleton into a high-integrity metal foil is completed.

[0020] The entire interconnection process of this invention does not rely on external mechanical pressure. It achieves complete carrier removal, clean volatilization of organic residues, self-supporting metal foil molding, and simultaneous construction of a highly reliable interconnection interface through precise atmosphere control and gradient temperature adjustment. This provides key technical support for low-stress, high-consistency power device packaging.

[0021] As a preferred embodiment of this technical solution, the volume concentration of oxygen in the nitrogen-oxygen composite gas is controlled to be below 0.05%.

[0022] As a preferred embodiment of this technical solution, the volume concentration of formic acid vapor in the nitrogen and formic acid vapor composite gas is controlled at 1%-5%.

[0023] Secondly, the present invention also discloses a power electronic packaged module prepared by the above-mentioned power module packaging method, which should also fall within the protection scope of the present invention.

[0024] The power module packaging method of the present invention has at least the following beneficial effects: 1. The power module packaging method of the present invention uses a polymer film with microstructure patterns as a sacrificial carrier. First, a metal solder paste containing a low-temperature sintering aid is deposited on its surface by printing or spraying to form a patterned metal layer. Then, a staged atmosphere-temperature controlled process is employed to achieve carrier pyrolysis, solder paste densification sintering, and metal foil self-support transformation under no external pressure, completing the interface metallurgical interconnection between the chip surface, metal foil, and substrate. Compared to traditional wire bonding or copper strip interconnection solutions, this method combines design flexibility, process compatibility, and long-term reliability, providing a structurally stable, process-controllable, and mass-production-suitable interconnection solution for next-generation high-power module packaging.

[0025] 2. The overall process temperature of this invention is controlled below 260 ℃ and no external pressure is required. It is suitable for thermistor power chips such as GaN and SiC, significantly improving the packaging yield and reducing module thermal stress by more than 60%.

[0026] 3. The phased atmosphere temperature control strategy of this invention can ensure complete pyrolysis of the carrier and clean removal of organic components, while realizing in-situ reduction of the oxide film on the surface of metal particles and interfacial metallurgical bonding, and finally controlling the contact resistance to below 0.3 mΩ.

[0027] 4. The microgroove structure constructed by laser / mechanical processing of this invention supports arbitrary pattern customization with a precision of 10 μm, adapting to complex bridging, stacking, multi-chip parallel packaging scenarios, and improving wiring density by more than 5 times.

[0028] 5. The nano-metal solder paste of the present invention is firmly locked in the microgroove array structure with a utilization rate of 95%; no additional stripping step is required, the carrier can be completely pyrolyzed into gaseous products, waste is reduced by 80%, and the overall packaging cost is reduced by about 40%.

[0029] 6. The process of this invention allows for online monitoring of temperature and atmosphere evolution throughout the entire process, resulting in uniform metal network structure formation, batch-to-batch porosity difference of <1%, and shear strength standard deviation of ≤5%, meeting the stability requirements of automotive-grade electronic devices. Attached Figure Description

[0030] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0031] Figure 1 This is a photograph of the polymer film carrier after the nano-metal solder paste of the present invention has been coated. Figure 2This is a top view of the polymer film carrier after the nano-metal solder paste of the present invention has been coated. Figure 3 This is a front view of the polymer film carrier after the nano-metal solder paste of the present invention has been coated. Figure 4 This is a left view of the polymer film carrier after the nano-metal solder paste of the present invention has been coated. Figure 5 The following is a schematic diagram of the mounting, pre-bonding and sintering process of the present invention: a) mounting and pre-bonding, b) atmosphere-temperature controlled sintering process; Figure 6 This is a schematic diagram of the conventional wire bonding process in Comparative Example 1 of the present invention; Figure 7 The image shows the product obtained by the conventional wire bonding process in Comparative Example 1 of this invention. Detailed Implementation

[0032] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0033] It should be noted that the terminology used herein is for the purpose of describing particular implementations only and is not intended to limit the exemplary implementations according to this application. As used herein, the singular form includes the plural form unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this description, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0034] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0035] Example 1 like Figure 1-5 As shown, this embodiment provides a power module packaging method based on a pyrolytic PI polymer carrier, specifically including the following steps: S1. A modified polyacrylonitrile film with a thickness of 50 μm is selected as the carrier material. A microgroove array structure with a depth of about 10 μm and a width of 1000 μm is formed on its surface by femtosecond laser etching. Thermal expansion positioning marks are simultaneously etched on the edge. S2. Using a template printing method, copper-based nano-metal solder paste is uniformly coated in the microgroove array structure. The solder paste contains 3 wt% copper formate and 1 wt% organic bismuth ligand. The average particle size of the nano-metal particles is 200 nm. The thickness of the patterned metal layer (solder paste) is controlled at 100 μm. Further drying treatment is then performed. S3. The pyrolytic carrier loaded with patterned metal layers is precisely aligned with the SiC power chip and Ag surface DBC substrate using an infrared positioning system, and then mounted by vacuum adsorption. Subsequently, a pulsed laser (wavelength 1064 nm, power 10 W, duration 50 ms) is used to irradiate the solder paste pattern area to achieve local thermal excitation and form temporary bonding. S4. Place the assembled structure obtained in step S3 into a closed tubular furnace cavity and perform sintering treatment according to the following process: (1) In the first stage, at 200-240 ℃, N2 gas (with O2 concentration controlled at 300 ppm) is introduced and kept for 7 min, during which the carrier is pyrolyzed and organic matter volatilizes; (2) In the second stage, at 240-260 ℃, the atmosphere is switched to N2+ 2% HCOOH, the temperature is raised to 260℃ and held for 10 min to promote the diffusion and bonding of metal particles; (3) In the third stage, at 260 ℃, the atmosphere is switched to pure N2 and kept constant for 30 min to complete the transformation of the metal skeleton into a self-supporting copper foil and the metallurgical connection of the Cu-Cu interface.

[0036] This embodiment yields a self-supporting copper foil structure with a thickness of approximately 85 μm. A continuous and dense Cu-Cu interconnect interface is formed between the chip surface and the DBC copper-clad laminate, with a contact resistance of less than 0.25 mΩ and no voids or carbon residues at the interface.

[0037] In addition, the tensile strength of the arc and the weld joint was evaluated with reference to MIL-STD-883 and JEDEC JESD22-B116 / B120. The specific operation is to hook the hook to the highest point of the arc and pull it vertically upward along the Z-axis at a speed of 0.2-0.5 mm / s. The tensile strength of this embodiment is 2100-2200 gf.

[0038] Example 2 like Figure 1-5 As shown, this embodiment provides a power module packaging method based on a pyrolytic polyester polymer carrier, specifically including the following steps: S1. A 40 μm thick polyvinyl chloride film is selected as a temporary carrier. A micro-groove array with a groove depth of about 15 μm and a width of 2000 μm is constructed on its surface by precision mechanical grooving. An interconnect pattern of a multi-chip bridging structure is prefabricated. S2. Using precision spraying technology, a composite metal solder paste containing 2 wt% copper oxalate and 1 wt% silver nano-coated copper particles is filled into the micro-groove array. The average particle size of the nano-metal particles is 500 nm, and the coating thickness is about 80 μm. S3. The GaN power chip and the Cu pad DBC substrate are precisely aligned using an infrared alignment system and temporarily fixed using a 0.2MPa micro-force pressing method. Then, the solder paste surface is irradiated with a dot laser for 10ms / dot to form a stable temporary bond. S4. The assembled structure obtained in step S3 is subjected to the following gradient heat treatment in an atmosphere-programmable oven cavity: (1) In the first stage, N2+ O2 (oxygen concentration controlled at 500 ppm) is introduced, the temperature is raised to 240 ℃ and held for 5 min to allow the organic components in the carrier and solder paste to fully decompose and be discharged; (2) In the second stage, switch to N2+ HCOOH (about 5% volume concentration), heat to 260 ℃ and hold for 10 min to promote the diffusion of silver-copper composite particles and low-temperature sintering; (3) In the third stage, switch to high-purity N2 gas and maintain a constant temperature of 260 °C for 30 min to achieve metal interface bonding and self-supporting metal layer conversion.

[0039] In this embodiment, the carrier completely vaporizes after sintering, leaving no residual contamination. The resulting metal foil is approximately 70 μm thick and exhibits good structural continuity. The constructed multi-chip bridging structure has uniform and dense interconnections, with a contact resistance of less than 0.2 mΩ at the bridging sections. X-ray analysis revealed no obvious pores, making it suitable for packaging high-voltage modules above 800 V.

[0040] In addition, the tensile strength of the arc and the weld joint was evaluated with reference to MIL-STD-883 and JEDEC JESD22-B116 / B120. The specific operation was to hook the hook to the highest point of the arc and pull it vertically upward along the Z-axis at a speed of 0.2-0.5 mm / s. The tensile strength of this embodiment was 2200-2300 gf.

[0041] Compare with Example 1 like Figure 6-7 As shown, this comparative example uses the traditional wire bonding process.

[0042] The mechanical properties of the wire in this comparative example are expressed using common tensile tests, and the tensile strength of the wire arc and the solder joint is evaluated with reference to MIL-STD-883 and JEDEC JESD22-B116 / B120. The specific operation is to hook the hook to the highest point of the wire arc and pull it vertically upward along the Z-axis at a speed of 0.2-0.5 mm / s.

[0043] In this comparative example, the tensile strength of Al wire is 10-30 gf.

[0044] Compare with Example 2 This comparative example is basically the same as Example 2, except that the processing steps of the pyrolytic polymer film carrier and the microgroove array structure are omitted in this comparative example.

[0045] Specifically, in this comparative example, copper-based nano-metal solder paste was directly printed onto the surface of the Cu pad DBC substrate using a stencil printing method to form a patterned solder paste layer with a thickness of approximately 100 μm. The GaN power chip was then mounted onto the solder paste layer and temporarily fixed using micro-pressure (<0.5 MPa). Under no external pressure, sintering was performed using the same three-stage atmosphere-temperature controlled sintering process as in Example 2.

[0046] In this comparative example, the lack of carrier support during the solder paste sintering process caused the pattern edges to collapse, resulting in poor dimensional accuracy. Furthermore, solder overflow occurred at the edges of the interconnect layer between the chip and the substrate, making it impossible to process and form.

[0047] Compare with Example 3 This comparative example is basically the same as Example 2, except that the composition of the atmosphere in this comparative example is not controlled in stages.

[0048] Specifically, this comparative example used a single atmosphere of N2+ HCOOH (approximately 5% volume concentration) throughout the entire process, and the temperature control curve was as follows: room temperature was raised to 260 ℃ and maintained at 260 ℃ for 60 min, with no external pressure applied throughout the entire process.

[0049] The thickness of the metal foil (interconnect layer) formed in this comparative example is approximately 70 μm, but the contact resistance of the bridging section in the formed multi-chip bridging structure is as high as 1.2 Ω. This may be because a single atmosphere of N2+ HCOOH (approximately 5% volume concentration) was used throughout the process, lacking an oxidizing atmosphere, resulting in insufficient pyrolysis of the polymer carrier and residual carbides contaminating the interconnect interface.

[0050] In summary, the multi-chip bridging structure constructed by the power module packaging method based on a pyrolytic polymer carrier of this invention exhibits uniform and dense interconnections, with a contact resistance as low as 0.2 mΩ. X-ray analysis revealed no obvious pores, making it suitable for packaging high-voltage modules above 800 V. Compared to existing technologies, this invention eliminates the need for external pressure, avoiding the risk of damage to ultra-thin chips. Furthermore, the microgroove structure constructed through laser / mechanical processing supports arbitrary pattern customization with 10μm-level precision, achieving high-precision and high-reliability packaging of complex irregular structures, multi-chip bridging, and stacked interconnections. This provides a solution for the integrated manufacturing of high-power-density power modules that combines pattern flexibility, low-temperature process compatibility, and mass production feasibility.

[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A power module packaging method, characterized in that, Includes the following steps: S1. A polymer film with pyrolytic properties is used as a temporary carrier, and a microgroove array is constructed on the surface of the polymer film. S2. Fill the microgroove array with nano-metal solder paste containing low-temperature sintering aid to form a patterned metal layer; S3. Place the power chip and the substrate on both sides of the patterned metal layer, align and mount them, and temporarily fix them in place. S4. Place the assembled structure obtained in step S3 into a sintering chamber. Under conditions of 200-260 ℃ and no external pressure, control the atmosphere composition and temperature in stages to pyrolyze and remove the polymer film, sinter the nano-metal solder paste to form a metal network structure, and complete the metallurgical interconnection between the power chip surface and the substrate.

2. The power module packaging method according to claim 1, characterized in that, The polymer film includes any one of polyacrylonitrile film, polyvinyl chloride film, and modified polyimide film; Preferably, the thickness of the polymer film is 25-100 μm.

3. The power module packaging method according to claim 1, characterized in that, The microgroove array has a groove depth of 5-20 μm and a width of 500-5000 μm; Preferably, the microgroove array is fabricated by laser micromachining or mechanical micromachining.

4. The power module packaging method according to claim 1, characterized in that, The nano-metal solder paste contains 2wt%-5wt% of organic acid metal salts or metal-organic complexes, and the particle size range of the metal particles in the nano-metal solder paste is 10 nm-5 μm.

5. The power module packaging method according to claim 1, characterized in that, The thickness of the patterned metal layer is 50-200 μm.

6. The power module packaging method according to claim 1, characterized in that, The mounting process employs vacuum adsorption or micro-pressure bonding technology. The temporary fixation is achieved using a localized laser irradiation process.

7. The power module packaging method according to claim 1, characterized in that, The phased control of atmosphere composition and temperature includes: In the first stage, a composite gas of nitrogen and oxygen is introduced into the sintering chamber and maintained at 200-240℃ for 5-10 minutes. In the second stage, the atmosphere is switched to a composite gas of nitrogen and formic acid vapor and maintained at 240-260℃ for 10-30 min. In the second stage, switch to a pure nitrogen atmosphere and maintain at 260℃ for 30-60 minutes.

8. The power module packaging method according to claim 7, characterized in that, In the nitrogen and oxygen composite gas, the volume concentration of oxygen is controlled below 0.05%.

9. The power module packaging method according to claim 7, characterized in that, In the nitrogen and formic acid vapor composite gas, the volume concentration of formic acid vapor is controlled at 1%-5%.

10. A power electronic packaging module, characterized in that, The power module is prepared according to any one of claims 1-9.

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