Packaging device

Abstract

The utility model provides a packaging device, which comprises a first packaging body, and the first packaging body comprises a substrate; the conductive column is arranged on the substrate, the conductive column is provided with a concave part, and the concave part is sunken towards the direction of the substrate from the upper surface of the conductive column; and the functional layer structure is arranged on the substrate, and the functional layer structure at least covers the side surface of the conductive column part. The concave part can accommodate part of the solder balls, so that the adjacent solder balls are effectively prevented from being connected together under the action of high-temperature reflow soldering and pressure, and the adjacent solder balls are not easy to bridge.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a packaging device. Background Art

[0002] refer to Figure 1 , Figure 1 The following is a schematic diagram of a packaging device for a current product. Figure 1 As shown, in PoP (Package on Package) technology, solder balls 03 are often used as electrical connectors to connect the upper package body 01 and the lower package body 02, and the amount and distribution of solder balls 03 will affect whether there is a risk of bridging. When the solder balls 03 are subjected to high-temperature reflow and pressure, adjacent solder balls 03 may be connected together to cause bridging. Utility Model Content

[0003] The purpose of the present application is to provide a packaging device, which reduces the risk of bridging of solder balls thereon.

[0004] The present application provides a packaging device, including a first packaging body, wherein the first packaging body includes:

[0005] substrate;

[0006] A conductive column is disposed on the substrate, wherein the conductive column has a concave portion, and the concave portion is recessed from the upper surface of the conductive column toward the substrate;

[0007] A functional layer structure is arranged on the substrate, and the functional layer structure at least covers the side surface of the conductive column part.

[0008] As mentioned above, in order to solve the technical problem that the solder balls arranged on adjacent conductive pillars in the PoP structure are easy to bridge, the present application proposes a packaging device, by designing a recess on the upper surface of the conductive pillar to form a notch conductive pillar structure, so that the recess can be used to accommodate the solder balls, making it less likely for the solder balls on adjacent conductive pillars to bridge, thereby reducing the risk of bridging.

[0009] In some optional embodiments, the present application connects a first package body and a second package body, wherein the first package body includes a substrate, a conductive column and a functional layer structure, specifically, the conductive column is arranged on the substrate, and the upper surface of the conductive column is provided with a recess, which is recessed from the upper surface of the conductive column toward the substrate, and when the first package body and the second package body are connected through solder balls, the recess can accommodate part of the solder balls, thereby effectively avoiding adjacent solder balls from being connected together under the action of high-temperature reflow and pressure, so that adjacent solder balls are less likely to be bridged; and the functional layer structure is arranged on the substrate and at least covers part of the side surface of the conductive column, or the functional layer structure is arranged on the substrate and at least covers all of the side surface of the conductive column, and the adjacent conductive columns and the circuit structure around them are effectively protected by the functional layer structure.

[0010] In some optional embodiments, the conductive pillar is configured to be connected to an electrical connector, and the recess is configured to accommodate a portion of the electrical connector.

[0011] In some optional embodiments, the present invention further includes: a second package body disposed on the first package body, wherein the second package body is electrically connected to the first package body through the electrical connector.

[0012] In some optional embodiments, the functional layer structure includes an insulating layer or a molding layer.

[0013] In some optional embodiments, the functional layer structure includes an insulating layer and a mold sealing layer;

[0014] The insulating layer is arranged on the substrate, and the insulating layer covers part of the side surface of the conductive column; the mold sealing layer is arranged on the side of the insulating layer away from the substrate, and the upper surface of the mold sealing layer is flush with the upper surface of the conductive column.

[0015] In some optional embodiments, the insulating layer and the encapsulation layer have the same thickness.

[0016] In some optional embodiments, the insulating layer and the encapsulation layer have different thicknesses.

[0017] In some optional embodiments, the first package further includes a chip electrically connected to the substrate;

[0018] The orthographic projection of the chip on the substrate does not overlap with the orthographic projection of the conductive pillar on the substrate.

[0019] In some optional embodiments, the encapsulation layer has an opening exposing an upper surface of the chip, and the upper surface of the chip is flush with an upper surface of the encapsulation layer.

[0020] In some optional implementations, the chip is covered by the molding layer, and the upper surface of the chip is not flush with the upper surface of the molding layer.

[0021] In some optional embodiments, the first package body further includes a filling layer, and the filling layer is disposed between the chip and the substrate.

[0022] In some optional embodiments, the second package body includes terminals, the terminals are arranged in a one-to-one correspondence with the conductive pillars, and the terminals are at least partially located in the recessed portions of the conductive pillars.

[0023] In some optional embodiments, the conductive pillar further comprises a seed layer, and the seed layer is disposed between the conductive pillar and a contact surface of the functional layer structure.

[0024] In some optional embodiments, a bottom surface of the recess is vertically lower than an interface between the insulating layer and the molding layer.

[0025] In some optional embodiments, the recess includes a first hole and a second hole arranged in a vertical direction; the aperture size of the first hole is different from the aperture size of the second hole.

[0026] In some optional embodiments, in a direction where the second package body points toward the first package body, the aperture size of the first hole is larger than the aperture size of the second hole.

[0027] In some optional embodiments, the first hole and the second hole form a stepped hole.

[0028] In some optional embodiments, the insulating layer has a second notch for accommodating the conductive column, and the encapsulation layer has a first notch for exposing the conductive column; an area of ​​the first notch is smaller than an area of ​​the second notch.

[0029] In some optional embodiments, the insulating layer has a second notch for accommodating the conductive column, and the encapsulation layer has a first notch for exposing the conductive column; an area of ​​the first notch is greater than an area of ​​the second notch.

[0030] In some optional embodiments, the first package body further includes a pad located on the substrate, the pad is electrically connected to the conductive column, and an orthographic projection of the conductive column on the substrate covers an orthographic projection of the pad on the substrate.

[0031] In some optional embodiments, the insulating layer has a second notch for accommodating the conductive column, and the encapsulation layer has a first notch exposing the conductive column; the area of ​​the first notch is smaller than the area of ​​the second notch, and the area of ​​the first notch is smaller than the area of ​​the pad.

[0032] In some optional embodiments, the insulating layer has a second notch for accommodating the conductive column, and the encapsulation layer has a first notch exposing the conductive column; the area of ​​the first notch is smaller than the area of ​​the second notch, and the area of ​​the first notch is larger than the area of ​​the pad. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0034] Figure 1 It is a schematic diagram of a partial longitudinal cross-sectional structure of a current packaging device;

[0035] Figure 2 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 2a of a packaging device according to the present application;

[0036] Figure 3 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 3a of a packaging device according to the present application;

[0037] Figure 4 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 4a of a packaging device according to the present application;

[0038] Figure 5 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 5a of a packaging device according to the present application;

[0039] Figure 6A-6E They are schematic diagrams of manufacturing steps of an embodiment 2a of the packaging device of the present application;

[0040] Figure 7 is a schematic diagram of a partial cross-sectional structure of a functional layer structure in one embodiment of a packaging device according to the present application;

[0041] Figure 8 is a partial cross-sectional structural schematic diagram of an embodiment 8a of a packaging device according to the present application using a solder mask limiting pad process;

[0042] Fig. 9 is a partial cross-sectional structural schematic diagram of an embodiment 9a of a packaging device according to the present application using a solder mask limiting pad process;

[0043] Fig.10 is a partial cross-sectional structural schematic diagram of an embodiment 10a of a packaging device according to the present application using a non-solder mask limited pad process;

[0044] Fig.11is a partial cross-sectional structural schematic diagram of an embodiment 11a of a packaging device according to the present application using a non-solder mask limited pad process;

[0045] Fig.12 This is in accordance with the corresponding Fig.11 A partial enlarged schematic diagram of

[0046] Fig.13 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 13a of a packaging device according to the present application;

[0047] Fig.14 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 14a of a packaging device according to the present application;

[0048] Fig.15 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 15a of a packaging device according to the present application;

[0049] Fig.16 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 16a of a packaging device according to the present application;

[0050] Figure 17A-17E They are schematic diagrams of manufacturing steps of an embodiment 13a of the packaging device of the present application;

[0051] Fig.18 is a schematic structural diagram of a terminal of an embodiment 18a of a packaging device according to the present application;

[0052] Fig.19 is a schematic structural diagram of a terminal according to an embodiment 19a of a packaging device of the present application;

[0053] Fig. 20 It is a schematic diagram of the structure of the terminal of an embodiment 20a of the packaging device according to the present application.

[0054] Description of reference numerals / symbols:

[0055] 01-upper package; 02-lower package; 03-electrical connector;

[0056] 10-first package body; 11-substrate; 12-conductive column; 121-recess; 1211-first hole; 1212-second hole; 122-seed layer; 13-functional layer structure; 131-molding layer; 1311-first gap; 132-insulating layer; 1321-second gap; 14-chip; 15-filling layer; 16-pad; 20-second package body; 21-terminal; 30-electrical connector. DETAILED DESCRIPTION

[0057] The specific implementation methods of the present application are described below in conjunction with the accompanying drawings and embodiments. Through the contents recorded in this specification, those skilled in the art can easily understand the technical problems solved by the present application and the technical effects produced. It is understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. In addition, for ease of description, only the parts related to the relevant inventions are shown in the accompanying drawings.

[0058] It should be readily understood that the meanings of “on,” “over,” and “over” in this application should be interpreted in the broadest manner, so that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween.

[0059] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0060] The term "layer" as used herein refers to a material portion including an area with a certain thickness. The layer may extend over the entire lower or upper structure, or may have a degree less than the range of the lower or upper structure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer may extend horizontally, vertically and / or along a tapered surface. A substrate 11 may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0061] The term "substrate 11" as used herein refers to a material on which subsequent material layers are added. The substrate 11 itself may be patterned. The material added on top of the substrate 11 may be patterned or may remain unpatterned. In addition, the substrate 11 may include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate 11 may be made of a non-conductive material, such as glass, plastic, or a sapphire wafer, etc. Further alternatively, the substrate 11 may have a semiconductor device or circuit formed therein.

[0062] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present application, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed in the present application. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of the present application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present application without substantially changing the technical content.

[0063] It should also be noted that the longitudinal section corresponding to the embodiment of the present application may be a section corresponding to the front view direction, the transverse section may be a section corresponding to the right view direction, and the horizontal section may be a section corresponding to the top view direction.

[0064] In addition, the embodiments and features in the embodiments of the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0065] refer to Figure 2 , Figure 2 FIG. 2 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 2a of a packaging device according to the present application. Figure 2 As shown, a packaging device 2a proposed in the present application includes a first packaging body 10 .

[0066] Among them, the first package body 10 includes a substrate 11, a conductive column 12 and a functional layer structure 13; specifically, the conductive column 12 is arranged on the substrate 11, and the conductive column 12 has a recess 121, and the recess 121 is recessed from the upper surface of the conductive column 12 toward the substrate 11; the functional layer structure 13 is arranged on the substrate 11, and the functional layer structure 13 at least covers a part of the side surface of the conductive column 12.

[0067] Here, the conductive pillar 12 is configured to connect the electrical connector 30 , for example, the electrical connector 30 is a solder ball, and the recess 121 is configured to accommodate part of the solder ball; the solder ball can also be a tin ball, for example, a part of the solder ball can be accommodated in the recess 121 .

[0068] The packaging device 2a of the present application forms a recessed conductive column structure by designing a recess 121 on the upper surface of the conductive column 12. The recess 121 on the conductive column 12 can be used to accommodate solder balls, thereby making it less likely for solder balls on adjacent conductive columns 12 to bridge, thereby reducing the risk of bridging.

[0069] In some optional embodiments, the packaging device 2a of the present application further includes a second packaging body 20 disposed opposite to the first packaging body 12, and the first packaging body 10 and the second packaging body 20 are connected via an electrical connector 30. The electrical connector 30 is disposed on the conductive column 12 and is partially accommodated in the recess 121.

[0070] Here, when the first package body 10 and the second package body 20 are connected through the electrical connector 30, the recess 121 can accommodate part of the electrical connector 30, thereby effectively avoiding adjacent electrical connectors 30 from being connected together under the action of high-temperature reflow soldering and pressure, so that adjacent electrical connectors 30 are less likely to be bridged; and the functional layer structure 13 is arranged on the substrate 11 and at least covers part of the side surface of the conductive column 12, or the functional layer structure 13 is arranged on the substrate 11 and at least covers all of the side surface of the conductive column 12, and the adjacent conductive column 12 and the surrounding circuit structure are effectively protected by the functional layer structure 13.

[0071] Of course, there are many options for the functional layer structure 13, for example, the functional layer structure 13 is an insulating layer 132; or the functional layer structure 13 is a molding layer 131; or the functional layer structure 13 includes a stacked insulating layer 132 and a molding layer 131, specifically, the insulating layer 132 is arranged on the substrate 11, the insulating layer 132 covers part of the side surface of the conductive column 12, the molding layer 131 is arranged on the side of the insulating layer 132 away from the substrate 11, and the upper surface of the molding layer 131 is flush with the upper surface of the conductive column 12.

[0072] In some optional embodiments, the packaging device 2a of the present application may further include a chip 14 disposed on the substrate 11. Exemplarily, the chip 14 may be electrically connected to the substrate 11 through bumps in a flip chip manner.

[0073] For example, the chip 14 may be a bare chip 14 (i.e., Die) of various types. This application does not specifically limit this. For example, it may include a logic function chip 14, a memory chip 14, a communication chip 14, a microprocessor chip 14, a graphics chip 14, a micro-electromechanical system (MEMS) chip 14, a radio frequency chip 14, a bare chip or chip 14 scale package, an insert, or a combination thereof.

[0074] For example, the molding layer 131 may be made of various molding materials. Exemplarily, the molding materials may include epoxy resin, filler, catalyst, pigment, release agent, flame retardant, coupling agent, hardener, low stress absorber, adhesion promoter, ion trapping agent, etc.

[0075] In some specific implementations, continue to refer to Figure 2 The functional layer structure 13 includes a sealing layer 131 and an insulating layer 132. The insulating layer 132 is arranged on the substrate 11. The insulating layer 132 covers part of the side surface of the conductive column 12. There are part of the side surfaces of the conductive column 12 that are not covered by the insulating layer 132. The part of the side surface of the conductive column 12 that is not covered by the insulating layer 132 is covered by the sealing layer 131. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the sealing layer 131 is flush with the upper surface of the conductive column 12, exposing the upper surface of the conductive column 12; at this time, the sealing layer 131 has an opening exposing the upper surface of the chip 14, and the upper surface of the chip 14 is flush with the upper surface of the sealing layer 131. The structure of the sealing layer 131 exposing the chip 14 facilitates the heat transfer and dissipation of the chip 14, which helps to reduce the temperature of the chip 14 and improve the stability and reliability of the packaging device provided in the embodiment of the present application; in addition, since the chip 14 is not covered by the sealing layer 131, the thickness of the overall packaging device can be reduced, and the weight can also be reduced. For example, the insulating layer 132 and the encapsulation layer 131 may have the same thickness; or different thicknesses. The orthographic projection of the chip 14 on the substrate 11 does not overlap with the orthographic projection of the conductive pillar 12 on the substrate 11 .

[0076] refer to Figure 3 , Figure 3 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 3a of a packaging device according to the present application, Figure 3 Compared to Figure 2 , the difference is: Figure 3 The middle chip 14 is completely buried inside the chip 14 .

[0077] like Figure 3As shown, the functional layer structure 13 includes a mold sealing layer 131 and an insulating layer 132. The insulating layer 132 is arranged on the substrate 11, and the insulating layer 132 covers part of the side surface of the conductive column 12. There is a part of the side surface of the conductive column 12 that is not covered by the insulating layer 132, and the part of the side surface of the conductive column 12 that is not covered by the insulating layer 132 is covered by the mold sealing layer 131. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the mold sealing layer 131 is flush with the upper surface of the conductive column 12, and the upper surface of the conductive column 12 is The chip 14 is exposed; at this time, the chip 14 is covered by the encapsulation layer 131, and the upper surface of the chip 14 is not flush with the upper surface of the encapsulation layer 131; using the encapsulation layer 131 to cover the chip 14 can provide protection for the chip 14, prevent the chip 14 from being affected by mechanical damage, dust, moisture and other external environments, and improve the stability and reliability of the chip 14; and the encapsulation layer 131 covering the chip 14 can provide insulation protection for the chip 14, prevent the chip 14 from being electrically in contact with the external environment or other components, and avoid circuit short circuits and failures. For example, the thickness of the insulating layer 132 and the encapsulation layer 131 can be the same; the thickness of the insulating layer 132 and the encapsulation layer 131 are different. The first package 10 also includes a chip 14 electrically connected to the substrate 11; the orthographic projection of the chip 14 on the substrate 11 does not overlap with the orthographic projection of the conductive column 12 on the substrate 11.

[0078] refer to Figure 4 , Figure 4 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 4a of a packaging device according to the present application, Figure 4 Compared to Figure 2 The difference is that a filling layer 15 is provided between the chip 14 and the substrate 11. The filling layer 15 may be, for example, an underfill. The chip 14 is firmly fixed on the substrate 11 through the filling layer 15 to prevent loosening or falling off during use, thereby ensuring the stability and reliability of the electronic component. The filling layer 15 also protects the bumps between the chip 14 and the substrate 11.

[0079] The bottom filler is filled in the tiny gap between the chip 14 and the substrate 11 to improve the thermal conductivity, help dissipate heat, reduce the operating temperature of the chip 14, and extend the service life of the chip 14. The bottom filler can form an insulating layer 132 between the chip 14 and the substrate 11 to prevent short circuits between electronic components and improve the stability and safety of the circuit. The bottom filler can fill tiny pores to prevent moisture and dust from entering the gap between the chip 14 and the substrate 11, protecting the electronic components from the external environment. The bottom filler can also play a buffering and protective role, reducing the mechanical shock and vibration of the chip 14 during transportation and use, and reducing the risk of damage. The first package 10 also includes a chip 14 electrically connected to the substrate 11; the orthographic projection of the chip 14 on the substrate 11 does not overlap with the orthographic projection of the conductive column 12 on the substrate 11.

[0080] like Figure 5 As shown, Figure 5 It is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 5a of a packaging device according to the present application. Figure 5 Compared to Figure 3 , the difference is that: a filling layer 15 is provided between the chip 14 and the substrate 11, and the filling layer 15 can be, for example, a bottom filling glue, through which the chip 14 is firmly fixed on the substrate 11 to prevent loosening or falling off during use, thereby ensuring the stability and reliability of the electronic components. The bottom filling glue is filled in the tiny gap between the chip 14 and the substrate 11 to improve the thermal conductivity, help dissipate heat, reduce the operating temperature of the chip 14, and extend the service life of the chip 14. The bottom filling glue can form an insulating layer 132 between the chip 14 and the substrate 11 to prevent short circuits between electronic components and improve the stability and safety of the circuit. The bottom filling glue can fill tiny pores to prevent moisture and dust from entering the gap between the chip 14 and the substrate 11, and protect the electronic components from the influence of the external environment. The bottom filling glue can also play a buffering and protective role, reducing the mechanical shock and vibration of the chip 14 during transportation and use, and reducing the risk of damage. The first package body 10 further includes a chip 14 electrically connected to the substrate 11 ; the orthographic projection of the chip 14 on the substrate 11 does not overlap with the orthographic projection of the conductive pillar 12 on the substrate 11 .

[0081] Figure 6A-6E They are respectively Figure 2 Schematic diagram of the steps for fabricating the structure. Figure 6A-6E As shown, the manufacturing steps of an embodiment 2a of the packaging device of the present application include:

[0082] like Fig. 6A As shown, a substrate 11 is provided, a chip 14 is electrically connected to the upper surface of the substrate 11, and then an insulating layer 132 and a mold sealing layer 131 are formed in sequence; Fig. 6AThe structure is laser punched to form Figure 6B The structure shown; Figure 6C For Figure 6B The upper surface of the structure in the embodiment is electroplated (e.g., trace electroplating) to form a conductive column 12 having a recess 121, and the recess 121 is located on the upper surface of the conductive column 12 corresponding to the position where the solder ball will be set later; the bottom surface of the recess 121 is lower than the interface between the insulating layer 132 and the mold encapsulation layer 131 in vertical height; continue to refer to Fig.6D , the plating layer formed on the upper surface of the encapsulation layer 131 during the tracking electroplating process is removed by grinding process, so that the upper surface of the chip 14 is exposed on the encapsulation layer 131; continue to refer to Fig. 6E , the second package body 20 with an electrical connector 30 at the bottom is set on the first package body 10, and the first package body 10 and the second package body 20 are connected through the electrical connector 30, wherein the electrical connector 30 is electrically connected to the corresponding conductive column 12 and is partially accommodated in the recess 121.

[0083] Figure 7 It is a schematic diagram of the partial cross-sectional structure of a functional layer structure 13 in an embodiment of a packaging device according to the present application; a conductive column 12 with a recess 121 and a functional layer structure 13 are arranged on a substrate 11, and the functional layer structure 13 includes an insulating layer 132 and a molding layer 131 arranged in a stacked manner. Figure 7 The functional layer structure 13 is only used as an example, and the functional layer structure 13 may be an insulating layer 132 and a mold sealing layer 131 which are stacked, or the functional layer structure 13 may be an insulating layer 132, or the functional layer structure 13 may be a mold sealing layer 131. When the functional layer structure 13 includes an insulating layer 132 and a mold sealing layer 131 which are stacked, the thickness of the insulating layer 132 and the mold sealing layer 131 may be the same or different.

[0084] The specific structure of the concave portion 121 adopts different processes and has the following structures, including:

[0085] Structure 1, such as Figure 8 As shown, Figure 8 It is a schematic diagram of the partial cross-sectional structure of an embodiment 8a of the packaging device according to the present application using SMD (Solder Mask Defined) technology; the insulating layer 132 has a second notch 1321 for accommodating the conductive column 12, and the molding layer 131 has a first notch 1311 exposing the conductive column 12; the area of ​​the first notch 1311 is smaller than the area of ​​the second notch 1321.

[0086] Structure 2, such as Fig. 9 As shown, Fig. 9It is a partial cross-sectional structural schematic diagram of an embodiment 9a of the packaging device according to the present application using SMD (Solder Mask Defined, solder mask defined pad process); the insulating layer 132 has a second notch 1321 for accommodating the conductive column 12, and the mold sealing layer 131 has a first notch 1311 exposing the conductive column 12; the area of ​​the first notch 1311 is larger than the area of ​​the second notch 1321. The recess 121 includes a first hole 1211 and a second hole 1212 arranged in a vertical direction; the aperture size of the first hole 1211 is different from the aperture size of the second hole 1212; in the direction from the second package body 20 to the first package body 10, the aperture size of the first hole 1211 is larger than the aperture size of the second hole 1212; the first hole 1211 and the second hole 1212 form a stepped hole.

[0087] Structure three, such as Fig.10 As shown, Fig.10 It is a partial cross-sectional structural schematic diagram of an embodiment 10a of the packaging device according to the present application using NSMD (Non-Solder Mask Defined Pad Design); the first package body 10 also includes a pad 16 located on the substrate 11, the pad 16 is electrically connected to the conductive column 12, and the orthographic projection of the conductive column 12 on the substrate 11 covers the orthographic projection of the pad 16 on the substrate 11. The insulating layer 132 has a second notch 1321 for accommodating the conductive column 12, and the mold sealing layer 131 has a first notch 1311 exposing the conductive column 12; the area of ​​the first notch 1311 is smaller than the area of ​​the second notch 1321, and the area of ​​the first notch 1311 is smaller than the area of ​​the pad 16.

[0088] Structure 4, such as Fig.11 As shown, Fig.11 It is a partial cross-sectional structural schematic diagram of an embodiment 11a of the packaging device according to the present application using NSMD (Non-Solder Mask Defined Pad Design); the first package body 10 also includes a pad 16 located on the substrate 11, the pad 16 is electrically connected to the conductive column 12, and the orthographic projection of the conductive column 12 on the substrate 11 covers the orthographic projection of the pad 16 on the substrate 11. The insulating layer 132 has a second notch 1321 for accommodating the conductive column 12, and the mold sealing layer 131 has a first notch 1311 exposing the conductive column 12; the area of ​​the first notch 1311 is smaller than the area of ​​the second notch 1321, and the area of ​​the first notch 1311 is larger than the area of ​​the pad 16.

[0089] In some optional embodiments, such as Fig.12As shown, the packaging device of the present application further includes a seed layer 122 (i.e., a seed layer). The seed layer 122 is formed in an electroplating process. Before electroplating the conductive pillar 12, it is necessary to first use a physical vapor deposition (PVD) process to deposit a layer of metal as the seed layer 122 to facilitate subsequent electroplating.

[0090] To facilitate understanding of the specific location of the seed layer 122 (ie, the seed layer), as shown in FIG. Fig.12 As shown, Fig.12 This is in accordance with the corresponding Fig.11 The seed layer 122 is disposed between the contact surface of the conductive column 12 and the functional layer structure 13.

[0091] In some specific embodiments, reference Fig.13 As shown, Fig.13 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 13a of a packaging device according to the present application; Fig.13 Compared to Figure 2 In contrast, the difference is that the second package body 20 includes a terminal 21. Fig.13 The first package body 10 is connected to the second package body 20 through an electrical connector 30; the second package body 20 includes a terminal 21, and the terminal 21 is arranged one-to-one with the conductive column 12. The terminal 21 is at least partially located in the recess 121 of the conductive column 12. By arranging the terminal 21 in the second package body 20, the encapsulation and conductivity between the first package body 10 and the second package body 20 are increased. The functional layer structure 13 includes a sealing layer 131 and an insulating layer 132. The insulating layer 132 is arranged on the substrate 11. The insulating layer 132 covers part of the side surface of the conductive column 12. There are part of the side surfaces of the conductive column 12 that are not covered by the insulating layer 132. The part of the side surface of the conductive column 12 that is not covered by the insulating layer 132 is covered by the sealing layer 131. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the sealing layer 131 is flush with the upper surface of the conductive column 12, exposing the upper surface of the conductive column 12; at this time, the sealing layer 131 has an opening exposing the upper surface of the chip 14, and the upper surface of the chip 14 is flush with the upper surface of the sealing layer 131. The structure of the sealing layer 131 exposing the chip 14 facilitates the heat transfer and dissipation of the chip 14, helps to reduce the temperature of the chip 14, and improves the stability and reliability of the packaging device provided in the embodiment of the present application; in addition, since the chip 14 is not covered by the sealing layer 131, the thickness of the overall packaging device can be reduced, and the weight can also be reduced. For example, the insulating layer 132 and the encapsulating layer 131 may have the same thickness; or the insulating layer 132 and the encapsulating layer 131 may have different thicknesses.

[0092] In some specific embodiments, Fig.14 As shown, Fig.14is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 14a of a packaging device according to the present application; Fig.14 Compared to Figure 3 In contrast, the difference is that the second package body 20 includes a terminal 21. Fig.14 The first package body 10 is connected to the second package body 20 through an electrical connector 30; the second package body 20 includes a terminal 21, and the terminal 21 is arranged in a one-to-one correspondence with the conductive column 12. The terminal 21 is at least partially located in the recess 121 of the conductive column 12. By arranging the terminal 21 in the second package body 20, the coating and conductivity between the first package body 10 and the second package body 20 are increased. The functional layer structure 13 includes a molding layer 131 and an insulating layer 132. The insulating layer 132 is arranged on the substrate 11. The insulating layer 132 covers part of the side surface of the conductive column 12. There are part of the side surface of the conductive column 12 that is not covered by the insulating layer 132. The part of the side surface of the conductive column 12 that is not covered by the insulating layer 132 is covered by the molding layer 131. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the molding layer 131 is flush with the upper surface of the conductive column 12, exposing the upper surface of the conductive column 12. At this time, the chip 14 is covered by the mold sealing layer 131, and the upper surface of the chip 14 is not flush with the upper surface of the mold sealing layer 131; using the mold sealing layer 131 to cover the chip 14 can provide protection for the chip 14, prevent the chip 14 from being affected by mechanical damage, dust, moisture and other external environments, and improve the stability and reliability of the chip 14; and the mold sealing layer 131 covering the chip 14 can provide insulation protection for the chip 14, prevent the chip 14 from electrical contact with the external environment or other components, and avoid circuit short circuits and failures. For example, the thickness of the insulating layer 132 and the mold sealing layer 131 can be the same; the thickness of the insulating layer 132 and the mold sealing layer 131 are different.

[0093] In some specific embodiments, Fig.15 As shown, Fig.15 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 15a of a packaging device according to the present application; Fig.15 Compared to Figure 4 In contrast, the difference is that the second package body 20 includes a terminal 21. Fig.15The first package body 10 is connected to the second package body 20 through an electrical connector 30; the second package body 20 includes a terminal 21, and the terminal 21 is arranged one-to-one with the conductive column 12. The terminal 21 is at least partially located in the recess 121 of the conductive column 12. By arranging the terminal 21 in the second package body 20, the encapsulation and conductivity between the first package body 10 and the second package body 20 are increased. The functional layer structure 13 includes a sealing layer 131 and an insulating layer 132. The insulating layer 132 is arranged on the substrate 11. The insulating layer 132 covers part of the side surface of the conductive column 12. There are part of the side surfaces of the conductive column 12 that are not covered by the insulating layer 132. The part of the side surface of the conductive column 12 that is not covered by the insulating layer 132 is covered by the sealing layer 131. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the sealing layer 131 is flush with the upper surface of the conductive column 12, exposing the upper surface of the conductive column 12; at this time, the sealing layer 131 has an opening exposing the upper surface of the chip 14, and the upper surface of the chip 14 is flush with the upper surface of the sealing layer 131. The structure of the sealing layer 131 exposing the chip 14 facilitates the heat transfer and dissipation of the chip 14, helps to reduce the temperature of the chip 14, and improves the stability and reliability of the packaging device provided in the embodiment of the present application; in addition, since the chip 14 is not covered by the sealing layer 131, the thickness of the overall packaging device can be reduced, and the weight can also be reduced. For example, the thickness of the insulating layer 132 and the encapsulation layer 131 can be the same; the thickness of the insulating layer 132 and the encapsulation layer 131 is different. A filling layer 15 is provided between the chip 14 and the substrate 11. The filling layer 15 can be, for example, a bottom filling glue. The chip 14 is firmly fixed on the substrate 11 by the bottom filling glue to prevent loosening or falling off during use, thereby ensuring the stability and reliability of the electronic components. The bottom filling glue is filled in the tiny gap between the chip 14 and the substrate 11 to improve the thermal conductivity, help dissipate heat, reduce the operating temperature of the chip 14, and extend the service life of the chip 14. The bottom filling glue can form an insulating layer 132 between the chip 14 and the substrate 11, prevent short circuits between electronic components, and improve the stability and safety of the circuit. The bottom filling glue can fill tiny pores to prevent moisture and dust from entering the gap between the chip 14 and the substrate 11, and protect the electronic components from the influence of the external environment. The bottom filling glue can also play a buffering and protective role, reducing the mechanical shock and vibration of the chip 14 during transportation and use, and reducing the risk of damage.

[0094] In some specific embodiments, reference Fig.16 , Fig.16 is a schematic diagram of a partial longitudinal cross-sectional structure of an embodiment 16a of a packaging device according to the present application; Fig.16 Compared to Figure 5 In contrast, the difference is that the second package body 20 includes a terminal 21. Fig.16The first package body 10 is connected to the second package body 20 through an electrical connector 30; the second package body 20 includes a terminal 21, and the terminal 21 is arranged in a one-to-one correspondence with the conductive column 12. The terminal 21 is at least partially located in the recess 121 of the conductive column 12. By arranging the terminal 21 in the second package body 20, the coating and conductivity between the first package body 10 and the second package body 20 are increased. The functional layer structure 13 includes a molding layer 131 and an insulating layer 132. The insulating layer 132 is arranged on the substrate 11. The insulating layer 132 covers part of the side surface of the conductive column 12. There are part of the side surface of the conductive column 12 that is not covered by the insulating layer 132. The part of the side surface of the conductive column 12 that is not covered by the insulating layer 132 is covered by the molding layer 131. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the molding layer 131 is flush with the upper surface of the conductive column 12, exposing the upper surface of the conductive column 12. At this time, the chip 14 is covered by the mold sealing layer 131, and the upper surface of the chip 14 is not flush with the upper surface of the mold sealing layer 131; using the mold sealing layer 131 to cover the chip 14 can provide protection for the chip 14, prevent the chip 14 from being affected by mechanical damage, dust, moisture and other external environments, and improve the stability and reliability of the chip 14; and the mold sealing layer 131 covering the chip 14 can provide insulation protection for the chip 14, prevent the chip 14 from being electrically contacted with the external environment or other components, and avoid circuit short circuits and failures. For example, the thickness of the insulating layer 132 and the mold sealing layer 131 can be the same; the thickness of the insulating layer 132 and the mold sealing layer 131 is different. A filling layer 15 is provided between the chip 14 and the substrate 11. The filling layer 15 can be, for example, a bottom filling glue, and the chip 14 is firmly fixed on the substrate 11 through the bottom filling glue to prevent loosening or falling off during use, thereby ensuring the stability and reliability of the electronic components. The bottom filler is filled in the tiny gap between the chip 14 and the substrate 11 to improve the thermal conductivity, help dissipate heat, reduce the operating temperature of the chip 14, and extend the service life of the chip 14. The bottom filler can form an insulating layer 132 between the chip 14 and the substrate 11 to prevent short circuits between electronic components and improve the stability and safety of the circuit. The bottom filler can fill tiny pores to prevent moisture and dust from entering the gap between the chip 14 and the substrate 11, protecting the electronic components from the external environment. The bottom filler can also play a buffering and protective role, reducing the mechanical shock and vibration of the chip 14 during transportation and use, and reducing the risk of damage.

[0095] refer to Figure 17A-17E , Figure 17A-17B They are schematic diagrams of manufacturing steps of an embodiment 13a of the packaging device of the present application; Fig.17A A substrate 11 in a first package body 10 is provided, and a functional layer structure 13 and a chip 14 are arranged on the substrate 11, wherein the functional layer structure 13 includes an insulating layer 132 and a mold sealing layer arranged in layers; Fig. 17BTo perform laser via-hole drilling on the structure in FIG17, Fig. 17C For Fig. 17B The upper surface of the structure in the embodiment is formed with a coating having a concave portion 121 through a mask, and the coating serves as a part of the conductive column 12, and the concave portion 121 is located at a position corresponding to the conductive column 12; Fig.17D , grind the coating away from the position corresponding to the chip 14, so that the chip 14 is exposed; continue to refer to Fig.17E A terminal 21 is provided on the lower surface of the second package body 20 , and the electrical connector 30 is located in the recess 121 . The terminal 21 is embedded in the electrical connector 30 to connect the first package body 10 and the second package body 20 .

[0096] Regarding the position of the terminal 21 in the second package body 20, Figure 18-Figure 20 As shown, in Fig.18 In the embodiment, the terminal 21 in the second package body 20 is located in the middle of the recess 121 of the conductive column 12; Fig.19 In the embodiment, the terminal 21 in the second package body 20 is located on the right side of the recess 121 of the conductive column 12; Fig. 20 In the embodiment, the terminal 21 in the second package body 20 is located on the left side of the recess 121 of the conductive pillar 12 .

[0097] In some specific embodiments, when the functional layer structure 13 is only an insulating layer 132 (not shown in the figure), only the insulating layer 132 is arranged on the substrate 11, and the insulating layer 132 covers the side surface of the conductive column 12. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the insulating layer 132 is flush with the upper surface of the conductive column 12, and the upper surface of the conductive column 12 is exposed; for example, the chip 14 may be covered by the insulating layer 132, and the upper surface of the chip 14 is not flush with the upper surface of the insulating layer 132; using the insulating layer 132 to cover the chip 14 can provide protection for the chip 14, prevent the chip 14 from being affected by mechanical damage, dust, moisture and other external environments, and improve the stability and reliability of the chip 14; and the insulating layer 132 covering the chip 14 can provide insulation protection for the chip 14, prevent the chip 14 from electrical contact with the external environment or other components, and avoid circuit short circuits and failures. For example, at this time, the insulating layer 132 has an opening that exposes the upper surface of the chip 14, and the upper surface of the chip 14 is flush with the upper surface of the insulating layer 132. The structure of the insulating layer 132 exposing the chip 14 facilitates the heat transfer and dissipation of the chip 14, which helps to reduce the temperature of the chip 14 and improve the stability and reliability of the packaging device provided by the embodiment of the present application; in addition, since the chip 14 is not covered by the insulating layer 132, the thickness of the overall packaging device can be reduced, and the weight can also be reduced. For example, a filling layer 15 can also be provided between the chip 14 and the substrate 11.

[0098] In some specific embodiments, when the functional layer structure 13 is only a sealing layer 131 (not shown in the figure), only the sealing layer 131 is arranged on the substrate 11, and the sealing layer 131 covers the side surface of the conductive column 12. Of course, in order to ensure the contact between the conductive column 12 and the electrical connector 30, the upper surface of the sealing layer 131 is flush with the upper surface of the conductive column 12, exposing the upper surface of the conductive column 12; for example, the chip 14 may be covered by the sealing layer 131, and the upper surface of the chip 14 is not flush with the upper surface of the sealing layer 131; using the sealing layer 131 to cover the chip 14 can provide protection for the chip 14, prevent the chip 14 from being affected by mechanical damage, dust, moisture and other external environments, and improve the stability and reliability of the chip 14; and the sealing layer 131 covering the chip 14 can provide insulation protection for the chip 14, prevent the chip 14 from electrical contact with the external environment or other components, and avoid circuit short circuits and failures. For example, at this time, the mold sealing layer 131 has an opening that exposes the upper surface of the chip 14, and the upper surface of the chip 14 is flush with the upper surface of the mold sealing layer 131. The structure of the mold sealing layer 131 exposing the chip 14 facilitates the heat transfer and dissipation of the chip 14, which helps to reduce the temperature of the chip 14 and improve the stability and reliability of the packaging device provided by the embodiment of the present application; in addition, since the chip 14 is not covered by the mold sealing layer 131, the thickness of the overall packaging device can be reduced, and the weight can also be reduced. For example, a filling layer 15 can also be provided between the chip 14 and the substrate 11.

[0099] Although the present application has been described and illustrated with reference to the specific embodiments of the present application, these descriptions and illustrations do not limit the present application. It is clearly understood by those skilled in the art that various changes can be made, and equivalent elements can be substituted in the embodiments without departing from the true spirit and scope of the present application as defined by the appended claims. The illustrations may not necessarily be drawn to scale. Due to variables in the manufacturing process, etc., there may be differences between the technical reproduction in the present application and the actual implementation. There may be other embodiments of the present application that are not specifically described. The description and illustrations should be regarded as illustrative, not restrictive. Modifications may be made to adapt specific circumstances, materials, material compositions, methods or processes to the goals, spirits and scopes of the present application. All such modifications fall within the scope of the appended claims. Although the method applied for herein has been described with reference to specific operations performed in a specific order, it should be understood that these operations can be combined, subdivided or reordered to form equivalent methods without departing from the teachings of the present application. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit the present application.

Claims

1. A packaging device, characterized in that: The invention comprises a first package body, wherein the first package body comprises: substrate; A conductive column is disposed on the substrate, wherein the conductive column has a concave portion, and the concave portion is recessed from the upper surface of the conductive column toward the substrate; A functional layer structure is arranged on the substrate, and the functional layer structure at least covers the side surface of the conductive column part.

2. The packaging device according to claim 1, characterized in that: The conductive pillar is configured to be connected to an electrical connector, and the recess is configured to accommodate a portion of the electrical connector.

3. The packaging device according to claim 2, characterized in that: Also includes: A second package body is disposed on the first package body, and the second package body is electrically connected to the first package body through the electrical connector.

4. The packaging device according to claim 1, characterized in that: The functional layer structure includes an insulating layer or a molding layer.

5. The packaging device according to claim 1, characterized in that: The functional layer structure comprises an insulating layer and a mold sealing layer; The insulating layer is arranged on the substrate, and the insulating layer covers part of the side surface of the conductive column; the mold sealing layer is arranged on the side of the insulating layer away from the substrate, and the upper surface of the mold sealing layer is flush with the upper surface of the conductive column.

6. The packaging device according to claim 5, characterized in that: The first package body further comprises a chip electrically connected to the substrate; The orthographic projection of the chip on the substrate does not overlap with the orthographic projection of the conductive pillar on the substrate.

7. The packaging device according to claim 6, characterized in that: The mold sealing layer has an opening exposing the upper surface of the chip, and the upper surface of the chip is flush with the upper surface of the mold sealing layer.

8. The packaging device according to claim 7, characterized in that: The chip is covered by the molding layer, and the upper surface of the chip is not flush with the upper surface of the molding layer.

9. The packaging device according to claim 3, characterized in that: The second package body includes terminals, the terminals are arranged in a one-to-one correspondence with the conductive pillars, and at least a portion of the terminals are located in a recessed portion of the conductive pillars.

10. The packaging device according to claim 3, characterized in that: The conductive pillar further comprises a seed layer, and the seed layer is arranged between the conductive pillar and the contact surface of the functional layer structure.

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